* [U-Boot] [PATCH v4 01/17] sf: Adopt flash table INFO macro from Linux
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 02/17] sf: Simplify lock ops detection code Jagan Teki
` (16 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
INFO macro make flash table entries more adjustable like
adding new flash_info attributes, update ID length bytes
and so on and more over it will sync to Linux way of defining
flash_info attributes.
- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sandbox.c | 10 +-
drivers/mtd/spi/sf_internal.h | 26 +++--
drivers/mtd/spi/sf_params.c | 217 ++++++++++++++++++++++--------------------
drivers/mtd/spi/spi_flash.c | 119 ++++++++++++-----------
include/linux/err.h | 5 +
5 files changed, 205 insertions(+), 172 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index f59134f..d68ee4a 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -88,7 +88,7 @@ struct sandbox_spi_flash {
/* The current flash status (see STAT_XXX defines above) */
u16 status;
/* Data describing the flash we're emulating */
- const struct spi_flash_params *data;
+ const struct spi_flash_info *data;
/* The file on disk to serv up data from */
int fd;
};
@@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev)
struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
const char *file;
size_t len, idname_len;
- const struct spi_flash_params *data;
+ const struct spi_flash_info *data;
struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
struct sandbox_state *state = state_get_current();
struct udevice *bus = dev->parent;
@@ -168,7 +168,7 @@ static int sandbox_sf_probe(struct udevice *dev)
}
debug("%s: device='%s'\n", __func__, spec);
- for (data = spi_flash_params_table; data->name; data++) {
+ for (data = spi_flash_ids; data->name; data++) {
len = strlen(data->name);
if (idname_len != len)
continue;
@@ -359,7 +359,9 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
debug(" id: off:%u tx:", sbsf->off);
if (sbsf->off < IDCODE_LEN) {
/* Extract correct byte from ID 0x00aabbcc */
- id = sbsf->data->jedec >>
+ id = ((((sbsf->data)->id[0]) << 16) |
+ (((sbsf->data)->id[1]) << 8 |
+ ((sbsf->data)->id[2]))) >>
(8 * (IDCODE_LEN - 1 - sbsf->off));
} else {
id = 0;
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index cde4cfb..a9455ac 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -103,24 +103,36 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
#define CMD_SPANSION_RDAR 0x65 /* Read any device register */
#define CMD_SPANSION_WRAR 0x71 /* Write any device register */
#endif
+
+#define JEDEC_MFR(info) ((info)->id[0])
+#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
+#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
+
/**
- * struct spi_flash_params - SPI/QSPI flash device params structure
+ * struct spi_flash_info - SPI/QSPI flash device params structure
*
* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
- * @ext_jedec: Device ext_jedec ID
* @sector_size: Isn't necessarily a sector size from vendor,
* the size listed here is what works with CMD_ERASE_64K
* @nr_sectors: No.of sectors on this device
* @flags: Important param, for flash specific behaviour
*/
-struct spi_flash_params {
+struct spi_flash_info {
const char *name;
- u32 jedec;
- u16 ext_jedec;
+
+ /*
+ * This array stores the ID bytes.
+ * The first three bytes are the JEDIC ID.
+ * JEDEC ID zero means "no ID" (mostly older chips).
+ */
+ u8 id[5];
+ u8 id_len;
+
u32 sector_size;
u32 nr_sectors;
+ u16 page_size;
+
u16 flags;
#define SECT_4K BIT(0)
#define E_FSR BIT(1)
@@ -133,7 +145,7 @@ struct spi_flash_params {
#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
};
-extern const struct spi_flash_params spi_flash_params_table[];
+extern const struct spi_flash_info spi_flash_ids[];
/* Send a single-byte command to the device and read the response */
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 5b50114..7fcc3bc 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -12,125 +12,140 @@
#include "sf_internal.h"
+/* Used when the "_ext_id" is two bytes at most */
+#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
+ .id = { \
+ ((_jedec_id) >> 16) & 0xff, \
+ ((_jedec_id) >> 8) & 0xff, \
+ (_jedec_id) & 0xff, \
+ ((_ext_id) >> 8) & 0xff, \
+ (_ext_id) & 0xff, \
+ }, \
+ .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
+ .sector_size = (_sector_size), \
+ .nr_sectors = (_n_sectors), \
+ .page_size = 256, \
+ .flags = (_flags),
+
/* SPI/QSPI flash device params structure */
-const struct spi_flash_params spi_flash_params_table[] = {
+const struct spi_flash_info spi_flash_ids[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
- {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
- {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
- {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
- {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
- {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
- {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
- {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
- {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
- {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
+ {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
+ {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
+ {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_EON /* EON */
- {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
- {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
- {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
- {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
+ {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
+ {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
+ {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
- {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
+ {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
- {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
- {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
- {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
+ {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
+ {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
+ {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
- {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
- {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
- {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
- {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
- {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
- {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
- {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP},
- {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP},
- {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
+ {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
+ {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
+ {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
+ {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
+ {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
+ {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
+ {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
- {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
- {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
- {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
- {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
- {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
- {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP},
- {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP},
- {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP},
- {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP},
- {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP},
- {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP},
- {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP},
- {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP},
- {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP},
- {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP},
- {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP},
- {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP},
+ {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
+ {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
+ {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
+ {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
+ {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
+ {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
+ {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) },
+ {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) },
+ {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) },
+ {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) },
+ {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
+ {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
+ {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) },
+ {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
+ {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
- {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
- {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
- {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
- {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
- {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
- {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
- {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL},
- {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
- {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
- {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
- {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
- {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
- {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
- {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
- {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
- {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
- {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
- {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
- {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
- {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
- {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+ {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
+ {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
+ {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
+ {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
+ {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
+ {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
+ {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) },
+ {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
+ {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
+ {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
+ {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
- {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
- {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
- {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR},
- {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR},
- {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
- {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR},
- {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR},
- {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR},
- {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
- {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K},
- {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
+ {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
+ {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
+ {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) },
+ {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) },
+ {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) },
+ {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) },
+ {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) },
+ {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
+ {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
#endif
#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
- {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
- {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
- {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
- {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
- {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
- {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
- {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
- {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
- {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
+ {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
+ {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
+ {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
+ {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
#endif
{}, /* Empty entry to terminate the list */
/*
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 7f6e9ae..daa9014 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -165,7 +165,8 @@ bar_end:
return flash->bank_curr;
}
-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
+static int spi_flash_read_bar(struct spi_flash *flash,
+ const struct spi_flash_info *info)
{
u8 curr_bank = 0;
int ret;
@@ -173,7 +174,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
if (flash->size <= SPI_FLASH_16MB_BOUN)
goto bar_end;
- switch (idcode0) {
+ switch (JEDEC_MFR(info)) {
case SPI_FLASH_CFI_MFR_SPANSION:
flash->bank_read_cmd = CMD_BANKADDR_BRRD;
flash->bank_write_cmd = CMD_BANKADDR_BRWR;
@@ -924,9 +925,35 @@ static int micron_quad_enable(struct spi_flash *flash)
}
#endif
-static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
+static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash)
{
- switch (idcode0) {
+ int tmp;
+ u8 id[5];
+ const struct spi_flash_info *info;
+
+ tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
+ if (tmp < 0) {
+ printf("SF: error %d reading JEDEC ID\n", tmp);
+ return ERR_PTR(tmp);
+ }
+
+ info = spi_flash_ids;
+ for (; info->name != NULL; info++) {
+ if (info->id_len) {
+ if (!memcmp(info->id, id, info->id_len))
+ return info;
+ }
+ }
+
+ printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
+ id[0], id[1], id[2]);
+ return ERR_PTR(-ENODEV);
+}
+
+static int set_quad_mode(struct spi_flash *flash,
+ const struct spi_flash_info *info)
+{
+ switch (JEDEC_MFR(info)) {
#ifdef CONFIG_SPI_FLASH_MACRONIX
case SPI_FLASH_CFI_MFR_MACRONIX:
return macronix_quad_enable(flash);
@@ -941,7 +968,8 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
return micron_quad_enable(flash);
#endif
default:
- printf("SF: Need set QEB func for %02x flash\n", idcode0);
+ printf("SF: Need set QEB func for %02x flash\n",
+ JEDEC_MFR(info));
return -1;
}
}
@@ -1011,46 +1039,18 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)
int spi_flash_scan(struct spi_flash *flash)
{
struct spi_slave *spi = flash->spi;
- const struct spi_flash_params *params;
+ const struct spi_flash_info *info = NULL;
u16 jedec, ext_jedec;
u8 idcode[5];
int ret;
- /* Read the ID codes */
- ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
- if (ret) {
- printf("SF: Failed to get idcodes\n");
- return ret;
- }
-
-#ifdef DEBUG
- printf("SF: Got idcodes\n");
- print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
+ info = spi_flash_read_id(flash);
+ if (IS_ERR_OR_NULL(info))
+ return -ENOENT;
jedec = idcode[1] << 8 | idcode[2];
ext_jedec = idcode[3] << 8 | idcode[4];
- /* Validate params from spi_flash_params table */
- params = spi_flash_params_table;
- for (; params->name != NULL; params++) {
- if ((params->jedec >> 16) == idcode[0]) {
- if ((params->jedec & 0xFFFF) == jedec) {
- if (params->ext_jedec == 0)
- break;
- else if (params->ext_jedec == ext_jedec)
- break;
- }
- }
- }
-
- if (!params->name) {
- printf("SF: Unsupported flash IDs: ");
- printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
- idcode[0], jedec, ext_jedec);
- return -EPROTONOSUPPORT;
- }
-
#ifdef CONFIG_SPI_FLASH_SPANSION
/*
* The S25FS-S family physical sectors may be configured as a
@@ -1088,18 +1088,18 @@ int spi_flash_scan(struct spi_flash *flash)
}
#endif
/* Flash powers up read-only, so clear BP# bits */
- if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
- idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
- idcode[0] == SPI_FLASH_CFI_MFR_SST)
+ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
+ JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
+ JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
write_sr(flash, 0);
/* Assign spi data */
- flash->name = params->name;
+ flash->name = info->name;
flash->memory_map = spi->memory_map;
flash->dual_flash = spi->option;
/* Assign spi flash flags */
- if (params->flags & SST_WR)
+ if (info->flags & SST_WR)
flash->flags |= SNOR_F_SST_WR;
/* Assign spi_flash ops */
@@ -1118,7 +1118,7 @@ int spi_flash_scan(struct spi_flash *flash)
#endif
/* lock hooks are flash specific - assign them based on idcode0 */
- switch (idcode[0]) {
+ switch (JEDEC_MFR(info)) {
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
case SPI_FLASH_CFI_MFR_STMICRO:
case SPI_FLASH_CFI_MFR_SST:
@@ -1128,28 +1128,26 @@ int spi_flash_scan(struct spi_flash *flash)
#endif
break;
default:
- debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
+ debug("SF: Lock ops not supported for %02x flash\n", JEDEC_MFR(info));
}
/* Compute the flash size */
flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
+ flash->page_size = info->page_size;
/*
* The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
* 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
* the 0x4d00 Extended JEDEC code have 512b pages. All of the others
* have 256b pages.
*/
- if (ext_jedec == 0x4d00) {
- if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220))
- flash->page_size = 256;
- else
+ if (JEDEC_EXT(info) == 0x4d00) {
+ if ((JEDEC_ID(info) != 0x0215) &&
+ (JEDEC_ID(info) != 0x0216))
flash->page_size = 512;
- } else {
- flash->page_size = 256;
}
flash->page_size <<= flash->shift;
- flash->sector_size = params->sector_size << flash->shift;
- flash->size = flash->sector_size * params->nr_sectors << flash->shift;
+ flash->sector_size = info->sector_size << flash->shift;
+ flash->size = flash->sector_size * info->nr_sectors << flash->shift;
#ifdef CONFIG_SF_DUAL_FLASH
if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
flash->size <<= 1;
@@ -1157,7 +1155,7 @@ int spi_flash_scan(struct spi_flash *flash)
#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
/* Compute erase sector and command */
- if (params->flags & SECT_4K) {
+ if (info->flags & SECT_4K) {
flash->erase_cmd = CMD_ERASE_4K;
flash->erase_size = 4096 << flash->shift;
} else
@@ -1174,13 +1172,13 @@ int spi_flash_scan(struct spi_flash *flash)
flash->read_cmd = CMD_READ_ARRAY_FAST;
if (spi->mode & SPI_RX_SLOW)
flash->read_cmd = CMD_READ_ARRAY_SLOW;
- else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
+ else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
- else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
+ else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
/* Look for write commands */
- if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
+ if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
else
/* Go for default supported write cmd */
@@ -1190,9 +1188,10 @@ int spi_flash_scan(struct spi_flash *flash)
if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
(flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
(flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
- ret = set_quad_mode(flash, idcode[0]);
+ ret = set_quad_mode(flash, info);
if (ret) {
- debug("SF: Fail to set QEB for %02x\n", idcode[0]);
+ debug("SF: Fail to set QEB for %02x\n",
+ JEDEC_MFR(info));
return -EINVAL;
}
}
@@ -1217,13 +1216,13 @@ int spi_flash_scan(struct spi_flash *flash)
}
#ifdef CONFIG_SPI_FLASH_STMICRO
- if (params->flags & E_FSR)
+ if (info->flags & E_FSR)
flash->flags |= SNOR_F_USE_FSR;
#endif
/* Configure the BAR - discover bank cmds and read current bank */
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_read_bar(flash, idcode[0]);
+ ret = spi_flash_read_bar(flash, info);
if (ret < 0)
return ret;
#endif
diff --git a/include/linux/err.h b/include/linux/err.h
index 5b3c8bc..1bba498 100644
--- a/include/linux/err.h
+++ b/include/linux/err.h
@@ -36,6 +36,11 @@ static inline long IS_ERR(const void *ptr)
return IS_ERR_VALUE((unsigned long)ptr);
}
+static inline bool IS_ERR_OR_NULL(const void *ptr)
+{
+ return !ptr || IS_ERR_VALUE((unsigned long)ptr);
+}
+
/**
* ERR_CAST - Explicitly cast an error-valued pointer to another pointer type
* @ptr: The pointer to cast.
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 02/17] sf: Simplify lock ops detection code
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 01/17] sf: Adopt flash table INFO macro from Linux Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 03/17] sf: sandbox: Use JEDEC_MFR|ID in id exctract Jagan Teki
` (15 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
Simplify the flash_lock ops detection code and added
meaningful comment.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/spi_flash.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index daa9014..b92b0bf 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1117,19 +1117,15 @@ int spi_flash_scan(struct spi_flash *flash)
flash->read = spi_flash_cmd_read_ops;
#endif
- /* lock hooks are flash specific - assign them based on idcode0 */
- switch (JEDEC_MFR(info)) {
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
- case SPI_FLASH_CFI_MFR_STMICRO:
- case SPI_FLASH_CFI_MFR_SST:
+ /* NOR protection support for STmicro/Micron chips and similar */
+ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO ||
+ JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) {
flash->flash_lock = stm_lock;
flash->flash_unlock = stm_unlock;
flash->flash_is_locked = stm_is_locked;
-#endif
- break;
- default:
- debug("SF: Lock ops not supported for %02x flash\n", JEDEC_MFR(info));
}
+#endif
/* Compute the flash size */
flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 03/17] sf: sandbox: Use JEDEC_MFR|ID in id exctract
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 01/17] sf: Adopt flash table INFO macro from Linux Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 02/17] sf: Simplify lock ops detection code Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 04/17] sf: Cleanup spi_flash_info{} Jagan Teki
` (14 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
Instead of extracting id's separately better
to use JEDEC_MFR|ID for code simplicity.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sandbox.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index d68ee4a..09ce783 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -359,9 +359,8 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
debug(" id: off:%u tx:", sbsf->off);
if (sbsf->off < IDCODE_LEN) {
/* Extract correct byte from ID 0x00aabbcc */
- id = ((((sbsf->data)->id[0]) << 16) |
- (((sbsf->data)->id[1]) << 8 |
- ((sbsf->data)->id[2]))) >>
+ id = ((JEDEC_MFR(sbsf->data) << 16) |
+ JEDEC_ID(sbsf->data)) >>
(8 * (IDCODE_LEN - 1 - sbsf->off));
} else {
id = 0;
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 04/17] sf: Cleanup spi_flash_info{}
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (2 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 03/17] sf: sandbox: Use JEDEC_MFR|ID in id exctract Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 05/17] sf: Cleanup sf_params Jagan Teki
` (13 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
- Proper tabs spaces
- Removed unnecessary
- Added meaningful comments?
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 22 ++++++++--------------
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index a9455ac..71feba9 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -108,17 +108,8 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
-/**
- * struct spi_flash_info - SPI/QSPI flash device params structure
- *
- * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- * @sector_size: Isn't necessarily a sector size from vendor,
- * the size listed here is what works with CMD_ERASE_64K
- * @nr_sectors: No.of sectors on this device
- * @flags: Important param, for flash specific behaviour
- */
struct spi_flash_info {
- const char *name;
+ const char *name;
/*
* This array stores the ID bytes.
@@ -128,12 +119,15 @@ struct spi_flash_info {
u8 id[5];
u8 id_len;
- u32 sector_size;
- u32 nr_sectors;
+ /* The size listed here is what works with SPINOR_OP_SE, which isn't
+ * necessarily called a "sector" by the vendor.
+ */
+ u32 sector_size;
+ u32 nr_sectors;
- u16 page_size;
+ u16 page_size;
- u16 flags;
+ u16 flags;
#define SECT_4K BIT(0)
#define E_FSR BIT(1)
#define SST_WR BIT(2)
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 05/17] sf: Cleanup sf_params
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (3 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 04/17] sf: Cleanup spi_flash_info{} Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 06/17] sf: nr_sectors -> n_sectors Jagan Teki
` (12 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
- Move headers froms sf_params to common header file
- Removed unnecessary comment
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 5 +++--
drivers/mtd/spi/sf_params.c | 5 -----
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 71feba9..4a88cf7 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -10,8 +10,9 @@
#ifndef _SF_INTERNAL_H_
#define _SF_INTERNAL_H_
-#include <linux/types.h>
-#include <linux/compiler.h>
+#include <common.h>
+#include <spi.h>
+#include <spi_flash.h>
/* Dual SPI flash memories - see SPI_COMM_DUAL_... */
enum spi_dual_flash {
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 7fcc3bc..7314455 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -6,10 +6,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
-#include <spi.h>
-#include <spi_flash.h>
-
#include "sf_internal.h"
/* Used when the "_ext_id" is two bytes at most */
@@ -27,7 +23,6 @@
.page_size = 256, \
.flags = (_flags),
-/* SPI/QSPI flash device params structure */
const struct spi_flash_info spi_flash_ids[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
{"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 06/17] sf: nr_sectors -> n_sectors
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (4 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 05/17] sf: Cleanup sf_params Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 07/17] sf: Add SPI_FLASH_MAX_ID_LEN Jagan Teki
` (11 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
Rename nr_sectors as n_sectors to sync with Linux.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sandbox.c | 2 +-
drivers/mtd/spi/sf_internal.h | 2 +-
drivers/mtd/spi/sf_params.c | 2 +-
drivers/mtd/spi/spi_flash.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 09ce783..4944059 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -289,7 +289,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,
/* we only support erase here */
if (sbsf->cmd == CMD_ERASE_CHIP) {
sbsf->erase_size = sbsf->data->sector_size *
- sbsf->data->nr_sectors;
+ sbsf->data->n_sectors;
} else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) {
sbsf->erase_size = 4 << 10;
} else if (sbsf->cmd == CMD_ERASE_64K && !(flags & SECT_4K)) {
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 4a88cf7..527c252 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -124,7 +124,7 @@ struct spi_flash_info {
* necessarily called a "sector" by the vendor.
*/
u32 sector_size;
- u32 nr_sectors;
+ u32 n_sectors;
u16 page_size;
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 7314455..8a2a6b2 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -19,7 +19,7 @@
}, \
.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
.sector_size = (_sector_size), \
- .nr_sectors = (_n_sectors), \
+ .n_sectors = (_n_sectors), \
.page_size = 256, \
.flags = (_flags),
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index b92b0bf..0777bb5 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1143,7 +1143,7 @@ int spi_flash_scan(struct spi_flash *flash)
}
flash->page_size <<= flash->shift;
flash->sector_size = info->sector_size << flash->shift;
- flash->size = flash->sector_size * info->nr_sectors << flash->shift;
+ flash->size = flash->sector_size * info->n_sectors << flash->shift;
#ifdef CONFIG_SF_DUAL_FLASH
if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
flash->size <<= 1;
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 07/17] sf: Add SPI_FLASH_MAX_ID_LEN
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (5 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 06/17] sf: nr_sectors -> n_sectors Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 08/17] sf: Increase max id length by 1 byte Jagan Teki
` (10 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
Add id length of 5 bytes numerical value to macro.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 3 ++-
drivers/mtd/spi/spi_flash.c | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 527c252..437ac8a 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -108,6 +108,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
#define JEDEC_MFR(info) ((info)->id[0])
#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
+#define SPI_FLASH_MAX_ID_LEN 5
struct spi_flash_info {
const char *name;
@@ -117,7 +118,7 @@ struct spi_flash_info {
* The first three bytes are the JEDIC ID.
* JEDEC ID zero means "no ID" (mostly older chips).
*/
- u8 id[5];
+ u8 id[SPI_FLASH_MAX_ID_LEN];
u8 id_len;
/* The size listed here is what works with SPINOR_OP_SE, which isn't
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 0777bb5..ba884d7 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -928,10 +928,10 @@ static int micron_quad_enable(struct spi_flash *flash)
static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash)
{
int tmp;
- u8 id[5];
+ u8 id[SPI_FLASH_MAX_ID_LEN];
const struct spi_flash_info *info;
- tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
+ tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, SPI_FLASH_MAX_ID_LEN);
if (tmp < 0) {
printf("SF: error %d reading JEDEC ID\n", tmp);
return ERR_PTR(tmp);
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 08/17] sf: Increase max id length by 1 byte
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (6 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 07/17] sf: Add SPI_FLASH_MAX_ID_LEN Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 09/17] sf: Add INFO6 flash_info macro Jagan Teki
` (9 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for
few spansion flash families S25FS-S
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 437ac8a..f2ea368 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -108,7 +108,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
#define JEDEC_MFR(info) ((info)->id[0])
#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
-#define SPI_FLASH_MAX_ID_LEN 5
+#define SPI_FLASH_MAX_ID_LEN 6
struct spi_flash_info {
const char *name;
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 09/17] sf: Add INFO6 flash_info macro
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (7 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 08/17] sf: Increase max id length by 1 byte Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 10/17] sf: params: Add S25FS256S_64K spi flash support Jagan Teki
` (8 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_params.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 8a2a6b2..344d9c9 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -23,6 +23,21 @@
.page_size = 256, \
.flags = (_flags),
+#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
+ .id = { \
+ ((_jedec_id) >> 16) & 0xff, \
+ ((_jedec_id) >> 8) & 0xff, \
+ (_jedec_id) & 0xff, \
+ ((_ext_id) >> 16) & 0xff, \
+ ((_ext_id) >> 8) & 0xff, \
+ (_ext_id) & 0xff, \
+ }, \
+ .id_len = 6, \
+ .sector_size = (_sector_size), \
+ .n_sectors = (_n_sectors), \
+ .page_size = 256, \
+ .flags = (_flags),
+
const struct spi_flash_info spi_flash_ids[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
{"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 10/17] sf: params: Add S25FS256S_64K spi flash support
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (8 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 09/17] sf: Add INFO6 flash_info macro Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:52 ` [U-Boot] [PATCH v4 11/17] sf: Remove legacy idcode detection code Jagan Teki
` (7 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids.
In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.
Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 344d9c9..b029c76 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -93,6 +93,7 @@ const struct spi_flash_info spi_flash_ids[] = {
{"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) },
{"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
{"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
+ {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) },
{"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
{"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 11/17] sf: Remove legacy idcode detection code
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (9 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 10/17] sf: params: Add S25FS256S_64K spi flash support Jagan Teki
@ 2016-09-25 19:52 ` Jagan Teki
2016-09-25 19:53 ` [U-Boot] [PATCH v4 12/17] sf: Remove non-meaningful comments Jagan Teki
` (6 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:52 UTC (permalink / raw)
To: u-boot
Since flash detection code is more mature to
detect even with 6 bytes id length devices
removed old code and related references.
Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 6 ----
drivers/mtd/spi/spi_flash.c | 78 -------------------------------------------
2 files changed, 84 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index f2ea368..d50fb9a 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -99,12 +99,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
const void *buf);
#endif
-#ifdef CONFIG_SPI_FLASH_SPANSION
-/* Used for Spansion S25FS-S family flash only. */
-#define CMD_SPANSION_RDAR 0x65 /* Read any device register */
-#define CMD_SPANSION_WRAR 0x71 /* Write any device register */
-#endif
-
#define JEDEC_MFR(info) ((info)->id[0])
#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index ba884d7..27b85ba 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -999,94 +999,16 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
}
#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
-#ifdef CONFIG_SPI_FLASH_SPANSION
-static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)
-{
- u8 cmd[4];
- u32 offset = 0x800004; /* CR3V register offset */
- u8 cr3v;
- int ret;
-
- cmd[0] = CMD_SPANSION_RDAR;
- cmd[1] = offset >> 16;
- cmd[2] = offset >> 8;
- cmd[3] = offset >> 0;
-
- ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1);
- if (ret)
- return -EIO;
- /* CR3V bit3: 4-KB Erase */
- if (cr3v & 0x8)
- return 0;
-
- cmd[0] = CMD_SPANSION_WRAR;
- cr3v |= 0x8;
- ret = spi_flash_cmd_write(spi, cmd, 4, &cr3v, 1);
- if (ret)
- return -EIO;
-
- cmd[0] = CMD_SPANSION_RDAR;
- ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1);
- if (ret)
- return -EIO;
- if (!(cr3v & 0x8))
- return -EFAULT;
-
- return 0;
-}
-#endif
-
int spi_flash_scan(struct spi_flash *flash)
{
struct spi_slave *spi = flash->spi;
const struct spi_flash_info *info = NULL;
- u16 jedec, ext_jedec;
- u8 idcode[5];
int ret;
info = spi_flash_read_id(flash);
if (IS_ERR_OR_NULL(info))
return -ENOENT;
- jedec = idcode[1] << 8 | idcode[2];
- ext_jedec = idcode[3] << 8 | idcode[4];
-
-#ifdef CONFIG_SPI_FLASH_SPANSION
- /*
- * The S25FS-S family physical sectors may be configured as a
- * hybrid combination of eight 4-kB parameter sectors
- *@the top or bottom of the address space with all
- * but one of the remaining sectors being uniform size.
- * The Parameter Sector Erase commands (20h or 21h) must
- * be used to erase the 4-kB parameter sectors individually.
- * The Sector (uniform sector) Erase commands (D8h or DCh)
- * must be used to erase any of the remaining
- * sectors, including the portion of highest or lowest address
- * sector that is not overlaid by the parameter sectors.
- * The uniform sector erase command has no effect on parameter sectors.
- */
- if ((jedec == 0x0219 || (jedec == 0x0220)) &&
- (ext_jedec & 0xff00) == 0x4d00) {
- int ret;
- u8 id[6];
-
- /* Read the ID codes again, 6 bytes */
- ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id));
- if (ret)
- return -EIO;
-
- ret = memcmp(id, idcode, 5);
- if (ret)
- return -EIO;
-
- /* 0x81: S25FS-S family 0x80: S25FL-S family */
- if (id[5] == 0x81) {
- ret = spansion_s25fss_disable_4KB_erase(spi);
- if (ret)
- return ret;
- }
- }
-#endif
/* Flash powers up read-only, so clear BP# bits */
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 12/17] sf: Remove non-meaningful comments
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (10 preceding siblings ...)
2016-09-25 19:52 ` [U-Boot] [PATCH v4 11/17] sf: Remove legacy idcode detection code Jagan Teki
@ 2016-09-25 19:53 ` Jagan Teki
2016-09-25 19:53 ` [U-Boot] [PATCH v4 13/17] sf: Rename sf_params.c to spi_flash_ids Jagan Teki
` (5 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:53 UTC (permalink / raw)
To: u-boot
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/spi_flash.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 27b85ba..c1025c9 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1015,16 +1015,13 @@ int spi_flash_scan(struct spi_flash *flash)
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
write_sr(flash, 0);
- /* Assign spi data */
flash->name = info->name;
flash->memory_map = spi->memory_map;
flash->dual_flash = spi->option;
- /* Assign spi flash flags */
if (info->flags & SST_WR)
flash->flags |= SNOR_F_SST_WR;
- /* Assign spi_flash ops */
#ifndef CONFIG_DM_SPI_FLASH
flash->write = spi_flash_cmd_write_ops;
#if defined(CONFIG_SPI_FLASH_SST)
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 13/17] sf: Rename sf_params.c to spi_flash_ids
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (11 preceding siblings ...)
2016-09-25 19:53 ` [U-Boot] [PATCH v4 12/17] sf: Remove non-meaningful comments Jagan Teki
@ 2016-09-25 19:53 ` Jagan Teki
2016-09-25 19:53 ` [U-Boot] [PATCH v4 14/17] sf: ids: Use small letter's with flash name Jagan Teki
` (4 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:53 UTC (permalink / raw)
To: u-boot
spi_flash_ids.c is more meaningful name as the flash_info
table structure spi_flash_info has spi_flash_ids instance.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/Makefile | 2 +-
drivers/mtd/spi/spi_flash_ids.c | 176 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 177 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/spi/spi_flash_ids.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 6f47a66..6379b4b 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o
endif
-obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o sf_params.o sf.o
+obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o spi_flash_ids.o sf.o
obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o
obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o
obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
new file mode 100644
index 0000000..61cac59
--- /dev/null
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -0,0 +1,176 @@
+/*
+ * SPI Flash ID's.
+ *
+ * Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "sf_internal.h"
+
+/* Used when the "_ext_id" is two bytes at most */
+#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
+ .id = { \
+ ((_jedec_id) >> 16) & 0xff, \
+ ((_jedec_id) >> 8) & 0xff, \
+ (_jedec_id) & 0xff, \
+ ((_ext_id) >> 8) & 0xff, \
+ (_ext_id) & 0xff, \
+ }, \
+ .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
+ .sector_size = (_sector_size), \
+ .n_sectors = (_n_sectors), \
+ .page_size = 256, \
+ .flags = (_flags),
+
+#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
+ .id = { \
+ ((_jedec_id) >> 16) & 0xff, \
+ ((_jedec_id) >> 8) & 0xff, \
+ (_jedec_id) & 0xff, \
+ ((_ext_id) >> 16) & 0xff, \
+ ((_ext_id) >> 8) & 0xff, \
+ (_ext_id) & 0xff, \
+ }, \
+ .id_len = 6, \
+ .sector_size = (_sector_size), \
+ .n_sectors = (_n_sectors), \
+ .page_size = 256, \
+ .flags = (_flags),
+
+const struct spi_flash_info spi_flash_ids[] = {
+#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
+ {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
+ {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
+ {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_EON /* EON */
+ {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
+ {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
+ {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
+#endif
+#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
+ {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
+ {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
+ {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
+ {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
+#endif
+#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
+ {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
+ {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
+ {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
+ {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
+ {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
+ {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
+ {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
+ {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+#endif
+#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
+ {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
+ {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
+ {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
+ {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
+ {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
+ {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
+ {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) },
+ {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) },
+ {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) },
+ {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) },
+ {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
+ {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
+ {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) },
+ {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
+ {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
+#endif
+#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
+ {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
+ {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
+ {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
+ {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
+ {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
+ {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
+ {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) },
+ {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
+ {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
+ {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
+ {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_SST /* SST */
+ {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
+ {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
+ {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) },
+ {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) },
+ {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) },
+ {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) },
+ {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) },
+ {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
+ {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
+#endif
+#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
+ {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
+ {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
+ {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
+ {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
+#endif
+ {}, /* Empty entry to terminate the list */
+ /*
+ * Note:
+ * Below paired flash devices has similar spi_flash params.
+ * (S25FL129P_64K, S25FL128S_64K)
+ * (W25Q80BL, W25Q80BV)
+ * (W25Q16CL, W25Q16DV)
+ * (W25Q32BV, W25Q32FV_SPI)
+ * (W25Q64CV, W25Q64FV_SPI)
+ * (W25Q128BV, W25Q128FV_SPI)
+ * (W25Q32DW, W25Q32FV_QPI)
+ * (W25Q64DW, W25Q64FV_QPI)
+ * (W25Q128FW, W25Q128FV_QPI)
+ */
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 14/17] sf: ids: Use small letter's with flash name
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (12 preceding siblings ...)
2016-09-25 19:53 ` [U-Boot] [PATCH v4 13/17] sf: Rename sf_params.c to spi_flash_ids Jagan Teki
@ 2016-09-25 19:53 ` Jagan Teki
2016-09-25 19:53 ` [U-Boot] [PATCH v4 15/17] sf: ids: Use small letter in ext_jedec Jagan Teki
` (3 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:53 UTC (permalink / raw)
To: u-boot
For readability use small letter's with flash name.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/spi_flash_ids.c | 220 ++++++++++++++++++++--------------------
1 file changed, 110 insertions(+), 110 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 61cac59..f3c5e3f 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -41,136 +41,136 @@
const struct spi_flash_info spi_flash_ids[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
- {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
- {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
- {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
- {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
- {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
- {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
- {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
- {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
- {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
+ {"at45db011d", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
+ {"at45db021d", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"at45db041d", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"at45db081d", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
+ {"at45db161d", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"at45db321d", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"at45db641d", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"at25df321a", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"at25df321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"at26df081a", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_EON /* EON */
- {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
- {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
- {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
+ {"en25q32b", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
+ {"en25q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"en25q128b", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
+ {"en25s64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
- {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
- {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
- {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
+ {"is25lp032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
+ {"is25lp064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
+ {"is25lp128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
- {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
- {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
- {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
- {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
- {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
- {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
- {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
- {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
- {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"mx25l2006e", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
+ {"mx25l4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
+ {"mx25l8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
+ {"mx25l1605d", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
+ {"mx25l3205d", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
+ {"mx25l6405d", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
+ {"mx25l12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
+ {"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
- {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
- {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
- {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
- {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
- {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
- {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) },
- {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) },
- {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) },
- {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) },
- {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) },
- {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) },
- {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
- {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
- {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) },
- {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
- {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
- {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
+ {"s25fl008a", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
+ {"s25fl016a", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
+ {"s25fl032a", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
+ {"s25fl064a", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
+ {"s25fl116k", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
+ {"s25fl164k", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
+ {"s25fl128p_256k", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) },
+ {"s25fl128p_64k", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"s25fl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) },
+ {"s25fl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) },
+ {"s25fl128s_256k", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) },
+ {"s25fl128s_64k", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
+ {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
+ {"s25s256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"s25s512s", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) },
+ {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
+ {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
- {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
- {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
- {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
- {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
- {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
- {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
- {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) },
- {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
- {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
- {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
- {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
- {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
- {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
- {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
- {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
- {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
- {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
- {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
- {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
- {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
- {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
- {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"m25p10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
+ {"m25p20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
+ {"m25p40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
+ {"m25p80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
+ {"m25p16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
+ {"m25pE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
+ {"m25pX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) },
+ {"m25p32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
+ {"m25p64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
+ {"m25p128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
+ {"m25pX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"n25q016a", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"n25q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"n25q32a", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"n25q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"n25q64a", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"n25q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
+ {"n25q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"n25q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+ {"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
- {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
- {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
- {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) },
- {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) },
- {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
- {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) },
- {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) },
- {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) },
- {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
- {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) },
- {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
+ {"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
+ {"sst25vf080b", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
+ {"sst25vf016b", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) },
+ {"sst25vf032b", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) },
+ {"sst25vf064c", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"sst25wf512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) },
+ {"sst25wf010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) },
+ {"sst25wf020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) },
+ {"sst25wf040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
+ {"sst25wf040b", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"sst25wf080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
#endif
#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
- {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
- {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
- {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
- {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
- {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
- {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
- {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
- {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25p80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
+ {"w25p16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
+ {"w25p32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
+ {"w25x40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
+ {"w25x16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
+ {"w25x32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
+ {"w25x64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
+ {"w25q80bl", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q16cl", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q32bv", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q64cv", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q128bv", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q80bw", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q16dw", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q32dw", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q64dw", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
+ {"w25q128fw", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
#endif
{}, /* Empty entry to terminate the list */
/*
* Note:
* Below paired flash devices has similar spi_flash params.
- * (S25FL129P_64K, S25FL128S_64K)
- * (W25Q80BL, W25Q80BV)
- * (W25Q16CL, W25Q16DV)
- * (W25Q32BV, W25Q32FV_SPI)
- * (W25Q64CV, W25Q64FV_SPI)
- * (W25Q128BV, W25Q128FV_SPI)
- * (W25Q32DW, W25Q32FV_QPI)
- * (W25Q64DW, W25Q64FV_QPI)
- * (W25Q128FW, W25Q128FV_QPI)
+ * (s25fl129p_64k, s25fl128s_64k)
+ * (w25q80bl, w25q80bv)
+ * (w25q16cl, w25q16dv)
+ * (w25q32bv, w25q32fv_spi)
+ * (w25q64cv, w25q64fv_spi)
+ * (w25q128bv, w25q128fv_spi)
+ * (w25q32dw, w25q32fv_qpi)
+ * (w25q64dw, w25q64fv_qpi)
+ * (w25q128fw, w25q128fv_qpi)
*/
};
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 15/17] sf: ids: Use small letter in ext_jedec
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (13 preceding siblings ...)
2016-09-25 19:53 ` [U-Boot] [PATCH v4 14/17] sf: ids: Use small letter's with flash name Jagan Teki
@ 2016-09-25 19:53 ` Jagan Teki
2016-09-25 19:53 ` [U-Boot] [PATCH v4 16/17] sf: Rename few local functions Jagan Teki
` (2 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:53 UTC (permalink / raw)
To: u-boot
Use small 'd' in s25s512s ext_jedec
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/spi_flash_ids.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index f3c5e3f..9c3a450 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -95,7 +95,7 @@ const struct spi_flash_info spi_flash_ids[] = {
{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
{"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
{"s25s256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"s25s512s", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) },
+ {"s25s512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL | WR_QPP) },
{"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
{"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
{"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 16/17] sf: Rename few local functions
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (14 preceding siblings ...)
2016-09-25 19:53 ` [U-Boot] [PATCH v4 15/17] sf: ids: Use small letter in ext_jedec Jagan Teki
@ 2016-09-25 19:53 ` Jagan Teki
2016-09-25 19:53 ` [U-Boot] [PATCH v4 17/17] spi: Remove dual flash code Jagan Teki
2016-09-27 7:22 ` [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Bin Meng
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:53 UTC (permalink / raw)
To: u-boot
spi_flash_write_bar-> write_bar
spi_flash_write_bar -> read_bar
spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf_internal.h | 2 +-
drivers/mtd/spi/spi_flash.c | 23 +++++++++++------------
2 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index d50fb9a..2feb3b8 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -184,7 +184,7 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
* - SPI claim
* - spi_flash_cmd_write_enable
* - spi_flash_cmd_write
- * - spi_flash_cmd_wait_ready
+ * - spi_flash_wait_till_ready
* - SPI release
*/
int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index c1025c9..b4001a5 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -144,7 +144,7 @@ static int write_evcr(struct spi_flash *flash, u8 evcr)
#endif
#ifdef CONFIG_SPI_FLASH_BAR
-static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
+static int write_bar(struct spi_flash *flash, u32 offset)
{
u8 cmd, bank_sel;
int ret;
@@ -165,8 +165,7 @@ bar_end:
return flash->bank_curr;
}
-static int spi_flash_read_bar(struct spi_flash *flash,
- const struct spi_flash_info *info)
+static int read_bar(struct spi_flash *flash, const struct spi_flash_info *info)
{
u8 curr_bank = 0;
int ret;
@@ -263,8 +262,8 @@ static int spi_flash_ready(struct spi_flash *flash)
return sr && fsr;
}
-static int spi_flash_cmd_wait_ready(struct spi_flash *flash,
- unsigned long timeout)
+static int spi_flash_wait_till_ready(struct spi_flash *flash,
+ unsigned long timeout)
{
unsigned long timebase;
int ret;
@@ -312,7 +311,7 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
return ret;
}
- ret = spi_flash_cmd_wait_ready(flash, timeout);
+ ret = spi_flash_wait_till_ready(flash, timeout);
if (ret < 0) {
debug("SF: write %s timed out\n",
timeout == SPI_FLASH_PROG_TIMEOUT ?
@@ -354,7 +353,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
spi_flash_dual(flash, &erase_addr);
#endif
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_write_bar(flash, erase_addr);
+ ret = write_bar(flash, erase_addr);
if (ret < 0)
return ret;
#endif
@@ -405,7 +404,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
spi_flash_dual(flash, &write_addr);
#endif
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_write_bar(flash, write_addr);
+ ret = write_bar(flash, write_addr);
if (ret < 0)
return ret;
#endif
@@ -509,7 +508,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
spi_flash_dual(flash, &read_addr);
#endif
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_write_bar(flash, read_addr);
+ ret = write_bar(flash, read_addr);
if (ret < 0)
return ret;
bank_sel = flash->bank_curr;
@@ -561,7 +560,7 @@ static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
if (ret)
return ret;
- return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ return spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT);
}
int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
@@ -609,7 +608,7 @@ int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
break;
}
- ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ ret = spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret)
break;
@@ -1137,7 +1136,7 @@ int spi_flash_scan(struct spi_flash *flash)
/* Configure the BAR - discover bank cmds and read current bank */
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_read_bar(flash, info);
+ ret = read_bar(flash, info);
if (ret < 0)
return ret;
#endif
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 17/17] spi: Remove dual flash code
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (15 preceding siblings ...)
2016-09-25 19:53 ` [U-Boot] [PATCH v4 16/17] sf: Rename few local functions Jagan Teki
@ 2016-09-25 19:53 ` Jagan Teki
2016-09-27 7:22 ` [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Bin Meng
17 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-09-25 19:53 UTC (permalink / raw)
To: u-boot
Dual flash code in spi are usually take the spi controller
to work with dual connected flash devices. Usually these
dual connection operation's are referred to flash controller
protocol rather with spi controller protocol, these are still
present in flash side for the usage of spi-nor controllers.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
---
drivers/mtd/spi/sf.c | 4 ----
drivers/mtd/spi/spi_flash.c | 1 -
include/spi.h | 6 ------
3 files changed, 11 deletions(-)
diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c
index 664e860..d5e175c 100644
--- a/drivers/mtd/spi/sf.c
+++ b/drivers/mtd/spi/sf.c
@@ -18,10 +18,6 @@ static int spi_flash_read_write(struct spi_slave *spi,
unsigned long flags = SPI_XFER_BEGIN;
int ret;
-#ifdef CONFIG_SF_DUAL_FLASH
- if (spi->flags & SPI_XFER_U_PAGE)
- flags |= SPI_XFER_U_PAGE;
-#endif
if (data_len == 0)
flags |= SPI_XFER_END;
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index b4001a5..708991c 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1016,7 +1016,6 @@ int spi_flash_scan(struct spi_flash *flash)
flash->name = info->name;
flash->memory_map = spi->memory_map;
- flash->dual_flash = spi->option;
if (info->flags & SST_WR)
flash->flags |= SNOR_F_SST_WR;
diff --git a/include/spi.h b/include/spi.h
index 4c17983..deb65ef 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -30,10 +30,6 @@
#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
-/* SPI bus connection options - see enum spi_dual_flash */
-#define SPI_CONN_DUAL_SHARED (1 << 0)
-#define SPI_CONN_DUAL_SEPARATED (1 << 1)
-
/* Header byte that marks the start of the message */
#define SPI_PREAMBLE_END_BYTE 0xec
@@ -93,7 +89,6 @@ struct dm_spi_slave_platdata {
* @max_write_size: If non-zero, the maximum number of bytes which can
* be written@once, excluding command bytes.
* @memory_map: Address of read-only SPI flash access.
- * @option: Varies SPI bus options - separate, shared bus.
* @flags: Indication of SPI flags.
*/
struct spi_slave {
@@ -117,7 +112,6 @@ struct spi_slave {
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
-#define SPI_XFER_U_PAGE BIT(4)
};
/**
--
2.7.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection
2016-09-25 19:52 [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Jagan Teki
` (16 preceding siblings ...)
2016-09-25 19:53 ` [U-Boot] [PATCH v4 17/17] spi: Remove dual flash code Jagan Teki
@ 2016-09-27 7:22 ` Bin Meng
2016-10-05 16:58 ` Jagan Teki
17 siblings, 1 reply; 20+ messages in thread
From: Bin Meng @ 2016-09-27 7:22 UTC (permalink / raw)
To: u-boot
Hi Jagan,
On Mon, Sep 26, 2016 at 3:52 AM, Jagan Teki <jteki@openedev.com> wrote:
> From: Jagan Teki <jagan@amarulasolutions.com>
>
> Updated spi_flash_info table in sync with Linux, and removed
> legacy and unsupported code.
>
> Changes for v4:
> - Rebase to master
>
> Changes for v3:
> - New patches
> - Fix checkpatch.pl
> - Fix BIT positions in spi.h
> - Fix ti_qspi.c mode
> - Fix commit Nit: s/becuase/because
>
> Changes for v2:
> - New patches.
>
> Testing:
> $ git clone git://git.denx.de/u-boot-spi.git
> $ cd u-boot-spi
> $ git checkout -b next origin/next
>
I lost track of this series for some time. Is this the first series
that are part of your spi-nor work? I remember I tested some of your
series but I did not see my "Tested-by" here. Could you please share
some info? I would like to have some test.
Regards,
Bin
^ permalink raw reply [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection
2016-09-27 7:22 ` [U-Boot] [PATCH v4 00/17] sf:Updates on flash detection Bin Meng
@ 2016-10-05 16:58 ` Jagan Teki
0 siblings, 0 replies; 20+ messages in thread
From: Jagan Teki @ 2016-10-05 16:58 UTC (permalink / raw)
To: u-boot
Hi Bin,
On Tue, Sep 27, 2016 at 12:52 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Jagan,
>
> On Mon, Sep 26, 2016 at 3:52 AM, Jagan Teki <jteki@openedev.com> wrote:
>> From: Jagan Teki <jagan@amarulasolutions.com>
>>
>> Updated spi_flash_info table in sync with Linux, and removed
>> legacy and unsupported code.
>>
>> Changes for v4:
>> - Rebase to master
>>
>> Changes for v3:
>> - New patches
>> - Fix checkpatch.pl
>> - Fix BIT positions in spi.h
>> - Fix ti_qspi.c mode
>> - Fix commit Nit: s/becuase/because
>>
>> Changes for v2:
>> - New patches.
>>
>> Testing:
>> $ git clone git://git.denx.de/u-boot-spi.git
>> $ cd u-boot-spi
>> $ git checkout -b next origin/next
>>
>
> I lost track of this series for some time. Is this the first series
> that are part of your spi-nor work? I remember I tested some of your
> series but I did not see my "Tested-by" here. Could you please share
> some info? I would like to have some test.
Actually this series not related to spi-nor work, I was ended some
issues on that design where it require to have MTD should be dm-driven
first. Currently I'm working on that, will add CC on to that work.
This series is to familiar with the flash detection code that
eventually used on spi-nor work.
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 20+ messages in thread