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* [PATCH 1/7] drm/amdgpu: remove adev pointer from struct amdgpu_bo
@ 2016-09-29  7:52 Christian König
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  0 siblings, 1 reply; 15+ messages in thread
From: Christian König @ 2016-09-29  7:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

It's completely pointsless to have two pointers to the
device in the same structur.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  6 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c     | 10 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c    |  7 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c     |  4 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 50 ++++++++++++++++--------------
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |  3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 17 +++-------
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c    |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     |  2 +-
 9 files changed, 52 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2a95827..52ffd2f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -468,7 +468,6 @@ struct amdgpu_bo {
 	 */
 	struct list_head		va;
 	/* Constant after initialization */
-	struct amdgpu_device		*adev;
 	struct drm_gem_object		gem_base;
 	struct amdgpu_bo		*parent;
 	struct amdgpu_bo		*shadow;
@@ -2136,6 +2135,11 @@ struct amdgpu_device {
 
 };
 
+static inline struct amdgpu_device *amdgpu_get_adev(struct ttm_bo_device *bdev)
+{
+	return container_of(bdev, struct amdgpu_device, mman.bdev);
+}
+
 bool amdgpu_device_is_px(struct drm_device *dev);
 int amdgpu_device_init(struct amdgpu_device *adev,
 		       struct drm_device *ddev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 187c366..5beab71 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -355,6 +355,7 @@ static void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev,
 static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
 				 struct amdgpu_bo *bo)
 {
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	u64 initial_bytes_moved;
 	uint32_t domain;
 	int r;
@@ -372,9 +373,9 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
 
 retry:
 	amdgpu_ttm_placement_from_domain(bo, domain);
-	initial_bytes_moved = atomic64_read(&bo->adev->num_bytes_moved);
+	initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
 	r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
-	p->bytes_moved += atomic64_read(&bo->adev->num_bytes_moved) -
+	p->bytes_moved += atomic64_read(&adev->num_bytes_moved) -
 		initial_bytes_moved;
 
 	if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
@@ -400,6 +401,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
 
 		struct amdgpu_bo_list_entry *candidate = p->evictable;
 		struct amdgpu_bo *bo = candidate->robj;
+		struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 		u64 initial_bytes_moved;
 		uint32_t other;
 
@@ -420,9 +422,9 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
 
 		/* Good we can try to move this BO somewhere else */
 		amdgpu_ttm_placement_from_domain(bo, other);
-		initial_bytes_moved = atomic64_read(&bo->adev->num_bytes_moved);
+		initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
 		r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
-		p->bytes_moved += atomic64_read(&bo->adev->num_bytes_moved) -
+		p->bytes_moved += atomic64_read(&adev->num_bytes_moved) -
 			initial_bytes_moved;
 
 		if (unlikely(r))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index a7ea9a3..f2fb72d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -116,10 +116,11 @@ void amdgpu_gem_force_release(struct amdgpu_device *adev)
  * Call from drm_gem_handle_create which appear in both new and open ioctl
  * case.
  */
-int amdgpu_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
+int amdgpu_gem_object_open(struct drm_gem_object *obj,
+			   struct drm_file *file_priv)
 {
 	struct amdgpu_bo *abo = gem_to_amdgpu_bo(obj);
-	struct amdgpu_device *adev = abo->adev;
+	struct amdgpu_device *adev = amdgpu_get_adev(abo->tbo.bdev);
 	struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
 	struct amdgpu_vm *vm = &fpriv->vm;
 	struct amdgpu_bo_va *bo_va;
@@ -142,7 +143,7 @@ void amdgpu_gem_object_close(struct drm_gem_object *obj,
 			     struct drm_file *file_priv)
 {
 	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
-	struct amdgpu_device *adev = bo->adev;
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
 	struct amdgpu_vm *vm = &fpriv->vm;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
index 32fa7b7..4731231 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
@@ -285,7 +285,7 @@ free_rmn:
 int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
 {
 	unsigned long end = addr + amdgpu_bo_size(bo) - 1;
-	struct amdgpu_device *adev = bo->adev;
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	struct amdgpu_mn *rmn;
 	struct amdgpu_mn_node *node = NULL;
 	struct list_head bos;
@@ -340,7 +340,7 @@ int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
  */
 void amdgpu_mn_unregister(struct amdgpu_bo *bo)
 {
-	struct amdgpu_device *adev = bo->adev;
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	struct amdgpu_mn *rmn;
 	struct list_head *head;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index c6754e7..02fae3d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -88,18 +88,19 @@ static void amdgpu_update_memory_usage(struct amdgpu_device *adev,
 
 static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object *tbo)
 {
+	struct amdgpu_device *adev = amdgpu_get_adev(tbo->bdev);
 	struct amdgpu_bo *bo;
 
 	bo = container_of(tbo, struct amdgpu_bo, tbo);
 
-	amdgpu_update_memory_usage(bo->adev, &bo->tbo.mem, NULL);
+	amdgpu_update_memory_usage(adev, &bo->tbo.mem, NULL);
 
 	drm_gem_object_release(&bo->gem_base);
 	amdgpu_bo_unref(&bo->parent);
 	if (!list_empty(&bo->shadow_list)) {
-		mutex_lock(&bo->adev->shadow_list_lock);
+		mutex_lock(&adev->shadow_list_lock);
 		list_del_init(&bo->shadow_list);
-		mutex_unlock(&bo->adev->shadow_list_lock);
+		mutex_unlock(&adev->shadow_list_lock);
 	}
 	kfree(bo->metadata);
 	kfree(bo);
@@ -210,8 +211,10 @@ static void amdgpu_ttm_placement_init(struct amdgpu_device *adev,
 
 void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
 {
-	amdgpu_ttm_placement_init(abo->adev, &abo->placement,
-				  abo->placements, domain, abo->flags);
+	struct amdgpu_device *adev = amdgpu_get_adev(abo->tbo.bdev);
+
+	amdgpu_ttm_placement_init(adev, &abo->placement, abo->placements,
+				  domain, abo->flags);
 }
 
 static void amdgpu_fill_placement_to_bo(struct amdgpu_bo *bo,
@@ -357,7 +360,6 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
 		kfree(bo);
 		return r;
 	}
-	bo->adev = adev;
 	INIT_LIST_HEAD(&bo->shadow_list);
 	INIT_LIST_HEAD(&bo->va);
 	bo->prefered_domains = domain & (AMDGPU_GEM_DOMAIN_VRAM |
@@ -622,6 +624,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
 			     u64 min_offset, u64 max_offset,
 			     u64 *gpu_addr)
 {
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	int r, i;
 	unsigned fpfn, lpfn;
 
@@ -657,12 +660,12 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
 		if ((bo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
 		    !(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) &&
 		    (!max_offset || max_offset >
-		     bo->adev->mc.visible_vram_size)) {
+		     adev->mc.visible_vram_size)) {
 			if (WARN_ON_ONCE(min_offset >
-					 bo->adev->mc.visible_vram_size))
+					 adev->mc.visible_vram_size))
 				return -EINVAL;
 			fpfn = min_offset >> PAGE_SHIFT;
-			lpfn = bo->adev->mc.visible_vram_size >> PAGE_SHIFT;
+			lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT;
 		} else {
 			fpfn = min_offset >> PAGE_SHIFT;
 			lpfn = max_offset >> PAGE_SHIFT;
@@ -677,12 +680,12 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
 
 	r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 	if (unlikely(r)) {
-		dev_err(bo->adev->dev, "%p pin failed\n", bo);
+		dev_err(adev->dev, "%p pin failed\n", bo);
 		goto error;
 	}
 	r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
 	if (unlikely(r)) {
-		dev_err(bo->adev->dev, "%p bind failed\n", bo);
+		dev_err(adev->dev, "%p bind failed\n", bo);
 		goto error;
 	}
 
@@ -690,11 +693,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
 	if (gpu_addr != NULL)
 		*gpu_addr = amdgpu_bo_gpu_offset(bo);
 	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
-		bo->adev->vram_pin_size += amdgpu_bo_size(bo);
+		adev->vram_pin_size += amdgpu_bo_size(bo);
 		if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
-			bo->adev->invisible_pin_size += amdgpu_bo_size(bo);
+			adev->invisible_pin_size += amdgpu_bo_size(bo);
 	} else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
-		bo->adev->gart_pin_size += amdgpu_bo_size(bo);
+		adev->gart_pin_size += amdgpu_bo_size(bo);
 	}
 
 error:
@@ -708,10 +711,11 @@ int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain, u64 *gpu_addr)
 
 int amdgpu_bo_unpin(struct amdgpu_bo *bo)
 {
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	int r, i;
 
 	if (!bo->pin_count) {
-		dev_warn(bo->adev->dev, "%p unpin not necessary\n", bo);
+		dev_warn(adev->dev, "%p unpin not necessary\n", bo);
 		return 0;
 	}
 	bo->pin_count--;
@@ -723,16 +727,16 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
 	}
 	r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 	if (unlikely(r)) {
-		dev_err(bo->adev->dev, "%p validate failed for unpin\n", bo);
+		dev_err(adev->dev, "%p validate failed for unpin\n", bo);
 		goto error;
 	}
 
 	if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
-		bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
+		adev->vram_pin_size -= amdgpu_bo_size(bo);
 		if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
-			bo->adev->invisible_pin_size -= amdgpu_bo_size(bo);
+			adev->invisible_pin_size -= amdgpu_bo_size(bo);
 	} else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
-		bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
+		adev->gart_pin_size -= amdgpu_bo_size(bo);
 	}
 
 error:
@@ -857,6 +861,7 @@ int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
 void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
 			   struct ttm_mem_reg *new_mem)
 {
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
 	struct amdgpu_bo *abo;
 	struct ttm_mem_reg *old_mem = &bo->mem;
 
@@ -864,21 +869,21 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
 		return;
 
 	abo = container_of(bo, struct amdgpu_bo, tbo);
-	amdgpu_vm_bo_invalidate(abo->adev, abo);
+	amdgpu_vm_bo_invalidate(adev, abo);
 
 	/* update statistics */
 	if (!new_mem)
 		return;
 
 	/* move_notify is called before move happens */
-	amdgpu_update_memory_usage(abo->adev, &bo->mem, new_mem);
+	amdgpu_update_memory_usage(adev, &bo->mem, new_mem);
 
 	trace_amdgpu_ttm_bo_move(abo, new_mem->mem_type, old_mem->mem_type);
 }
 
 int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 {
-	struct amdgpu_device *adev;
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
 	struct amdgpu_bo *abo;
 	unsigned long offset, size, lpfn;
 	int i, r;
@@ -887,7 +892,6 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 		return 0;
 
 	abo = container_of(bo, struct amdgpu_bo, tbo);
-	adev = abo->adev;
 	if (bo->mem.mem_type != TTM_PL_VRAM)
 		return 0;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 8255034..c9b2c01 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -71,12 +71,13 @@ static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
  */
 static inline int amdgpu_bo_reserve(struct amdgpu_bo *bo, bool no_intr)
 {
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	int r;
 
 	r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);
 	if (unlikely(r != 0)) {
 		if (r != -ERESTARTSYS)
-			dev_err(bo->adev->dev, "%p reserve failed\n", bo);
+			dev_err(adev->dev, "%p reserve failed\n", bo);
 		return r;
 	}
 	return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 588e242..231b346 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -51,16 +51,6 @@
 static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
 static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev);
 
-static struct amdgpu_device *amdgpu_get_adev(struct ttm_bo_device *bdev)
-{
-	struct amdgpu_mman *mman;
-	struct amdgpu_device *adev;
-
-	mman = container_of(bdev, struct amdgpu_mman, bdev);
-	adev = container_of(mman, struct amdgpu_device, mman);
-	return adev;
-}
-
 
 /*
  * Global memory.
@@ -195,6 +185,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
 				struct ttm_placement *placement)
 {
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
 	struct amdgpu_bo *abo;
 	static struct ttm_place placements = {
 		.fpfn = 0,
@@ -213,7 +204,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
 	abo = container_of(bo, struct amdgpu_bo, tbo);
 	switch (bo->mem.mem_type) {
 	case TTM_PL_VRAM:
-		if (abo->adev->mman.buffer_funcs_ring->ready == false) {
+		if (adev->mman.buffer_funcs_ring->ready == false) {
 			amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU);
 		} else {
 			amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
@@ -229,7 +220,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
 				 * allocating address space for the BO.
 				 */
 				abo->placements[i].lpfn =
-					abo->adev->mc.gtt_size >> PAGE_SHIFT;
+					adev->mc.gtt_size >> PAGE_SHIFT;
 			}
 		}
 		break;
@@ -1367,7 +1358,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 		struct reservation_object *resv,
 		struct fence **fence)
 {
-	struct amdgpu_device *adev = bo->adev;
+	struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
 	struct amdgpu_job *job;
 	struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 4cf3ca7..d67eada 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -931,7 +931,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
 	if (r)
 		return r;
 
-	if (!bo->adev->uvd.address_64_bit) {
+	if (!ring->adev->uvd.address_64_bit) {
 		amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
 		amdgpu_uvd_force_into_uvd_segment(bo);
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 6ed11cc..73ad293 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1195,7 +1195,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
 
 	flags = amdgpu_ttm_tt_pte_flags(adev, bo_va->bo->tbo.ttm, mem);
 	gtt_flags = (amdgpu_ttm_is_bound(bo_va->bo->tbo.ttm) &&
-		adev == bo_va->bo->adev) ? flags : 0;
+		adev == amdgpu_get_adev(bo_va->bo->tbo.bdev)) ? flags : 0;
 
 	spin_lock(&vm->status_lock);
 	if (!list_empty(&bo_va->vm_status))
-- 
2.5.0

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^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 2/7] drm/amdgpu: update the shadow PD together with the real one
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2016-09-29  7:52   ` Christian König
       [not found]     ` <1475135557-11537-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  2016-09-29  7:52   ` [PATCH 3/7] drm/amdgpu: move PT validation back into VM code Christian König
                     ` (6 subsequent siblings)
  7 siblings, 1 reply; 15+ messages in thread
From: Christian König @ 2016-09-29  7:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

Far less CPU cycles needed for this approach.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    |   1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 134 +++++++++++++++++----------------
 2 files changed, 69 insertions(+), 66 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 52ffd2f..840fcdb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -824,7 +824,6 @@ struct amdgpu_ring {
 struct amdgpu_vm_pt {
 	struct amdgpu_bo_list_entry	entry;
 	uint64_t			addr;
-	uint64_t			shadow_addr;
 };
 
 struct amdgpu_vm {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 73ad293..8777394 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -612,16 +612,26 @@ static uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr)
 	return result;
 }
 
-static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
-					 struct amdgpu_vm *vm,
-					 bool shadow)
+/*
+ * amdgpu_vm_update_pdes - make sure that page directory is valid
+ *
+ * @adev: amdgpu_device pointer
+ * @vm: requested vm
+ * @start: start of GPU address range
+ * @end: end of GPU address range
+ *
+ * Allocates new page tables if necessary
+ * and updates the page directory.
+ * Returns 0 for success, error for failure.
+ */
+int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
+				    struct amdgpu_vm *vm)
 {
+	struct amdgpu_bo *shadow;
 	struct amdgpu_ring *ring;
-	struct amdgpu_bo *pd = shadow ? vm->page_directory->shadow :
-		vm->page_directory;
-	uint64_t pd_addr;
+	uint64_t pd_addr, shadow_addr;
 	uint32_t incr = AMDGPU_VM_PTE_COUNT * 8;
-	uint64_t last_pde = ~0, last_pt = ~0;
+	uint64_t last_pde = ~0, last_pt = ~0, last_shadow = ~0;
 	unsigned count = 0, pt_idx, ndw;
 	struct amdgpu_job *job;
 	struct amdgpu_pte_update_params params;
@@ -629,15 +639,8 @@ static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
 
 	int r;
 
-	if (!pd)
-		return 0;
-
-	r = amdgpu_ttm_bind(&pd->tbo, &pd->tbo.mem);
-	if (r)
-		return r;
-
-	pd_addr = amdgpu_bo_gpu_offset(pd);
 	ring = container_of(vm->entity.sched, struct amdgpu_ring, sched);
+	shadow = vm->page_directory->shadow;
 
 	/* padding, etc. */
 	ndw = 64;
@@ -645,6 +648,17 @@ static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
 	/* assume the worst case */
 	ndw += vm->max_pde_used * 6;
 
+	pd_addr = amdgpu_bo_gpu_offset(vm->page_directory);
+	if (shadow) {
+		r = amdgpu_ttm_bind(&shadow->tbo, &shadow->tbo.mem);
+		if (r)
+			return r;
+		shadow_addr = amdgpu_bo_gpu_offset(shadow);
+		ndw *= 2;
+	} else {
+		shadow_addr = 0;
+	}
+
 	r = amdgpu_job_alloc_with_ib(adev, ndw * 4, &job);
 	if (r)
 		return r;
@@ -662,23 +676,19 @@ static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
 			continue;
 
 		if (bo->shadow) {
-			struct amdgpu_bo *shadow = bo->shadow;
+			struct amdgpu_bo *pt_shadow = bo->shadow;
 
-			r = amdgpu_ttm_bind(&shadow->tbo, &shadow->tbo.mem);
+			r = amdgpu_ttm_bind(&pt_shadow->tbo,
+					    &pt_shadow->tbo.mem);
 			if (r)
 				return r;
 		}
 
 		pt = amdgpu_bo_gpu_offset(bo);
-		if (!shadow) {
-			if (vm->page_tables[pt_idx].addr == pt)
-				continue;
-			vm->page_tables[pt_idx].addr = pt;
-		} else {
-			if (vm->page_tables[pt_idx].shadow_addr == pt)
-				continue;
-			vm->page_tables[pt_idx].shadow_addr = pt;
-		}
+		if (vm->page_tables[pt_idx].addr == pt)
+			continue;
+
+		vm->page_tables[pt_idx].addr = pt;
 
 		pde = pd_addr + pt_idx * 8;
 		if (((last_pde + 8 * count) != pde) ||
@@ -686,6 +696,13 @@ static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
 		    (count == AMDGPU_VM_MAX_UPDATE_SIZE)) {
 
 			if (count) {
+				if (shadow)
+					amdgpu_vm_do_set_ptes(&params,
+							      last_shadow,
+							      last_pt, count,
+							      incr,
+							      AMDGPU_PTE_VALID);
+
 				amdgpu_vm_do_set_ptes(&params, last_pde,
 						      last_pt, count, incr,
 						      AMDGPU_PTE_VALID);
@@ -693,34 +710,44 @@ static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
 
 			count = 1;
 			last_pde = pde;
+			last_shadow = shadow_addr + pt_idx * 8;
 			last_pt = pt;
 		} else {
 			++count;
 		}
 	}
 
-	if (count)
+	if (count) {
+		if (vm->page_directory-shadow)
+			amdgpu_vm_do_set_ptes(&params, last_shadow, last_pt,
+					      count, incr, AMDGPU_PTE_VALID);
+
 		amdgpu_vm_do_set_ptes(&params, last_pde, last_pt,
 				      count, incr, AMDGPU_PTE_VALID);
+	}
+
+	if (params.ib->length_dw == 0) {
+		amdgpu_job_free(job);
+		return 0;
+	}
 
-	if (params.ib->length_dw != 0) {
-		amdgpu_ring_pad_ib(ring, params.ib);
-		amdgpu_sync_resv(adev, &job->sync, pd->tbo.resv,
+	amdgpu_ring_pad_ib(ring, params.ib);
+	amdgpu_sync_resv(adev, &job->sync, vm->page_directory->tbo.resv,
+			 AMDGPU_FENCE_OWNER_VM);
+	if (shadow)
+		amdgpu_sync_resv(adev, &job->sync, shadow->tbo.resv,
 				 AMDGPU_FENCE_OWNER_VM);
-		WARN_ON(params.ib->length_dw > ndw);
-		r = amdgpu_job_submit(job, ring, &vm->entity,
-				      AMDGPU_FENCE_OWNER_VM, &fence);
-		if (r)
-			goto error_free;
 
-		amdgpu_bo_fence(pd, fence, true);
-		fence_put(vm->page_directory_fence);
-		vm->page_directory_fence = fence_get(fence);
-		fence_put(fence);
+	WARN_ON(params.ib->length_dw > ndw);
+	r = amdgpu_job_submit(job, ring, &vm->entity,
+			      AMDGPU_FENCE_OWNER_VM, &fence);
+	if (r)
+		goto error_free;
 
-	} else {
-		amdgpu_job_free(job);
-	}
+	amdgpu_bo_fence(vm->page_directory, fence, true);
+	fence_put(vm->page_directory_fence);
+	vm->page_directory_fence = fence_get(fence);
+	fence_put(fence);
 
 	return 0;
 
@@ -729,29 +756,6 @@ error_free:
 	return r;
 }
 
-/*
- * amdgpu_vm_update_pdes - make sure that page directory is valid
- *
- * @adev: amdgpu_device pointer
- * @vm: requested vm
- * @start: start of GPU address range
- * @end: end of GPU address range
- *
- * Allocates new page tables if necessary
- * and updates the page directory.
- * Returns 0 for success, error for failure.
- */
-int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
-                                   struct amdgpu_vm *vm)
-{
-	int r;
-
-	r = amdgpu_vm_update_pd_or_shadow(adev, vm, true);
-	if (r)
-		return r;
-	return amdgpu_vm_update_pd_or_shadow(adev, vm, false);
-}
-
 /**
  * amdgpu_vm_update_ptes - make sure that page tables are valid
  *
-- 
2.5.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 3/7] drm/amdgpu: move PT validation back into VM code
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  2016-09-29  7:52   ` [PATCH 2/7] drm/amdgpu: update the shadow PD together with the real one Christian König
@ 2016-09-29  7:52   ` Christian König
       [not found]     ` <1475135557-11537-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  2016-09-29  7:52   ` [PATCH 4/7] drm/amdgpu: stop using a bo list entry for the VM PTs Christian König
                     ` (5 subsequent siblings)
  7 siblings, 1 reply; 15+ messages in thread
From: Christian König @ 2016-09-29  7:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

Saves a bunch of CPU cycles when swapping things back in and
allows us to split the VM headers into a separate file.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  5 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 42 ++++++++++++++++++++++-----------
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 27 ++++++++++++---------
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 20 +++++++++-------
 4 files changed, 59 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 840fcdb..0c2d32b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -917,8 +917,9 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
 void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
 			 struct list_head *validated,
 			 struct amdgpu_bo_list_entry *entry);
-void amdgpu_vm_get_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
-			  struct list_head *duplicates);
+int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
+			      int (*callback)(void *p, struct amdgpu_bo *bo),
+			      void *param);
 void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
 				  struct amdgpu_vm *vm);
 int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 5beab71..2adea17 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -388,9 +388,9 @@ retry:
 
 /* Last resort, try to evict something from the current working set */
 static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
-				struct amdgpu_bo_list_entry *lobj)
+				struct amdgpu_bo *validated)
 {
-	uint32_t domain = lobj->robj->allowed_domains;
+	uint32_t domain = validated->allowed_domains;
 	int r;
 
 	if (!p->evictable)
@@ -406,7 +406,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
 		uint32_t other;
 
 		/* If we reached our current BO we can forget it */
-		if (candidate == lobj)
+		if (candidate->robj == validated)
 			break;
 
 		other = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
@@ -439,6 +439,23 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
 	return false;
 }
 
+static int amdgpu_cs_validate(void *param, struct amdgpu_bo *bo)
+{
+	struct amdgpu_cs_parser *p = param;
+	int r;
+
+	do {
+		r = amdgpu_cs_bo_validate(p, bo);
+	} while (r == -ENOMEM && amdgpu_cs_try_evict(p, bo));
+	if (r)
+		return r;
+
+	if (bo->shadow)
+		r = amdgpu_cs_bo_validate(p, bo);
+
+	return r;
+}
+
 static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
 			    struct list_head *validated)
 {
@@ -466,18 +483,10 @@ static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
 		if (p->evictable == lobj)
 			p->evictable = NULL;
 
-		do {
-			r = amdgpu_cs_bo_validate(p, bo);
-		} while (r == -ENOMEM && amdgpu_cs_try_evict(p, lobj));
+		r = amdgpu_cs_validate(p, bo);
 		if (r)
 			return r;
 
-		if (bo->shadow) {
-			r = amdgpu_cs_bo_validate(p, bo);
-			if (r)
-				return r;
-		}
-
 		if (binding_userptr) {
 			drm_free_large(lobj->user_pages);
 			lobj->user_pages = NULL;
@@ -595,14 +604,19 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
 		list_splice(&need_pages, &p->validated);
 	}
 
-	amdgpu_vm_get_pt_bos(p->adev, &fpriv->vm, &duplicates);
-
 	p->bytes_moved_threshold = amdgpu_cs_get_threshold_for_moves(p->adev);
 	p->bytes_moved = 0;
 	p->evictable = list_last_entry(&p->validated,
 				       struct amdgpu_bo_list_entry,
 				       tv.head);
 
+	r = amdgpu_vm_validate_pt_bos(p->adev, &fpriv->vm,
+				      amdgpu_cs_validate, p);
+	if (r) {
+		DRM_ERROR("amdgpu_vm_validate_pt_bos() failed.\n");
+		goto error_validate;
+	}
+
 	r = amdgpu_cs_list_validate(p, &duplicates);
 	if (r) {
 		DRM_ERROR("amdgpu_cs_list_validate(duplicates) failed.\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index f2fb72d..8ff90fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -471,6 +471,16 @@ out:
 	return r;
 }
 
+static int amdgpu_gem_va_check(void *p, struct amdgpu_bo *bo)
+{
+	unsigned domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
+
+	/* if anything is swapped out don't swap it in here,
+	   just abort and wait for the next CS */
+
+	return domain == AMDGPU_GEM_DOMAIN_CPU ? -ERESTARTSYS : 0;
+}
+
 /**
  * amdgpu_gem_va_update_vm -update the bo_va in its VM
  *
@@ -481,7 +491,8 @@ out:
  * vital here, so they are not reported back to userspace.
  */
 static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
-				    struct amdgpu_bo_va *bo_va, uint32_t operation)
+				    struct amdgpu_bo_va *bo_va,
+				    uint32_t operation)
 {
 	struct ttm_validate_buffer tv, *entry;
 	struct amdgpu_bo_list_entry vm_pd;
@@ -504,7 +515,6 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
 	if (r)
 		goto error_print;
 
-	amdgpu_vm_get_pt_bos(adev, bo_va->vm, &duplicates);
 	list_for_each_entry(entry, &list, head) {
 		domain = amdgpu_mem_type_to_domain(entry->bo->mem.mem_type);
 		/* if anything is swapped out don't swap it in here,
@@ -512,13 +522,10 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
 		if (domain == AMDGPU_GEM_DOMAIN_CPU)
 			goto error_unreserve;
 	}
-	list_for_each_entry(entry, &duplicates, head) {
-		domain = amdgpu_mem_type_to_domain(entry->bo->mem.mem_type);
-		/* if anything is swapped out don't swap it in here,
-		   just abort and wait for the next CS */
-		if (domain == AMDGPU_GEM_DOMAIN_CPU)
-			goto error_unreserve;
-	}
+	r = amdgpu_vm_validate_pt_bos(adev, bo_va->vm, amdgpu_gem_va_check,
+				      NULL);
+	if (r)
+		goto error_unreserve;
 
 	r = amdgpu_vm_update_page_directory(adev, bo_va->vm);
 	if (r)
@@ -539,8 +546,6 @@ error_print:
 		DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
 }
 
-
-
 int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
 			  struct drm_file *filp)
 {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 8777394..4c5e79a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -116,27 +116,28 @@ void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
 }
 
 /**
- * amdgpu_vm_get_bos - add the vm BOs to a duplicates list
+ * amdgpu_vm_validate_pt_bos - validate the page table BOs
  *
  * @adev: amdgpu device pointer
  * @vm: vm providing the BOs
- * @duplicates: head of duplicates list
+ * @callback: callback to do the validation
  *
- * Add the page directory to the BO duplicates list
- * for command submission.
+ * Validate the page table BOs on command submission if neccessary.
  */
-void amdgpu_vm_get_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
-			  struct list_head *duplicates)
+int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
+			      int (*callback)(void *p, struct amdgpu_bo *bo),
+			      void *param)
 {
 	uint64_t num_evictions;
 	unsigned i;
+	int r;
 
 	/* We only need to validate the page tables
 	 * if they aren't already valid.
 	 */
 	num_evictions = atomic64_read(&adev->num_evictions);
 	if (num_evictions == vm->last_eviction_counter)
-		return;
+		return 0;
 
 	/* add the vm page table to the list */
 	for (i = 0; i <= vm->max_pde_used; ++i) {
@@ -145,9 +146,12 @@ void amdgpu_vm_get_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 		if (!entry->robj)
 			continue;
 
-		list_add(&entry->tv.head, duplicates);
+		r = callback(param, entry->robj);
+		if (r)
+			return r;
 	}
 
+	return 0;
 }
 
 /**
-- 
2.5.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 4/7] drm/amdgpu: stop using a bo list entry for the VM PTs
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  2016-09-29  7:52   ` [PATCH 2/7] drm/amdgpu: update the shadow PD together with the real one Christian König
  2016-09-29  7:52   ` [PATCH 3/7] drm/amdgpu: move PT validation back into VM code Christian König
@ 2016-09-29  7:52   ` Christian König
       [not found]     ` <1475135557-11537-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  2016-09-29  7:52   ` [PATCH 5/7] drm/amdgpu: move sync handling into a separate header Christian König
                     ` (4 subsequent siblings)
  7 siblings, 1 reply; 15+ messages in thread
From: Christian König @ 2016-09-29  7:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

Saves us a bit of memory.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34 ++++++++++++++--------------------
 2 files changed, 16 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 0c2d32b..f7016d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -822,8 +822,8 @@ struct amdgpu_ring {
 #define AMDGPU_VM_FAULT_STOP_ALWAYS	2
 
 struct amdgpu_vm_pt {
-	struct amdgpu_bo_list_entry	entry;
-	uint64_t			addr;
+	struct amdgpu_bo	*bo;
+	uint64_t		addr;
 };
 
 struct amdgpu_vm {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 4c5e79a..59f217b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -141,12 +141,12 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 
 	/* add the vm page table to the list */
 	for (i = 0; i <= vm->max_pde_used; ++i) {
-		struct amdgpu_bo_list_entry *entry = &vm->page_tables[i].entry;
+		struct amdgpu_bo *bo = vm->page_tables[i].bo;
 
-		if (!entry->robj)
+		if (!bo)
 			continue;
 
-		r = callback(param, entry->robj);
+		r = callback(param, bo);
 		if (r)
 			return r;
 	}
@@ -170,12 +170,12 @@ void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
 
 	spin_lock(&glob->lru_lock);
 	for (i = 0; i <= vm->max_pde_used; ++i) {
-		struct amdgpu_bo_list_entry *entry = &vm->page_tables[i].entry;
+		struct amdgpu_bo *bo = vm->page_tables[i].bo;
 
-		if (!entry->robj)
+		if (!bo)
 			continue;
 
-		ttm_bo_move_to_lru_tail(&entry->robj->tbo);
+		ttm_bo_move_to_lru_tail(&bo->tbo);
 	}
 	spin_unlock(&glob->lru_lock);
 }
@@ -673,7 +673,7 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
 
 	/* walk over the address space and update the page directory */
 	for (pt_idx = 0; pt_idx <= vm->max_pde_used; ++pt_idx) {
-		struct amdgpu_bo *bo = vm->page_tables[pt_idx].entry.robj;
+		struct amdgpu_bo *bo = vm->page_tables[pt_idx].bo;
 		uint64_t pde, pt;
 
 		if (bo == NULL)
@@ -789,11 +789,11 @@ static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
 	/* initialize the variables */
 	addr = start;
 	pt_idx = addr >> amdgpu_vm_block_size;
-	pt = vm->page_tables[pt_idx].entry.robj;
+	pt = vm->page_tables[pt_idx].bo;
 	if (params->shadow) {
 		if (!pt->shadow)
 			return;
-		pt = vm->page_tables[pt_idx].entry.robj->shadow;
+		pt = pt->shadow;
 	}
 	if ((addr & ~mask) == (end & ~mask))
 		nptes = end - addr;
@@ -812,11 +812,11 @@ static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
 	/* walk over the address space and update the page tables */
 	while (addr < end) {
 		pt_idx = addr >> amdgpu_vm_block_size;
-		pt = vm->page_tables[pt_idx].entry.robj;
+		pt = vm->page_tables[pt_idx].bo;
 		if (params->shadow) {
 			if (!pt->shadow)
 				return;
-			pt = vm->page_tables[pt_idx].entry.robj->shadow;
+			pt = pt->shadow;
 		}
 
 		if ((addr & ~mask) == (end & ~mask))
@@ -1428,11 +1428,9 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
 	/* walk over the address space and allocate the page tables */
 	for (pt_idx = saddr; pt_idx <= eaddr; ++pt_idx) {
 		struct reservation_object *resv = vm->page_directory->tbo.resv;
-		struct amdgpu_bo_list_entry *entry;
 		struct amdgpu_bo *pt;
 
-		entry = &vm->page_tables[pt_idx].entry;
-		if (entry->robj)
+		if (vm->page_tables[pt_idx].bo)
 			continue;
 
 		r = amdgpu_bo_create(adev, AMDGPU_VM_PTE_COUNT * 8,
@@ -1466,11 +1464,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
 			}
 		}
 
-		entry->robj = pt;
-		entry->priority = 0;
-		entry->tv.bo = &entry->robj->tbo;
-		entry->tv.shared = true;
-		entry->user_pages = NULL;
+		vm->page_tables[pt_idx].bo = pt;
 		vm->page_tables[pt_idx].addr = 0;
 	}
 
@@ -1722,7 +1716,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
 	}
 
 	for (i = 0; i < amdgpu_vm_num_pdes(adev); i++) {
-		struct amdgpu_bo *pt = vm->page_tables[i].entry.robj;
+		struct amdgpu_bo *pt = vm->page_tables[i].bo;
 
 		if (!pt)
 			continue;
-- 
2.5.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 5/7] drm/amdgpu: move sync handling into a separate header
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
                     ` (2 preceding siblings ...)
  2016-09-29  7:52   ` [PATCH 4/7] drm/amdgpu: stop using a bo list entry for the VM PTs Christian König
@ 2016-09-29  7:52   ` Christian König
  2016-09-29  7:52   ` [PATCH 6/7] drm/amdgpu: move fence and ring defines into amdgpu_ring.h Christian König
                     ` (3 subsequent siblings)
  7 siblings, 0 replies; 15+ messages in thread
From: Christian König @ 2016-09-29  7:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h      | 22 +------------
 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h | 56 ++++++++++++++++++++++++++++++++
 2 files changed, 57 insertions(+), 21 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f7016d1..826a2cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -55,6 +55,7 @@
 #include "amdgpu_gds.h"
 #include "amdgpu_acp.h"
 #include "amdgpu_dm.h"
+#include "amdgpu_sync.h"
 #include "amd_powerplay.h"
 
 #include "gpu_scheduler.h"
@@ -564,27 +565,6 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
 int amdgpu_mode_dumb_mmap(struct drm_file *filp,
 			  struct drm_device *dev,
 			  uint32_t handle, uint64_t *offset_p);
-/*
- * Synchronization
- */
-struct amdgpu_sync {
-	DECLARE_HASHTABLE(fences, 4);
-	struct fence	        *last_vm_update;
-};
-
-void amdgpu_sync_create(struct amdgpu_sync *sync);
-int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
-		      struct fence *f);
-int amdgpu_sync_resv(struct amdgpu_device *adev,
-		     struct amdgpu_sync *sync,
-		     struct reservation_object *resv,
-		     void *owner);
-struct fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
-				     struct amdgpu_ring *ring);
-struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
-void amdgpu_sync_free(struct amdgpu_sync *sync);
-int amdgpu_sync_init(void);
-void amdgpu_sync_fini(void);
 int amdgpu_fence_slab_init(void);
 void amdgpu_fence_slab_fini(void);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
new file mode 100644
index 0000000..405f379
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Christian König
+ */
+#ifndef __AMDGPU_SYNC_H__
+#define __AMDGPU_SYNC_H__
+
+#include <linux/hashtable.h>
+
+struct fence;
+struct reservation_object;
+struct amdgpu_device;
+struct amdgpu_ring;
+
+/*
+ * Container for fences used to sync command submissions.
+ */
+struct amdgpu_sync {
+	DECLARE_HASHTABLE(fences, 4);
+	struct fence	*last_vm_update;
+};
+
+void amdgpu_sync_create(struct amdgpu_sync *sync);
+int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
+		      struct fence *f);
+int amdgpu_sync_resv(struct amdgpu_device *adev,
+		     struct amdgpu_sync *sync,
+		     struct reservation_object *resv,
+		     void *owner);
+struct fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
+				     struct amdgpu_ring *ring);
+struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
+void amdgpu_sync_free(struct amdgpu_sync *sync);
+int amdgpu_sync_init(void);
+void amdgpu_sync_fini(void);
+
+#endif
-- 
2.5.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 6/7] drm/amdgpu: move fence and ring defines into amdgpu_ring.h
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
                     ` (3 preceding siblings ...)
  2016-09-29  7:52   ` [PATCH 5/7] drm/amdgpu: move sync handling into a separate header Christian König
@ 2016-09-29  7:52   ` Christian König
  2016-09-29  7:52   ` [PATCH 7/7] drm/amdgpu: move VM defines into amdgpu_vm.h Christian König
                     ` (2 subsequent siblings)
  7 siblings, 0 replies; 15+ messages in thread
From: Christian König @ 2016-09-29  7:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h      | 147 +-----------------------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 184 +++++++++++++++++++++++++++++++
 2 files changed, 185 insertions(+), 146 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 826a2cf..1b3ec22 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -56,6 +56,7 @@
 #include "amdgpu_acp.h"
 #include "amdgpu_dm.h"
 #include "amdgpu_sync.h"
+#include "amdgpu_ring.h"
 #include "amd_powerplay.h"
 
 #include "gpu_scheduler.h"
@@ -111,12 +112,6 @@ extern int amdgpu_vram_page_split;
 #define AMDGPUFB_CONN_LIMIT			4
 #define AMDGPU_BIOS_NUM_SCRATCH			8
 
-/* max number of rings */
-#define AMDGPU_MAX_RINGS			16
-#define AMDGPU_MAX_GFX_RINGS			1
-#define AMDGPU_MAX_COMPUTE_RINGS		8
-#define AMDGPU_MAX_VCE_RINGS			3
-
 /* max number of IP instances */
 #define AMDGPU_MAX_SDMA_INSTANCES		2
 
@@ -157,7 +152,6 @@ extern int amdgpu_vram_page_split;
 struct amdgpu_device;
 struct amdgpu_ib;
 struct amdgpu_vm;
-struct amdgpu_ring;
 struct amdgpu_cs_parser;
 struct amdgpu_job;
 struct amdgpu_irq_src;
@@ -290,47 +284,6 @@ struct amdgpu_ih_funcs {
 	void (*set_rptr)(struct amdgpu_device *adev);
 };
 
-/* provided by hw blocks that expose a ring buffer for commands */
-struct amdgpu_ring_funcs {
-	/* ring read/write ptr handling */
-	u32 (*get_rptr)(struct amdgpu_ring *ring);
-	u32 (*get_wptr)(struct amdgpu_ring *ring);
-	void (*set_wptr)(struct amdgpu_ring *ring);
-	/* validating and patching of IBs */
-	int (*parse_cs)(struct amdgpu_cs_parser *p, uint32_t ib_idx);
-	/* command emit functions */
-	void (*emit_ib)(struct amdgpu_ring *ring,
-			struct amdgpu_ib *ib,
-			unsigned vm_id, bool ctx_switch);
-	void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
-			   uint64_t seq, unsigned flags);
-	void (*emit_pipeline_sync)(struct amdgpu_ring *ring);
-	void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vm_id,
-			      uint64_t pd_addr);
-	void (*emit_hdp_flush)(struct amdgpu_ring *ring);
-	void (*emit_hdp_invalidate)(struct amdgpu_ring *ring);
-	void (*emit_gds_switch)(struct amdgpu_ring *ring, uint32_t vmid,
-				uint32_t gds_base, uint32_t gds_size,
-				uint32_t gws_base, uint32_t gws_size,
-				uint32_t oa_base, uint32_t oa_size);
-	/* testing functions */
-	int (*test_ring)(struct amdgpu_ring *ring);
-	int (*test_ib)(struct amdgpu_ring *ring, long timeout);
-	/* insert NOP packets */
-	void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count);
-	/* pad the indirect buffer to the necessary number of dw */
-	void (*pad_ib)(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
-	unsigned (*init_cond_exec)(struct amdgpu_ring *ring);
-	void (*patch_cond_exec)(struct amdgpu_ring *ring, unsigned offset);
-	/* note usage for clock and power gating */
-	void (*begin_use)(struct amdgpu_ring *ring);
-	void (*end_use)(struct amdgpu_ring *ring);
-	void (*emit_switch_buffer) (struct amdgpu_ring *ring);
-	void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags);
-	unsigned (*get_emit_ib_size) (struct amdgpu_ring *ring);
-	unsigned (*get_dma_frame_size) (struct amdgpu_ring *ring);
-};
-
 /*
  * BIOS.
  */
@@ -368,47 +321,6 @@ struct amdgpu_clock {
 };
 
 /*
- * Fences.
- */
-struct amdgpu_fence_driver {
-	uint64_t			gpu_addr;
-	volatile uint32_t		*cpu_addr;
-	/* sync_seq is protected by ring emission lock */
-	uint32_t			sync_seq;
-	atomic_t			last_seq;
-	bool				initialized;
-	struct amdgpu_irq_src		*irq_src;
-	unsigned			irq_type;
-	struct timer_list		fallback_timer;
-	unsigned			num_fences_mask;
-	spinlock_t			lock;
-	struct fence			**fences;
-};
-
-/* some special values for the owner field */
-#define AMDGPU_FENCE_OWNER_UNDEFINED	((void*)0ul)
-#define AMDGPU_FENCE_OWNER_VM		((void*)1ul)
-
-#define AMDGPU_FENCE_FLAG_64BIT         (1 << 0)
-#define AMDGPU_FENCE_FLAG_INT           (1 << 1)
-
-int amdgpu_fence_driver_init(struct amdgpu_device *adev);
-void amdgpu_fence_driver_fini(struct amdgpu_device *adev);
-void amdgpu_fence_driver_force_completion(struct amdgpu_device *adev);
-
-int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
-				  unsigned num_hw_submission);
-int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
-				   struct amdgpu_irq_src *irq_src,
-				   unsigned irq_type);
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
-void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
-int amdgpu_fence_emit(struct amdgpu_ring *ring, struct fence **fence);
-void amdgpu_fence_process(struct amdgpu_ring *ring);
-int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
-unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
-
-/*
  * BO.
  */
 
@@ -705,14 +617,6 @@ struct amdgpu_ib {
 	uint32_t			flags;
 };
 
-enum amdgpu_ring_type {
-	AMDGPU_RING_TYPE_GFX,
-	AMDGPU_RING_TYPE_COMPUTE,
-	AMDGPU_RING_TYPE_SDMA,
-	AMDGPU_RING_TYPE_UVD,
-	AMDGPU_RING_TYPE_VCE
-};
-
 extern const struct amd_sched_backend_ops amdgpu_sched_ops;
 
 int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
@@ -726,45 +630,6 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
 		      struct amd_sched_entity *entity, void *owner,
 		      struct fence **f);
 
-struct amdgpu_ring {
-	struct amdgpu_device		*adev;
-	const struct amdgpu_ring_funcs	*funcs;
-	struct amdgpu_fence_driver	fence_drv;
-	struct amd_gpu_scheduler	sched;
-
-	struct amdgpu_bo	*ring_obj;
-	volatile uint32_t	*ring;
-	unsigned		rptr_offs;
-	unsigned		wptr;
-	unsigned		wptr_old;
-	unsigned		ring_size;
-	unsigned		max_dw;
-	int			count_dw;
-	uint64_t		gpu_addr;
-	uint32_t		align_mask;
-	uint32_t		ptr_mask;
-	bool			ready;
-	u32			nop;
-	u32			idx;
-	u32			me;
-	u32			pipe;
-	u32			queue;
-	struct amdgpu_bo	*mqd_obj;
-	u32			doorbell_index;
-	bool			use_doorbell;
-	unsigned		wptr_offs;
-	unsigned		fence_offs;
-	uint64_t		current_ctx;
-	enum amdgpu_ring_type	type;
-	char			name[16];
-	unsigned		cond_exe_offs;
-	u64			cond_exe_gpu_addr;
-	volatile u32		*cond_exe_cpu_addr;
-#if defined(CONFIG_DEBUG_FS)
-	struct dentry *ent;
-#endif
-};
-
 /*
  * VM
  */
@@ -1170,16 +1035,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 int amdgpu_ib_pool_init(struct amdgpu_device *adev);
 void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
 int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
-int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
-void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
-void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
-void amdgpu_ring_commit(struct amdgpu_ring *ring);
-void amdgpu_ring_undo(struct amdgpu_ring *ring);
-int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
-		     unsigned ring_size, u32 nop, u32 align_mask,
-		     struct amdgpu_irq_src *irq_src, unsigned irq_type,
-		     enum amdgpu_ring_type ring_type);
-void amdgpu_ring_fini(struct amdgpu_ring *ring);
 
 /*
  * CS.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
new file mode 100644
index 0000000..2f93588
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -0,0 +1,184 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Christian König
+ */
+#ifndef __AMDGPU_RING_H__
+#define __AMDGPU_RING_H__
+
+#include "gpu_scheduler.h"
+
+/* max number of rings */
+#define AMDGPU_MAX_RINGS		16
+#define AMDGPU_MAX_GFX_RINGS		1
+#define AMDGPU_MAX_COMPUTE_RINGS	8
+#define AMDGPU_MAX_VCE_RINGS		3
+
+/* some special values for the owner field */
+#define AMDGPU_FENCE_OWNER_UNDEFINED	((void*)0ul)
+#define AMDGPU_FENCE_OWNER_VM		((void*)1ul)
+
+#define AMDGPU_FENCE_FLAG_64BIT         (1 << 0)
+#define AMDGPU_FENCE_FLAG_INT           (1 << 1)
+
+enum amdgpu_ring_type {
+	AMDGPU_RING_TYPE_GFX,
+	AMDGPU_RING_TYPE_COMPUTE,
+	AMDGPU_RING_TYPE_SDMA,
+	AMDGPU_RING_TYPE_UVD,
+	AMDGPU_RING_TYPE_VCE
+};
+
+struct amdgpu_device;
+struct amdgpu_ring;
+struct amdgpu_ib;
+struct amdgpu_cs_parser;
+
+/*
+ * Fences.
+ */
+struct amdgpu_fence_driver {
+	uint64_t			gpu_addr;
+	volatile uint32_t		*cpu_addr;
+	/* sync_seq is protected by ring emission lock */
+	uint32_t			sync_seq;
+	atomic_t			last_seq;
+	bool				initialized;
+	struct amdgpu_irq_src		*irq_src;
+	unsigned			irq_type;
+	struct timer_list		fallback_timer;
+	unsigned			num_fences_mask;
+	spinlock_t			lock;
+	struct fence			**fences;
+};
+
+int amdgpu_fence_driver_init(struct amdgpu_device *adev);
+void amdgpu_fence_driver_fini(struct amdgpu_device *adev);
+void amdgpu_fence_driver_force_completion(struct amdgpu_device *adev);
+
+int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
+				  unsigned num_hw_submission);
+int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
+				   struct amdgpu_irq_src *irq_src,
+				   unsigned irq_type);
+void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
+void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
+int amdgpu_fence_emit(struct amdgpu_ring *ring, struct fence **fence);
+void amdgpu_fence_process(struct amdgpu_ring *ring);
+int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
+unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
+
+/*
+ * Rings.
+ */
+
+/* provided by hw blocks that expose a ring buffer for commands */
+struct amdgpu_ring_funcs {
+	/* ring read/write ptr handling */
+	u32 (*get_rptr)(struct amdgpu_ring *ring);
+	u32 (*get_wptr)(struct amdgpu_ring *ring);
+	void (*set_wptr)(struct amdgpu_ring *ring);
+	/* validating and patching of IBs */
+	int (*parse_cs)(struct amdgpu_cs_parser *p, uint32_t ib_idx);
+	/* command emit functions */
+	void (*emit_ib)(struct amdgpu_ring *ring,
+			struct amdgpu_ib *ib,
+			unsigned vm_id, bool ctx_switch);
+	void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
+			   uint64_t seq, unsigned flags);
+	void (*emit_pipeline_sync)(struct amdgpu_ring *ring);
+	void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vm_id,
+			      uint64_t pd_addr);
+	void (*emit_hdp_flush)(struct amdgpu_ring *ring);
+	void (*emit_hdp_invalidate)(struct amdgpu_ring *ring);
+	void (*emit_gds_switch)(struct amdgpu_ring *ring, uint32_t vmid,
+				uint32_t gds_base, uint32_t gds_size,
+				uint32_t gws_base, uint32_t gws_size,
+				uint32_t oa_base, uint32_t oa_size);
+	/* testing functions */
+	int (*test_ring)(struct amdgpu_ring *ring);
+	int (*test_ib)(struct amdgpu_ring *ring, long timeout);
+	/* insert NOP packets */
+	void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count);
+	/* pad the indirect buffer to the necessary number of dw */
+	void (*pad_ib)(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
+	unsigned (*init_cond_exec)(struct amdgpu_ring *ring);
+	void (*patch_cond_exec)(struct amdgpu_ring *ring, unsigned offset);
+	/* note usage for clock and power gating */
+	void (*begin_use)(struct amdgpu_ring *ring);
+	void (*end_use)(struct amdgpu_ring *ring);
+	void (*emit_switch_buffer) (struct amdgpu_ring *ring);
+	void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags);
+	unsigned (*get_emit_ib_size) (struct amdgpu_ring *ring);
+	unsigned (*get_dma_frame_size) (struct amdgpu_ring *ring);
+};
+
+struct amdgpu_ring {
+	struct amdgpu_device		*adev;
+	const struct amdgpu_ring_funcs	*funcs;
+	struct amdgpu_fence_driver	fence_drv;
+	struct amd_gpu_scheduler	sched;
+
+	struct amdgpu_bo	*ring_obj;
+	volatile uint32_t	*ring;
+	unsigned		rptr_offs;
+	unsigned		wptr;
+	unsigned		wptr_old;
+	unsigned		ring_size;
+	unsigned		max_dw;
+	int			count_dw;
+	uint64_t		gpu_addr;
+	uint32_t		align_mask;
+	uint32_t		ptr_mask;
+	bool			ready;
+	u32			nop;
+	u32			idx;
+	u32			me;
+	u32			pipe;
+	u32			queue;
+	struct amdgpu_bo	*mqd_obj;
+	u32			doorbell_index;
+	bool			use_doorbell;
+	unsigned		wptr_offs;
+	unsigned		fence_offs;
+	uint64_t		current_ctx;
+	enum amdgpu_ring_type	type;
+	char			name[16];
+	unsigned		cond_exe_offs;
+	u64			cond_exe_gpu_addr;
+	volatile u32		*cond_exe_cpu_addr;
+#if defined(CONFIG_DEBUG_FS)
+	struct dentry *ent;
+#endif
+};
+
+int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
+void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
+void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
+void amdgpu_ring_commit(struct amdgpu_ring *ring);
+void amdgpu_ring_undo(struct amdgpu_ring *ring);
+int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
+		     unsigned ring_size, u32 nop, u32 align_mask,
+		     struct amdgpu_irq_src *irq_src, unsigned irq_type,
+		     enum amdgpu_ring_type ring_type);
+void amdgpu_ring_fini(struct amdgpu_ring *ring);
+
+#endif
-- 
2.5.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 7/7] drm/amdgpu: move VM defines into amdgpu_vm.h
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
                     ` (4 preceding siblings ...)
  2016-09-29  7:52   ` [PATCH 6/7] drm/amdgpu: move fence and ring defines into amdgpu_ring.h Christian König
@ 2016-09-29  7:52   ` Christian König
       [not found]     ` <1475135557-11537-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  2016-09-29 16:41   ` [PATCH 1/7] drm/amdgpu: remove adev pointer from struct amdgpu_bo Alex Deucher
  2016-10-02 21:21   ` Grazvydas Ignotas
  7 siblings, 1 reply; 15+ messages in thread
From: Christian König @ 2016-09-29  7:52 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 170 +--------------------------
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 205 +++++++++++++++++++++++++++++++++
 2 files changed, 206 insertions(+), 169 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 1b3ec22..3291dff 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -57,6 +57,7 @@
 #include "amdgpu_dm.h"
 #include "amdgpu_sync.h"
 #include "amdgpu_ring.h"
+#include "amdgpu_vm.h"
 #include "amd_powerplay.h"
 
 #include "gpu_scheduler.h"
@@ -151,7 +152,6 @@ extern int amdgpu_vram_page_split;
 
 struct amdgpu_device;
 struct amdgpu_ib;
-struct amdgpu_vm;
 struct amdgpu_cs_parser;
 struct amdgpu_job;
 struct amdgpu_irq_src;
@@ -631,174 +631,6 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
 		      struct fence **f);
 
 /*
- * VM
- */
-
-/* maximum number of VMIDs */
-#define AMDGPU_NUM_VM	16
-
-/* Maximum number of PTEs the hardware can write with one command */
-#define AMDGPU_VM_MAX_UPDATE_SIZE	0x3FFFF
-
-/* number of entries in page table */
-#define AMDGPU_VM_PTE_COUNT (1 << amdgpu_vm_block_size)
-
-/* PTBs (Page Table Blocks) need to be aligned to 32K */
-#define AMDGPU_VM_PTB_ALIGN_SIZE   32768
-
-/* LOG2 number of continuous pages for the fragment field */
-#define AMDGPU_LOG2_PAGES_PER_FRAG 4
-
-#define AMDGPU_PTE_VALID	(1 << 0)
-#define AMDGPU_PTE_SYSTEM	(1 << 1)
-#define AMDGPU_PTE_SNOOPED	(1 << 2)
-
-/* VI only */
-#define AMDGPU_PTE_EXECUTABLE	(1 << 4)
-
-#define AMDGPU_PTE_READABLE	(1 << 5)
-#define AMDGPU_PTE_WRITEABLE	(1 << 6)
-
-#define AMDGPU_PTE_FRAG(x)	((x & 0x1f) << 7)
-
-/* How to programm VM fault handling */
-#define AMDGPU_VM_FAULT_STOP_NEVER	0
-#define AMDGPU_VM_FAULT_STOP_FIRST	1
-#define AMDGPU_VM_FAULT_STOP_ALWAYS	2
-
-struct amdgpu_vm_pt {
-	struct amdgpu_bo	*bo;
-	uint64_t		addr;
-};
-
-struct amdgpu_vm {
-	/* tree of virtual addresses mapped */
-	struct rb_root		va;
-
-	/* protecting invalidated */
-	spinlock_t		status_lock;
-
-	/* BOs moved, but not yet updated in the PT */
-	struct list_head	invalidated;
-
-	/* BOs cleared in the PT because of a move */
-	struct list_head	cleared;
-
-	/* BO mappings freed, but not yet updated in the PT */
-	struct list_head	freed;
-
-	/* contains the page directory */
-	struct amdgpu_bo	*page_directory;
-	unsigned		max_pde_used;
-	struct fence		*page_directory_fence;
-	uint64_t		last_eviction_counter;
-
-	/* array of page tables, one for each page directory entry */
-	struct amdgpu_vm_pt	*page_tables;
-
-	/* for id and flush management per ring */
-	struct amdgpu_vm_id	*ids[AMDGPU_MAX_RINGS];
-
-	/* protecting freed */
-	spinlock_t		freed_lock;
-
-	/* Scheduler entity for page table updates */
-	struct amd_sched_entity	entity;
-
-	/* client id */
-	u64                     client_id;
-};
-
-struct amdgpu_vm_id {
-	struct list_head	list;
-	struct fence		*first;
-	struct amdgpu_sync	active;
-	struct fence		*last_flush;
-	atomic64_t		owner;
-
-	uint64_t		pd_gpu_addr;
-	/* last flushed PD/PT update */
-	struct fence		*flushed_updates;
-
-	uint32_t                current_gpu_reset_count;
-
-	uint32_t		gds_base;
-	uint32_t		gds_size;
-	uint32_t		gws_base;
-	uint32_t		gws_size;
-	uint32_t		oa_base;
-	uint32_t		oa_size;
-};
-
-struct amdgpu_vm_manager {
-	/* Handling of VMIDs */
-	struct mutex				lock;
-	unsigned				num_ids;
-	struct list_head			ids_lru;
-	struct amdgpu_vm_id			ids[AMDGPU_NUM_VM];
-
-	/* Handling of VM fences */
-	u64					fence_context;
-	unsigned				seqno[AMDGPU_MAX_RINGS];
-
-	uint32_t				max_pfn;
-	/* vram base address for page table entry  */
-	u64					vram_base_offset;
-	/* is vm enabled? */
-	bool					enabled;
-	/* vm pte handling */
-	const struct amdgpu_vm_pte_funcs        *vm_pte_funcs;
-	struct amdgpu_ring                      *vm_pte_rings[AMDGPU_MAX_RINGS];
-	unsigned				vm_pte_num_rings;
-	atomic_t				vm_pte_next_ring;
-	/* client id counter */
-	atomic64_t				client_counter;
-};
-
-void amdgpu_vm_manager_init(struct amdgpu_device *adev);
-void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
-int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm);
-void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
-void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
-			 struct list_head *validated,
-			 struct amdgpu_bo_list_entry *entry);
-int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
-			      int (*callback)(void *p, struct amdgpu_bo *bo),
-			      void *param);
-void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
-				  struct amdgpu_vm *vm);
-int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
-		      struct amdgpu_sync *sync, struct fence *fence,
-		      struct amdgpu_job *job);
-int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job);
-void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vm_id);
-int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
-				    struct amdgpu_vm *vm);
-int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
-			  struct amdgpu_vm *vm);
-int amdgpu_vm_clear_invalids(struct amdgpu_device *adev, struct amdgpu_vm *vm,
-			     struct amdgpu_sync *sync);
-int amdgpu_vm_bo_update(struct amdgpu_device *adev,
-			struct amdgpu_bo_va *bo_va,
-			bool clear);
-void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
-			     struct amdgpu_bo *bo);
-struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
-				       struct amdgpu_bo *bo);
-struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev,
-				      struct amdgpu_vm *vm,
-				      struct amdgpu_bo *bo);
-int amdgpu_vm_bo_map(struct amdgpu_device *adev,
-		     struct amdgpu_bo_va *bo_va,
-		     uint64_t addr, uint64_t offset,
-		     uint64_t size, uint32_t flags);
-int amdgpu_vm_bo_unmap(struct amdgpu_device *adev,
-		       struct amdgpu_bo_va *bo_va,
-		       uint64_t addr);
-void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
-		      struct amdgpu_bo_va *bo_va);
-
-/*
  * context related structures
  */
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
new file mode 100644
index 0000000..42a629b
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -0,0 +1,205 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Christian König
+ */
+#ifndef __AMDGPU_VM_H__
+#define __AMDGPU_VM_H__
+
+#include <linux/rbtree.h>
+
+#include "gpu_scheduler.h"
+#include "amdgpu_sync.h"
+#include "amdgpu_ring.h"
+
+struct amdgpu_bo_va;
+struct amdgpu_job;
+struct amdgpu_bo_list_entry;
+
+/*
+ * GPUVM handling
+ */
+
+/* maximum number of VMIDs */
+#define AMDGPU_NUM_VM	16
+
+/* Maximum number of PTEs the hardware can write with one command */
+#define AMDGPU_VM_MAX_UPDATE_SIZE	0x3FFFF
+
+/* number of entries in page table */
+#define AMDGPU_VM_PTE_COUNT (1 << amdgpu_vm_block_size)
+
+/* PTBs (Page Table Blocks) need to be aligned to 32K */
+#define AMDGPU_VM_PTB_ALIGN_SIZE   32768
+
+/* LOG2 number of continuous pages for the fragment field */
+#define AMDGPU_LOG2_PAGES_PER_FRAG 4
+
+#define AMDGPU_PTE_VALID	(1 << 0)
+#define AMDGPU_PTE_SYSTEM	(1 << 1)
+#define AMDGPU_PTE_SNOOPED	(1 << 2)
+
+/* VI only */
+#define AMDGPU_PTE_EXECUTABLE	(1 << 4)
+
+#define AMDGPU_PTE_READABLE	(1 << 5)
+#define AMDGPU_PTE_WRITEABLE	(1 << 6)
+
+#define AMDGPU_PTE_FRAG(x)	((x & 0x1f) << 7)
+
+/* How to programm VM fault handling */
+#define AMDGPU_VM_FAULT_STOP_NEVER	0
+#define AMDGPU_VM_FAULT_STOP_FIRST	1
+#define AMDGPU_VM_FAULT_STOP_ALWAYS	2
+
+struct amdgpu_vm_pt {
+	struct amdgpu_bo	*bo;
+	uint64_t		addr;
+};
+
+struct amdgpu_vm {
+	/* tree of virtual addresses mapped */
+	struct rb_root		va;
+
+	/* protecting invalidated */
+	spinlock_t		status_lock;
+
+	/* BOs moved, but not yet updated in the PT */
+	struct list_head	invalidated;
+
+	/* BOs cleared in the PT because of a move */
+	struct list_head	cleared;
+
+	/* BO mappings freed, but not yet updated in the PT */
+	struct list_head	freed;
+
+	/* contains the page directory */
+	struct amdgpu_bo	*page_directory;
+	unsigned		max_pde_used;
+	struct fence		*page_directory_fence;
+	uint64_t		last_eviction_counter;
+
+	/* array of page tables, one for each page directory entry */
+	struct amdgpu_vm_pt	*page_tables;
+
+	/* for id and flush management per ring */
+	struct amdgpu_vm_id	*ids[AMDGPU_MAX_RINGS];
+
+	/* protecting freed */
+	spinlock_t		freed_lock;
+
+	/* Scheduler entity for page table updates */
+	struct amd_sched_entity	entity;
+
+	/* client id */
+	u64                     client_id;
+};
+
+struct amdgpu_vm_id {
+	struct list_head	list;
+	struct fence		*first;
+	struct amdgpu_sync	active;
+	struct fence		*last_flush;
+	atomic64_t		owner;
+
+	uint64_t		pd_gpu_addr;
+	/* last flushed PD/PT update */
+	struct fence		*flushed_updates;
+
+	uint32_t                current_gpu_reset_count;
+
+	uint32_t		gds_base;
+	uint32_t		gds_size;
+	uint32_t		gws_base;
+	uint32_t		gws_size;
+	uint32_t		oa_base;
+	uint32_t		oa_size;
+};
+
+struct amdgpu_vm_manager {
+	/* Handling of VMIDs */
+	struct mutex				lock;
+	unsigned				num_ids;
+	struct list_head			ids_lru;
+	struct amdgpu_vm_id			ids[AMDGPU_NUM_VM];
+
+	/* Handling of VM fences */
+	u64					fence_context;
+	unsigned				seqno[AMDGPU_MAX_RINGS];
+
+	uint32_t				max_pfn;
+	/* vram base address for page table entry  */
+	u64					vram_base_offset;
+	/* is vm enabled? */
+	bool					enabled;
+	/* vm pte handling */
+	const struct amdgpu_vm_pte_funcs        *vm_pte_funcs;
+	struct amdgpu_ring                      *vm_pte_rings[AMDGPU_MAX_RINGS];
+	unsigned				vm_pte_num_rings;
+	atomic_t				vm_pte_next_ring;
+	/* client id counter */
+	atomic64_t				client_counter;
+};
+
+void amdgpu_vm_manager_init(struct amdgpu_device *adev);
+void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
+int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm);
+void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
+void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
+			 struct list_head *validated,
+			 struct amdgpu_bo_list_entry *entry);
+int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
+			      int (*callback)(void *p, struct amdgpu_bo *bo),
+			      void *param);
+void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
+				  struct amdgpu_vm *vm);
+int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
+		      struct amdgpu_sync *sync, struct fence *fence,
+		      struct amdgpu_job *job);
+int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job);
+void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vm_id);
+int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
+				    struct amdgpu_vm *vm);
+int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
+			  struct amdgpu_vm *vm);
+int amdgpu_vm_clear_invalids(struct amdgpu_device *adev, struct amdgpu_vm *vm,
+			     struct amdgpu_sync *sync);
+int amdgpu_vm_bo_update(struct amdgpu_device *adev,
+			struct amdgpu_bo_va *bo_va,
+			bool clear);
+void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
+			     struct amdgpu_bo *bo);
+struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
+				       struct amdgpu_bo *bo);
+struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev,
+				      struct amdgpu_vm *vm,
+				      struct amdgpu_bo *bo);
+int amdgpu_vm_bo_map(struct amdgpu_device *adev,
+		     struct amdgpu_bo_va *bo_va,
+		     uint64_t addr, uint64_t offset,
+		     uint64_t size, uint32_t flags);
+int amdgpu_vm_bo_unmap(struct amdgpu_device *adev,
+		       struct amdgpu_bo_va *bo_va,
+		       uint64_t addr);
+void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
+		      struct amdgpu_bo_va *bo_va);
+
+#endif
-- 
2.5.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* Re: [PATCH 2/7] drm/amdgpu: update the shadow PD together with the real one
       [not found]     ` <1475135557-11537-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2016-09-29  9:18       ` zhoucm1
       [not found]         ` <57ECDC65.40203-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 15+ messages in thread
From: zhoucm1 @ 2016-09-29  9:18 UTC (permalink / raw)
  To: Christian König, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW



On 2016年09月29日 15:52, Christian König wrote:
> -	if (count)
> +	if (count) {
> +		if (vm->page_directory-shadow)
Forget compile fix to amend?

Regards,
David Zhou
> +			amdgpu_vm_do_set_ptes(&params, last_shadow, last_pt,
> +					      count, incr, AMDGPU_PTE_VALID);

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 2/7] drm/amdgpu: update the shadow PD together with the real one
       [not found]         ` <57ECDC65.40203-5C7GfCeVMHo@public.gmane.org>
@ 2016-09-29 12:10           ` Christian König
       [not found]             ` <5ad68770-f356-33b6-a3d0-7cec66c56ca3-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  0 siblings, 1 reply; 15+ messages in thread
From: Christian König @ 2016-09-29 12:10 UTC (permalink / raw)
  To: zhoucm1, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Am 29.09.2016 um 11:18 schrieb zhoucm1:
>
>
> On 2016年09月29日 15:52, Christian König wrote:
>> -    if (count)
>> +    if (count) {
>> +        if (vm->page_directory-shadow)
> Forget compile fix to amend?

Ups, no that actually compiles because we have a local variable named 
"shadow" (and by coincident actually does what it should do).

Anyway clearly a typo. Can I get your rb for the series?

Regards,
Christian.

>
> Regards,
> David Zhou
>> + amdgpu_vm_do_set_ptes(&params, last_shadow, last_pt,
>> +                          count, incr, AMDGPU_PTE_VALID);
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 1/7] drm/amdgpu: remove adev pointer from struct amdgpu_bo
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
                     ` (5 preceding siblings ...)
  2016-09-29  7:52   ` [PATCH 7/7] drm/amdgpu: move VM defines into amdgpu_vm.h Christian König
@ 2016-09-29 16:41   ` Alex Deucher
  2016-10-02 21:21   ` Grazvydas Ignotas
  7 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2016-09-29 16:41 UTC (permalink / raw)
  To: Christian König; +Cc: amd-gfx list

On Thu, Sep 29, 2016 at 3:52 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> It's completely pointsless to have two pointers to the
> device in the same structur.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  6 +++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c     | 10 +++---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c    |  7 +++--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c     |  4 +--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 50 ++++++++++++++++--------------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |  3 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 17 +++-------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     |  2 +-
>  9 files changed, 52 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 2a95827..52ffd2f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -468,7 +468,6 @@ struct amdgpu_bo {
>          */
>         struct list_head                va;
>         /* Constant after initialization */
> -       struct amdgpu_device            *adev;
>         struct drm_gem_object           gem_base;
>         struct amdgpu_bo                *parent;
>         struct amdgpu_bo                *shadow;
> @@ -2136,6 +2135,11 @@ struct amdgpu_device {
>
>  };
>
> +static inline struct amdgpu_device *amdgpu_get_adev(struct ttm_bo_device *bdev)
> +{
> +       return container_of(bdev, struct amdgpu_device, mman.bdev);
> +}

How about amdgpu_ttm_adev() or amdgpu_ttm_to_adev() ?  With that change,
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> +
>  bool amdgpu_device_is_px(struct drm_device *dev);
>  int amdgpu_device_init(struct amdgpu_device *adev,
>                        struct drm_device *ddev,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 187c366..5beab71 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -355,6 +355,7 @@ static void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev,
>  static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
>                                  struct amdgpu_bo *bo)
>  {
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         u64 initial_bytes_moved;
>         uint32_t domain;
>         int r;
> @@ -372,9 +373,9 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
>
>  retry:
>         amdgpu_ttm_placement_from_domain(bo, domain);
> -       initial_bytes_moved = atomic64_read(&bo->adev->num_bytes_moved);
> +       initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
>         r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
> -       p->bytes_moved += atomic64_read(&bo->adev->num_bytes_moved) -
> +       p->bytes_moved += atomic64_read(&adev->num_bytes_moved) -
>                 initial_bytes_moved;
>
>         if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
> @@ -400,6 +401,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
>
>                 struct amdgpu_bo_list_entry *candidate = p->evictable;
>                 struct amdgpu_bo *bo = candidate->robj;
> +               struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>                 u64 initial_bytes_moved;
>                 uint32_t other;
>
> @@ -420,9 +422,9 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
>
>                 /* Good we can try to move this BO somewhere else */
>                 amdgpu_ttm_placement_from_domain(bo, other);
> -               initial_bytes_moved = atomic64_read(&bo->adev->num_bytes_moved);
> +               initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
>                 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
> -               p->bytes_moved += atomic64_read(&bo->adev->num_bytes_moved) -
> +               p->bytes_moved += atomic64_read(&adev->num_bytes_moved) -
>                         initial_bytes_moved;
>
>                 if (unlikely(r))
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index a7ea9a3..f2fb72d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -116,10 +116,11 @@ void amdgpu_gem_force_release(struct amdgpu_device *adev)
>   * Call from drm_gem_handle_create which appear in both new and open ioctl
>   * case.
>   */
> -int amdgpu_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
> +int amdgpu_gem_object_open(struct drm_gem_object *obj,
> +                          struct drm_file *file_priv)
>  {
>         struct amdgpu_bo *abo = gem_to_amdgpu_bo(obj);
> -       struct amdgpu_device *adev = abo->adev;
> +       struct amdgpu_device *adev = amdgpu_get_adev(abo->tbo.bdev);
>         struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
>         struct amdgpu_vm *vm = &fpriv->vm;
>         struct amdgpu_bo_va *bo_va;
> @@ -142,7 +143,7 @@ void amdgpu_gem_object_close(struct drm_gem_object *obj,
>                              struct drm_file *file_priv)
>  {
>         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
> -       struct amdgpu_device *adev = bo->adev;
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
>         struct amdgpu_vm *vm = &fpriv->vm;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
> index 32fa7b7..4731231 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
> @@ -285,7 +285,7 @@ free_rmn:
>  int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
>  {
>         unsigned long end = addr + amdgpu_bo_size(bo) - 1;
> -       struct amdgpu_device *adev = bo->adev;
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         struct amdgpu_mn *rmn;
>         struct amdgpu_mn_node *node = NULL;
>         struct list_head bos;
> @@ -340,7 +340,7 @@ int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
>   */
>  void amdgpu_mn_unregister(struct amdgpu_bo *bo)
>  {
> -       struct amdgpu_device *adev = bo->adev;
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         struct amdgpu_mn *rmn;
>         struct list_head *head;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index c6754e7..02fae3d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -88,18 +88,19 @@ static void amdgpu_update_memory_usage(struct amdgpu_device *adev,
>
>  static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object *tbo)
>  {
> +       struct amdgpu_device *adev = amdgpu_get_adev(tbo->bdev);
>         struct amdgpu_bo *bo;
>
>         bo = container_of(tbo, struct amdgpu_bo, tbo);
>
> -       amdgpu_update_memory_usage(bo->adev, &bo->tbo.mem, NULL);
> +       amdgpu_update_memory_usage(adev, &bo->tbo.mem, NULL);
>
>         drm_gem_object_release(&bo->gem_base);
>         amdgpu_bo_unref(&bo->parent);
>         if (!list_empty(&bo->shadow_list)) {
> -               mutex_lock(&bo->adev->shadow_list_lock);
> +               mutex_lock(&adev->shadow_list_lock);
>                 list_del_init(&bo->shadow_list);
> -               mutex_unlock(&bo->adev->shadow_list_lock);
> +               mutex_unlock(&adev->shadow_list_lock);
>         }
>         kfree(bo->metadata);
>         kfree(bo);
> @@ -210,8 +211,10 @@ static void amdgpu_ttm_placement_init(struct amdgpu_device *adev,
>
>  void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
>  {
> -       amdgpu_ttm_placement_init(abo->adev, &abo->placement,
> -                                 abo->placements, domain, abo->flags);
> +       struct amdgpu_device *adev = amdgpu_get_adev(abo->tbo.bdev);
> +
> +       amdgpu_ttm_placement_init(adev, &abo->placement, abo->placements,
> +                                 domain, abo->flags);
>  }
>
>  static void amdgpu_fill_placement_to_bo(struct amdgpu_bo *bo,
> @@ -357,7 +360,6 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
>                 kfree(bo);
>                 return r;
>         }
> -       bo->adev = adev;
>         INIT_LIST_HEAD(&bo->shadow_list);
>         INIT_LIST_HEAD(&bo->va);
>         bo->prefered_domains = domain & (AMDGPU_GEM_DOMAIN_VRAM |
> @@ -622,6 +624,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
>                              u64 min_offset, u64 max_offset,
>                              u64 *gpu_addr)
>  {
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         int r, i;
>         unsigned fpfn, lpfn;
>
> @@ -657,12 +660,12 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
>                 if ((bo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
>                     !(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) &&
>                     (!max_offset || max_offset >
> -                    bo->adev->mc.visible_vram_size)) {
> +                    adev->mc.visible_vram_size)) {
>                         if (WARN_ON_ONCE(min_offset >
> -                                        bo->adev->mc.visible_vram_size))
> +                                        adev->mc.visible_vram_size))
>                                 return -EINVAL;
>                         fpfn = min_offset >> PAGE_SHIFT;
> -                       lpfn = bo->adev->mc.visible_vram_size >> PAGE_SHIFT;
> +                       lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT;
>                 } else {
>                         fpfn = min_offset >> PAGE_SHIFT;
>                         lpfn = max_offset >> PAGE_SHIFT;
> @@ -677,12 +680,12 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
>
>         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
>         if (unlikely(r)) {
> -               dev_err(bo->adev->dev, "%p pin failed\n", bo);
> +               dev_err(adev->dev, "%p pin failed\n", bo);
>                 goto error;
>         }
>         r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
>         if (unlikely(r)) {
> -               dev_err(bo->adev->dev, "%p bind failed\n", bo);
> +               dev_err(adev->dev, "%p bind failed\n", bo);
>                 goto error;
>         }
>
> @@ -690,11 +693,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
>         if (gpu_addr != NULL)
>                 *gpu_addr = amdgpu_bo_gpu_offset(bo);
>         if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
> -               bo->adev->vram_pin_size += amdgpu_bo_size(bo);
> +               adev->vram_pin_size += amdgpu_bo_size(bo);
>                 if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
> -                       bo->adev->invisible_pin_size += amdgpu_bo_size(bo);
> +                       adev->invisible_pin_size += amdgpu_bo_size(bo);
>         } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
> -               bo->adev->gart_pin_size += amdgpu_bo_size(bo);
> +               adev->gart_pin_size += amdgpu_bo_size(bo);
>         }
>
>  error:
> @@ -708,10 +711,11 @@ int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain, u64 *gpu_addr)
>
>  int amdgpu_bo_unpin(struct amdgpu_bo *bo)
>  {
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         int r, i;
>
>         if (!bo->pin_count) {
> -               dev_warn(bo->adev->dev, "%p unpin not necessary\n", bo);
> +               dev_warn(adev->dev, "%p unpin not necessary\n", bo);
>                 return 0;
>         }
>         bo->pin_count--;
> @@ -723,16 +727,16 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
>         }
>         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
>         if (unlikely(r)) {
> -               dev_err(bo->adev->dev, "%p validate failed for unpin\n", bo);
> +               dev_err(adev->dev, "%p validate failed for unpin\n", bo);
>                 goto error;
>         }
>
>         if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
> -               bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
> +               adev->vram_pin_size -= amdgpu_bo_size(bo);
>                 if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
> -                       bo->adev->invisible_pin_size -= amdgpu_bo_size(bo);
> +                       adev->invisible_pin_size -= amdgpu_bo_size(bo);
>         } else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
> -               bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
> +               adev->gart_pin_size -= amdgpu_bo_size(bo);
>         }
>
>  error:
> @@ -857,6 +861,7 @@ int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
>  void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
>                            struct ttm_mem_reg *new_mem)
>  {
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
>         struct amdgpu_bo *abo;
>         struct ttm_mem_reg *old_mem = &bo->mem;
>
> @@ -864,21 +869,21 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
>                 return;
>
>         abo = container_of(bo, struct amdgpu_bo, tbo);
> -       amdgpu_vm_bo_invalidate(abo->adev, abo);
> +       amdgpu_vm_bo_invalidate(adev, abo);
>
>         /* update statistics */
>         if (!new_mem)
>                 return;
>
>         /* move_notify is called before move happens */
> -       amdgpu_update_memory_usage(abo->adev, &bo->mem, new_mem);
> +       amdgpu_update_memory_usage(adev, &bo->mem, new_mem);
>
>         trace_amdgpu_ttm_bo_move(abo, new_mem->mem_type, old_mem->mem_type);
>  }
>
>  int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
>  {
> -       struct amdgpu_device *adev;
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
>         struct amdgpu_bo *abo;
>         unsigned long offset, size, lpfn;
>         int i, r;
> @@ -887,7 +892,6 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
>                 return 0;
>
>         abo = container_of(bo, struct amdgpu_bo, tbo);
> -       adev = abo->adev;
>         if (bo->mem.mem_type != TTM_PL_VRAM)
>                 return 0;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index 8255034..c9b2c01 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -71,12 +71,13 @@ static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
>   */
>  static inline int amdgpu_bo_reserve(struct amdgpu_bo *bo, bool no_intr)
>  {
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         int r;
>
>         r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);
>         if (unlikely(r != 0)) {
>                 if (r != -ERESTARTSYS)
> -                       dev_err(bo->adev->dev, "%p reserve failed\n", bo);
> +                       dev_err(adev->dev, "%p reserve failed\n", bo);
>                 return r;
>         }
>         return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 588e242..231b346 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -51,16 +51,6 @@
>  static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
>  static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev);
>
> -static struct amdgpu_device *amdgpu_get_adev(struct ttm_bo_device *bdev)
> -{
> -       struct amdgpu_mman *mman;
> -       struct amdgpu_device *adev;
> -
> -       mman = container_of(bdev, struct amdgpu_mman, bdev);
> -       adev = container_of(mman, struct amdgpu_device, mman);
> -       return adev;
> -}
> -
>
>  /*
>   * Global memory.
> @@ -195,6 +185,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
>  static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
>                                 struct ttm_placement *placement)
>  {
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->bdev);
>         struct amdgpu_bo *abo;
>         static struct ttm_place placements = {
>                 .fpfn = 0,
> @@ -213,7 +204,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
>         abo = container_of(bo, struct amdgpu_bo, tbo);
>         switch (bo->mem.mem_type) {
>         case TTM_PL_VRAM:
> -               if (abo->adev->mman.buffer_funcs_ring->ready == false) {
> +               if (adev->mman.buffer_funcs_ring->ready == false) {
>                         amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU);
>                 } else {
>                         amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
> @@ -229,7 +220,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
>                                  * allocating address space for the BO.
>                                  */
>                                 abo->placements[i].lpfn =
> -                                       abo->adev->mc.gtt_size >> PAGE_SHIFT;
> +                                       adev->mc.gtt_size >> PAGE_SHIFT;
>                         }
>                 }
>                 break;
> @@ -1367,7 +1358,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
>                 struct reservation_object *resv,
>                 struct fence **fence)
>  {
> -       struct amdgpu_device *adev = bo->adev;
> +       struct amdgpu_device *adev = amdgpu_get_adev(bo->tbo.bdev);
>         struct amdgpu_job *job;
>         struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> index 4cf3ca7..d67eada 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> @@ -931,7 +931,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
>         if (r)
>                 return r;
>
> -       if (!bo->adev->uvd.address_64_bit) {
> +       if (!ring->adev->uvd.address_64_bit) {
>                 amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
>                 amdgpu_uvd_force_into_uvd_segment(bo);
>         }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 6ed11cc..73ad293 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1195,7 +1195,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
>
>         flags = amdgpu_ttm_tt_pte_flags(adev, bo_va->bo->tbo.ttm, mem);
>         gtt_flags = (amdgpu_ttm_is_bound(bo_va->bo->tbo.ttm) &&
> -               adev == bo_va->bo->adev) ? flags : 0;
> +               adev == amdgpu_get_adev(bo_va->bo->tbo.bdev)) ? flags : 0;
>
>         spin_lock(&vm->status_lock);
>         if (!list_empty(&bo_va->vm_status))
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 3/7] drm/amdgpu: move PT validation back into VM code
       [not found]     ` <1475135557-11537-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2016-09-29 16:50       ` Alex Deucher
  0 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2016-09-29 16:50 UTC (permalink / raw)
  To: Christian König; +Cc: amd-gfx list

On Thu, Sep 29, 2016 at 3:52 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Saves a bunch of CPU cycles when swapping things back in and
> allows us to split the VM headers into a separate file.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  5 ++--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 42 ++++++++++++++++++++++-----------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 27 ++++++++++++---------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 20 +++++++++-------
>  4 files changed, 59 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 840fcdb..0c2d32b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -917,8 +917,9 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
>  void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
>                          struct list_head *validated,
>                          struct amdgpu_bo_list_entry *entry);
> -void amdgpu_vm_get_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> -                         struct list_head *duplicates);
> +int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> +                             int (*callback)(void *p, struct amdgpu_bo *bo),
> +                             void *param);
>  void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
>                                   struct amdgpu_vm *vm);
>  int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 5beab71..2adea17 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -388,9 +388,9 @@ retry:
>
>  /* Last resort, try to evict something from the current working set */
>  static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
> -                               struct amdgpu_bo_list_entry *lobj)
> +                               struct amdgpu_bo *validated)
>  {
> -       uint32_t domain = lobj->robj->allowed_domains;
> +       uint32_t domain = validated->allowed_domains;
>         int r;
>
>         if (!p->evictable)
> @@ -406,7 +406,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
>                 uint32_t other;
>
>                 /* If we reached our current BO we can forget it */
> -               if (candidate == lobj)
> +               if (candidate->robj == validated)
>                         break;
>
>                 other = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
> @@ -439,6 +439,23 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
>         return false;
>  }
>
> +static int amdgpu_cs_validate(void *param, struct amdgpu_bo *bo)
> +{
> +       struct amdgpu_cs_parser *p = param;
> +       int r;
> +
> +       do {
> +               r = amdgpu_cs_bo_validate(p, bo);
> +       } while (r == -ENOMEM && amdgpu_cs_try_evict(p, bo));
> +       if (r)
> +               return r;
> +
> +       if (bo->shadow)
> +               r = amdgpu_cs_bo_validate(p, bo);
> +
> +       return r;
> +}
> +
>  static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
>                             struct list_head *validated)
>  {
> @@ -466,18 +483,10 @@ static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
>                 if (p->evictable == lobj)
>                         p->evictable = NULL;
>
> -               do {
> -                       r = amdgpu_cs_bo_validate(p, bo);
> -               } while (r == -ENOMEM && amdgpu_cs_try_evict(p, lobj));
> +               r = amdgpu_cs_validate(p, bo);
>                 if (r)
>                         return r;
>
> -               if (bo->shadow) {
> -                       r = amdgpu_cs_bo_validate(p, bo);
> -                       if (r)
> -                               return r;
> -               }
> -
>                 if (binding_userptr) {
>                         drm_free_large(lobj->user_pages);
>                         lobj->user_pages = NULL;
> @@ -595,14 +604,19 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
>                 list_splice(&need_pages, &p->validated);
>         }
>
> -       amdgpu_vm_get_pt_bos(p->adev, &fpriv->vm, &duplicates);
> -
>         p->bytes_moved_threshold = amdgpu_cs_get_threshold_for_moves(p->adev);
>         p->bytes_moved = 0;
>         p->evictable = list_last_entry(&p->validated,
>                                        struct amdgpu_bo_list_entry,
>                                        tv.head);
>
> +       r = amdgpu_vm_validate_pt_bos(p->adev, &fpriv->vm,
> +                                     amdgpu_cs_validate, p);
> +       if (r) {
> +               DRM_ERROR("amdgpu_vm_validate_pt_bos() failed.\n");
> +               goto error_validate;
> +       }
> +
>         r = amdgpu_cs_list_validate(p, &duplicates);
>         if (r) {
>                 DRM_ERROR("amdgpu_cs_list_validate(duplicates) failed.\n");
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index f2fb72d..8ff90fe 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -471,6 +471,16 @@ out:
>         return r;
>  }
>
> +static int amdgpu_gem_va_check(void *p, struct amdgpu_bo *bo)

maybe change the first parameter to param for consistency with
amdgpu_cs_validate()?

> +{
> +       unsigned domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
> +
> +       /* if anything is swapped out don't swap it in here,
> +          just abort and wait for the next CS */
> +
> +       return domain == AMDGPU_GEM_DOMAIN_CPU ? -ERESTARTSYS : 0;
> +}
> +
>  /**
>   * amdgpu_gem_va_update_vm -update the bo_va in its VM
>   *
> @@ -481,7 +491,8 @@ out:
>   * vital here, so they are not reported back to userspace.
>   */
>  static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
> -                                   struct amdgpu_bo_va *bo_va, uint32_t operation)
> +                                   struct amdgpu_bo_va *bo_va,
> +                                   uint32_t operation)
>  {
>         struct ttm_validate_buffer tv, *entry;
>         struct amdgpu_bo_list_entry vm_pd;
> @@ -504,7 +515,6 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
>         if (r)
>                 goto error_print;
>
> -       amdgpu_vm_get_pt_bos(adev, bo_va->vm, &duplicates);
>         list_for_each_entry(entry, &list, head) {
>                 domain = amdgpu_mem_type_to_domain(entry->bo->mem.mem_type);
>                 /* if anything is swapped out don't swap it in here,
> @@ -512,13 +522,10 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
>                 if (domain == AMDGPU_GEM_DOMAIN_CPU)
>                         goto error_unreserve;
>         }
> -       list_for_each_entry(entry, &duplicates, head) {
> -               domain = amdgpu_mem_type_to_domain(entry->bo->mem.mem_type);
> -               /* if anything is swapped out don't swap it in here,
> -                  just abort and wait for the next CS */
> -               if (domain == AMDGPU_GEM_DOMAIN_CPU)
> -                       goto error_unreserve;
> -       }
> +       r = amdgpu_vm_validate_pt_bos(adev, bo_va->vm, amdgpu_gem_va_check,
> +                                     NULL);
> +       if (r)
> +               goto error_unreserve;
>
>         r = amdgpu_vm_update_page_directory(adev, bo_va->vm);
>         if (r)
> @@ -539,8 +546,6 @@ error_print:
>                 DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
>  }
>
> -
> -
>  int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
>                           struct drm_file *filp)
>  {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 8777394..4c5e79a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -116,27 +116,28 @@ void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
>  }
>
>  /**
> - * amdgpu_vm_get_bos - add the vm BOs to a duplicates list
> + * amdgpu_vm_validate_pt_bos - validate the page table BOs
>   *
>   * @adev: amdgpu device pointer
>   * @vm: vm providing the BOs
> - * @duplicates: head of duplicates list
> + * @callback: callback to do the validation

How about changing the name to validation_callback or validation_cb so
it's clear what it's for in the code.

>   *
> - * Add the page directory to the BO duplicates list
> - * for command submission.
> + * Validate the page table BOs on command submission if neccessary.
>   */
> -void amdgpu_vm_get_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> -                         struct list_head *duplicates)
> +int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> +                             int (*callback)(void *p, struct amdgpu_bo *bo),
> +                             void *param)
>  {
>         uint64_t num_evictions;
>         unsigned i;
> +       int r;
>
>         /* We only need to validate the page tables
>          * if they aren't already valid.
>          */
>         num_evictions = atomic64_read(&adev->num_evictions);
>         if (num_evictions == vm->last_eviction_counter)
> -               return;
> +               return 0;
>
>         /* add the vm page table to the list */
>         for (i = 0; i <= vm->max_pde_used; ++i) {
> @@ -145,9 +146,12 @@ void amdgpu_vm_get_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>                 if (!entry->robj)
>                         continue;
>
> -               list_add(&entry->tv.head, duplicates);
> +               r = callback(param, entry->robj);
> +               if (r)
> +                       return r;
>         }
>
> +       return 0;
>  }
>
>  /**
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 2/7] drm/amdgpu: update the shadow PD together with the real one
       [not found]             ` <5ad68770-f356-33b6-a3d0-7cec66c56ca3-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2016-09-29 16:51               ` Alex Deucher
  0 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2016-09-29 16:51 UTC (permalink / raw)
  To: Christian König; +Cc: zhoucm1, amd-gfx list

On Thu, Sep 29, 2016 at 8:10 AM, Christian König
<deathsimple@vodafone.de> wrote:
> Am 29.09.2016 um 11:18 schrieb zhoucm1:
>>
>>
>>
>> On 2016年09月29日 15:52, Christian König wrote:
>>>
>>> -    if (count)
>>> +    if (count) {
>>> +        if (vm->page_directory-shadow)
>>
>> Forget compile fix to amend?
>
>
> Ups, no that actually compiles because we have a local variable named
> "shadow" (and by coincident actually does what it should do).
>
> Anyway clearly a typo. Can I get your rb for the series?

With that fixed, this patch is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

>
> Regards,
> Christian.
>
>
>>
>> Regards,
>> David Zhou
>>>
>>> + amdgpu_vm_do_set_ptes(&params, last_shadow, last_pt,
>>> +                          count, incr, AMDGPU_PTE_VALID);
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 4/7] drm/amdgpu: stop using a bo list entry for the VM PTs
       [not found]     ` <1475135557-11537-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2016-09-29 16:52       ` Alex Deucher
  0 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2016-09-29 16:52 UTC (permalink / raw)
  To: Christian König; +Cc: amd-gfx list

On Thu, Sep 29, 2016 at 3:52 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Saves us a bit of memory.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  4 ++--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34 ++++++++++++++--------------------
>  2 files changed, 16 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 0c2d32b..f7016d1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -822,8 +822,8 @@ struct amdgpu_ring {
>  #define AMDGPU_VM_FAULT_STOP_ALWAYS    2
>
>  struct amdgpu_vm_pt {
> -       struct amdgpu_bo_list_entry     entry;
> -       uint64_t                        addr;
> +       struct amdgpu_bo        *bo;
> +       uint64_t                addr;
>  };
>
>  struct amdgpu_vm {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 4c5e79a..59f217b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -141,12 +141,12 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>
>         /* add the vm page table to the list */
>         for (i = 0; i <= vm->max_pde_used; ++i) {
> -               struct amdgpu_bo_list_entry *entry = &vm->page_tables[i].entry;
> +               struct amdgpu_bo *bo = vm->page_tables[i].bo;
>
> -               if (!entry->robj)
> +               if (!bo)
>                         continue;
>
> -               r = callback(param, entry->robj);
> +               r = callback(param, bo);
>                 if (r)
>                         return r;
>         }
> @@ -170,12 +170,12 @@ void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
>
>         spin_lock(&glob->lru_lock);
>         for (i = 0; i <= vm->max_pde_used; ++i) {
> -               struct amdgpu_bo_list_entry *entry = &vm->page_tables[i].entry;
> +               struct amdgpu_bo *bo = vm->page_tables[i].bo;
>
> -               if (!entry->robj)
> +               if (!bo)
>                         continue;
>
> -               ttm_bo_move_to_lru_tail(&entry->robj->tbo);
> +               ttm_bo_move_to_lru_tail(&bo->tbo);
>         }
>         spin_unlock(&glob->lru_lock);
>  }
> @@ -673,7 +673,7 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
>
>         /* walk over the address space and update the page directory */
>         for (pt_idx = 0; pt_idx <= vm->max_pde_used; ++pt_idx) {
> -               struct amdgpu_bo *bo = vm->page_tables[pt_idx].entry.robj;
> +               struct amdgpu_bo *bo = vm->page_tables[pt_idx].bo;
>                 uint64_t pde, pt;
>
>                 if (bo == NULL)
> @@ -789,11 +789,11 @@ static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
>         /* initialize the variables */
>         addr = start;
>         pt_idx = addr >> amdgpu_vm_block_size;
> -       pt = vm->page_tables[pt_idx].entry.robj;
> +       pt = vm->page_tables[pt_idx].bo;
>         if (params->shadow) {
>                 if (!pt->shadow)
>                         return;
> -               pt = vm->page_tables[pt_idx].entry.robj->shadow;
> +               pt = pt->shadow;
>         }
>         if ((addr & ~mask) == (end & ~mask))
>                 nptes = end - addr;
> @@ -812,11 +812,11 @@ static void amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
>         /* walk over the address space and update the page tables */
>         while (addr < end) {
>                 pt_idx = addr >> amdgpu_vm_block_size;
> -               pt = vm->page_tables[pt_idx].entry.robj;
> +               pt = vm->page_tables[pt_idx].bo;
>                 if (params->shadow) {
>                         if (!pt->shadow)
>                                 return;
> -                       pt = vm->page_tables[pt_idx].entry.robj->shadow;
> +                       pt = pt->shadow;
>                 }
>
>                 if ((addr & ~mask) == (end & ~mask))
> @@ -1428,11 +1428,9 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
>         /* walk over the address space and allocate the page tables */
>         for (pt_idx = saddr; pt_idx <= eaddr; ++pt_idx) {
>                 struct reservation_object *resv = vm->page_directory->tbo.resv;
> -               struct amdgpu_bo_list_entry *entry;
>                 struct amdgpu_bo *pt;
>
> -               entry = &vm->page_tables[pt_idx].entry;
> -               if (entry->robj)
> +               if (vm->page_tables[pt_idx].bo)
>                         continue;
>
>                 r = amdgpu_bo_create(adev, AMDGPU_VM_PTE_COUNT * 8,
> @@ -1466,11 +1464,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
>                         }
>                 }
>
> -               entry->robj = pt;
> -               entry->priority = 0;
> -               entry->tv.bo = &entry->robj->tbo;
> -               entry->tv.shared = true;
> -               entry->user_pages = NULL;
> +               vm->page_tables[pt_idx].bo = pt;
>                 vm->page_tables[pt_idx].addr = 0;
>         }
>
> @@ -1722,7 +1716,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
>         }
>
>         for (i = 0; i < amdgpu_vm_num_pdes(adev); i++) {
> -               struct amdgpu_bo *pt = vm->page_tables[i].entry.robj;
> +               struct amdgpu_bo *pt = vm->page_tables[i].bo;
>
>                 if (!pt)
>                         continue;
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 7/7] drm/amdgpu: move VM defines into amdgpu_vm.h
       [not found]     ` <1475135557-11537-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2016-09-29 16:54       ` Alex Deucher
  0 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2016-09-29 16:54 UTC (permalink / raw)
  To: Christian König; +Cc: amd-gfx list

On Thu, Sep 29, 2016 at 3:52 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Only cleanup, no intended functional change.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>

Patches 5-7:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 170 +--------------------------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 205 +++++++++++++++++++++++++++++++++
>  2 files changed, 206 insertions(+), 169 deletions(-)
>  create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 1b3ec22..3291dff 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -57,6 +57,7 @@
>  #include "amdgpu_dm.h"
>  #include "amdgpu_sync.h"
>  #include "amdgpu_ring.h"
> +#include "amdgpu_vm.h"
>  #include "amd_powerplay.h"
>
>  #include "gpu_scheduler.h"
> @@ -151,7 +152,6 @@ extern int amdgpu_vram_page_split;
>
>  struct amdgpu_device;
>  struct amdgpu_ib;
> -struct amdgpu_vm;
>  struct amdgpu_cs_parser;
>  struct amdgpu_job;
>  struct amdgpu_irq_src;
> @@ -631,174 +631,6 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
>                       struct fence **f);
>
>  /*
> - * VM
> - */
> -
> -/* maximum number of VMIDs */
> -#define AMDGPU_NUM_VM  16
> -
> -/* Maximum number of PTEs the hardware can write with one command */
> -#define AMDGPU_VM_MAX_UPDATE_SIZE      0x3FFFF
> -
> -/* number of entries in page table */
> -#define AMDGPU_VM_PTE_COUNT (1 << amdgpu_vm_block_size)
> -
> -/* PTBs (Page Table Blocks) need to be aligned to 32K */
> -#define AMDGPU_VM_PTB_ALIGN_SIZE   32768
> -
> -/* LOG2 number of continuous pages for the fragment field */
> -#define AMDGPU_LOG2_PAGES_PER_FRAG 4
> -
> -#define AMDGPU_PTE_VALID       (1 << 0)
> -#define AMDGPU_PTE_SYSTEM      (1 << 1)
> -#define AMDGPU_PTE_SNOOPED     (1 << 2)
> -
> -/* VI only */
> -#define AMDGPU_PTE_EXECUTABLE  (1 << 4)
> -
> -#define AMDGPU_PTE_READABLE    (1 << 5)
> -#define AMDGPU_PTE_WRITEABLE   (1 << 6)
> -
> -#define AMDGPU_PTE_FRAG(x)     ((x & 0x1f) << 7)
> -
> -/* How to programm VM fault handling */
> -#define AMDGPU_VM_FAULT_STOP_NEVER     0
> -#define AMDGPU_VM_FAULT_STOP_FIRST     1
> -#define AMDGPU_VM_FAULT_STOP_ALWAYS    2
> -
> -struct amdgpu_vm_pt {
> -       struct amdgpu_bo        *bo;
> -       uint64_t                addr;
> -};
> -
> -struct amdgpu_vm {
> -       /* tree of virtual addresses mapped */
> -       struct rb_root          va;
> -
> -       /* protecting invalidated */
> -       spinlock_t              status_lock;
> -
> -       /* BOs moved, but not yet updated in the PT */
> -       struct list_head        invalidated;
> -
> -       /* BOs cleared in the PT because of a move */
> -       struct list_head        cleared;
> -
> -       /* BO mappings freed, but not yet updated in the PT */
> -       struct list_head        freed;
> -
> -       /* contains the page directory */
> -       struct amdgpu_bo        *page_directory;
> -       unsigned                max_pde_used;
> -       struct fence            *page_directory_fence;
> -       uint64_t                last_eviction_counter;
> -
> -       /* array of page tables, one for each page directory entry */
> -       struct amdgpu_vm_pt     *page_tables;
> -
> -       /* for id and flush management per ring */
> -       struct amdgpu_vm_id     *ids[AMDGPU_MAX_RINGS];
> -
> -       /* protecting freed */
> -       spinlock_t              freed_lock;
> -
> -       /* Scheduler entity for page table updates */
> -       struct amd_sched_entity entity;
> -
> -       /* client id */
> -       u64                     client_id;
> -};
> -
> -struct amdgpu_vm_id {
> -       struct list_head        list;
> -       struct fence            *first;
> -       struct amdgpu_sync      active;
> -       struct fence            *last_flush;
> -       atomic64_t              owner;
> -
> -       uint64_t                pd_gpu_addr;
> -       /* last flushed PD/PT update */
> -       struct fence            *flushed_updates;
> -
> -       uint32_t                current_gpu_reset_count;
> -
> -       uint32_t                gds_base;
> -       uint32_t                gds_size;
> -       uint32_t                gws_base;
> -       uint32_t                gws_size;
> -       uint32_t                oa_base;
> -       uint32_t                oa_size;
> -};
> -
> -struct amdgpu_vm_manager {
> -       /* Handling of VMIDs */
> -       struct mutex                            lock;
> -       unsigned                                num_ids;
> -       struct list_head                        ids_lru;
> -       struct amdgpu_vm_id                     ids[AMDGPU_NUM_VM];
> -
> -       /* Handling of VM fences */
> -       u64                                     fence_context;
> -       unsigned                                seqno[AMDGPU_MAX_RINGS];
> -
> -       uint32_t                                max_pfn;
> -       /* vram base address for page table entry  */
> -       u64                                     vram_base_offset;
> -       /* is vm enabled? */
> -       bool                                    enabled;
> -       /* vm pte handling */
> -       const struct amdgpu_vm_pte_funcs        *vm_pte_funcs;
> -       struct amdgpu_ring                      *vm_pte_rings[AMDGPU_MAX_RINGS];
> -       unsigned                                vm_pte_num_rings;
> -       atomic_t                                vm_pte_next_ring;
> -       /* client id counter */
> -       atomic64_t                              client_counter;
> -};
> -
> -void amdgpu_vm_manager_init(struct amdgpu_device *adev);
> -void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
> -int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm);
> -void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
> -void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
> -                        struct list_head *validated,
> -                        struct amdgpu_bo_list_entry *entry);
> -int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> -                             int (*callback)(void *p, struct amdgpu_bo *bo),
> -                             void *param);
> -void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
> -                                 struct amdgpu_vm *vm);
> -int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
> -                     struct amdgpu_sync *sync, struct fence *fence,
> -                     struct amdgpu_job *job);
> -int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job);
> -void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vm_id);
> -int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
> -                                   struct amdgpu_vm *vm);
> -int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
> -                         struct amdgpu_vm *vm);
> -int amdgpu_vm_clear_invalids(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> -                            struct amdgpu_sync *sync);
> -int amdgpu_vm_bo_update(struct amdgpu_device *adev,
> -                       struct amdgpu_bo_va *bo_va,
> -                       bool clear);
> -void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
> -                            struct amdgpu_bo *bo);
> -struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
> -                                      struct amdgpu_bo *bo);
> -struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev,
> -                                     struct amdgpu_vm *vm,
> -                                     struct amdgpu_bo *bo);
> -int amdgpu_vm_bo_map(struct amdgpu_device *adev,
> -                    struct amdgpu_bo_va *bo_va,
> -                    uint64_t addr, uint64_t offset,
> -                    uint64_t size, uint32_t flags);
> -int amdgpu_vm_bo_unmap(struct amdgpu_device *adev,
> -                      struct amdgpu_bo_va *bo_va,
> -                      uint64_t addr);
> -void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
> -                     struct amdgpu_bo_va *bo_va);
> -
> -/*
>   * context related structures
>   */
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> new file mode 100644
> index 0000000..42a629b
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -0,0 +1,205 @@
> +/*
> + * Copyright 2016 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: Christian König
> + */
> +#ifndef __AMDGPU_VM_H__
> +#define __AMDGPU_VM_H__
> +
> +#include <linux/rbtree.h>
> +
> +#include "gpu_scheduler.h"
> +#include "amdgpu_sync.h"
> +#include "amdgpu_ring.h"
> +
> +struct amdgpu_bo_va;
> +struct amdgpu_job;
> +struct amdgpu_bo_list_entry;
> +
> +/*
> + * GPUVM handling
> + */
> +
> +/* maximum number of VMIDs */
> +#define AMDGPU_NUM_VM  16
> +
> +/* Maximum number of PTEs the hardware can write with one command */
> +#define AMDGPU_VM_MAX_UPDATE_SIZE      0x3FFFF
> +
> +/* number of entries in page table */
> +#define AMDGPU_VM_PTE_COUNT (1 << amdgpu_vm_block_size)
> +
> +/* PTBs (Page Table Blocks) need to be aligned to 32K */
> +#define AMDGPU_VM_PTB_ALIGN_SIZE   32768
> +
> +/* LOG2 number of continuous pages for the fragment field */
> +#define AMDGPU_LOG2_PAGES_PER_FRAG 4
> +
> +#define AMDGPU_PTE_VALID       (1 << 0)
> +#define AMDGPU_PTE_SYSTEM      (1 << 1)
> +#define AMDGPU_PTE_SNOOPED     (1 << 2)
> +
> +/* VI only */
> +#define AMDGPU_PTE_EXECUTABLE  (1 << 4)
> +
> +#define AMDGPU_PTE_READABLE    (1 << 5)
> +#define AMDGPU_PTE_WRITEABLE   (1 << 6)
> +
> +#define AMDGPU_PTE_FRAG(x)     ((x & 0x1f) << 7)
> +
> +/* How to programm VM fault handling */
> +#define AMDGPU_VM_FAULT_STOP_NEVER     0
> +#define AMDGPU_VM_FAULT_STOP_FIRST     1
> +#define AMDGPU_VM_FAULT_STOP_ALWAYS    2
> +
> +struct amdgpu_vm_pt {
> +       struct amdgpu_bo        *bo;
> +       uint64_t                addr;
> +};
> +
> +struct amdgpu_vm {
> +       /* tree of virtual addresses mapped */
> +       struct rb_root          va;
> +
> +       /* protecting invalidated */
> +       spinlock_t              status_lock;
> +
> +       /* BOs moved, but not yet updated in the PT */
> +       struct list_head        invalidated;
> +
> +       /* BOs cleared in the PT because of a move */
> +       struct list_head        cleared;
> +
> +       /* BO mappings freed, but not yet updated in the PT */
> +       struct list_head        freed;
> +
> +       /* contains the page directory */
> +       struct amdgpu_bo        *page_directory;
> +       unsigned                max_pde_used;
> +       struct fence            *page_directory_fence;
> +       uint64_t                last_eviction_counter;
> +
> +       /* array of page tables, one for each page directory entry */
> +       struct amdgpu_vm_pt     *page_tables;
> +
> +       /* for id and flush management per ring */
> +       struct amdgpu_vm_id     *ids[AMDGPU_MAX_RINGS];
> +
> +       /* protecting freed */
> +       spinlock_t              freed_lock;
> +
> +       /* Scheduler entity for page table updates */
> +       struct amd_sched_entity entity;
> +
> +       /* client id */
> +       u64                     client_id;
> +};
> +
> +struct amdgpu_vm_id {
> +       struct list_head        list;
> +       struct fence            *first;
> +       struct amdgpu_sync      active;
> +       struct fence            *last_flush;
> +       atomic64_t              owner;
> +
> +       uint64_t                pd_gpu_addr;
> +       /* last flushed PD/PT update */
> +       struct fence            *flushed_updates;
> +
> +       uint32_t                current_gpu_reset_count;
> +
> +       uint32_t                gds_base;
> +       uint32_t                gds_size;
> +       uint32_t                gws_base;
> +       uint32_t                gws_size;
> +       uint32_t                oa_base;
> +       uint32_t                oa_size;
> +};
> +
> +struct amdgpu_vm_manager {
> +       /* Handling of VMIDs */
> +       struct mutex                            lock;
> +       unsigned                                num_ids;
> +       struct list_head                        ids_lru;
> +       struct amdgpu_vm_id                     ids[AMDGPU_NUM_VM];
> +
> +       /* Handling of VM fences */
> +       u64                                     fence_context;
> +       unsigned                                seqno[AMDGPU_MAX_RINGS];
> +
> +       uint32_t                                max_pfn;
> +       /* vram base address for page table entry  */
> +       u64                                     vram_base_offset;
> +       /* is vm enabled? */
> +       bool                                    enabled;
> +       /* vm pte handling */
> +       const struct amdgpu_vm_pte_funcs        *vm_pte_funcs;
> +       struct amdgpu_ring                      *vm_pte_rings[AMDGPU_MAX_RINGS];
> +       unsigned                                vm_pte_num_rings;
> +       atomic_t                                vm_pte_next_ring;
> +       /* client id counter */
> +       atomic64_t                              client_counter;
> +};
> +
> +void amdgpu_vm_manager_init(struct amdgpu_device *adev);
> +void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
> +int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm);
> +void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
> +void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
> +                        struct list_head *validated,
> +                        struct amdgpu_bo_list_entry *entry);
> +int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> +                             int (*callback)(void *p, struct amdgpu_bo *bo),
> +                             void *param);
> +void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
> +                                 struct amdgpu_vm *vm);
> +int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
> +                     struct amdgpu_sync *sync, struct fence *fence,
> +                     struct amdgpu_job *job);
> +int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job);
> +void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vm_id);
> +int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
> +                                   struct amdgpu_vm *vm);
> +int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
> +                         struct amdgpu_vm *vm);
> +int amdgpu_vm_clear_invalids(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> +                            struct amdgpu_sync *sync);
> +int amdgpu_vm_bo_update(struct amdgpu_device *adev,
> +                       struct amdgpu_bo_va *bo_va,
> +                       bool clear);
> +void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
> +                            struct amdgpu_bo *bo);
> +struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
> +                                      struct amdgpu_bo *bo);
> +struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev,
> +                                     struct amdgpu_vm *vm,
> +                                     struct amdgpu_bo *bo);
> +int amdgpu_vm_bo_map(struct amdgpu_device *adev,
> +                    struct amdgpu_bo_va *bo_va,
> +                    uint64_t addr, uint64_t offset,
> +                    uint64_t size, uint32_t flags);
> +int amdgpu_vm_bo_unmap(struct amdgpu_device *adev,
> +                      struct amdgpu_bo_va *bo_va,
> +                      uint64_t addr);
> +void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
> +                     struct amdgpu_bo_va *bo_va);
> +
> +#endif
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 1/7] drm/amdgpu: remove adev pointer from struct amdgpu_bo
       [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
                     ` (6 preceding siblings ...)
  2016-09-29 16:41   ` [PATCH 1/7] drm/amdgpu: remove adev pointer from struct amdgpu_bo Alex Deucher
@ 2016-10-02 21:21   ` Grazvydas Ignotas
  7 siblings, 0 replies; 15+ messages in thread
From: Grazvydas Ignotas @ 2016-10-02 21:21 UTC (permalink / raw)
  To: Christian König; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

On Thu, Sep 29, 2016 at 10:52 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> It's completely pointsless to have two pointers to the
> device in the same structur.

Several typos here...

Gražvydas
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2016-10-02 21:21 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-09-29  7:52 [PATCH 1/7] drm/amdgpu: remove adev pointer from struct amdgpu_bo Christian König
     [not found] ` <1475135557-11537-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2016-09-29  7:52   ` [PATCH 2/7] drm/amdgpu: update the shadow PD together with the real one Christian König
     [not found]     ` <1475135557-11537-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2016-09-29  9:18       ` zhoucm1
     [not found]         ` <57ECDC65.40203-5C7GfCeVMHo@public.gmane.org>
2016-09-29 12:10           ` Christian König
     [not found]             ` <5ad68770-f356-33b6-a3d0-7cec66c56ca3-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2016-09-29 16:51               ` Alex Deucher
2016-09-29  7:52   ` [PATCH 3/7] drm/amdgpu: move PT validation back into VM code Christian König
     [not found]     ` <1475135557-11537-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2016-09-29 16:50       ` Alex Deucher
2016-09-29  7:52   ` [PATCH 4/7] drm/amdgpu: stop using a bo list entry for the VM PTs Christian König
     [not found]     ` <1475135557-11537-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2016-09-29 16:52       ` Alex Deucher
2016-09-29  7:52   ` [PATCH 5/7] drm/amdgpu: move sync handling into a separate header Christian König
2016-09-29  7:52   ` [PATCH 6/7] drm/amdgpu: move fence and ring defines into amdgpu_ring.h Christian König
2016-09-29  7:52   ` [PATCH 7/7] drm/amdgpu: move VM defines into amdgpu_vm.h Christian König
     [not found]     ` <1475135557-11537-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2016-09-29 16:54       ` Alex Deucher
2016-09-29 16:41   ` [PATCH 1/7] drm/amdgpu: remove adev pointer from struct amdgpu_bo Alex Deucher
2016-10-02 21:21   ` Grazvydas Ignotas

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