[PATCH RFC] drm/i915/dp/psr: Enable n + 1 active frame capture for PSR

[PATCH RFC] drm/i915/dp/psr: Enable n + 1 active frame capture for PSR

[Jim Bride]

On some system + panel combinations the vblank interval is too
short for PSR setup to occur.  While reading the eDP v1.3 spec
I saw that Figure 4-7 describes a solution to this very problem
by configuring PSR to capture the second active frame after the
PSR entry indication in order to provide more time for PSR
setup activities.  This patch changes our PSR configuration
to indicate that the sink should capture the second active
frame after PSR entry indication.

Cc: jani.nikula@linux.intel.com
Cc: ville.syrjala@linux.intel.com
Cc: rodrigo.vivi@intel.com

Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 108ba1e..4d7e2a8 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -199,10 +199,11 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
 
 	if (dev_priv->psr.link_standby)
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
-				   DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
+				   DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE |
+				   DP_PSR_FRAME_CAPTURE);
 	else
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
-				   DP_PSR_ENABLE);
+				   DP_PSR_ENABLE | DP_PSR_FRAME_CAPTURE);
 
 	aux_ctl_reg = psr_aux_ctl_reg(dev_priv, port);
 
-- 
2.7.4

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✗ Fi.CI.BAT: warning for drm/i915/dp/psr: Enable n + 1 active frame capture for PSR

[Patchwork]

== Series Details ==

Series: drm/i915/dp/psr: Enable n + 1 active frame capture for PSR
URL   : https://patchwork.freedesktop.org/series/13249/
State : warning

== Summary ==

Series 13249v1 drm/i915/dp/psr: Enable n + 1 active frame capture for PSR
https://patchwork.freedesktop.org/api/1.0/series/13249/revisions/1/mbox/

Test drv_module_reload_basic:
                skip       -> PASS       (fi-hsw-4770r)
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-ilk-650)
        Subgroup suspend-read-crc-pipe-a:
                dmesg-warn -> PASS       (fi-byt-j1900)
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-j1900)

fi-bdw-5557u     total:244  pass:229  dwarn:0   dfail:0   fail:0   skip:15 
fi-bsw-n3050     total:244  pass:202  dwarn:0   dfail:0   fail:0   skip:42 
fi-bxt-t5700     total:244  pass:214  dwarn:0   dfail:0   fail:0   skip:30 
fi-byt-j1900     total:244  pass:211  dwarn:1   dfail:0   fail:1   skip:31 
fi-byt-n2820     total:244  pass:208  dwarn:0   dfail:0   fail:1   skip:35 
fi-hsw-4770      total:244  pass:222  dwarn:0   dfail:0   fail:0   skip:22 
fi-hsw-4770r     total:244  pass:222  dwarn:0   dfail:0   fail:0   skip:22 
fi-ilk-650       total:244  pass:181  dwarn:1   dfail:0   fail:2   skip:60 
fi-ivb-3520m     total:244  pass:219  dwarn:0   dfail:0   fail:0   skip:25 
fi-ivb-3770      total:244  pass:207  dwarn:0   dfail:0   fail:0   skip:37 
fi-skl-6260u     total:244  pass:230  dwarn:0   dfail:0   fail:0   skip:14 
fi-skl-6700hq    total:244  pass:221  dwarn:1   dfail:0   fail:0   skip:22 
fi-skl-6700k     total:244  pass:219  dwarn:1   dfail:0   fail:0   skip:24 
fi-skl-6770hq    total:244  pass:228  dwarn:1   dfail:0   fail:1   skip:14 
fi-snb-2520m     total:244  pass:208  dwarn:0   dfail:0   fail:0   skip:36 
fi-snb-2600      total:244  pass:207  dwarn:0   dfail:0   fail:0   skip:37 

Results at /archive/results/CI_IGT_test/Patchwork_2616/

35ceb7ced7dc45fe6db94e36e3d36089557994f4 drm-intel-nightly: 2016y-10m-03d-20h-05m-29s UTC integration manifest
e67fd82 drm/i915/dp/psr: Enable n + 1 active frame capture for PSR

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