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* [CI 1/4] drm/i915: Shrink cxsr_latency_table
@ 2016-10-13 10:09 Tvrtko Ursulin
  2016-10-13 10:09 ` [CI 2/4] drm/i915: Shrink sdvo_cmd_names Tvrtko Ursulin
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Tvrtko Ursulin @ 2016-10-13 10:09 UTC (permalink / raw)
  To: Intel-gfx

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

unsigned long is too wide - use smaller types in
struct cxsr_latency to save 800-something bytes of .rodata.

v2: All data even fits in u16 for even more saving. (Ville Syrjala)
v3: Move bitfields to the end of the struct. (Joonas Lahtinen)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h | 16 ++++++++--------
 drivers/gpu/drm/i915/intel_pm.c  |  4 ++--
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f48e79ae2ac6..1663000023b9 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -807,14 +807,14 @@ struct intel_watermark_params {
 };
 
 struct cxsr_latency {
-	int is_desktop;
-	int is_ddr3;
-	unsigned long fsb_freq;
-	unsigned long mem_freq;
-	unsigned long display_sr;
-	unsigned long display_hpll_disable;
-	unsigned long cursor_sr;
-	unsigned long cursor_hpll_disable;
+	u16 fsb_freq;
+	u16 mem_freq;
+	u16 display_sr;
+	u16 display_hpll_disable;
+	u16 cursor_sr;
+	u16 cursor_hpll_disable;
+	bool is_desktop : 1;
+	bool is_ddr3 : 1;
 };
 
 #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fe6c1c61c388..6d1d4022dbdb 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -252,8 +252,8 @@ static const struct cxsr_latency cxsr_latency_table[] = {
 	{0, 1, 400, 800, 6042, 36042, 6584, 36584},    /* DDR3-800 SC */
 };
 
-static const struct cxsr_latency *intel_get_cxsr_latency(int is_desktop,
-							 int is_ddr3,
+static const struct cxsr_latency *intel_get_cxsr_latency(bool is_desktop,
+							 bool is_ddr3,
 							 int fsb,
 							 int mem)
 {
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [CI 2/4] drm/i915: Shrink sdvo_cmd_names
  2016-10-13 10:09 [CI 1/4] drm/i915: Shrink cxsr_latency_table Tvrtko Ursulin
@ 2016-10-13 10:09 ` Tvrtko Ursulin
  2016-10-13 10:09 ` [CI 3/4] drm/i915: Shrink per-platform watermark configuration Tvrtko Ursulin
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Tvrtko Ursulin @ 2016-10-13 10:09 UTC (permalink / raw)
  To: Intel-gfx

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Pack the struct _sdvo_cmd_name to save 736 bytes of .rodata.

This is fine since the name pointers are used only for debug.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index a061b0029797..9f352aac9526 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -307,7 +307,7 @@ static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 static const struct _sdvo_cmd_name {
 	u8 cmd;
 	const char *name;
-} sdvo_cmd_names[] = {
+} __attribute__ ((packed)) sdvo_cmd_names[] = {
 	SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [CI 3/4] drm/i915: Shrink per-platform watermark configuration
  2016-10-13 10:09 [CI 1/4] drm/i915: Shrink cxsr_latency_table Tvrtko Ursulin
  2016-10-13 10:09 ` [CI 2/4] drm/i915: Shrink sdvo_cmd_names Tvrtko Ursulin
@ 2016-10-13 10:09 ` Tvrtko Ursulin
  2016-10-13 10:09 ` [CI 4/4] drm/i915: Shrink TV modes const data Tvrtko Ursulin
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Tvrtko Ursulin @ 2016-10-13 10:09 UTC (permalink / raw)
  To: Intel-gfx

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Use types of more appropriate size in struct
intel_watermark_params to save 512 bytes of .rodata.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h | 10 +++++-----
 drivers/gpu/drm/i915/intel_pm.c  |  4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1663000023b9..07b93f23b8bf 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -799,11 +799,11 @@ struct intel_plane {
 };
 
 struct intel_watermark_params {
-	unsigned long fifo_size;
-	unsigned long max_wm;
-	unsigned long default_wm;
-	unsigned long guard_size;
-	unsigned long cacheline_size;
+	u16 fifo_size;
+	u16 max_wm;
+	u8 default_wm;
+	u8 guard_size;
+	u8 cacheline_size;
 };
 
 struct cxsr_latency {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6d1d4022dbdb..38081387802d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -775,13 +775,13 @@ static bool g4x_check_srwm(struct drm_device *dev,
 		      display_wm, cursor_wm);
 
 	if (display_wm > display->max_wm) {
-		DRM_DEBUG_KMS("display watermark is too large(%d/%ld), disabling\n",
+		DRM_DEBUG_KMS("display watermark is too large(%d/%u), disabling\n",
 			      display_wm, display->max_wm);
 		return false;
 	}
 
 	if (cursor_wm > cursor->max_wm) {
-		DRM_DEBUG_KMS("cursor watermark is too large(%d/%ld), disabling\n",
+		DRM_DEBUG_KMS("cursor watermark is too large(%d/%u), disabling\n",
 			      cursor_wm, cursor->max_wm);
 		return false;
 	}
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [CI 4/4] drm/i915: Shrink TV modes const data
  2016-10-13 10:09 [CI 1/4] drm/i915: Shrink cxsr_latency_table Tvrtko Ursulin
  2016-10-13 10:09 ` [CI 2/4] drm/i915: Shrink sdvo_cmd_names Tvrtko Ursulin
  2016-10-13 10:09 ` [CI 3/4] drm/i915: Shrink per-platform watermark configuration Tvrtko Ursulin
@ 2016-10-13 10:09 ` Tvrtko Ursulin
  2016-10-13 11:50 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table Patchwork
  2016-10-14 13:31 ` [CI 1/4] " Jani Nikula
  4 siblings, 0 replies; 10+ messages in thread
From: Tvrtko Ursulin @ 2016-10-13 10:09 UTC (permalink / raw)
  To: Intel-gfx

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Make struct video_levels and struct tv_mode use data types
of sufficient width to save approximately one kilobyte in
the .rodata section.

v2: Do not align struct members. (Jani Nikula, Joonas Lahtinen)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_tv.c | 46 +++++++++++++++++++++++++----------------
 1 file changed, 28 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 3988c45f9e5f..a0301a5dc249 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -86,7 +86,8 @@ struct intel_tv {
 };
 
 struct video_levels {
-	int blank, black, burst;
+	u16 blank, black;
+	u8 burst;
 };
 
 struct color_conversion {
@@ -339,34 +340,43 @@ static const struct video_levels component_levels = {
 
 struct tv_mode {
 	const char *name;
-	int clock;
-	int refresh; /* in millihertz (for precision) */
+
+	u32 clock;
+	u16 refresh; /* in millihertz (for precision) */
 	u32 oversample;
-	int hsync_end, hblank_start, hblank_end, htotal;
-	bool progressive, trilevel_sync, component_only;
-	int vsync_start_f1, vsync_start_f2, vsync_len;
-	bool veq_ena;
-	int veq_start_f1, veq_start_f2, veq_len;
-	int vi_end_f1, vi_end_f2, nbr_end;
-	bool burst_ena;
-	int hburst_start, hburst_len;
-	int vburst_start_f1, vburst_end_f1;
-	int vburst_start_f2, vburst_end_f2;
-	int vburst_start_f3, vburst_end_f3;
-	int vburst_start_f4, vburst_end_f4;
+	u8 hsync_end;
+	u16 hblank_start, hblank_end, htotal;
+	bool progressive : 1, trilevel_sync : 1, component_only : 1;
+	u8 vsync_start_f1, vsync_start_f2, vsync_len;
+	bool veq_ena : 1;
+	u8 veq_start_f1, veq_start_f2, veq_len;
+	u8 vi_end_f1, vi_end_f2;
+	u16 nbr_end;
+	bool burst_ena : 1;
+	u8 hburst_start, hburst_len;
+	u8 vburst_start_f1;
+	u16 vburst_end_f1;
+	u8 vburst_start_f2;
+	u16 vburst_end_f2;
+	u8 vburst_start_f3;
+	u16 vburst_end_f3;
+	u8 vburst_start_f4;
+	u16 vburst_end_f4;
 	/*
 	 * subcarrier programming
 	 */
-	int dda2_size, dda3_size, dda1_inc, dda2_inc, dda3_inc;
+	u16 dda2_size, dda3_size;
+	u8 dda1_inc;
+	u16 dda2_inc, dda3_inc;
 	u32 sc_reset;
-	bool pal_burst;
+	bool pal_burst : 1;
 	/*
 	 * blank/black levels
 	 */
 	const struct video_levels *composite_levels, *svideo_levels;
 	const struct color_conversion *composite_color, *svideo_color;
 	const u32 *filter_table;
-	int max_srcw;
+	u16 max_srcw;
 };
 
 
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table
  2016-10-13 10:09 [CI 1/4] drm/i915: Shrink cxsr_latency_table Tvrtko Ursulin
                   ` (2 preceding siblings ...)
  2016-10-13 10:09 ` [CI 4/4] drm/i915: Shrink TV modes const data Tvrtko Ursulin
@ 2016-10-13 11:50 ` Patchwork
  2016-10-13 12:08   ` Tvrtko Ursulin
  2016-10-14 13:31 ` [CI 1/4] " Jani Nikula
  4 siblings, 1 reply; 10+ messages in thread
From: Patchwork @ 2016-10-13 11:50 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: intel-gfx

== Series Details ==

Series: series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table
URL   : https://patchwork.freedesktop.org/series/13715/
State : success

== Summary ==

Series 13715v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/13715/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup bad-source:
                dmesg-warn -> PASS       (fi-ilk-650)
        Subgroup read-crc-pipe-a-frame-sequence:
                dmesg-warn -> PASS       (fi-ilk-650)
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-byt-j1900)
Test vgem_basic:
        Subgroup unload:
                skip       -> PASS       (fi-hsw-4770)

fi-bdw-5557u     total:246  pass:231  dwarn:0   dfail:0   fail:0   skip:15 
fi-bsw-n3050     total:246  pass:204  dwarn:0   dfail:0   fail:0   skip:42 
fi-bxt-t5700     total:246  pass:216  dwarn:0   dfail:0   fail:0   skip:30 
fi-byt-j1900     total:246  pass:213  dwarn:1   dfail:0   fail:1   skip:31 
fi-byt-n2820     total:246  pass:210  dwarn:0   dfail:0   fail:1   skip:35 
fi-hsw-4770      total:246  pass:224  dwarn:0   dfail:0   fail:0   skip:22 
fi-hsw-4770r     total:246  pass:224  dwarn:0   dfail:0   fail:0   skip:22 
fi-ilk-650       total:246  pass:184  dwarn:0   dfail:0   fail:2   skip:60 
fi-ivb-3520m     total:246  pass:221  dwarn:0   dfail:0   fail:0   skip:25 
fi-ivb-3770      total:246  pass:221  dwarn:0   dfail:0   fail:0   skip:25 
fi-kbl-7200u     total:246  pass:222  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6260u     total:246  pass:232  dwarn:0   dfail:0   fail:0   skip:14 
fi-skl-6700hq    total:246  pass:223  dwarn:0   dfail:0   fail:0   skip:23 
fi-skl-6700k     total:246  pass:221  dwarn:1   dfail:0   fail:0   skip:24 
fi-skl-6770hq    total:246  pass:230  dwarn:1   dfail:0   fail:1   skip:14 
fi-snb-2520m     total:246  pass:210  dwarn:0   dfail:0   fail:0   skip:36 
fi-snb-2600      total:246  pass:209  dwarn:0   dfail:0   fail:0   skip:37 

Results at /archive/results/CI_IGT_test/Patchwork_2701/

75d9d28f7f5d0147ba35e956268c3a3c079dc754 drm-intel-nightly: 2016y-10m-13d-09h-14m-05s UTC integration manifest
50173ad drm/i915: Shrink TV modes const data
a720f56 drm/i915: Shrink per-platform watermark configuration
d1a52a3 drm/i915: Shrink sdvo_cmd_names
d8cf1ee5 drm/i915: Shrink cxsr_latency_table

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table
  2016-10-13 11:50 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table Patchwork
@ 2016-10-13 12:08   ` Tvrtko Ursulin
  0 siblings, 0 replies; 10+ messages in thread
From: Tvrtko Ursulin @ 2016-10-13 12:08 UTC (permalink / raw)
  To: intel-gfx, Tvrtko Ursulin


On 13/10/2016 12:50, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table
> URL   : https://patchwork.freedesktop.org/series/13715/
> State : success
>
> == Summary ==
>
> Series 13715v1 Series without cover letter
> https://patchwork.freedesktop.org/api/1.0/series/13715/revisions/1/mbox/
>
> Test kms_pipe_crc_basic:
>          Subgroup bad-source:
>                  dmesg-warn -> PASS       (fi-ilk-650)
>          Subgroup read-crc-pipe-a-frame-sequence:
>                  dmesg-warn -> PASS       (fi-ilk-650)
>          Subgroup suspend-read-crc-pipe-b:
>                  dmesg-warn -> PASS       (fi-byt-j1900)
> Test vgem_basic:
>          Subgroup unload:
>                  skip       -> PASS       (fi-hsw-4770)
>
> fi-bdw-5557u     total:246  pass:231  dwarn:0   dfail:0   fail:0   skip:15
> fi-bsw-n3050     total:246  pass:204  dwarn:0   dfail:0   fail:0   skip:42
> fi-bxt-t5700     total:246  pass:216  dwarn:0   dfail:0   fail:0   skip:30
> fi-byt-j1900     total:246  pass:213  dwarn:1   dfail:0   fail:1   skip:31
> fi-byt-n2820     total:246  pass:210  dwarn:0   dfail:0   fail:1   skip:35
> fi-hsw-4770      total:246  pass:224  dwarn:0   dfail:0   fail:0   skip:22
> fi-hsw-4770r     total:246  pass:224  dwarn:0   dfail:0   fail:0   skip:22
> fi-ilk-650       total:246  pass:184  dwarn:0   dfail:0   fail:2   skip:60
> fi-ivb-3520m     total:246  pass:221  dwarn:0   dfail:0   fail:0   skip:25
> fi-ivb-3770      total:246  pass:221  dwarn:0   dfail:0   fail:0   skip:25
> fi-kbl-7200u     total:246  pass:222  dwarn:0   dfail:0   fail:0   skip:24
> fi-skl-6260u     total:246  pass:232  dwarn:0   dfail:0   fail:0   skip:14
> fi-skl-6700hq    total:246  pass:223  dwarn:0   dfail:0   fail:0   skip:23
> fi-skl-6700k     total:246  pass:221  dwarn:1   dfail:0   fail:0   skip:24
> fi-skl-6770hq    total:246  pass:230  dwarn:1   dfail:0   fail:1   skip:14
> fi-snb-2520m     total:246  pass:210  dwarn:0   dfail:0   fail:0   skip:36
> fi-snb-2600      total:246  pass:209  dwarn:0   dfail:0   fail:0   skip:37
>
> Results at /archive/results/CI_IGT_test/Patchwork_2701/
>
> 75d9d28f7f5d0147ba35e956268c3a3c079dc754 drm-intel-nightly: 2016y-10m-13d-09h-14m-05s UTC integration manifest
> 50173ad drm/i915: Shrink TV modes const data
> a720f56 drm/i915: Shrink per-platform watermark configuration
> d1a52a3 drm/i915: Shrink sdvo_cmd_names
> d8cf1ee5 drm/i915: Shrink cxsr_latency_table
>

Merged to dinq, thanks for the review!

Regards,

Tvrtko

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [CI 1/4] drm/i915: Shrink cxsr_latency_table
  2016-10-13 10:09 [CI 1/4] drm/i915: Shrink cxsr_latency_table Tvrtko Ursulin
                   ` (3 preceding siblings ...)
  2016-10-13 11:50 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table Patchwork
@ 2016-10-14 13:31 ` Jani Nikula
  2016-10-14 14:08   ` Tvrtko Ursulin
  4 siblings, 1 reply; 10+ messages in thread
From: Jani Nikula @ 2016-10-14 13:31 UTC (permalink / raw)
  To: Tvrtko Ursulin, Intel-gfx; +Cc: Lahtinen, Joonas

On Thu, 13 Oct 2016, Tvrtko Ursulin <tursulin@ursulin.net> wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> unsigned long is too wide - use smaller types in
> struct cxsr_latency to save 800-something bytes of .rodata.
>
> v2: All data even fits in u16 for even more saving. (Ville Syrjala)
> v3: Move bitfields to the end of the struct. (Joonas Lahtinen)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Please learn how to run sparse, make it a habit to run it on your local
branches before submitting patches, and make it a rule to run it before
pushing patches. dim has helpers for this.

The following is caused by this patch, fix or revert ASAP.

BR,
Jani.


  CHECK   drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_pm.c:218:39: warning: cast truncates bits from constant value (f8f becomes 1)
drivers/gpu/drm/i915/intel_pm.c:218:45: warning: cast truncates bits from constant value (84bf becomes 1)
drivers/gpu/drm/i915/intel_pm.c:219:39: warning: cast truncates bits from constant value (edf becomes 1)
drivers/gpu/drm/i915/intel_pm.c:219:45: warning: cast truncates bits from constant value (840f becomes 1)
drivers/gpu/drm/i915/intel_pm.c:220:39: warning: cast truncates bits from constant value (eb3 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:220:45: warning: cast truncates bits from constant value (83e3 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:221:39: warning: cast truncates bits from constant value (1ad9 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:221:45: warning: cast truncates bits from constant value (9009 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:222:39: warning: cast truncates bits from constant value (18ae becomes 0)
drivers/gpu/drm/i915/intel_pm.c:222:45: warning: cast truncates bits from constant value (8dde becomes 0)
drivers/gpu/drm/i915/intel_pm.c:224:39: warning: cast truncates bits from constant value (fb5 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:224:45: warning: cast truncates bits from constant value (84e5 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:225:39: warning: cast truncates bits from constant value (f05 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:225:45: warning: cast truncates bits from constant value (8435 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:226:39: warning: cast truncates bits from constant value (eee becomes 0)
drivers/gpu/drm/i915/intel_pm.c:226:45: warning: cast truncates bits from constant value (841e becomes 0)
drivers/gpu/drm/i915/intel_pm.c:227:39: warning: cast truncates bits from constant value (1aff becomes 1)
drivers/gpu/drm/i915/intel_pm.c:227:45: warning: cast truncates bits from constant value (902f becomes 1)
drivers/gpu/drm/i915/intel_pm.c:228:39: warning: cast truncates bits from constant value (18e9 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:228:45: warning: cast truncates bits from constant value (8e19 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:230:39: warning: cast truncates bits from constant value (104d becomes 1)
drivers/gpu/drm/i915/intel_pm.c:230:45: warning: cast truncates bits from constant value (857d becomes 1)
drivers/gpu/drm/i915/intel_pm.c:231:39: warning: cast truncates bits from constant value (f9c becomes 0)
drivers/gpu/drm/i915/intel_pm.c:231:45: warning: cast truncates bits from constant value (84cc becomes 0)
drivers/gpu/drm/i915/intel_pm.c:232:39: warning: cast truncates bits from constant value (f6a becomes 0)
drivers/gpu/drm/i915/intel_pm.c:232:45: warning: cast truncates bits from constant value (849a becomes 0)
drivers/gpu/drm/i915/intel_pm.c:233:39: warning: cast truncates bits from constant value (1b96 becomes 0)
drivers/gpu/drm/i915/intel_pm.c:233:45: warning: cast truncates bits from constant value (90c6 becomes 0)
drivers/gpu/drm/i915/intel_pm.c:234:39: warning: cast truncates bits from constant value (1965 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:234:45: warning: cast truncates bits from constant value (8e95 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:236:39: warning: cast truncates bits from constant value (fe1 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:236:45: warning: cast truncates bits from constant value (8511 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:237:39: warning: cast truncates bits from constant value (f31 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:237:45: warning: cast truncates bits from constant value (8461 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:238:39: warning: cast truncates bits from constant value (f05 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:238:45: warning: cast truncates bits from constant value (8435 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:239:39: warning: cast truncates bits from constant value (1b2b becomes 1)
drivers/gpu/drm/i915/intel_pm.c:239:45: warning: cast truncates bits from constant value (905b becomes 1)
drivers/gpu/drm/i915/intel_pm.c:240:39: warning: cast truncates bits from constant value (1900 becomes 0)
drivers/gpu/drm/i915/intel_pm.c:240:45: warning: cast truncates bits from constant value (8e30 becomes 0)
drivers/gpu/drm/i915/intel_pm.c:242:39: warning: cast truncates bits from constant value (1007 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:242:45: warning: cast truncates bits from constant value (853a becomes 0)
drivers/gpu/drm/i915/intel_pm.c:243:39: warning: cast truncates bits from constant value (f57 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:243:45: warning: cast truncates bits from constant value (8487 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:244:39: warning: cast truncates bits from constant value (f41 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:244:45: warning: cast truncates bits from constant value (8471 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:245:39: warning: cast truncates bits from constant value (1b51 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:245:45: warning: cast truncates bits from constant value (9081 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:246:39: warning: cast truncates bits from constant value (193c becomes 0)
drivers/gpu/drm/i915/intel_pm.c:246:45: warning: cast truncates bits from constant value (8e6c becomes 0)
drivers/gpu/drm/i915/intel_pm.c:248:39: warning: cast truncates bits from constant value (109f becomes 1)
drivers/gpu/drm/i915/intel_pm.c:248:45: warning: cast truncates bits from constant value (85cf becomes 1)
drivers/gpu/drm/i915/intel_pm.c:249:39: warning: cast truncates bits from constant value (fef becomes 1)
drivers/gpu/drm/i915/intel_pm.c:249:45: warning: cast truncates bits from constant value (851f becomes 1)
drivers/gpu/drm/i915/intel_pm.c:250:39: warning: cast truncates bits from constant value (fbd becomes 1)
drivers/gpu/drm/i915/intel_pm.c:250:45: warning: cast truncates bits from constant value (84ed becomes 1)
drivers/gpu/drm/i915/intel_pm.c:251:39: warning: cast truncates bits from constant value (1be9 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:251:45: warning: cast truncates bits from constant value (9119 becomes 1)
drivers/gpu/drm/i915/intel_pm.c:252:39: warning: cast truncates bits from constant value (19b8 becomes 0)
drivers/gpu/drm/i915/intel_pm.c:252:45: warning: cast truncates bits from constant value (8ee8 becomes 0)


> ---
>  drivers/gpu/drm/i915/intel_drv.h | 16 ++++++++--------
>  drivers/gpu/drm/i915/intel_pm.c  |  4 ++--
>  2 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index f48e79ae2ac6..1663000023b9 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -807,14 +807,14 @@ struct intel_watermark_params {
>  };
>  
>  struct cxsr_latency {
> -	int is_desktop;
> -	int is_ddr3;
> -	unsigned long fsb_freq;
> -	unsigned long mem_freq;
> -	unsigned long display_sr;
> -	unsigned long display_hpll_disable;
> -	unsigned long cursor_sr;
> -	unsigned long cursor_hpll_disable;
> +	u16 fsb_freq;
> +	u16 mem_freq;
> +	u16 display_sr;
> +	u16 display_hpll_disable;
> +	u16 cursor_sr;
> +	u16 cursor_hpll_disable;
> +	bool is_desktop : 1;
> +	bool is_ddr3 : 1;
>  };
>  
>  #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index fe6c1c61c388..6d1d4022dbdb 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -252,8 +252,8 @@ static const struct cxsr_latency cxsr_latency_table[] = {
>  	{0, 1, 400, 800, 6042, 36042, 6584, 36584},    /* DDR3-800 SC */
>  };
>  
> -static const struct cxsr_latency *intel_get_cxsr_latency(int is_desktop,
> -							 int is_ddr3,
> +static const struct cxsr_latency *intel_get_cxsr_latency(bool is_desktop,
> +							 bool is_ddr3,
>  							 int fsb,
>  							 int mem)
>  {

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [CI 1/4] drm/i915: Shrink cxsr_latency_table
  2016-10-14 13:31 ` [CI 1/4] " Jani Nikula
@ 2016-10-14 14:08   ` Tvrtko Ursulin
  2016-10-14 14:14     ` Chris Wilson
  2016-10-14 14:20     ` Jani Nikula
  0 siblings, 2 replies; 10+ messages in thread
From: Tvrtko Ursulin @ 2016-10-14 14:08 UTC (permalink / raw)
  To: Jani Nikula, Tvrtko Ursulin, Intel-gfx; +Cc: Lahtinen, Joonas


On 14/10/2016 14:31, Jani Nikula wrote:
> On Thu, 13 Oct 2016, Tvrtko Ursulin <tursulin@ursulin.net> wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> unsigned long is too wide - use smaller types in
>> struct cxsr_latency to save 800-something bytes of .rodata.
>>
>> v2: All data even fits in u16 for even more saving. (Ville Syrjala)
>> v3: Move bitfields to the end of the struct. (Joonas Lahtinen)
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Please learn how to run sparse, make it a habit to run it on your local
> branches before submitting patches, and make it a rule to run it before
> pushing patches. dim has helpers for this.

Yeah I saw that you added dim sparse this week, however it only runs if 
the dim tree is used for building it seems.

I will try to figure out how to run in a separate build tree.

> The following is caused by this patch, fix or revert ASAP.

Fix sent, you are on cc.

Regards,

Tvrtko

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [CI 1/4] drm/i915: Shrink cxsr_latency_table
  2016-10-14 14:08   ` Tvrtko Ursulin
@ 2016-10-14 14:14     ` Chris Wilson
  2016-10-14 14:20     ` Jani Nikula
  1 sibling, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2016-10-14 14:14 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: Lahtinen, Joonas, Intel-gfx

On Fri, Oct 14, 2016 at 03:08:29PM +0100, Tvrtko Ursulin wrote:
> 
> On 14/10/2016 14:31, Jani Nikula wrote:
> >On Thu, 13 Oct 2016, Tvrtko Ursulin <tursulin@ursulin.net> wrote:
> >>From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>
> >>unsigned long is too wide - use smaller types in
> >>struct cxsr_latency to save 800-something bytes of .rodata.
> >>
> >>v2: All data even fits in u16 for even more saving. (Ville Syrjala)
> >>v3: Move bitfields to the end of the struct. (Joonas Lahtinen)
> >>
> >>Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >Please learn how to run sparse, make it a habit to run it on your local
> >branches before submitting patches, and make it a rule to run it before
> >pushing patches. dim has helpers for this.
> 
> Yeah I saw that you added dim sparse this week, however it only runs
> if the dim tree is used for building it seems.
> 
> I will try to figure out how to run in a separate build tree.

apt-get install sparse
make C=1

Start fuming.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [CI 1/4] drm/i915: Shrink cxsr_latency_table
  2016-10-14 14:08   ` Tvrtko Ursulin
  2016-10-14 14:14     ` Chris Wilson
@ 2016-10-14 14:20     ` Jani Nikula
  1 sibling, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2016-10-14 14:20 UTC (permalink / raw)
  To: Tvrtko Ursulin, Tvrtko Ursulin, Intel-gfx; +Cc: Lahtinen, Joonas

On Fri, 14 Oct 2016, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
> On 14/10/2016 14:31, Jani Nikula wrote:
>> On Thu, 13 Oct 2016, Tvrtko Ursulin <tursulin@ursulin.net> wrote:
>>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>
>>> unsigned long is too wide - use smaller types in
>>> struct cxsr_latency to save 800-something bytes of .rodata.
>>>
>>> v2: All data even fits in u16 for even more saving. (Ville Syrjala)
>>> v3: Move bitfields to the end of the struct. (Joonas Lahtinen)
>>>
>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Please learn how to run sparse, make it a habit to run it on your local
>> branches before submitting patches, and make it a rule to run it before
>> pushing patches. dim has helpers for this.
>
> Yeah I saw that you added dim sparse this week, however it only runs if 
> the dim tree is used for building it seems.
>
> I will try to figure out how to run in a separate build tree.

There was 'dim checker' before, and now also 'dim sparse'. Both do the
builds in the current directory, and do not cd to drm-intel directories,
so they can be used independent of other dim stuff.

In any case, running sparse is just a matter of having sparse in PATH,
and building using make C=1 or C=2. The former will run sparse on just
the files that need to be recompiled, the latter on everything. See also
'make help'. The helpers in dim first touch the the sources or rm the
object files, and run C=1.

>> The following is caused by this patch, fix or revert ASAP.
>
> Fix sent, you are on cc.

Thanks.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2016-10-14 14:21 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-10-13 10:09 [CI 1/4] drm/i915: Shrink cxsr_latency_table Tvrtko Ursulin
2016-10-13 10:09 ` [CI 2/4] drm/i915: Shrink sdvo_cmd_names Tvrtko Ursulin
2016-10-13 10:09 ` [CI 3/4] drm/i915: Shrink per-platform watermark configuration Tvrtko Ursulin
2016-10-13 10:09 ` [CI 4/4] drm/i915: Shrink TV modes const data Tvrtko Ursulin
2016-10-13 11:50 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table Patchwork
2016-10-13 12:08   ` Tvrtko Ursulin
2016-10-14 13:31 ` [CI 1/4] " Jani Nikula
2016-10-14 14:08   ` Tvrtko Ursulin
2016-10-14 14:14     ` Chris Wilson
2016-10-14 14:20     ` Jani Nikula

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