From: Sinan Kaya <okaya@codeaurora.org> To: dmaengine@vger.kernel.org, timur@codeaurora.org, devicetree@vger.kernel.org, cov@codeaurora.org, vinod.koul@intel.com, jcm@redhat.com Cc: agross@codeaurora.org, arnd@arndb.de, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya <okaya@codeaurora.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, linux-kernel@vger.kernel.org Subject: [PATCH V6 01/10] Documentation: DT: qcom_hidma: update binding for MSI Date: Wed, 19 Oct 2016 13:51:43 -0400 [thread overview] Message-ID: <1476899512-20431-2-git-send-email-okaya@codeaurora.org> (raw) In-Reply-To: <1476899512-20431-1-git-send-email-okaya@codeaurora.org> Adding a new binding for qcom,hidma-1.1 to distinguish HW supporting MSI interrupts from the older revision. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> --- Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt index fd5618b..2c5e4b8 100644 --- a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt +++ b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt @@ -47,12 +47,18 @@ When the OS is not in control of the management interface (i.e. it's a guest), the channel nodes appear on their own, not under a management node. Required properties: -- compatible: must contain "qcom,hidma-1.0" +- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1" +for MSI capable HW. - reg: Addresses for the transfer and event channel - interrupts: Should contain the event interrupt - desc-count: Number of asynchronous requests this channel can handle - iommus: required a iommu node +Optional properties for MSI: +- msi-parent : See the generic MSI binding described in + devicetree/bindings/interrupt-controller/msi.txt for a description of the + msi-parent property. + Example: Hypervisor OS configuration: -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: okaya@codeaurora.org (Sinan Kaya) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 01/10] Documentation: DT: qcom_hidma: update binding for MSI Date: Wed, 19 Oct 2016 13:51:43 -0400 [thread overview] Message-ID: <1476899512-20431-2-git-send-email-okaya@codeaurora.org> (raw) In-Reply-To: <1476899512-20431-1-git-send-email-okaya@codeaurora.org> Adding a new binding for qcom,hidma-1.1 to distinguish HW supporting MSI interrupts from the older revision. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> --- Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt index fd5618b..2c5e4b8 100644 --- a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt +++ b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt @@ -47,12 +47,18 @@ When the OS is not in control of the management interface (i.e. it's a guest), the channel nodes appear on their own, not under a management node. Required properties: -- compatible: must contain "qcom,hidma-1.0" +- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1" +for MSI capable HW. - reg: Addresses for the transfer and event channel - interrupts: Should contain the event interrupt - desc-count: Number of asynchronous requests this channel can handle - iommus: required a iommu node +Optional properties for MSI: +- msi-parent : See the generic MSI binding described in + devicetree/bindings/interrupt-controller/msi.txt for a description of the + msi-parent property. + Example: Hypervisor OS configuration: -- 1.9.1
next prev parent reply other threads:[~2016-10-19 17:51 UTC|newest] Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-10-19 17:51 [PATCH V6 00/10] dmaengine: qcom_hidma: add MSI interrupt support Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya [this message] 2016-10-19 17:51 ` [PATCH V6 01/10] Documentation: DT: qcom_hidma: update binding for MSI Sinan Kaya 2016-10-26 21:45 ` Rob Herring 2016-10-26 21:45 ` Rob Herring 2016-10-26 21:54 ` Sinan Kaya 2016-10-26 21:54 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 02/10] Documentation: DT: qcom_hidma: correct spelling mistakes Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 03/10] of: irq: make of_msi_configure accessible from modules Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 04/10] dmaengine: qcom_hidma: configure DMA and MSI for OF Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 05/10] dmaengine: qcom_hidma: make pending_tre_count atomic Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 06/10] dmaengine: qcom_hidma: bring out interrupt cause Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 07/10] dmaengine: qcom_hidma: add a common API to setup the interrupt Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 08/10] dmaengine: qcom_hidma: protect common data structures Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 09/10] dmaengine: qcom_hidma: break completion processing on error Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya 2016-10-19 17:51 ` [PATCH V6 10/10] dmaengine: qcom_hidma: add MSI support for interrupts Sinan Kaya 2016-10-19 17:51 ` Sinan Kaya [not found] ` <1476899512-20431-1-git-send-email-okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2016-10-20 9:48 ` [PATCH V6 00/10] dmaengine: qcom_hidma: add MSI interrupt support Vinod Koul 2016-10-20 9:48 ` Vinod Koul 2016-10-20 14:06 ` Sinan Kaya 2016-10-20 14:06 ` Sinan Kaya 2016-10-20 16:43 ` Vinod Koul 2016-10-20 16:43 ` Vinod Koul 2016-10-20 17:34 ` Sinan Kaya 2016-10-20 17:34 ` Sinan Kaya 2016-10-20 21:55 ` Sinan Kaya 2016-10-20 21:55 ` Sinan Kaya 2016-10-20 21:59 ` Sinan Kaya 2016-10-20 21:59 ` Sinan Kaya [not found] ` <37baf7db-1e14-4027-9397-70649e8fa946-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2016-10-21 6:57 ` Vinod Koul 2016-10-21 6:57 ` Vinod Koul 2016-10-21 15:56 ` Sinan Kaya 2016-10-21 15:56 ` Sinan Kaya
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1476899512-20431-2-git-send-email-okaya@codeaurora.org \ --to=okaya@codeaurora.org \ --cc=agross@codeaurora.org \ --cc=arnd@arndb.de \ --cc=cov@codeaurora.org \ --cc=devicetree@vger.kernel.org \ --cc=dmaengine@vger.kernel.org \ --cc=jcm@redhat.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-arm-msm@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=robh+dt@kernel.org \ --cc=timur@codeaurora.org \ --cc=vinod.koul@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.