[PATCH 0/2] drm/msm: Fixes for issues seen on DB410c

[PATCH 0/2] drm/msm: Fixes for issues seen on DB410c

[Archit Taneja]

The ADV7533 driver and DT bindings for MDSS hardware are both available
in 4.9, which is sufficient to boot with HDMI display on DB410c.

With the drm/msm and ADV7533 enabled, the system hangs during boot.
One reason is that the PLL driver tries to access registers without
the necessary interface clocks enabled. The other reason is a
deadlock caused by calling drm_hpd_helper_irq_event in a context
that might already hold drm_device's mode_config.mutex.

Archit Taneja (2):
  drm/msm/dsi: Queue HPD helper work in attach/detach callbacks
  drm/msm: Don't provide 'is_enabled' PLL clk_ops

 drivers/gpu/drm/msm/dsi/dsi_host.c              | 14 ++++++++++++--
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c      | 10 ----------
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 10 ----------
 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c        | 13 -------------
 4 files changed, 12 insertions(+), 35 deletions(-)

-- 
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[PATCH 1/2] drm/msm/dsi: Queue HPD helper work in attach/detach callbacks

[Archit Taneja]

The msm/dsi host drivers calls drm_helper_hpd_irq_event in the
mipi_dsi_host attach/detatch callbacks.

mipi_dsi_attach()/mipi_dsi_detach() from a panel/bridge
driver could be called from a context where the drm_device's
mode_config.mutex is already held, resulting in a deadlock.
Queue it as work instead.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index f05ed0e..6f24002 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -139,6 +139,7 @@ struct msm_dsi_host {
 
 	u32 err_work_state;
 	struct work_struct err_work;
+	struct work_struct hpd_work;
 	struct workqueue_struct *workqueue;
 
 	/* DSI 6G TX buffer*/
@@ -1294,6 +1295,14 @@ static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host)
 	wmb();	/* make sure dsi controller enabled again */
 }
 
+static void dsi_hpd_worker(struct work_struct *work)
+{
+	struct msm_dsi_host *msm_host =
+		container_of(work, struct msm_dsi_host, hpd_work);
+
+	drm_helper_hpd_irq_event(msm_host->dev);
+}
+
 static void dsi_err_worker(struct work_struct *work)
 {
 	struct msm_dsi_host *msm_host =
@@ -1480,7 +1489,7 @@ static int dsi_host_attach(struct mipi_dsi_host *host,
 
 	DBG("id=%d", msm_host->id);
 	if (msm_host->dev)
-		drm_helper_hpd_irq_event(msm_host->dev);
+		queue_work(msm_host->workqueue, &msm_host->hpd_work);
 
 	return 0;
 }
@@ -1494,7 +1503,7 @@ static int dsi_host_detach(struct mipi_dsi_host *host,
 
 	DBG("id=%d", msm_host->id);
 	if (msm_host->dev)
-		drm_helper_hpd_irq_event(msm_host->dev);
+		queue_work(msm_host->workqueue, &msm_host->hpd_work);
 
 	return 0;
 }
@@ -1748,6 +1757,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
 	/* setup workqueue */
 	msm_host->workqueue = alloc_ordered_workqueue("dsi_drm_work", 0);
 	INIT_WORK(&msm_host->err_work, dsi_err_worker);
+	INIT_WORK(&msm_host->hpd_work, dsi_hpd_worker);
 
 	msm_dsi->host = &msm_host->base;
 	msm_dsi->id = msm_host->id;
-- 
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[PATCH 2/2] drm/msm: Don't provide 'is_enabled' PLL clk_ops

[Archit Taneja]

The DSI/HDMI PLLs in MSM require resources like interface clocks, power
domains to be enabled before we can access their registers.

The clock framework doesn't have a mechanism at the moment where we can
tie such resources to a clock, so we make sure that the KMS driver enables
these resources whenever a PLL is expected to be in use.

One place where we can't ensure the resource dependencies are met is when
the clock framework tries to disable unused clocks. The KMS driver doesn't
know when the clock framework calls the is_enabled clk_op, and hence can't
enable interface clocks/power domains beforehand.

We remove the is_enabled clk_ops from the PLL clocks for now since they
aren't mandatory. This needs to be revisited, since bootloaders can enable
display, the enable count maintained by clock framework wouldn't work in
such cases.

Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c      | 10 ----------
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 10 ----------
 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c        | 13 -------------
 3 files changed, 33 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
index 598fdaf..80b7fc3 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
@@ -248,15 +248,6 @@ static int dsi_pll_28nm_clk_set_rate(struct clk_hw *hw, unsigned long rate,
 	return 0;
 }
 
-static int dsi_pll_28nm_clk_is_enabled(struct clk_hw *hw)
-{
-	struct msm_dsi_pll *pll = hw_clk_to_pll(hw);
-	struct dsi_pll_28nm *pll_28nm = to_pll_28nm(pll);
-
-	return pll_28nm_poll_for_ready(pll_28nm, POLL_MAX_READS,
-					POLL_TIMEOUT_US);
-}
-
 static unsigned long dsi_pll_28nm_clk_recalc_rate(struct clk_hw *hw,
 		unsigned long parent_rate)
 {
@@ -312,7 +303,6 @@ static unsigned long dsi_pll_28nm_clk_recalc_rate(struct clk_hw *hw,
 	.recalc_rate = dsi_pll_28nm_clk_recalc_rate,
 	.prepare = msm_dsi_pll_helper_clk_prepare,
 	.unprepare = msm_dsi_pll_helper_clk_unprepare,
-	.is_enabled = dsi_pll_28nm_clk_is_enabled,
 };
 
 /*
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c
index 38c90e1..b3d3ec7 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c
@@ -156,15 +156,6 @@ static int dsi_pll_28nm_clk_set_rate(struct clk_hw *hw, unsigned long rate,
 	return 0;
 }
 
-static int dsi_pll_28nm_clk_is_enabled(struct clk_hw *hw)
-{
-	struct msm_dsi_pll *pll = hw_clk_to_pll(hw);
-	struct dsi_pll_28nm *pll_28nm = to_pll_28nm(pll);
-
-	return pll_28nm_poll_for_ready(pll_28nm, POLL_MAX_READS,
-					POLL_TIMEOUT_US);
-}
-
 static unsigned long dsi_pll_28nm_clk_recalc_rate(struct clk_hw *hw,
 						  unsigned long parent_rate)
 {
@@ -206,7 +197,6 @@ static unsigned long dsi_pll_28nm_clk_recalc_rate(struct clk_hw *hw,
 	.recalc_rate = dsi_pll_28nm_clk_recalc_rate,
 	.prepare = msm_dsi_pll_helper_clk_prepare,
 	.unprepare = msm_dsi_pll_helper_clk_unprepare,
-	.is_enabled = dsi_pll_28nm_clk_is_enabled,
 };
 
 /*
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
index aa94a55..f3334e8 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
@@ -672,25 +672,12 @@ static void hdmi_8996_pll_unprepare(struct clk_hw *hw)
 {
 }
 
-static int hdmi_8996_pll_is_enabled(struct clk_hw *hw)
-{
-	struct hdmi_pll_8996 *pll = hw_clk_to_pll(hw);
-	u32 status;
-	int pll_locked;
-
-	status = hdmi_pll_read(pll, REG_HDMI_PHY_QSERDES_COM_C_READY_STATUS);
-	pll_locked = status & BIT(0);
-
-	return pll_locked;
-}
-
 static struct clk_ops hdmi_8996_pll_ops = {
 	.set_rate = hdmi_8996_pll_set_clk_rate,
 	.round_rate = hdmi_8996_pll_round_rate,
 	.recalc_rate = hdmi_8996_pll_recalc_rate,
 	.prepare = hdmi_8996_pll_prepare,
 	.unprepare = hdmi_8996_pll_unprepare,
-	.is_enabled = hdmi_8996_pll_is_enabled,
 };
 
 static const char * const hdmi_pll_parents[] = {
-- 
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Re: [PATCH 2/2] drm/msm: Don't provide 'is_enabled' PLL clk_ops

[Stephen Boyd]

On 10/25, Archit Taneja wrote:
> The DSI/HDMI PLLs in MSM require resources like interface clocks, power
> domains to be enabled before we can access their registers.
> 
> The clock framework doesn't have a mechanism at the moment where we can
> tie such resources to a clock, so we make sure that the KMS driver enables
> these resources whenever a PLL is expected to be in use.
> 
> One place where we can't ensure the resource dependencies are met is when
> the clock framework tries to disable unused clocks. The KMS driver doesn't
> know when the clock framework calls the is_enabled clk_op, and hence can't
> enable interface clocks/power domains beforehand.
> 
> We remove the is_enabled clk_ops from the PLL clocks for now since they
> aren't mandatory. This needs to be revisited, since bootloaders can enable
> display, the enable count maintained by clock framework wouldn't work in
> such cases.
> 
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---

Why not use the CLK_IGNORE_UNUSED flag for now? That does
essentially the same thing without requiring us to reintroduce
this code later on.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH 2/2] drm/msm: Don't provide 'is_enabled' PLL clk_ops

[Archit Taneja]

On 10/26/2016 01:58 AM, Stephen Boyd wrote:
> On 10/25, Archit Taneja wrote:
>> The DSI/HDMI PLLs in MSM require resources like interface clocks, power
>> domains to be enabled before we can access their registers.
>>
>> The clock framework doesn't have a mechanism at the moment where we can
>> tie such resources to a clock, so we make sure that the KMS driver enables
>> these resources whenever a PLL is expected to be in use.
>>
>> One place where we can't ensure the resource dependencies are met is when
>> the clock framework tries to disable unused clocks. The KMS driver doesn't
>> know when the clock framework calls the is_enabled clk_op, and hence can't
>> enable interface clocks/power domains beforehand.
>>
>> We remove the is_enabled clk_ops from the PLL clocks for now since they
>> aren't mandatory. This needs to be revisited, since bootloaders can enable
>> display, the enable count maintained by clock framework wouldn't work in
>> such cases.
>>
>> Cc: Stephen Boyd <sboyd@codeaurora.org>
>> Signed-off-by: Archit Taneja <architt@codeaurora.org>
>> ---
>
> Why not use the CLK_IGNORE_UNUSED flag for now? That does
> essentially the same thing without requiring us to reintroduce
> this code later on.

Right, that makes more sense. Will use the flag.

Thanks,
Archit

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[PATCH v2 2/2] drm/msm: Set CLK_IGNORE_UNUSED flag for PLL clocks

[Archit Taneja]

The DSI/HDMI PLLs in MSM require resources like interface clocks, power
domains to be enabled before we can access their registers.

The clock framework doesn't have a mechanism at the moment where we can
tie such resources to a clock, so we make sure that the KMS driver enables
these resources whenever a PLL is expected to be in use.

One place where we can't ensure the resource dependencies are met is when
the clock framework tries to disable unused clocks. The KMS driver doesn't
know when the clock framework calls the is_enabled clk_op, and hence can't
enable interface clocks/power domains beforehand.

We set the CLK_IGNORE_UNUSED flag for PLL clocks for now. This needs to be
revisited, since bootloaders can enable display, and we would want to
disable the PLL clocks if there isn't a display driver using them.

Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c      | 1 +
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 1 +
 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c        | 1 +
 drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c        | 1 +
 4 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
index 598fdaf..26e3a01 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c
@@ -521,6 +521,7 @@ static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm)
 		.parent_names = (const char *[]){ "xo" },
 		.num_parents = 1,
 		.name = vco_name,
+		.flags = CLK_IGNORE_UNUSED,
 		.ops = &clk_ops_dsi_pll_28nm_vco,
 	};
 	struct device *dev = &pll_28nm->pdev->dev;
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c
index 38c90e1..4900845 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c
@@ -412,6 +412,7 @@ static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm)
 	struct clk_init_data vco_init = {
 		.parent_names = (const char *[]){ "pxo" },
 		.num_parents = 1,
+		.flags = CLK_IGNORE_UNUSED,
 		.ops = &clk_ops_dsi_pll_28nm_vco,
 	};
 	struct device *dev = &pll_28nm->pdev->dev;
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
index aa94a55..143eab4 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
@@ -702,6 +702,7 @@ static int hdmi_8996_pll_is_enabled(struct clk_hw *hw)
 	.ops = &hdmi_8996_pll_ops,
 	.parent_names = hdmi_pll_parents,
 	.num_parents = ARRAY_SIZE(hdmi_pll_parents),
+	.flags = CLK_IGNORE_UNUSED,
 };
 
 int msm_hdmi_pll_8996_init(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c b/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c
index 92da69a..9959075 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c
@@ -424,6 +424,7 @@ static int hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
 	.ops = &hdmi_pll_ops,
 	.parent_names = hdmi_pll_parents,
 	.num_parents = ARRAY_SIZE(hdmi_pll_parents),
+	.flags = CLK_IGNORE_UNUSED,
 };
 
 int msm_hdmi_pll_8960_init(struct platform_device *pdev)
-- 
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Re: [PATCH v2 2/2] drm/msm: Set CLK_IGNORE_UNUSED flag for PLL clocks

[Stephen Boyd]

On 10/27, Archit Taneja wrote:
> The DSI/HDMI PLLs in MSM require resources like interface clocks, power
> domains to be enabled before we can access their registers.
> 
> The clock framework doesn't have a mechanism at the moment where we can
> tie such resources to a clock, so we make sure that the KMS driver enables
> these resources whenever a PLL is expected to be in use.
> 
> One place where we can't ensure the resource dependencies are met is when
> the clock framework tries to disable unused clocks. The KMS driver doesn't
> know when the clock framework calls the is_enabled clk_op, and hence can't
> enable interface clocks/power domains beforehand.
> 
> We set the CLK_IGNORE_UNUSED flag for PLL clocks for now. This needs to be
> revisited, since bootloaders can enable display, and we would want to
> disable the PLL clocks if there isn't a display driver using them.
> 
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---

Acked-by: Stephen Boyd <sboyd@codeaurora.org>

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