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From: David Lechner <david@lechnology.com>
To: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Sekhar Nori <nsekhar@ti.com>,
	Kevin Hilman <khilman@kernel.org>
Cc: David Lechner <david@lechnology.com>,
	Axel Haslam <ahaslam@baylibre.com>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v8 1/3] ARM: dts: da850: Add cfgchip syscon node
Date: Mon, 31 Oct 2016 15:47:19 -0500	[thread overview]
Message-ID: <1477946841-16126-2-git-send-email-david@lechnology.com> (raw)
In-Reply-To: <1477946841-16126-1-git-send-email-david@lechnology.com>

Add a syscon node for the SoC CFGCHIPn registers. It includes a child node
for the USB PHY that is part of this range of registers.

Also have to add OF_DEV_AUXDATA() entry so that clock lookup will work for
the the USB PHY driver.

Signed-off-by: David Lechner <david@lechnology.com>
---
 arch/arm/boot/dts/da850.dtsi     | 10 ++++++++++
 arch/arm/mach-davinci/da8xx-dt.c |  1 +
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 4c83613..2534aab 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -209,6 +209,16 @@
 			};
 
 		};
+		cfgchip: chip-controller@1417c {
+			compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
+			reg = <0x1417c 0x14>;
+
+			usb_phy: usb-phy {
+				compatible = "ti,da830-usb-phy";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+		};
 		edma0: edma@0 {
 			compatible = "ti,edma3-tpcc";
 			/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index aec569f9..20fa842 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -41,6 +41,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL),
 	OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci", NULL),
 	OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL),
+	OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL),
 	{}
 };
 
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>,
	Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>,
	Axel Haslam <ahaslam-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	Bartosz Golaszewski
	<bgolaszewski-rdvid1DuHRBpdZSXdFL2CA@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH v8 1/3] ARM: dts: da850: Add cfgchip syscon node
Date: Mon, 31 Oct 2016 15:47:19 -0500	[thread overview]
Message-ID: <1477946841-16126-2-git-send-email-david@lechnology.com> (raw)
In-Reply-To: <1477946841-16126-1-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>

Add a syscon node for the SoC CFGCHIPn registers. It includes a child node
for the USB PHY that is part of this range of registers.

Also have to add OF_DEV_AUXDATA() entry so that clock lookup will work for
the the USB PHY driver.

Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---
 arch/arm/boot/dts/da850.dtsi     | 10 ++++++++++
 arch/arm/mach-davinci/da8xx-dt.c |  1 +
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 4c83613..2534aab 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -209,6 +209,16 @@
 			};
 
 		};
+		cfgchip: chip-controller@1417c {
+			compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
+			reg = <0x1417c 0x14>;
+
+			usb_phy: usb-phy {
+				compatible = "ti,da830-usb-phy";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+		};
 		edma0: edma@0 {
 			compatible = "ti,edma3-tpcc";
 			/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index aec569f9..20fa842 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -41,6 +41,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL),
 	OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci", NULL),
 	OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL),
+	OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL),
 	{}
 };
 
-- 
2.7.4

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WARNING: multiple messages have this Message-ID (diff)
From: david@lechnology.com (David Lechner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 1/3] ARM: dts: da850: Add cfgchip syscon node
Date: Mon, 31 Oct 2016 15:47:19 -0500	[thread overview]
Message-ID: <1477946841-16126-2-git-send-email-david@lechnology.com> (raw)
In-Reply-To: <1477946841-16126-1-git-send-email-david@lechnology.com>

Add a syscon node for the SoC CFGCHIPn registers. It includes a child node
for the USB PHY that is part of this range of registers.

Also have to add OF_DEV_AUXDATA() entry so that clock lookup will work for
the the USB PHY driver.

Signed-off-by: David Lechner <david@lechnology.com>
---
 arch/arm/boot/dts/da850.dtsi     | 10 ++++++++++
 arch/arm/mach-davinci/da8xx-dt.c |  1 +
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 4c83613..2534aab 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -209,6 +209,16 @@
 			};
 
 		};
+		cfgchip: chip-controller at 1417c {
+			compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
+			reg = <0x1417c 0x14>;
+
+			usb_phy: usb-phy {
+				compatible = "ti,da830-usb-phy";
+				#phy-cells = <1>;
+				status = "disabled";
+			};
+		};
 		edma0: edma at 0 {
 			compatible = "ti,edma3-tpcc";
 			/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index aec569f9..20fa842 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -41,6 +41,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL),
 	OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci", NULL),
 	OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL),
+	OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL),
 	{}
 };
 
-- 
2.7.4

  reply	other threads:[~2016-10-31 20:47 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-31 20:47 [PATCH v8 0/3] da8xx USB PHY platform devices and clocks David Lechner
2016-10-31 20:47 ` David Lechner
2016-10-31 20:47 ` David Lechner [this message]
2016-10-31 20:47   ` [PATCH v8 1/3] ARM: dts: da850: Add cfgchip syscon node David Lechner
2016-10-31 20:47   ` David Lechner
2016-11-01  9:53   ` Sekhar Nori
2016-11-01  9:53     ` Sekhar Nori
2016-11-01  9:53     ` Sekhar Nori
2016-11-01 23:12     ` David Lechner
2016-11-01 23:12       ` David Lechner
2016-10-31 20:47 ` [PATCH v8 2/3] ARM: davinci: da8xx: add usb phy clocks David Lechner
2016-10-31 20:47   ` David Lechner
2016-11-01  9:57   ` Sekhar Nori
2016-11-01  9:57     ` Sekhar Nori
2016-11-01  9:57     ` Sekhar Nori
2016-10-31 20:47 ` [PATCH v8 3/3] ARM: davinci: da8xx: register USB PHY clocks in the DT file David Lechner
2016-10-31 20:47   ` David Lechner
2016-10-31 20:47   ` David Lechner
2016-11-01  9:58   ` Sekhar Nori
2016-11-01  9:58     ` Sekhar Nori
2016-11-01  9:58     ` Sekhar Nori

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