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* Patch "powerpc/64: Fix race condition in setting lock bit in idle/wakeup code" has been added to the 4.8-stable tree
@ 2016-11-07 16:24 gregkh
  0 siblings, 0 replies; only message in thread
From: gregkh @ 2016-11-07 16:24 UTC (permalink / raw)
  To: paulus, gregkh, mpe; +Cc: stable, stable-commits


This is a note to let you know that I've just added the patch titled

    powerpc/64: Fix race condition in setting lock bit in idle/wakeup code

to the 4.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     powerpc-64-fix-race-condition-in-setting-lock-bit-in-idle-wakeup-code.patch
and it can be found in the queue-4.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From 09b7e37b18eecc1e347f4b1a3bc863f32801f634 Mon Sep 17 00:00:00 2001
From: Paul Mackerras <paulus@ozlabs.org>
Date: Fri, 21 Oct 2016 20:04:17 +1100
Subject: powerpc/64: Fix race condition in setting lock bit in idle/wakeup code

From: Paul Mackerras <paulus@ozlabs.org>

commit 09b7e37b18eecc1e347f4b1a3bc863f32801f634 upstream.

This fixes a race condition where one thread that is entering or
leaving a power-saving state can inadvertently ignore the lock bit
that was set by another thread, and potentially also clear it.
The core_idle_lock_held function is called when the lock bit is
seen to be set.  It polls the lock bit until it is clear, then
does a lwarx to load the word containing the lock bit and thread
idle bits so it can be updated.  However, it is possible that the
value loaded with the lwarx has the lock bit set, even though an
immediately preceding lwz loaded a value with the lock bit clear.
If this happens then we go ahead and update the word despite the
lock bit being set, and when called from pnv_enter_arch207_idle_mode,
we will subsequently clear the lock bit.

No identifiable misbehaviour has been attributed to this race.

This fixes it by checking the lock bit in the value loaded by the
lwarx.  If it is set then we just go back and keep on polling.

Fixes: b32aadc1a8ed ("powerpc/powernv: Fix race in updating core_idle_state")
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/powerpc/kernel/idle_book3s.S |    3 +++
 1 file changed, 3 insertions(+)

--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -90,6 +90,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_3
  * Threads will spin in HMT_LOW until the lock bit is cleared.
  * r14 - pointer to core_idle_state
  * r15 - used to load contents of core_idle_state
+ * r9  - used as a temporary variable
  */
 
 core_idle_lock_held:
@@ -99,6 +100,8 @@ core_idle_lock_held:
 	bne	3b
 	HMT_MEDIUM
 	lwarx	r15,0,r14
+	andi.	r9,r15,PNV_CORE_IDLE_LOCK_BIT
+	bne	core_idle_lock_held
 	blr
 
 /*


Patches currently in stable-queue which might be from paulus@ozlabs.org are

queue-4.8/powerpc-64-fix-race-condition-in-setting-lock-bit-in-idle-wakeup-code.patch
queue-4.8/powerpc-64-re-fix-race-condition-between-going-idle-and-entering-guest.patch

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2016-11-07 16:24 Patch "powerpc/64: Fix race condition in setting lock bit in idle/wakeup code" has been added to the 4.8-stable tree gregkh

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