* [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5
Cc: robh+dt, mark.rutland, will.deacon, catalin.marinas,
linux-arm-kernel, devicetree, linux-kernel, linuxarm, John Garry
This patchset resolves some hip06 SAS device tree issues.
John Garry (3):
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 11 ++++++++++-
2 files changed, 10 insertions(+), 9 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5
Cc: robh+dt, mark.rutland, will.deacon, catalin.marinas,
linux-arm-kernel, devicetree, linux-kernel, linuxarm, John Garry
This patchset resolves some hip06 SAS device tree issues.
John Garry (3):
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 11 ++++++++++-
2 files changed, 10 insertions(+), 9 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: linux-arm-kernel
This patchset resolves some hip06 SAS device tree issues.
John Garry (3):
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 11 ++++++++++-
2 files changed, 10 insertions(+), 9 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/3] arm64: dts: hisi: fix hip06 sas am-max-trans quirk
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5
Cc: robh+dt, mark.rutland, will.deacon, catalin.marinas,
linux-arm-kernel, devicetree, linux-kernel, linuxarm, John Garry
The string for the am max transmissions quirk property
is not correct -> fix it.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index b548763..5330abb 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -590,7 +590,7 @@
reg = <0 0xa2000000 0 0x10000>;
sas-addr = [50 01 88 20 16 00 00 00];
hisilicon,sas-syscon = <&pcie_subctl>;
- am-max-trans;
+ hip06-sas-v2-quirk-amt;
ctrl-reset-reg = <0xa18>;
ctrl-reset-sts-reg = <0x5a0c>;
ctrl-clock-ena-reg = <0x318>;
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 1/3] arm64: dts: hisi: fix hip06 sas am-max-trans quirk
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5-C8/M+/jPZTeaMJb+Lgu22Q
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, catalin.marinas-5wv7dgnIgG8,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linuxarm-hv44wF8Li93QT0dZR+AlfA, John Garry
The string for the am max transmissions quirk property
is not correct -> fix it.
Signed-off-by: John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Reviewed-by: Xiang Chen <chenxiang66-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index b548763..5330abb 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -590,7 +590,7 @@
reg = <0 0xa2000000 0 0x10000>;
sas-addr = [50 01 88 20 16 00 00 00];
hisilicon,sas-syscon = <&pcie_subctl>;
- am-max-trans;
+ hip06-sas-v2-quirk-amt;
ctrl-reset-reg = <0xa18>;
ctrl-reset-sts-reg = <0x5a0c>;
ctrl-clock-ena-reg = <0x318>;
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 1/3] arm64: dts: hisi: fix hip06 sas am-max-trans quirk
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: linux-arm-kernel
The string for the am max transmissions quirk property
is not correct -> fix it.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index b548763..5330abb 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -590,7 +590,7 @@
reg = <0 0xa2000000 0 0x10000>;
sas-addr = [50 01 88 20 16 00 00 00];
hisilicon,sas-syscon = <&pcie_subctl>;
- am-max-trans;
+ hip06-sas-v2-quirk-amt;
ctrl-reset-reg = <0xa18>;
ctrl-reset-sts-reg = <0x5a0c>;
ctrl-clock-ena-reg = <0x318>;
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/3] arm64: dts: hisi: disable sas0 and sas2 for d03
2016-11-07 16:44 ` John Garry
(?)
@ 2016-11-07 16:44 ` John Garry
-1 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5
Cc: robh+dt, mark.rutland, will.deacon, catalin.marinas,
linux-arm-kernel, devicetree, linux-kernel, linuxarm, John Garry
The SAS nodes sas0 and sas2 are not available on d03, so
disable them.
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Xu Wei <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
1 file changed, 8 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
index f54b283..7c4114a 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
@@ -41,18 +41,10 @@
status = "ok";
};
-&sas0 {
- status = "ok";
-};
-
&sas1 {
status = "ok";
};
-&sas2 {
- status = "ok";
-};
-
&usb_ohci {
status = "ok";
};
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/3] arm64: dts: hisi: disable sas0 and sas2 for d03
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5
Cc: robh+dt, mark.rutland, will.deacon, catalin.marinas,
linux-arm-kernel, devicetree, linux-kernel, linuxarm, John Garry
The SAS nodes sas0 and sas2 are not available on d03, so
disable them.
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Xu Wei <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
1 file changed, 8 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
index f54b283..7c4114a 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
@@ -41,18 +41,10 @@
status = "ok";
};
-&sas0 {
- status = "ok";
-};
-
&sas1 {
status = "ok";
};
-&sas2 {
- status = "ok";
-};
-
&usb_ohci {
status = "ok";
};
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/3] arm64: dts: hisi: disable sas0 and sas2 for d03
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: linux-arm-kernel
The SAS nodes sas0 and sas2 are not available on d03, so
disable them.
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Xu Wei <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
1 file changed, 8 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
index f54b283..7c4114a 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
@@ -41,18 +41,10 @@
status = "ok";
};
-&sas0 {
- status = "ok";
-};
-
&sas1 {
status = "ok";
};
-&sas2 {
- status = "ok";
-};
-
&usb_ohci {
status = "ok";
};
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/3] arm64: dts: hisi: add refclk node to hip06 dts files for SAS
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5
Cc: robh+dt, mark.rutland, will.deacon, catalin.marinas,
linux-arm-kernel, devicetree, linux-kernel, linuxarm, John Garry
We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 5330abb..7b40dce 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -318,6 +318,12 @@
#size-cells = <2>;
ranges;
+ refclk: refclk {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
usb_ohci: ohci@a7030000 {
compatible = "generic-ohci";
reg = <0x0 0xa7030000 0x0 0x10000>;
@@ -552,6 +558,7 @@
ctrl-reset-reg = <0xa60>;
ctrl-reset-sts-reg = <0x5a30>;
ctrl-clock-ena-reg = <0x338>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@@ -594,6 +601,7 @@
ctrl-reset-reg = <0xa18>;
ctrl-reset-sts-reg = <0x5a0c>;
ctrl-clock-ena-reg = <0x318>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@@ -635,6 +643,7 @@
ctrl-reset-reg = <0xae0>;
ctrl-reset-sts-reg = <0x5a70>;
ctrl-clock-ena-reg = <0x3a8>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <9>;
dma-coherent;
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/3] arm64: dts: hisi: add refclk node to hip06 dts files for SAS
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: xuwei5-C8/M+/jPZTeaMJb+Lgu22Q
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, catalin.marinas-5wv7dgnIgG8,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linuxarm-hv44wF8Li93QT0dZR+AlfA, John Garry
We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.
Signed-off-by: John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Reviewed-by: Xiang Chen <chenxiang66-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 5330abb..7b40dce 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -318,6 +318,12 @@
#size-cells = <2>;
ranges;
+ refclk: refclk {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
usb_ohci: ohci@a7030000 {
compatible = "generic-ohci";
reg = <0x0 0xa7030000 0x0 0x10000>;
@@ -552,6 +558,7 @@
ctrl-reset-reg = <0xa60>;
ctrl-reset-sts-reg = <0x5a30>;
ctrl-clock-ena-reg = <0x338>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@@ -594,6 +601,7 @@
ctrl-reset-reg = <0xa18>;
ctrl-reset-sts-reg = <0x5a0c>;
ctrl-clock-ena-reg = <0x318>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@@ -635,6 +643,7 @@
ctrl-reset-reg = <0xae0>;
ctrl-reset-sts-reg = <0x5a70>;
ctrl-clock-ena-reg = <0x3a8>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <9>;
dma-coherent;
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/3] arm64: dts: hisi: add refclk node to hip06 dts files for SAS
@ 2016-11-07 16:44 ` John Garry
0 siblings, 0 replies; 15+ messages in thread
From: John Garry @ 2016-11-07 16:44 UTC (permalink / raw)
To: linux-arm-kernel
We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 5330abb..7b40dce 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -318,6 +318,12 @@
#size-cells = <2>;
ranges;
+ refclk: refclk {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
usb_ohci: ohci at a7030000 {
compatible = "generic-ohci";
reg = <0x0 0xa7030000 0x0 0x10000>;
@@ -552,6 +558,7 @@
ctrl-reset-reg = <0xa60>;
ctrl-reset-sts-reg = <0x5a30>;
ctrl-clock-ena-reg = <0x338>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@@ -594,6 +601,7 @@
ctrl-reset-reg = <0xa18>;
ctrl-reset-sts-reg = <0x5a0c>;
ctrl-clock-ena-reg = <0x318>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@@ -635,6 +643,7 @@
ctrl-reset-reg = <0xae0>;
ctrl-reset-sts-reg = <0x5a70>;
ctrl-clock-ena-reg = <0x3a8>;
+ clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <9>;
dma-coherent;
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes
@ 2016-11-15 16:12 ` Wei Xu
0 siblings, 0 replies; 15+ messages in thread
From: Wei Xu @ 2016-11-15 16:12 UTC (permalink / raw)
To: John Garry
Cc: robh+dt, mark.rutland, will.deacon, catalin.marinas,
linux-arm-kernel, devicetree, linux-kernel, linuxarm
Hi John,
On 2016/11/7 16:44, John Garry wrote:
> This patchset resolves some hip06 SAS device tree issues.
>
Series applied to the hisilicon soc tree.
Thanks!
Best Regards,
Wei
> John Garry (3):
> arm64: dts: hisi: fix hip06 sas am-max-trans quirk
> arm64: dts: hisi: disable sas0 and sas2 for d03
> arm64: dts: hisi: add refclk node to hip06 dts files for SAS
>
> arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
> arch/arm64/boot/dts/hisilicon/hip06.dtsi | 11 ++++++++++-
> 2 files changed, 10 insertions(+), 9 deletions(-)
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes
@ 2016-11-15 16:12 ` Wei Xu
0 siblings, 0 replies; 15+ messages in thread
From: Wei Xu @ 2016-11-15 16:12 UTC (permalink / raw)
To: John Garry
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, catalin.marinas-5wv7dgnIgG8,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linuxarm-hv44wF8Li93QT0dZR+AlfA
Hi John,
On 2016/11/7 16:44, John Garry wrote:
> This patchset resolves some hip06 SAS device tree issues.
>
Series applied to the hisilicon soc tree.
Thanks!
Best Regards,
Wei
> John Garry (3):
> arm64: dts: hisi: fix hip06 sas am-max-trans quirk
> arm64: dts: hisi: disable sas0 and sas2 for d03
> arm64: dts: hisi: add refclk node to hip06 dts files for SAS
>
> arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
> arch/arm64/boot/dts/hisilicon/hip06.dtsi | 11 ++++++++++-
> 2 files changed, 10 insertions(+), 9 deletions(-)
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes
@ 2016-11-15 16:12 ` Wei Xu
0 siblings, 0 replies; 15+ messages in thread
From: Wei Xu @ 2016-11-15 16:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi John,
On 2016/11/7 16:44, John Garry wrote:
> This patchset resolves some hip06 SAS device tree issues.
>
Series applied to the hisilicon soc tree.
Thanks!
Best Regards,
Wei
> John Garry (3):
> arm64: dts: hisi: fix hip06 sas am-max-trans quirk
> arm64: dts: hisi: disable sas0 and sas2 for d03
> arm64: dts: hisi: add refclk node to hip06 dts files for SAS
>
> arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
> arch/arm64/boot/dts/hisilicon/hip06.dtsi | 11 ++++++++++-
> 2 files changed, 10 insertions(+), 9 deletions(-)
>
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2016-11-15 16:13 UTC | newest]
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2016-11-07 16:44 [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes John Garry
2016-11-07 16:44 ` John Garry
2016-11-07 16:44 ` John Garry
2016-11-07 16:44 ` [PATCH 1/3] arm64: dts: hisi: fix hip06 sas am-max-trans quirk John Garry
2016-11-07 16:44 ` John Garry
2016-11-07 16:44 ` John Garry
2016-11-07 16:44 ` [PATCH 2/3] arm64: dts: hisi: disable sas0 and sas2 for d03 John Garry
2016-11-07 16:44 ` John Garry
2016-11-07 16:44 ` John Garry
2016-11-07 16:44 ` [PATCH 3/3] arm64: dts: hisi: add refclk node to hip06 dts files for SAS John Garry
2016-11-07 16:44 ` John Garry
2016-11-07 16:44 ` John Garry
2016-11-15 16:12 ` [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes Wei Xu
2016-11-15 16:12 ` Wei Xu
2016-11-15 16:12 ` Wei Xu
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