From: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>, Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>, Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Subject: [PATCH 0/2] Add rockchip serial flash controller support Date: Fri, 11 Nov 2016 17:16:04 +0800 [thread overview] Message-ID: <1478855766-151673-1-git-send-email-shawn.lin@rock-chips.com> (raw) This pathset is gonna support serial flash controller , namely SFC, found on Rockchip RK1108 platform. Feature: (1) Support x1, x2, x4 data bits mode (2) Support up to 4 chip select (3) Support two independent clock domain: AHB clock and SPI clock (4) Support DMA master up to 16KB/transfer Test environment: This patchset is testing on RK1108 evb boards with Winboud flash (w25q256) and working find with PIO or DMA mode. How-to: Any rockchip guys who are interested in testing it could refer to the following steps: (1) enable CONFIG_MTD_M25P80 (2) enable CONFIG_SPI_ROCKCHIP_SFC (3) enable CONFIG_MTD_CMDLINE_PARTS (4) enable CONFIG_SQUASHFS (4) CONFIG_CMDLINE="root=/dev/mtdblock2 mtdparts=spi-nor:256k@0(loader)ro,8m(kernel)ro,7m(rootfs),-(freedisk)" Of course, you should check the partition layout if you modify it. Also you could pass it from your loader to the kernel's cmdline. (5) Add dts support: nor_flash: sfc@301c0000 { compatible = "rockchip,rk1108-sfc", "rockchip,sfc"; #address-cells = <1>; #size-cells = <0>; clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; clock-names = "sfc", "hsfc"; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; reg = <0x301c0000 0x1000>; /* If you want to use PIO mode, activate this */ #rockchip,sfc-no-dma; spi-nor@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <12000000>; reg = <0>; } }; please make sure your DT's mdtid matchs what you assgin to the mdtparts(cmdline), namely they are both *spi-nor* here. With enabling DBG for cmdlinepart.c, you could get following log and boot kernel and rootfs successfully. [ 0.481420] rockchip-sfc 301c0000.sfc: w25q256 (32768 Kbytes) [ 0.481962] DEBUG-CMDLINE-PART: parsing <256k@0(loader)ro,8m(kernel)ro,7m(rootfs)ro,-(freedisk)> [ 0.482897] DEBUG-CMDLINE-PART: partition 3: name <freedisk>, offset ffffffffffffffff, size ffffffffffffffff, mask flags 0 [ 0.484021] DEBUG-CMDLINE-PART: partition 2: name <rootfs>, offset ffffffffffffffff, size 700000, mask flags 400 [ 0.485066] DEBUG-CMDLINE-PART: partition 1: name <kernel>, offset ffffffffffffffff, size 800000, mask flags 400 [ 0.486108] DEBUG-CMDLINE-PART: partition 0: name <loader>, offset 0, size 40000, mask flags 400 [ 0.487152] DEBUG-CMDLINE-PART: mtdid=<spi-nor> num_parts=<4> [ 0.487827] 4 cmdlinepart partitions found on MTD device spi-nor [ 0.488370] Creating 4 MTD partitions on "spi-nor": [ 0.488826] 0x000000000000-0x000000040000 : "loader" [ 0.492340] 0x000000040000-0x000000840000 : "kernel" [ 0.495679] 0x000000840000-0x000000f40000 : "rootfs" [ 0.499241] 0x000000f40000-0x000002000000 : "freedisk" [root@arm-linux]# [root@arm-linux]#mount /dev/root on / type squashfs (ro,relatime) devtmpfs on /dev type devtmpfs (rw,relatime,size=26124k,nr_inodes=6531,mode=755) proc on /proc type proc (rw,relatime) none on /tmp type ramfs (rw,relatime) none on /var type ramfs (rw,relatime) sysfs on /sys type sysfs (rw,relatime) debug on /sys/kernel/debug type debugfs (rw,relatime) none on /dev/pts type devpts (rw,relatime,mode=600,ptmxmode=000) Shawn Lin (2): mtd: spi-nor: Bindings for Rockchip serial flash controller mtd: spi-nor: add rockchip serial flash controller driver .../devicetree/bindings/mtd/rockchip-sfc.txt | 31 + MAINTAINERS | 8 + drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/rockchip-sfc.c | 953 +++++++++++++++++++++ 5 files changed, 1000 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/rockchip-sfc.txt create mode 100644 drivers/mtd/spi-nor/rockchip-sfc.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Shawn Lin <shawn.lin@rock-chips.com> To: Rob Herring <robh+dt@kernel.org>, David Woodhouse <dwmw2@infradead.org>, Brian Norris <computersforpeace@gmail.com> Cc: devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, Heiko Stuebner <heiko@sntech.de>, Shawn Lin <shawn.lin@rock-chips.com> Subject: [PATCH 0/2] Add rockchip serial flash controller support Date: Fri, 11 Nov 2016 17:16:04 +0800 [thread overview] Message-ID: <1478855766-151673-1-git-send-email-shawn.lin@rock-chips.com> (raw) This pathset is gonna support serial flash controller , namely SFC, found on Rockchip RK1108 platform. Feature: (1) Support x1, x2, x4 data bits mode (2) Support up to 4 chip select (3) Support two independent clock domain: AHB clock and SPI clock (4) Support DMA master up to 16KB/transfer Test environment: This patchset is testing on RK1108 evb boards with Winboud flash (w25q256) and working find with PIO or DMA mode. How-to: Any rockchip guys who are interested in testing it could refer to the following steps: (1) enable CONFIG_MTD_M25P80 (2) enable CONFIG_SPI_ROCKCHIP_SFC (3) enable CONFIG_MTD_CMDLINE_PARTS (4) enable CONFIG_SQUASHFS (4) CONFIG_CMDLINE="root=/dev/mtdblock2 mtdparts=spi-nor:256k@0(loader)ro,8m(kernel)ro,7m(rootfs),-(freedisk)" Of course, you should check the partition layout if you modify it. Also you could pass it from your loader to the kernel's cmdline. (5) Add dts support: nor_flash: sfc@301c0000 { compatible = "rockchip,rk1108-sfc", "rockchip,sfc"; #address-cells = <1>; #size-cells = <0>; clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; clock-names = "sfc", "hsfc"; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; reg = <0x301c0000 0x1000>; /* If you want to use PIO mode, activate this */ #rockchip,sfc-no-dma; spi-nor@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <12000000>; reg = <0>; } }; please make sure your DT's mdtid matchs what you assgin to the mdtparts(cmdline), namely they are both *spi-nor* here. With enabling DBG for cmdlinepart.c, you could get following log and boot kernel and rootfs successfully. [ 0.481420] rockchip-sfc 301c0000.sfc: w25q256 (32768 Kbytes) [ 0.481962] DEBUG-CMDLINE-PART: parsing <256k@0(loader)ro,8m(kernel)ro,7m(rootfs)ro,-(freedisk)> [ 0.482897] DEBUG-CMDLINE-PART: partition 3: name <freedisk>, offset ffffffffffffffff, size ffffffffffffffff, mask flags 0 [ 0.484021] DEBUG-CMDLINE-PART: partition 2: name <rootfs>, offset ffffffffffffffff, size 700000, mask flags 400 [ 0.485066] DEBUG-CMDLINE-PART: partition 1: name <kernel>, offset ffffffffffffffff, size 800000, mask flags 400 [ 0.486108] DEBUG-CMDLINE-PART: partition 0: name <loader>, offset 0, size 40000, mask flags 400 [ 0.487152] DEBUG-CMDLINE-PART: mtdid=<spi-nor> num_parts=<4> [ 0.487827] 4 cmdlinepart partitions found on MTD device spi-nor [ 0.488370] Creating 4 MTD partitions on "spi-nor": [ 0.488826] 0x000000000000-0x000000040000 : "loader" [ 0.492340] 0x000000040000-0x000000840000 : "kernel" [ 0.495679] 0x000000840000-0x000000f40000 : "rootfs" [ 0.499241] 0x000000f40000-0x000002000000 : "freedisk" [root@arm-linux]# [root@arm-linux]#mount /dev/root on / type squashfs (ro,relatime) devtmpfs on /dev type devtmpfs (rw,relatime,size=26124k,nr_inodes=6531,mode=755) proc on /proc type proc (rw,relatime) none on /tmp type ramfs (rw,relatime) none on /var type ramfs (rw,relatime) sysfs on /sys type sysfs (rw,relatime) debug on /sys/kernel/debug type debugfs (rw,relatime) none on /dev/pts type devpts (rw,relatime,mode=600,ptmxmode=000) Shawn Lin (2): mtd: spi-nor: Bindings for Rockchip serial flash controller mtd: spi-nor: add rockchip serial flash controller driver .../devicetree/bindings/mtd/rockchip-sfc.txt | 31 + MAINTAINERS | 8 + drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/rockchip-sfc.c | 953 +++++++++++++++++++++ 5 files changed, 1000 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/rockchip-sfc.txt create mode 100644 drivers/mtd/spi-nor/rockchip-sfc.c -- 1.9.1
next reply other threads:[~2016-11-11 9:16 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-11-11 9:16 Shawn Lin [this message] 2016-11-11 9:16 ` [PATCH 0/2] Add rockchip serial flash controller support Shawn Lin [not found] ` <1478855766-151673-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2016-11-11 9:16 ` [PATCH 1/2] mtd: spi-nor: Bindings for Rockchip serial flash controller Shawn Lin 2016-11-11 9:16 ` Shawn Lin [not found] ` <1478855766-151673-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2016-11-15 15:05 ` Rob Herring 2016-11-15 15:05 ` Rob Herring 2016-11-11 9:16 ` [PATCH 2/2] mtd: spi-nor: add rockchip serial flash controller driver Shawn Lin 2016-11-11 9:16 ` Shawn Lin [not found] ` <1478855766-151673-3-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2016-11-15 20:52 ` Marek Vasut 2016-11-15 20:52 ` Marek Vasut [not found] ` <b1420e9d-b6a1-7fe8-4381-e32e0bc7dd53-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-11-16 1:59 ` Shawn Lin 2016-11-16 1:59 ` Shawn Lin [not found] ` <775a8918-bc93-218a-808d-2a160137ad56-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2016-11-20 21:11 ` Marek Vasut 2016-11-20 21:11 ` Marek Vasut [not found] ` <8f8213a1-f694-8159-fdbd-5e607c8aaaa2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-11-21 2:51 ` Shawn Lin 2016-11-21 2:51 ` Shawn Lin [not found] ` <76670120-dacd-ef0e-cf36-cbf549b19853-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2016-11-25 13:54 ` Marek Vasut 2016-11-25 13:54 ` Marek Vasut [not found] ` <b513a489-5913-ffe8-69f1-7201943a05a3-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-11-30 0:57 ` Shawn Lin 2016-11-30 0:57 ` Shawn Lin
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1478855766-151673-1-git-send-email-shawn.lin@rock-chips.com \ --to=shawn.lin-tnx95d0mmh7dzftrwevzcw@public.gmane.org \ --cc=computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \ --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org \ --cc=heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org \ --cc=linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.