* [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block
[not found] <CGME20161117085106eucas1p1db7f6fb1e955257c607785ee76536b18@eucas1p1.samsung.com>
@ 2016-11-17 8:50 ` Marek Szyprowski
[not found] ` <CGME20161117085106eucas1p13370631ebbc7ec93effef606d80ac310@eucas1p1.samsung.com>
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Marek Szyprowski @ 2016-11-17 8:50 UTC (permalink / raw)
To: linux-samsung-soc
Cc: Marek Szyprowski, Sylwester Nawrocki, Krzysztof Kozlowski,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Chanwoo Choi
The proper parent clock for FSYS block is "aclk_fsys_200" according to
the Exynos5433 reference manual.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 6 +++---
drivers/clk/samsung/clk-exynos5433.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
index 63379b04e052..ffff67a0e9cd 100644
--- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
@@ -79,7 +79,7 @@ Required Properties:
Input clocks for fsys clock controller:
- oscclk
- sclk_ufs_mphy
- - div_aclk_fsys_200
+ - aclk_fsys_200
- sclk_pcie_100_fsys
- sclk_ufsunipro_fsys
- sclk_mmc2_fsys
@@ -235,7 +235,7 @@ Example 2: Examples of clock controller nodes are listed below.
clock-names = "oscclk",
"sclk_ufs_mphy",
- "div_aclk_fsys_200",
+ "aclk_fsys_200",
"sclk_pcie_100_fsys",
"sclk_ufsunipro_fsys",
"sclk_mmc2_fsys",
@@ -245,7 +245,7 @@ Example 2: Examples of clock controller nodes are listed below.
"sclk_usbdrd30_fsys";
clocks = <&xxti>,
<&cmu_cpif CLK_SCLK_UFS_MPHY>,
- <&cmu_top CLK_DIV_ACLK_FSYS_200>,
+ <&cmu_top CLK_ACLK_FSYS_200>,
<&cmu_top CLK_SCLK_PCIE_100_FSYS>,
<&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>,
<&cmu_top CLK_SCLK_MMC2_FSYS>,
diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index cdf6ba3e5577..218a94f90e37 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -1934,7 +1934,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np)
/* list of all parent clock list */
PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", };
-PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "div_aclk_fsys_200", };
+PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "aclk_fsys_200", };
PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",};
PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",};
PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", };
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread[parent not found: <CGME20161117085106eucas1p13370631ebbc7ec93effef606d80ac310@eucas1p1.samsung.com>]
* [PATCH 2/2] clk/samsung: exynos5433: Add documentation for audio block parent clocks
[not found] ` <CGME20161117085106eucas1p13370631ebbc7ec93effef606d80ac310@eucas1p1.samsung.com>
@ 2016-11-17 8:50 ` Marek Szyprowski
2016-11-17 12:53 ` Chanwoo Choi
0 siblings, 1 reply; 6+ messages in thread
From: Marek Szyprowski @ 2016-11-17 8:50 UTC (permalink / raw)
To: linux-samsung-soc
Cc: Marek Szyprowski, Sylwester Nawrocki, Krzysztof Kozlowski,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Chanwoo Choi
Audio block requires access to two parent clocks: audio PLL and oscillator,
so add this information to device tree bindings documentation.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
index ffff67a0e9cd..1dc80f8811fe 100644
--- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
@@ -104,6 +104,10 @@ Required Properties:
- sclk_decon_tv_vclk_disp
- aclk_disp_333
+ Input clocks for audio clock controller:
+ - oscclk
+ - fout_aud_pll
+
Input clocks for bus0 clock controller:
- aclk_bus0_400
@@ -297,6 +301,9 @@ Example 2: Examples of clock controller nodes are listed below.
compatible = "samsung,exynos5433-cmu-aud";
reg = <0x114c0000 0x0b04>;
#clock-cells = <1>;
+
+ clock-names = "oscclk", "fout_aud_pll";
+ clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;
};
cmu_bus0: clock-controller@13600000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 2/2] clk/samsung: exynos5433: Add documentation for audio block parent clocks
2016-11-17 8:50 ` [PATCH 2/2] clk/samsung: exynos5433: Add documentation for audio block parent clocks Marek Szyprowski
@ 2016-11-17 12:53 ` Chanwoo Choi
0 siblings, 0 replies; 6+ messages in thread
From: Chanwoo Choi @ 2016-11-17 12:53 UTC (permalink / raw)
To: Marek Szyprowski
Cc: linux-samsung-soc, Sylwester Nawrocki, Krzysztof Kozlowski,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Chanwoo Choi
Hi Marek,
2016-11-17 17:50 GMT+09:00 Marek Szyprowski <m.szyprowski@samsung.com>:
> Audio block requires access to two parent clocks: audio PLL and oscillator,
> so add this information to device tree bindings documentation.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
> Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
> index ffff67a0e9cd..1dc80f8811fe 100644
> --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
> @@ -104,6 +104,10 @@ Required Properties:
> - sclk_decon_tv_vclk_disp
> - aclk_disp_333
>
> + Input clocks for audio clock controller:
> + - oscclk
> + - fout_aud_pll
> +
> Input clocks for bus0 clock controller:
> - aclk_bus0_400
>
> @@ -297,6 +301,9 @@ Example 2: Examples of clock controller nodes are listed below.
> compatible = "samsung,exynos5433-cmu-aud";
> reg = <0x114c0000 0x0b04>;
> #clock-cells = <1>;
> +
> + clock-names = "oscclk", "fout_aud_pll";
> + clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;
> };
>
> cmu_bus0: clock-controller@13600000 {
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
--
Best Regards,
Chanwoo Choi
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block
2016-11-17 8:50 ` [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block Marek Szyprowski
[not found] ` <CGME20161117085106eucas1p13370631ebbc7ec93effef606d80ac310@eucas1p1.samsung.com>
@ 2016-11-17 12:05 ` Sylwester Nawrocki
2016-11-17 12:54 ` Chanwoo Choi
2 siblings, 0 replies; 6+ messages in thread
From: Sylwester Nawrocki @ 2016-11-17 12:05 UTC (permalink / raw)
To: Marek Szyprowski
Cc: linux-samsung-soc, Krzysztof Kozlowski,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Chanwoo Choi,
linux-clk
(Adding linux-clk@vger.kernel.org at Cc)
On 11/17/2016 09:50 AM, Marek Szyprowski wrote:
> The proper parent clock for FSYS block is "aclk_fsys_200" according to
> the Exynos5433 reference manual.
Applied both patches to my tree, thanks.
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block
2016-11-17 8:50 ` [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block Marek Szyprowski
[not found] ` <CGME20161117085106eucas1p13370631ebbc7ec93effef606d80ac310@eucas1p1.samsung.com>
2016-11-17 12:05 ` [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block Sylwester Nawrocki
@ 2016-11-17 12:54 ` Chanwoo Choi
2 siblings, 0 replies; 6+ messages in thread
From: Chanwoo Choi @ 2016-11-17 12:54 UTC (permalink / raw)
To: Marek Szyprowski
Cc: linux-samsung-soc, Sylwester Nawrocki, Krzysztof Kozlowski,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Chanwoo Choi
Hi Marek,
2016-11-17 17:50 GMT+09:00 Marek Szyprowski <m.szyprowski@samsung.com>:
> The proper parent clock for FSYS block is "aclk_fsys_200" according to
> the Exynos5433 reference manual.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
> Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 6 +++---
> drivers/clk/samsung/clk-exynos5433.c | 2 +-
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
> index 63379b04e052..ffff67a0e9cd 100644
> --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
> @@ -79,7 +79,7 @@ Required Properties:
> Input clocks for fsys clock controller:
> - oscclk
> - sclk_ufs_mphy
> - - div_aclk_fsys_200
> + - aclk_fsys_200
> - sclk_pcie_100_fsys
> - sclk_ufsunipro_fsys
> - sclk_mmc2_fsys
> @@ -235,7 +235,7 @@ Example 2: Examples of clock controller nodes are listed below.
>
> clock-names = "oscclk",
> "sclk_ufs_mphy",
> - "div_aclk_fsys_200",
> + "aclk_fsys_200",
> "sclk_pcie_100_fsys",
> "sclk_ufsunipro_fsys",
> "sclk_mmc2_fsys",
> @@ -245,7 +245,7 @@ Example 2: Examples of clock controller nodes are listed below.
> "sclk_usbdrd30_fsys";
> clocks = <&xxti>,
> <&cmu_cpif CLK_SCLK_UFS_MPHY>,
> - <&cmu_top CLK_DIV_ACLK_FSYS_200>,
> + <&cmu_top CLK_ACLK_FSYS_200>,
> <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
> <&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>,
> <&cmu_top CLK_SCLK_MMC2_FSYS>,
> diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
> index cdf6ba3e5577..218a94f90e37 100644
> --- a/drivers/clk/samsung/clk-exynos5433.c
> +++ b/drivers/clk/samsung/clk-exynos5433.c
> @@ -1934,7 +1934,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np)
>
> /* list of all parent clock list */
> PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", };
> -PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "div_aclk_fsys_200", };
> +PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "aclk_fsys_200", };
> PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",};
> PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",};
> PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", };
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
--
Best Regards,
Chanwoo Choi
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block
@ 2016-11-17 11:42 Marek Szyprowski
[not found] ` <CGME20161117114306eucas1p207335e71f434842d986728e0d8770abe@eucas1p2.samsung.com>
0 siblings, 1 reply; 6+ messages in thread
From: Marek Szyprowski @ 2016-11-17 11:42 UTC (permalink / raw)
To: linux-clk; +Cc: Marek Szyprowski
The proper parent clock for FSYS block is "aclk_fsys_200" according to
the Exynos5433 reference manual.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 6 +++---
drivers/clk/samsung/clk-exynos5433.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
index 63379b04e052..ffff67a0e9cd 100644
--- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
@@ -79,7 +79,7 @@ Required Properties:
Input clocks for fsys clock controller:
- oscclk
- sclk_ufs_mphy
- - div_aclk_fsys_200
+ - aclk_fsys_200
- sclk_pcie_100_fsys
- sclk_ufsunipro_fsys
- sclk_mmc2_fsys
@@ -235,7 +235,7 @@ Example 2: Examples of clock controller nodes are listed below.
clock-names = "oscclk",
"sclk_ufs_mphy",
- "div_aclk_fsys_200",
+ "aclk_fsys_200",
"sclk_pcie_100_fsys",
"sclk_ufsunipro_fsys",
"sclk_mmc2_fsys",
@@ -245,7 +245,7 @@ Example 2: Examples of clock controller nodes are listed below.
"sclk_usbdrd30_fsys";
clocks = <&xxti>,
<&cmu_cpif CLK_SCLK_UFS_MPHY>,
- <&cmu_top CLK_DIV_ACLK_FSYS_200>,
+ <&cmu_top CLK_ACLK_FSYS_200>,
<&cmu_top CLK_SCLK_PCIE_100_FSYS>,
<&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>,
<&cmu_top CLK_SCLK_MMC2_FSYS>,
diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index cdf6ba3e5577..218a94f90e37 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -1934,7 +1934,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np)
/* list of all parent clock list */
PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", };
-PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "div_aclk_fsys_200", };
+PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "aclk_fsys_200", };
PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",};
PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",};
PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", };
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
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2016-11-17 8:50 ` [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block Marek Szyprowski
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2016-11-17 8:50 ` [PATCH 2/2] clk/samsung: exynos5433: Add documentation for audio block parent clocks Marek Szyprowski
2016-11-17 12:53 ` Chanwoo Choi
2016-11-17 12:05 ` [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block Sylwester Nawrocki
2016-11-17 12:54 ` Chanwoo Choi
2016-11-17 11:42 Marek Szyprowski
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2016-11-17 11:42 ` [PATCH 2/2] clk/samsung: exynos5433: Add documentation for audio block parent clocks Marek Szyprowski
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