* [PATCH 1/2] ARM: dts: imx: Add 696MHz setpoint for imx6ul
@ 2016-11-30 3:04 ` Bai Ping
0 siblings, 0 replies; 8+ messages in thread
From: Bai Ping @ 2016-11-30 3:04 UTC (permalink / raw)
To: shawnguo, kernel, robh+dt, mark.rutland
Cc: fabio.estevam, devicetree, linux-arm-kernel
Add 696MHz setpoint support for i.MX6UL.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
---
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 612827d..3ade04e 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -60,12 +60,14 @@
clock-latency = <61036>; /* two CLK32 periods */
operating-points = <
/* kHz uV */
+ 696000 1275000
528000 1175000
396000 1025000
198000 950000
>;
fsl,soc-operating-points = <
/* KHz uV */
+ 696000 1275000
528000 1175000
396000 1175000
198000 1175000
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] ARM: dts: imx: Add 696MHz setpoint for imx6ul
@ 2016-11-30 3:04 ` Bai Ping
0 siblings, 0 replies; 8+ messages in thread
From: Bai Ping @ 2016-11-30 3:04 UTC (permalink / raw)
To: linux-arm-kernel
Add 696MHz setpoint support for i.MX6UL.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
---
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 612827d..3ade04e 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -60,12 +60,14 @@
clock-latency = <61036>; /* two CLK32 periods */
operating-points = <
/* kHz uV */
+ 696000 1275000
528000 1175000
396000 1025000
198000 950000
>;
fsl,soc-operating-points = <
/* KHz uV */
+ 696000 1275000
528000 1175000
396000 1175000
198000 1175000
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] ARM: imx: Add speed grading check for imx6ul
2016-11-30 3:04 ` Bai Ping
@ 2016-11-30 3:04 ` Bai Ping
-1 siblings, 0 replies; 8+ messages in thread
From: Bai Ping @ 2016-11-30 3:04 UTC (permalink / raw)
To: shawnguo, kernel, robh+dt, mark.rutland
Cc: fabio.estevam, devicetree, linux-arm-kernel
On i.MX6UL, it has two type of part, the difference
is the max ARM frequency that can run at(528MHz/700MHz).
The part can be identified by part marking for speed grading
fuse. This patch add speed grading check to disable the unsupported
OPP dynamically.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
---
arch/arm/mach-imx/mach-imx6ul.c | 78 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index 6cb8a22..bf86530 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -9,14 +9,17 @@
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/micrel_phy.h>
+#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
+#include <linux/pm_opp.h>
#include <linux/regmap.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "common.h"
#include "cpuidle.h"
+#include "hardware.h"
static void __init imx6ul_enet_clk_init(void)
{
@@ -57,6 +60,76 @@ static inline void imx6ul_enet_init(void)
imx6ul_enet_phy_init();
}
+#define OCOTP_CFG3 0x440
+#define OCOTP_CFG3_SPEED_SHIFT 16
+#define OCOTP_CFG3_SPEED_696MHZ 0x2
+
+static void __init imx6ul_opp_check_speed_grading(struct device *cpu_dev)
+{
+ struct device_node *np;
+ void __iomem *base;
+ u32 val;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp");
+ if (!np) {
+ pr_warn("failed to find ocotp node\n");
+ return;
+ }
+
+ base = of_iomap(np, 0);
+ if (!base) {
+ pr_warn("failed to map ocotp\n");
+ goto put_node;
+ }
+
+ /*
+ * Speed GRADING[1:0] defines the max speed of ARM:
+ * 2b'00: Reserved;
+ * 2b'01: 528000000Hz;
+ * 2b'10: 700000000Hz;
+ * 2b'11: Reserved;
+ * We need to set the max speed of ARM according to fuse map.
+ */
+ val = readl_relaxed(base + OCOTP_CFG3);
+ val >>= OCOTP_CFG3_SPEED_SHIFT;
+ val &= 0x3;
+
+ if (val != OCOTP_CFG3_SPEED_696MHZ) {
+ if (dev_pm_opp_disable(cpu_dev, 696000000))
+ pr_warn("Failed to disable 696MHz OPP\n");
+ }
+ iounmap(base);
+
+put_node:
+ of_node_put(np);
+}
+
+static void __init imx6ul_opp_init(void)
+{
+ struct device_node *np;
+ struct device *cpu_dev = get_cpu_device(0);
+
+ if (!cpu_dev) {
+ pr_warn("failed to get cpu0 device\n");
+ return;
+ }
+ np = of_node_get(cpu_dev->of_node);
+ if (!np) {
+ pr_warn("failed to find cpu0 node\n");
+ return;
+ }
+
+ if (dev_pm_opp_of_add_table(cpu_dev)) {
+ pr_warn("failed to init OPP table\n");
+ goto put_node;
+ }
+
+ imx6ul_opp_check_speed_grading(cpu_dev);
+
+put_node:
+ of_node_put(np);
+}
+
static void __init imx6ul_init_machine(void)
{
struct device *parent;
@@ -83,8 +156,11 @@ static void __init imx6ul_init_late(void)
{
imx6sx_cpuidle_init();
- if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
+ if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
+ if (cpu_is_imx6ul())
+ imx6ul_opp_init();
platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
+ }
}
static const char * const imx6ul_dt_compat[] __initconst = {
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] ARM: imx: Add speed grading check for imx6ul
@ 2016-11-30 3:04 ` Bai Ping
0 siblings, 0 replies; 8+ messages in thread
From: Bai Ping @ 2016-11-30 3:04 UTC (permalink / raw)
To: linux-arm-kernel
On i.MX6UL, it has two type of part, the difference
is the max ARM frequency that can run at(528MHz/700MHz).
The part can be identified by part marking for speed grading
fuse. This patch add speed grading check to disable the unsupported
OPP dynamically.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
---
arch/arm/mach-imx/mach-imx6ul.c | 78 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index 6cb8a22..bf86530 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -9,14 +9,17 @@
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/micrel_phy.h>
+#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
+#include <linux/pm_opp.h>
#include <linux/regmap.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "common.h"
#include "cpuidle.h"
+#include "hardware.h"
static void __init imx6ul_enet_clk_init(void)
{
@@ -57,6 +60,76 @@ static inline void imx6ul_enet_init(void)
imx6ul_enet_phy_init();
}
+#define OCOTP_CFG3 0x440
+#define OCOTP_CFG3_SPEED_SHIFT 16
+#define OCOTP_CFG3_SPEED_696MHZ 0x2
+
+static void __init imx6ul_opp_check_speed_grading(struct device *cpu_dev)
+{
+ struct device_node *np;
+ void __iomem *base;
+ u32 val;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp");
+ if (!np) {
+ pr_warn("failed to find ocotp node\n");
+ return;
+ }
+
+ base = of_iomap(np, 0);
+ if (!base) {
+ pr_warn("failed to map ocotp\n");
+ goto put_node;
+ }
+
+ /*
+ * Speed GRADING[1:0] defines the max speed of ARM:
+ * 2b'00: Reserved;
+ * 2b'01: 528000000Hz;
+ * 2b'10: 700000000Hz;
+ * 2b'11: Reserved;
+ * We need to set the max speed of ARM according to fuse map.
+ */
+ val = readl_relaxed(base + OCOTP_CFG3);
+ val >>= OCOTP_CFG3_SPEED_SHIFT;
+ val &= 0x3;
+
+ if (val != OCOTP_CFG3_SPEED_696MHZ) {
+ if (dev_pm_opp_disable(cpu_dev, 696000000))
+ pr_warn("Failed to disable 696MHz OPP\n");
+ }
+ iounmap(base);
+
+put_node:
+ of_node_put(np);
+}
+
+static void __init imx6ul_opp_init(void)
+{
+ struct device_node *np;
+ struct device *cpu_dev = get_cpu_device(0);
+
+ if (!cpu_dev) {
+ pr_warn("failed to get cpu0 device\n");
+ return;
+ }
+ np = of_node_get(cpu_dev->of_node);
+ if (!np) {
+ pr_warn("failed to find cpu0 node\n");
+ return;
+ }
+
+ if (dev_pm_opp_of_add_table(cpu_dev)) {
+ pr_warn("failed to init OPP table\n");
+ goto put_node;
+ }
+
+ imx6ul_opp_check_speed_grading(cpu_dev);
+
+put_node:
+ of_node_put(np);
+}
+
static void __init imx6ul_init_machine(void)
{
struct device *parent;
@@ -83,8 +156,11 @@ static void __init imx6ul_init_late(void)
{
imx6sx_cpuidle_init();
- if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
+ if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
+ if (cpu_is_imx6ul())
+ imx6ul_opp_init();
platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
+ }
}
static const char * const imx6ul_dt_compat[] __initconst = {
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] ARM: imx: Add speed grading check for imx6ul
2016-11-30 3:04 ` Bai Ping
@ 2016-12-30 11:57 ` Shawn Guo
-1 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2016-12-30 11:57 UTC (permalink / raw)
To: Bai Ping
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, fabio.estevam-3arQi8VN3Tc,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Wed, Nov 30, 2016 at 11:04:58AM +0800, Bai Ping wrote:
> On i.MX6UL, it has two type of part, the difference
> is the max ARM frequency that can run at(528MHz/700MHz).
> The part can be identified by part marking for speed grading
> fuse. This patch add speed grading check to disable the unsupported
> OPP dynamically.
>
> Signed-off-by: Bai Ping <ping.bai-3arQi8VN3Tc@public.gmane.org>
We chose to handle such speed grading thing in IMX platform code with
the assumption that this is a special case for i.MX6Q only. No, I'm not
going to take such code for any other i.MX6 SoCs. Please patch cpufreq
driver to handle the speed grading check.
Shawn
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] ARM: imx: Add speed grading check for imx6ul
@ 2016-12-30 11:57 ` Shawn Guo
0 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2016-12-30 11:57 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Nov 30, 2016 at 11:04:58AM +0800, Bai Ping wrote:
> On i.MX6UL, it has two type of part, the difference
> is the max ARM frequency that can run at(528MHz/700MHz).
> The part can be identified by part marking for speed grading
> fuse. This patch add speed grading check to disable the unsupported
> OPP dynamically.
>
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
We chose to handle such speed grading thing in IMX platform code with
the assumption that this is a special case for i.MX6Q only. No, I'm not
going to take such code for any other i.MX6 SoCs. Please patch cpufreq
driver to handle the speed grading check.
Shawn
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH 2/2] ARM: imx: Add speed grading check for imx6ul
2016-12-30 11:57 ` Shawn Guo
@ 2017-01-03 1:01 ` Jacky Bai
-1 siblings, 0 replies; 8+ messages in thread
From: Jacky Bai @ 2017-01-03 1:01 UTC (permalink / raw)
To: Shawn Guo
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
> On Wed, Nov 30, 2016 at 11:04:58AM +0800, Bai Ping wrote:
> > On i.MX6UL, it has two type of part, the difference is the max ARM
> > frequency that can run at(528MHz/700MHz).
> > The part can be identified by part marking for speed grading fuse.
> > This patch add speed grading check to disable the unsupported OPP
> > dynamically.
> >
> > Signed-off-by: Bai Ping <ping.bai-3arQi8VN3Tc@public.gmane.org>
>
> We chose to handle such speed grading thing in IMX platform code with the
> assumption that this is a special case for i.MX6Q only. No, I'm not going to take
> such code for any other i.MX6 SoCs. Please patch cpufreq driver to handle the
> speed grading check.
>
Thanks, I will try to add in cpufreq.
> Shawn
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] ARM: imx: Add speed grading check for imx6ul
@ 2017-01-03 1:01 ` Jacky Bai
0 siblings, 0 replies; 8+ messages in thread
From: Jacky Bai @ 2017-01-03 1:01 UTC (permalink / raw)
To: linux-arm-kernel
> On Wed, Nov 30, 2016 at 11:04:58AM +0800, Bai Ping wrote:
> > On i.MX6UL, it has two type of part, the difference is the max ARM
> > frequency that can run at(528MHz/700MHz).
> > The part can be identified by part marking for speed grading fuse.
> > This patch add speed grading check to disable the unsupported OPP
> > dynamically.
> >
> > Signed-off-by: Bai Ping <ping.bai@nxp.com>
>
> We chose to handle such speed grading thing in IMX platform code with the
> assumption that this is a special case for i.MX6Q only. No, I'm not going to take
> such code for any other i.MX6 SoCs. Please patch cpufreq driver to handle the
> speed grading check.
>
Thanks, I will try to add in cpufreq.
> Shawn
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-01-03 1:01 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-11-30 3:04 [PATCH 1/2] ARM: dts: imx: Add 696MHz setpoint for imx6ul Bai Ping
2016-11-30 3:04 ` Bai Ping
2016-11-30 3:04 ` [PATCH 2/2] ARM: imx: Add speed grading check " Bai Ping
2016-11-30 3:04 ` Bai Ping
[not found] ` <1480475098-2037-2-git-send-email-ping.bai-3arQi8VN3Tc@public.gmane.org>
2016-12-30 11:57 ` Shawn Guo
2016-12-30 11:57 ` Shawn Guo
2017-01-03 1:01 ` Jacky Bai
2017-01-03 1:01 ` Jacky Bai
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