[PATCH 0/5] arm64: dts: Enable bus frequency scaling on Exynos5433-based TM2 board

[PATCH 0/5] arm64: dts: Enable bus frequency scaling on Exynos5433-based TM2 board

[Chanwoo Choi]

This patches add the AMBA bus Device-tree node unsing VDD_INT
to enable the bus frequency scaling on Exynos5433-based TM2 board.

There are two kind of bus device with devfreq framework.
- Parent bus device  : Change the frequency/voltage according to bus's utilization.
- Passive bus device : Change only frequency according to the new level
                       of parent bus device.

The VDD_INT regulator provides the power source to INT (Internal) block as
following. The sub-blocks in the INT block share the one power source.
       VDD_INT |--- G2D (parent device)
               |--- MSCL
               |--- GSCL
               |--- JPEG
               |--- MFC
               |--- HEVC
               |--- BUS0
               |--- BUS1
               |--- BUS2
               |--- PERIS (Fixed clock rate)
               |--- PERIC (Fixed clock rate)
               |--- FSYS  (Fixed clock rate)

Each sub-block has the bus clock as following:
 - CLK_ACLK_G2D_{400|266} : Bus clock for G2D
 - CLK_ACLK_MSCL_400      : Bus clock for MSCL (Mobile Scaler)
 - CLK_ACLK_GSCL_333      : Bus clock for GSCL (General Scaler)
 - CLK_SCLK_JPEG_MSCL     : Bus clock for JPEG
 - CLK_ACLK_MFC_400       : Bus clock for MFC (Multi Format Codec)
 - CLK_ACLK_HEVC_400      : Bus clock for HEVC (High Effective Video Codec)
 - CLK_ACLK_BUS0_400      : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
 - CLK_ACLK_BUS1_400      : NoC's bus clock for MFC/HEVC/G3D
 - CLK_ACLK_BUS2_400      : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP

Chanwoo Choi (5):
  clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
  PM / devfreq: exynos-bus: Add the detailed correlation for Exynos5433
  arm64: dts: exynos5433: Add PPMU dt node
  arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433
  arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

 .../devicetree/bindings/devfreq/exynos-bus.txt     |  14 ++
 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi     | 208 +++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts      |  72 +++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi         |  25 +++
 drivers/clk/samsung/clk-exynos5433.c               |   8 +-
 5 files changed, 323 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi

-- 
1.9.1

[PATCH 0/5] arm64: dts: Enable bus frequency scaling on Exynos5433-based TM2 board

[Chanwoo Choi]

This patches add the AMBA bus Device-tree node unsing VDD_INT
to enable the bus frequency scaling on Exynos5433-based TM2 board.

There are two kind of bus device with devfreq framework.
- Parent bus device  : Change the frequency/voltage according to bus's utilization.
- Passive bus device : Change only frequency according to the new level
                       of parent bus device.

The VDD_INT regulator provides the power source to INT (Internal) block as
following. The sub-blocks in the INT block share the one power source.
       VDD_INT |--- G2D (parent device)
               |--- MSCL
               |--- GSCL
               |--- JPEG
               |--- MFC
               |--- HEVC
               |--- BUS0
               |--- BUS1
               |--- BUS2
               |--- PERIS (Fixed clock rate)
               |--- PERIC (Fixed clock rate)
               |--- FSYS  (Fixed clock rate)

Each sub-block has the bus clock as following:
 - CLK_ACLK_G2D_{400|266} : Bus clock for G2D
 - CLK_ACLK_MSCL_400      : Bus clock for MSCL (Mobile Scaler)
 - CLK_ACLK_GSCL_333      : Bus clock for GSCL (General Scaler)
 - CLK_SCLK_JPEG_MSCL     : Bus clock for JPEG
 - CLK_ACLK_MFC_400       : Bus clock for MFC (Multi Format Codec)
 - CLK_ACLK_HEVC_400      : Bus clock for HEVC (High Effective Video Codec)
 - CLK_ACLK_BUS0_400      : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
 - CLK_ACLK_BUS1_400      : NoC's bus clock for MFC/HEVC/G3D
 - CLK_ACLK_BUS2_400      : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP

Chanwoo Choi (5):
  clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
  PM / devfreq: exynos-bus: Add the detailed correlation for Exynos5433
  arm64: dts: exynos5433: Add PPMU dt node
  arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433
  arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

 .../devicetree/bindings/devfreq/exynos-bus.txt     |  14 ++
 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi     | 208 +++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts      |  72 +++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi         |  25 +++
 drivers/clk/samsung/clk-exynos5433.c               |   8 +-
 5 files changed, 323 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi

-- 
1.9.1

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[PATCH 0/5] arm64: dts: Enable bus frequency scaling on Exynos5433-based TM2 board

[Chanwoo Choi]

This patches add the AMBA bus Device-tree node unsing VDD_INT
to enable the bus frequency scaling on Exynos5433-based TM2 board.

There are two kind of bus device with devfreq framework.
- Parent bus device  : Change the frequency/voltage according to bus's utilization.
- Passive bus device : Change only frequency according to the new level
                       of parent bus device.

The VDD_INT regulator provides the power source to INT (Internal) block as
following. The sub-blocks in the INT block share the one power source.
       VDD_INT |--- G2D (parent device)
               |--- MSCL
               |--- GSCL
               |--- JPEG
               |--- MFC
               |--- HEVC
               |--- BUS0
               |--- BUS1
               |--- BUS2
               |--- PERIS (Fixed clock rate)
               |--- PERIC (Fixed clock rate)
               |--- FSYS  (Fixed clock rate)

Each sub-block has the bus clock as following:
 - CLK_ACLK_G2D_{400|266} : Bus clock for G2D
 - CLK_ACLK_MSCL_400      : Bus clock for MSCL (Mobile Scaler)
 - CLK_ACLK_GSCL_333      : Bus clock for GSCL (General Scaler)
 - CLK_SCLK_JPEG_MSCL     : Bus clock for JPEG
 - CLK_ACLK_MFC_400       : Bus clock for MFC (Multi Format Codec)
 - CLK_ACLK_HEVC_400      : Bus clock for HEVC (High Effective Video Codec)
 - CLK_ACLK_BUS0_400      : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
 - CLK_ACLK_BUS1_400      : NoC's bus clock for MFC/HEVC/G3D
 - CLK_ACLK_BUS2_400      : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP

Chanwoo Choi (5):
  clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
  PM / devfreq: exynos-bus: Add the detailed correlation for Exynos5433
  arm64: dts: exynos5433: Add PPMU dt node
  arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433
  arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

 .../devicetree/bindings/devfreq/exynos-bus.txt     |  14 ++
 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi     | 208 +++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts      |  72 +++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi         |  25 +++
 drivers/clk/samsung/clk-exynos5433.c               |   8 +-
 5 files changed, 323 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi

-- 
1.9.1

[PATCH 1/5] clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical

[Chanwoo Choi]

The ACLK_BUS0/1/2 are used for NoC (Network on Chip). If NoC's clocks are
disabled, the system halt happen. Following clock must be always enabled.
- CLK_ACLK_BUS0_400 : NoC's bus clock for PERIC/PERIS/FSYS/MSCL
- CLK_ACLK_BUS1_400 : NoC's bus clock for MFC/HEVC/G3D
- CLK_ACLK_BUS2_400 : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP

Also, this patch adds the CLK_SET_RATE_PARENT flag to the CLK_SCLK_JPEG_MSCL
because this clock should be used for bus frequency scaling. This clock need to
be changed on the fly with CLK_SET_RATE_PARENT flag.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc:linux-clk@vger.kernel.org
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 drivers/clk/samsung/clk-exynos5433.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index f096bd7df40c..0db5204c307c 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -549,10 +549,10 @@
 			29, CLK_IGNORE_UNUSED, 0),
 	GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400",
 			ENABLE_ACLK_TOP, 26,
-			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400",
 			ENABLE_ACLK_TOP, 25,
-			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266",
 			ENABLE_ACLK_TOP, 24,
 			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
@@ -616,7 +616,7 @@
 
 	/* ENABLE_SCLK_TOP_MSCL */
 	GATE(CLK_SCLK_JPEG_MSCL, "sclk_jpeg_mscl", "div_sclk_jpeg",
-			ENABLE_SCLK_TOP_MSCL, 0, 0, 0),
+			ENABLE_SCLK_TOP_MSCL, 0, CLK_SET_RATE_PARENT, 0),
 
 	/* ENABLE_SCLK_TOP_CAM1 */
 	GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "div_sclk_isp_sensor2_b",
@@ -1382,7 +1382,7 @@ static void __init exynos5433_cmu_cpif_init(struct device_node *np)
 	/* ENABLE_ACLK_MIF3 */
 	GATE(CLK_ACLK_BUS2_400, "aclk_bus2_400", "div_aclk_bus2_400",
 			ENABLE_ACLK_MIF3, 4,
-			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_ACLK_DISP_333, "aclk_disp_333", "div_aclk_disp_333",
 			ENABLE_ACLK_MIF3, 1,
 			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
-- 
1.9.1

[PATCH 1/5] clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical

[Chanwoo Choi]

The ACLK_BUS0/1/2 are used for NoC (Network on Chip). If NoC's clocks are
disabled, the system halt happen. Following clock must be always enabled.
- CLK_ACLK_BUS0_400 : NoC's bus clock for PERIC/PERIS/FSYS/MSCL
- CLK_ACLK_BUS1_400 : NoC's bus clock for MFC/HEVC/G3D
- CLK_ACLK_BUS2_400 : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP

Also, this patch adds the CLK_SET_RATE_PARENT flag to the CLK_SCLK_JPEG_MSCL
because this clock should be used for bus frequency scaling. This clock need to
be changed on the fly with CLK_SET_RATE_PARENT flag.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc:linux-clk at vger.kernel.org
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 drivers/clk/samsung/clk-exynos5433.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index f096bd7df40c..0db5204c307c 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -549,10 +549,10 @@
 			29, CLK_IGNORE_UNUSED, 0),
 	GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400",
 			ENABLE_ACLK_TOP, 26,
-			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400",
 			ENABLE_ACLK_TOP, 25,
-			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266",
 			ENABLE_ACLK_TOP, 24,
 			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
@@ -616,7 +616,7 @@
 
 	/* ENABLE_SCLK_TOP_MSCL */
 	GATE(CLK_SCLK_JPEG_MSCL, "sclk_jpeg_mscl", "div_sclk_jpeg",
-			ENABLE_SCLK_TOP_MSCL, 0, 0, 0),
+			ENABLE_SCLK_TOP_MSCL, 0, CLK_SET_RATE_PARENT, 0),
 
 	/* ENABLE_SCLK_TOP_CAM1 */
 	GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "div_sclk_isp_sensor2_b",
@@ -1382,7 +1382,7 @@ static void __init exynos5433_cmu_cpif_init(struct device_node *np)
 	/* ENABLE_ACLK_MIF3 */
 	GATE(CLK_ACLK_BUS2_400, "aclk_bus2_400", "div_aclk_bus2_400",
 			ENABLE_ACLK_MIF3, 4,
-			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_ACLK_DISP_333, "aclk_disp_333", "div_aclk_disp_333",
 			ENABLE_ACLK_MIF3, 1,
 			CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0),
-- 
1.9.1

[PATCH 2/5] PM / devfreq: exynos-bus: Add the detailed correlation for Exynos5433

[Chanwoo Choi]

This patch adds the detailed corrleation between sub-blocks and VDD_INT power
line for Exynos5433. VDD_INT provided the power source to INT (Internal) block.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index d3ec8e676b6b..d085ef90d27c 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -123,6 +123,20 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC:
 		|--- FSYS
 		|--- FSYS2
 
+- In case of Exynos5433, there is VDD_INT power line as following:
+	VDD_INT |--- G2D (parent device)
+		|--- MSCL
+		|--- GSCL
+		|--- JPEG
+		|--- MFC
+		|--- HEVC
+		|--- BUS0
+		|--- BUS1
+		|--- BUS2
+		|--- PERIS (Fixed clock rate)
+		|--- PERIC (Fixed clock rate)
+		|--- FSYS  (Fixed clock rate)
+
 Example1:
 	Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
 	power line (regulator). The MIF (Memory Interface) AXI bus is used to
-- 
1.9.1

[PATCH 2/5] PM / devfreq: exynos-bus: Add the detailed correlation for Exynos5433

[Chanwoo Choi]

This patch adds the detailed corrleation between sub-blocks and VDD_INT power
line for Exynos5433. VDD_INT provided the power source to INT (Internal) block.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index d3ec8e676b6b..d085ef90d27c 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -123,6 +123,20 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC:
 		|--- FSYS
 		|--- FSYS2
 
+- In case of Exynos5433, there is VDD_INT power line as following:
+	VDD_INT |--- G2D (parent device)
+		|--- MSCL
+		|--- GSCL
+		|--- JPEG
+		|--- MFC
+		|--- HEVC
+		|--- BUS0
+		|--- BUS1
+		|--- BUS2
+		|--- PERIS (Fixed clock rate)
+		|--- PERIC (Fixed clock rate)
+		|--- FSYS  (Fixed clock rate)
+
 Example1:
 	Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
 	power line (regulator). The MIF (Memory Interface) AXI bus is used to
-- 
1.9.1

[PATCH 2/5] PM / devfreq: exynos-bus: Add the detailed correlation for Exynos5433

[Chanwoo Choi]

This patch adds the detailed corrleation between sub-blocks and VDD_INT power
line for Exynos5433. VDD_INT provided the power source to INT (Internal) block.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree at vger.kernel.org
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index d3ec8e676b6b..d085ef90d27c 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -123,6 +123,20 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC:
 		|--- FSYS
 		|--- FSYS2
 
+- In case of Exynos5433, there is VDD_INT power line as following:
+	VDD_INT |--- G2D (parent device)
+		|--- MSCL
+		|--- GSCL
+		|--- JPEG
+		|--- MFC
+		|--- HEVC
+		|--- BUS0
+		|--- BUS1
+		|--- BUS2
+		|--- PERIS (Fixed clock rate)
+		|--- PERIC (Fixed clock rate)
+		|--- FSYS  (Fixed clock rate)
+
 Example1:
 	Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
 	power line (regulator). The MIF (Memory Interface) AXI bus is used to
-- 
1.9.1

[PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
to measure the utilization of each IP in Exynos SoC.

- PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
  block with VDD_MIF power source.
- PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
  block with VDD_INT power source.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 64226d5ae471..8c4ee84d5232 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -599,6 +599,30 @@
 			clock-names = "fin_pll", "mct";
 		};
 
+		ppmu_d0_cpu: ppmu@10480000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x10480000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d0_general: ppmu@10490000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x10490000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d1_cpu: ppmu@104b0000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x104b0000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d1_general: ppmu@104c0000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x104c0000 0x2000>;
+			status = "disabled";
+		};
+
 		pinctrl_alive: pinctrl@10580000 {
 			compatible = "samsung,exynos5433-pinctrl";
 			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
-- 
1.9.1

[PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
to measure the utilization of each IP in Exynos SoC.

- PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
  block with VDD_MIF power source.
- PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
  block with VDD_INT power source.

Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 64226d5ae471..8c4ee84d5232 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -599,6 +599,30 @@
 			clock-names = "fin_pll", "mct";
 		};
 
+		ppmu_d0_cpu: ppmu@10480000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x10480000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d0_general: ppmu@10490000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x10490000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d1_cpu: ppmu@104b0000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x104b0000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d1_general: ppmu@104c0000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x104c0000 0x2000>;
+			status = "disabled";
+		};
+
 		pinctrl_alive: pinctrl@10580000 {
 			compatible = "samsung,exynos5433-pinctrl";
 			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
-- 
1.9.1

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[PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
to measure the utilization of each IP in Exynos SoC.

- PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
  block with VDD_MIF power source.
- PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
  block with VDD_INT power source.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 64226d5ae471..8c4ee84d5232 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -599,6 +599,30 @@
 			clock-names = "fin_pll", "mct";
 		};
 
+		ppmu_d0_cpu: ppmu at 10480000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x10480000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d0_general: ppmu at 10490000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x10490000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d1_cpu: ppmu at 104b0000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x104b0000 0x2000>;
+			status = "disabled";
+		};
+
+		ppmu_d1_general: ppmu at 104c0000 {
+			compatible = "samsung,exynos-ppmu-v2";
+			reg = <0x104c0000 0x2000>;
+			status = "disabled";
+		};
+
 		pinctrl_alive: pinctrl at 10580000 {
 			compatible = "samsung,exynos5433-pinctrl";
 			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
-- 
1.9.1

[PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Chanwoo Choi]

This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
Exynos5433 has the following AMBA AXI buses to translate data
between DRAM and sub-blocks.

Following list specify the detailed correlation between sub-block and clock:
- CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
- CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
- CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
- CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
- CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
- CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
- CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
- CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
- CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
 2 files changed, 209 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
new file mode 100644
index 000000000000..b1e1d9c622e1
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
@@ -0,0 +1,208 @@
+/*
+ * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * Chanwoo Choi <cw00.choi@samsung.com>
+ *
+ * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
+ * as device tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+	/* INT (Internal) block using VDD_INT */
+	bus_g2d_400: bus_g2d_400 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_G2D_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_mscl: bus_mscl {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_jpeg: bus_jpeg {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_mfc: bus_mfc {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_MFC_400>;
+
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_g2d_266: bus_g2d_266 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_G2D_266>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_266_opp_table>;
+		status ="disable";
+	};
+
+	bus_gscl: bus_gscl {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_gscl_opp_table>;
+		status ="disable";
+	};
+
+	bus_hevc: bus_hevc {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_hevc_opp_table>;
+		status ="disable";
+	};
+
+	bus_bus0: bus_bus0 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_BUS0_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_hevc_opp_table>;
+		status ="disable";
+	};
+
+	bus_bus1: bus_bus1 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_BUS1_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_hevc_opp_table>;
+		status ="disable";
+	};
+
+	bus_bus2: bus_bus2 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_bus2_opp_table>;
+		status ="disable";
+	};
+
+	bus_g2d_400_opp_table: opp_table2 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp@267000000 {
+			opp-hz = /bits/ 64 <267000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <975000>;
+		};
+		opp@160000000 {
+			opp-hz = /bits/ 64 <160000000>;
+			opp-microvolt = <962500>;
+		};
+		opp@134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+			opp-microvolt = <950000>;
+		};
+		opp@100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <937500>;
+		};
+	};
+
+	bus_g2d_266_opp_table: opp_table3 {
+		compatible = "operating-points-v2";
+
+		opp@267000000 {
+			opp-hz = /bits/ 64 <267000000>;
+		};
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+		};
+		opp@160000000 {
+			opp-hz = /bits/ 64 <160000000>;
+		};
+		opp@134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+		};
+		opp@100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+		};
+	};
+
+	bus_gscl_opp_table: opp_table4 {
+		compatible = "operating-points-v2";
+
+		opp@333000000 {
+			opp-hz = /bits/ 64 <333000000>;
+		};
+		opp@222000000 {
+			opp-hz = /bits/ 64 <222000000>;
+		};
+		opp@166500000 {
+			opp-hz = /bits/ 64 <166500000>;
+		};
+	};
+
+	bus_hevc_opp_table: opp_table5 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp@267000000 {
+			opp-hz = /bits/ 64 <267000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp@160000000 {
+			opp-hz = /bits/ 64 <160000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp@134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp@100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <1075000>;
+		};
+	};
+
+	bus_bus2_opp_table: opp_table6 {
+		compatible = "operating-points-v2";
+
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+		};
+		opp@200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+		};
+		opp@134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+		};
+		opp@100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 8c4ee84d5232..68f764e5851c 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1482,5 +1482,6 @@
 	};
 };
 
+#include "exynos5433-bus.dtsi"
 #include "exynos5433-pinctrl.dtsi"
 #include "exynos5433-tmu.dtsi"
-- 
1.9.1

[PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Chanwoo Choi]

This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
Exynos5433 has the following AMBA AXI buses to translate data
between DRAM and sub-blocks.

Following list specify the detailed correlation between sub-block and clock:
- CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
- CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
- CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
- CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
- CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
- CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
- CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
- CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
- CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
 2 files changed, 209 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
new file mode 100644
index 000000000000..b1e1d9c622e1
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
@@ -0,0 +1,208 @@
+/*
+ * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * Chanwoo Choi <cw00.choi@samsung.com>
+ *
+ * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
+ * as device tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+	/* INT (Internal) block using VDD_INT */
+	bus_g2d_400: bus_g2d_400 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_G2D_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_mscl: bus_mscl {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_jpeg: bus_jpeg {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_mfc: bus_mfc {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_MFC_400>;
+
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_400_opp_table>;
+		status ="disable";
+	};
+
+	bus_g2d_266: bus_g2d_266 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_G2D_266>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_g2d_266_opp_table>;
+		status ="disable";
+	};
+
+	bus_gscl: bus_gscl {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_gscl_opp_table>;
+		status ="disable";
+	};
+
+	bus_hevc: bus_hevc {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_hevc_opp_table>;
+		status ="disable";
+	};
+
+	bus_bus0: bus_bus0 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_BUS0_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_hevc_opp_table>;
+		status ="disable";
+	};
+
+	bus_bus1: bus_bus1 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_top CLK_ACLK_BUS1_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_hevc_opp_table>;
+		status ="disable";
+	};
+
+	bus_bus2: bus_bus2 {
+		compatible = "samsung,exynos-bus";
+		clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
+		clock-names = "bus";
+		operating-points-v2 = <&bus_bus2_opp_table>;
+		status ="disable";
+	};
+
+	bus_g2d_400_opp_table: opp_table2 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp at 400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp at 267000000 {
+			opp-hz = /bits/ 64 <267000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp at 200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <975000>;
+		};
+		opp at 160000000 {
+			opp-hz = /bits/ 64 <160000000>;
+			opp-microvolt = <962500>;
+		};
+		opp at 134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+			opp-microvolt = <950000>;
+		};
+		opp at 100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <937500>;
+		};
+	};
+
+	bus_g2d_266_opp_table: opp_table3 {
+		compatible = "operating-points-v2";
+
+		opp at 267000000 {
+			opp-hz = /bits/ 64 <267000000>;
+		};
+		opp at 200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+		};
+		opp at 160000000 {
+			opp-hz = /bits/ 64 <160000000>;
+		};
+		opp at 134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+		};
+		opp at 100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+		};
+	};
+
+	bus_gscl_opp_table: opp_table4 {
+		compatible = "operating-points-v2";
+
+		opp at 333000000 {
+			opp-hz = /bits/ 64 <333000000>;
+		};
+		opp at 222000000 {
+			opp-hz = /bits/ 64 <222000000>;
+		};
+		opp at 166500000 {
+			opp-hz = /bits/ 64 <166500000>;
+		};
+	};
+
+	bus_hevc_opp_table: opp_table5 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp at 400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp at 267000000 {
+			opp-hz = /bits/ 64 <267000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp at 200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp at 160000000 {
+			opp-hz = /bits/ 64 <160000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp at 134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp at 100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+			opp-microvolt = <1075000>;
+		};
+	};
+
+	bus_bus2_opp_table: opp_table6 {
+		compatible = "operating-points-v2";
+
+		opp at 400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+		};
+		opp at 200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+		};
+		opp at 134000000 {
+			opp-hz = /bits/ 64 <134000000>;
+		};
+		opp at 100000000 {
+			opp-hz = /bits/ 64 <100000000>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 8c4ee84d5232..68f764e5851c 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1482,5 +1482,6 @@
 	};
 };
 
+#include "exynos5433-bus.dtsi"
 #include "exynos5433-pinctrl.dtsi"
 #include "exynos5433-tmu.dtsi"
-- 
1.9.1

[PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Chanwoo Choi]

This patch adds the bus Device-tree nodes for INT (Internal) block
to enable the bus frequency scaling.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index c08589970134..7b37aae336b1 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -170,6 +170,58 @@
 	};
 };
 
+&bus_g2d_400 {
+	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
+	vdd-supply = <&buck4_reg>;
+	exynos,saturation-ratio = <10>;
+	status = "okay";
+};
+
+&bus_mscl {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_jpeg {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_mfc {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_g2d_266 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_gscl {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_hevc {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_bus0 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_bus1 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_bus2 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
 &cmu_aud {
 	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
 	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
@@ -794,6 +846,26 @@
 	bus-width = <4>;
 };
 
+&ppmu_d0_general {
+	status = "okay";
+
+	events {
+		ppmu_event0_d0_general: ppmu-event0-d0-general {
+			event-name = "ppmu-event0-d0-general";
+		};
+	};
+};
+
+&ppmu_d1_general {
+	status = "okay";
+
+	events {
+		ppmu_event0_d1_general: ppmu-event0-d1-general {
+		       event-name = "ppmu-event0-d1-general";
+	       };
+       };
+};
+
 &pinctrl_alive {
 	pinctrl-names = "default";
 	pinctrl-0 = <&initial_alive>;
-- 
1.9.1

[PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Chanwoo Choi]

This patch adds the bus Device-tree nodes for INT (Internal) block
to enable the bus frequency scaling.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index c08589970134..7b37aae336b1 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -170,6 +170,58 @@
 	};
 };
 
+&bus_g2d_400 {
+	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
+	vdd-supply = <&buck4_reg>;
+	exynos,saturation-ratio = <10>;
+	status = "okay";
+};
+
+&bus_mscl {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_jpeg {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_mfc {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_g2d_266 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_gscl {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_hevc {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_bus0 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_bus1 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
+&bus_bus2 {
+	devfreq = <&bus_g2d_400>;
+	status = "okay";
+};
+
 &cmu_aud {
 	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
 	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
@@ -794,6 +846,26 @@
 	bus-width = <4>;
 };
 
+&ppmu_d0_general {
+	status = "okay";
+
+	events {
+		ppmu_event0_d0_general: ppmu-event0-d0-general {
+			event-name = "ppmu-event0-d0-general";
+		};
+	};
+};
+
+&ppmu_d1_general {
+	status = "okay";
+
+	events {
+		ppmu_event0_d1_general: ppmu-event0-d1-general {
+		       event-name = "ppmu-event0-d1-general";
+	       };
+       };
+};
+
 &pinctrl_alive {
 	pinctrl-names = "default";
 	pinctrl-0 = <&initial_alive>;
-- 
1.9.1

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
> to measure the utilization of each IP in Exynos SoC.
> 
> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>   block with VDD_MIF power source.
> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>   block with VDD_INT power source.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 64226d5ae471..8c4ee84d5232 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -599,6 +599,30 @@
>  			clock-names = "fin_pll", "mct";
>  		};
>  
> +		ppmu_d0_cpu: ppmu@10480000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x10480000 0x2000>;
> +			status = "disabled";

Why these are disabled? They have some external dependencies?

Best regards,
Krzysztof

> +		};
> +
> +		ppmu_d0_general: ppmu@10490000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x10490000 0x2000>;
> +			status = "disabled";
> +		};
> +
> +		ppmu_d1_cpu: ppmu@104b0000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x104b0000 0x2000>;
> +			status = "disabled";
> +		};
> +
> +		ppmu_d1_general: ppmu@104c0000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x104c0000 0x2000>;
> +			status = "disabled";
> +		};
> +
>  		pinctrl_alive: pinctrl@10580000 {
>  			compatible = "samsung,exynos5433-pinctrl";
>  			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
> -- 
> 1.9.1
> 

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
> to measure the utilization of each IP in Exynos SoC.
> 
> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>   block with VDD_MIF power source.
> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>   block with VDD_INT power source.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 64226d5ae471..8c4ee84d5232 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -599,6 +599,30 @@
>  			clock-names = "fin_pll", "mct";
>  		};
>  
> +		ppmu_d0_cpu: ppmu@10480000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x10480000 0x2000>;
> +			status = "disabled";

Why these are disabled? They have some external dependencies?

Best regards,
Krzysztof

> +		};
> +
> +		ppmu_d0_general: ppmu@10490000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x10490000 0x2000>;
> +			status = "disabled";
> +		};
> +
> +		ppmu_d1_cpu: ppmu@104b0000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x104b0000 0x2000>;
> +			status = "disabled";
> +		};
> +
> +		ppmu_d1_general: ppmu@104c0000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x104c0000 0x2000>;
> +			status = "disabled";
> +		};
> +
>  		pinctrl_alive: pinctrl@10580000 {
>  			compatible = "samsung,exynos5433-pinctrl";
>  			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
> -- 
> 1.9.1
> 
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[PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
> to measure the utilization of each IP in Exynos SoC.
> 
> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>   block with VDD_MIF power source.
> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>   block with VDD_INT power source.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 64226d5ae471..8c4ee84d5232 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -599,6 +599,30 @@
>  			clock-names = "fin_pll", "mct";
>  		};
>  
> +		ppmu_d0_cpu: ppmu at 10480000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x10480000 0x2000>;
> +			status = "disabled";

Why these are disabled? They have some external dependencies?

Best regards,
Krzysztof

> +		};
> +
> +		ppmu_d0_general: ppmu at 10490000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x10490000 0x2000>;
> +			status = "disabled";
> +		};
> +
> +		ppmu_d1_cpu: ppmu at 104b0000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x104b0000 0x2000>;
> +			status = "disabled";
> +		};
> +
> +		ppmu_d1_general: ppmu at 104c0000 {
> +			compatible = "samsung,exynos-ppmu-v2";
> +			reg = <0x104c0000 0x2000>;
> +			status = "disabled";
> +		};
> +
>  		pinctrl_alive: pinctrl at 10580000 {
>  			compatible = "samsung,exynos5433-pinctrl";
>  			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
> -- 
> 1.9.1
> 

Re: [PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:06PM +0900, Chanwoo Choi wrote:
> This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
> Exynos5433 has the following AMBA AXI buses to translate data
> between DRAM and sub-blocks.
> 
> Following list specify the detailed correlation between sub-block and clock:
> - CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
> - CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
> - CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
> - CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
> - CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
> - CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
> - CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
> - CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
> - CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
>  2 files changed, 209 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> new file mode 100644
> index 000000000000..b1e1d9c622e1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> @@ -0,0 +1,208 @@
> +/*
> + * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + * Chanwoo Choi <cw00.choi@samsung.com>
> + *
> + * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
> + * as device tree nodes are listed in this file.

This duplicates the introduction line and does not make sense.

> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/ {

Shouldn't these be under soc node? It looks like property of SoC itself.

> +	/* INT (Internal) block using VDD_INT */
> +	bus_g2d_400: bus_g2d_400 {

In node name, the dash '-' is preferred. The name should describe
general class of device so probably this should be just "bus"... but I
don't see a way how to do it reasonable anyway.

> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_G2D_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";

Hm?


> +	};
> +
> +	bus_mscl: bus_mscl {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_jpeg: bus_jpeg {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_mfc: bus_mfc {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_MFC_400>;
> +
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_g2d_266: bus_g2d_266 {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_G2D_266>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_266_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_gscl: bus_gscl {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_gscl_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_hevc: bus_hevc {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_hevc_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_bus0: bus_bus0 {

bus, bus, bus, bus, jackpot! Let's try to find better name and label for
these. :)

Best regards,
Krzysztof

Re: [PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:06PM +0900, Chanwoo Choi wrote:
> This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
> Exynos5433 has the following AMBA AXI buses to translate data
> between DRAM and sub-blocks.
> 
> Following list specify the detailed correlation between sub-block and clock:
> - CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
> - CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
> - CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
> - CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
> - CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
> - CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
> - CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
> - CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
> - CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
> 
> Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
>  2 files changed, 209 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> new file mode 100644
> index 000000000000..b1e1d9c622e1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> @@ -0,0 +1,208 @@
> +/*
> + * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + * Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> + *
> + * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
> + * as device tree nodes are listed in this file.

This duplicates the introduction line and does not make sense.

> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/ {

Shouldn't these be under soc node? It looks like property of SoC itself.

> +	/* INT (Internal) block using VDD_INT */
> +	bus_g2d_400: bus_g2d_400 {

In node name, the dash '-' is preferred. The name should describe
general class of device so probably this should be just "bus"... but I
don't see a way how to do it reasonable anyway.

> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_G2D_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";

Hm?


> +	};
> +
> +	bus_mscl: bus_mscl {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_jpeg: bus_jpeg {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_mfc: bus_mfc {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_MFC_400>;
> +
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_g2d_266: bus_g2d_266 {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_G2D_266>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_266_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_gscl: bus_gscl {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_gscl_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_hevc: bus_hevc {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_hevc_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_bus0: bus_bus0 {

bus, bus, bus, bus, jackpot! Let's try to find better name and label for
these. :)

Best regards,
Krzysztof
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[PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:06PM +0900, Chanwoo Choi wrote:
> This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
> Exynos5433 has the following AMBA AXI buses to translate data
> between DRAM and sub-blocks.
> 
> Following list specify the detailed correlation between sub-block and clock:
> - CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
> - CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
> - CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
> - CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
> - CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
> - CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
> - CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
> - CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
> - CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
>  2 files changed, 209 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> new file mode 100644
> index 000000000000..b1e1d9c622e1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
> @@ -0,0 +1,208 @@
> +/*
> + * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + * Chanwoo Choi <cw00.choi@samsung.com>
> + *
> + * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
> + * as device tree nodes are listed in this file.

This duplicates the introduction line and does not make sense.

> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/ {

Shouldn't these be under soc node? It looks like property of SoC itself.

> +	/* INT (Internal) block using VDD_INT */
> +	bus_g2d_400: bus_g2d_400 {

In node name, the dash '-' is preferred. The name should describe
general class of device so probably this should be just "bus"... but I
don't see a way how to do it reasonable anyway.

> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_G2D_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";

Hm?


> +	};
> +
> +	bus_mscl: bus_mscl {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_jpeg: bus_jpeg {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_mfc: bus_mfc {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_MFC_400>;
> +
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_g2d_266: bus_g2d_266 {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_G2D_266>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_g2d_266_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_gscl: bus_gscl {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_gscl_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_hevc: bus_hevc {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_hevc_opp_table>;
> +		status ="disable";
> +	};
> +
> +	bus_bus0: bus_bus0 {

bus, bus, bus, bus, jackpot! Let's try to find better name and label for
these. :)

Best regards,
Krzysztof

Re: [PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:07PM +0900, Chanwoo Choi wrote:
> This patch adds the bus Device-tree nodes for INT (Internal) block
> to enable the bus frequency scaling.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index c08589970134..7b37aae336b1 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -170,6 +170,58 @@
>  	};
>  };
>  
> +&bus_g2d_400 {
> +	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
> +	vdd-supply = <&buck4_reg>;
> +	exynos,saturation-ratio = <10>;
> +	status = "okay";
> +};
> +
> +&bus_mscl {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_jpeg {

Except the first entry (which is a parent), are there any objections to
order these nodes alphabetically? This also applies to the previously
patch.

Beside that nit, looks good. I will have to wait anyway to next merge
window, so for the reference:

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof


> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_mfc {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_g2d_266 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_gscl {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_hevc {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus0 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus1 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus2 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
>  &cmu_aud {
>  	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
>  	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
> @@ -794,6 +846,26 @@
>  	bus-width = <4>;
>  };
>  
> +&ppmu_d0_general {
> +	status = "okay";
> +
> +	events {
> +		ppmu_event0_d0_general: ppmu-event0-d0-general {
> +			event-name = "ppmu-event0-d0-general";
> +		};
> +	};
> +};
> +
> +&ppmu_d1_general {
> +	status = "okay";
> +
> +	events {
> +		ppmu_event0_d1_general: ppmu-event0-d1-general {
> +		       event-name = "ppmu-event0-d1-general";
> +	       };
> +       };
> +};
> +
>  &pinctrl_alive {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&initial_alive>;
> -- 
> 1.9.1
> 

Re: [PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:07PM +0900, Chanwoo Choi wrote:
> This patch adds the bus Device-tree nodes for INT (Internal) block
> to enable the bus frequency scaling.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index c08589970134..7b37aae336b1 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -170,6 +170,58 @@
>  	};
>  };
>  
> +&bus_g2d_400 {
> +	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
> +	vdd-supply = <&buck4_reg>;
> +	exynos,saturation-ratio = <10>;
> +	status = "okay";
> +};
> +
> +&bus_mscl {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_jpeg {

Except the first entry (which is a parent), are there any objections to
order these nodes alphabetically? This also applies to the previously
patch.

Beside that nit, looks good. I will have to wait anyway to next merge
window, so for the reference:

Reviewed-by: Krzysztof Kozlowski <krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Best regards,
Krzysztof


> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_mfc {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_g2d_266 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_gscl {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_hevc {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus0 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus1 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus2 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
>  &cmu_aud {
>  	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
>  	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
> @@ -794,6 +846,26 @@
>  	bus-width = <4>;
>  };
>  
> +&ppmu_d0_general {
> +	status = "okay";
> +
> +	events {
> +		ppmu_event0_d0_general: ppmu-event0-d0-general {
> +			event-name = "ppmu-event0-d0-general";
> +		};
> +	};
> +};
> +
> +&ppmu_d1_general {
> +	status = "okay";
> +
> +	events {
> +		ppmu_event0_d1_general: ppmu-event0-d1-general {
> +		       event-name = "ppmu-event0-d1-general";
> +	       };
> +       };
> +};
> +
>  &pinctrl_alive {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&initial_alive>;
> -- 
> 1.9.1
> 
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[PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:07PM +0900, Chanwoo Choi wrote:
> This patch adds the bus Device-tree nodes for INT (Internal) block
> to enable the bus frequency scaling.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index c08589970134..7b37aae336b1 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -170,6 +170,58 @@
>  	};
>  };
>  
> +&bus_g2d_400 {
> +	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
> +	vdd-supply = <&buck4_reg>;
> +	exynos,saturation-ratio = <10>;
> +	status = "okay";
> +};
> +
> +&bus_mscl {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_jpeg {

Except the first entry (which is a parent), are there any objections to
order these nodes alphabetically? This also applies to the previously
patch.

Beside that nit, looks good. I will have to wait anyway to next merge
window, so for the reference:

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof


> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_mfc {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_g2d_266 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_gscl {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_hevc {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus0 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus1 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
> +&bus_bus2 {
> +	devfreq = <&bus_g2d_400>;
> +	status = "okay";
> +};
> +
>  &cmu_aud {
>  	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
>  	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
> @@ -794,6 +846,26 @@
>  	bus-width = <4>;
>  };
>  
> +&ppmu_d0_general {
> +	status = "okay";
> +
> +	events {
> +		ppmu_event0_d0_general: ppmu-event0-d0-general {
> +			event-name = "ppmu-event0-d0-general";
> +		};
> +	};
> +};
> +
> +&ppmu_d1_general {
> +	status = "okay";
> +
> +	events {
> +		ppmu_event0_d1_general: ppmu-event0-d1-general {
> +		       event-name = "ppmu-event0-d1-general";
> +	       };
> +       };
> +};
> +
>  &pinctrl_alive {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&initial_alive>;
> -- 
> 1.9.1
> 

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

On 2016년 12월 07일 04:07, Krzysztof Kozlowski wrote:
> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>> to measure the utilization of each IP in Exynos SoC.
>>
>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>   block with VDD_MIF power source.
>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>   block with VDD_INT power source.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> index 64226d5ae471..8c4ee84d5232 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> @@ -599,6 +599,30 @@
>>  			clock-names = "fin_pll", "mct";
>>  		};
>>  
>> +		ppmu_d0_cpu: ppmu@10480000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x10480000 0x2000>;
>> +			status = "disabled";
> 
> Why these are disabled? They have some external dependencies?

There is no any dependency. If you want to remain it always enabled,
I'm OK.

Best Regards,
Chanwoo Choi

> 
> Best regards,
> Krzysztof
> 
>> +		};
>> +
>> +		ppmu_d0_general: ppmu@10490000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x10490000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		ppmu_d1_cpu: ppmu@104b0000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x104b0000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		ppmu_d1_general: ppmu@104c0000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x104c0000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>>  		pinctrl_alive: pinctrl@10580000 {
>>  			compatible = "samsung,exynos5433-pinctrl";
>>  			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
>> -- 
>> 1.9.1
>>
> 
> 
> 

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

On 2016년 12월 07일 04:07, Krzysztof Kozlowski wrote:
> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>> to measure the utilization of each IP in Exynos SoC.
>>
>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>   block with VDD_MIF power source.
>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>   block with VDD_INT power source.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> index 64226d5ae471..8c4ee84d5232 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> @@ -599,6 +599,30 @@
>>  			clock-names = "fin_pll", "mct";
>>  		};
>>  
>> +		ppmu_d0_cpu: ppmu@10480000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x10480000 0x2000>;
>> +			status = "disabled";
> 
> Why these are disabled? They have some external dependencies?

There is no any dependency. If you want to remain it always enabled,
I'm OK.

Best Regards,
Chanwoo Choi

> 
> Best regards,
> Krzysztof
> 
>> +		};
>> +
>> +		ppmu_d0_general: ppmu@10490000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x10490000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		ppmu_d1_cpu: ppmu@104b0000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x104b0000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		ppmu_d1_general: ppmu@104c0000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x104c0000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>>  		pinctrl_alive: pinctrl@10580000 {
>>  			compatible = "samsung,exynos5433-pinctrl";
>>  			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
>> -- 
>> 1.9.1
>>
> 
> 
> 


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[PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

On 2016? 12? 07? 04:07, Krzysztof Kozlowski wrote:
> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>> to measure the utilization of each IP in Exynos SoC.
>>
>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>   block with VDD_MIF power source.
>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>   block with VDD_INT power source.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> index 64226d5ae471..8c4ee84d5232 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> @@ -599,6 +599,30 @@
>>  			clock-names = "fin_pll", "mct";
>>  		};
>>  
>> +		ppmu_d0_cpu: ppmu at 10480000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x10480000 0x2000>;
>> +			status = "disabled";
> 
> Why these are disabled? They have some external dependencies?

There is no any dependency. If you want to remain it always enabled,
I'm OK.

Best Regards,
Chanwoo Choi

> 
> Best regards,
> Krzysztof
> 
>> +		};
>> +
>> +		ppmu_d0_general: ppmu at 10490000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x10490000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		ppmu_d1_cpu: ppmu at 104b0000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x104b0000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		ppmu_d1_general: ppmu at 104c0000 {
>> +			compatible = "samsung,exynos-ppmu-v2";
>> +			reg = <0x104c0000 0x2000>;
>> +			status = "disabled";
>> +		};
>> +
>>  		pinctrl_alive: pinctrl at 10580000 {
>>  			compatible = "samsung,exynos5433-pinctrl";
>>  			reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
>> -- 
>> 1.9.1
>>
> 
> 
> 

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

On 2016년 12월 07일 13:12, Chanwoo Choi wrote:
> On 2016년 12월 07일 04:07, Krzysztof Kozlowski wrote:
>> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>>> to measure the utilization of each IP in Exynos SoC.
>>>
>>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>>   block with VDD_MIF power source.
>>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>>   block with VDD_INT power source.
>>>
>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>> ---
>>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>>  1 file changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> index 64226d5ae471..8c4ee84d5232 100644
>>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> @@ -599,6 +599,30 @@
>>>  			clock-names = "fin_pll", "mct";
>>>  		};
>>>  
>>> +		ppmu_d0_cpu: ppmu@10480000 {
>>> +			compatible = "samsung,exynos-ppmu-v2";
>>> +			reg = <0x10480000 0x2000>;
>>> +			status = "disabled";
>>
>> Why these are disabled? They have some external dependencies?
> 
> There is no any dependency. If you want to remain it always enabled,
> I'm OK.

One more comment. Each PPMU has the four events which is used for devfreq driver
to get the utilization. If I remove the 'status = "disabled"' from exynos5433.dtsi,
first probe of PPMU device is fail on case1.

Case1. Disable PPMU device and then enable it on exynos5433-tm2.dts
[    2.560126] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
[    2.565957] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)

Case2. Enable PPMU device always. First probe is failed and then second probe is successful.
[    2.898781] exynos-ppmu 10480000.ppmu: failed to get child node of devfreq-event devices
[    2.899077] exynos-ppmu 10480000.ppmu: failed to parse exynos ppmu dt node
[    2.899289] exynos-ppmu 10480000.ppmu: failed to parse devicetree for resource
[    2.899602] exynos-ppmu: probe of 10480000.ppmu failed with error -22
[    2.905364] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
[    2.913535] exynos-ppmu 104b0000.ppmu: failed to get child node of devfreq-event devices
[    2.921402] exynos-ppmu 104b0000.ppmu: failed to parse exynos ppmu dt node
[    2.928250] exynos-ppmu 104b0000.ppmu: failed to parse devicetree for resource
[    2.935571] exynos-ppmu: probe of 104b0000.ppmu failed with error -22
[    2.942144] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)


Best Regards,
Chanwoo Choi

[snip]

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

On 2016년 12월 07일 13:12, Chanwoo Choi wrote:
> On 2016년 12월 07일 04:07, Krzysztof Kozlowski wrote:
>> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>>> to measure the utilization of each IP in Exynos SoC.
>>>
>>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>>   block with VDD_MIF power source.
>>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>>   block with VDD_INT power source.
>>>
>>> Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
>>> ---
>>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>>  1 file changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> index 64226d5ae471..8c4ee84d5232 100644
>>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> @@ -599,6 +599,30 @@
>>>  			clock-names = "fin_pll", "mct";
>>>  		};
>>>  
>>> +		ppmu_d0_cpu: ppmu@10480000 {
>>> +			compatible = "samsung,exynos-ppmu-v2";
>>> +			reg = <0x10480000 0x2000>;
>>> +			status = "disabled";
>>
>> Why these are disabled? They have some external dependencies?
> 
> There is no any dependency. If you want to remain it always enabled,
> I'm OK.

One more comment. Each PPMU has the four events which is used for devfreq driver
to get the utilization. If I remove the 'status = "disabled"' from exynos5433.dtsi,
first probe of PPMU device is fail on case1.

Case1. Disable PPMU device and then enable it on exynos5433-tm2.dts
[    2.560126] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
[    2.565957] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)

Case2. Enable PPMU device always. First probe is failed and then second probe is successful.
[    2.898781] exynos-ppmu 10480000.ppmu: failed to get child node of devfreq-event devices
[    2.899077] exynos-ppmu 10480000.ppmu: failed to parse exynos ppmu dt node
[    2.899289] exynos-ppmu 10480000.ppmu: failed to parse devicetree for resource
[    2.899602] exynos-ppmu: probe of 10480000.ppmu failed with error -22
[    2.905364] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
[    2.913535] exynos-ppmu 104b0000.ppmu: failed to get child node of devfreq-event devices
[    2.921402] exynos-ppmu 104b0000.ppmu: failed to parse exynos ppmu dt node
[    2.928250] exynos-ppmu 104b0000.ppmu: failed to parse devicetree for resource
[    2.935571] exynos-ppmu: probe of 104b0000.ppmu failed with error -22
[    2.942144] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)


Best Regards,
Chanwoo Choi

[snip]

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[PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Chanwoo Choi]

On 2016? 12? 07? 13:12, Chanwoo Choi wrote:
> On 2016? 12? 07? 04:07, Krzysztof Kozlowski wrote:
>> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>>> to measure the utilization of each IP in Exynos SoC.
>>>
>>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>>   block with VDD_MIF power source.
>>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>>   block with VDD_INT power source.
>>>
>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>> ---
>>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>>  1 file changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> index 64226d5ae471..8c4ee84d5232 100644
>>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>> @@ -599,6 +599,30 @@
>>>  			clock-names = "fin_pll", "mct";
>>>  		};
>>>  
>>> +		ppmu_d0_cpu: ppmu at 10480000 {
>>> +			compatible = "samsung,exynos-ppmu-v2";
>>> +			reg = <0x10480000 0x2000>;
>>> +			status = "disabled";
>>
>> Why these are disabled? They have some external dependencies?
> 
> There is no any dependency. If you want to remain it always enabled,
> I'm OK.

One more comment. Each PPMU has the four events which is used for devfreq driver
to get the utilization. If I remove the 'status = "disabled"' from exynos5433.dtsi,
first probe of PPMU device is fail on case1.

Case1. Disable PPMU device and then enable it on exynos5433-tm2.dts
[    2.560126] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
[    2.565957] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)

Case2. Enable PPMU device always. First probe is failed and then second probe is successful.
[    2.898781] exynos-ppmu 10480000.ppmu: failed to get child node of devfreq-event devices
[    2.899077] exynos-ppmu 10480000.ppmu: failed to parse exynos ppmu dt node
[    2.899289] exynos-ppmu 10480000.ppmu: failed to parse devicetree for resource
[    2.899602] exynos-ppmu: probe of 10480000.ppmu failed with error -22
[    2.905364] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
[    2.913535] exynos-ppmu 104b0000.ppmu: failed to get child node of devfreq-event devices
[    2.921402] exynos-ppmu 104b0000.ppmu: failed to parse exynos ppmu dt node
[    2.928250] exynos-ppmu 104b0000.ppmu: failed to parse devicetree for resource
[    2.935571] exynos-ppmu: probe of 104b0000.ppmu failed with error -22
[    2.942144] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)


Best Regards,
Chanwoo Choi

[snip]

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Krzysztof Kozlowski]

On Wed, Dec 7, 2016 at 7:54 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote:
> On 2016년 12월 07일 13:12, Chanwoo Choi wrote:
>> On 2016년 12월 07일 04:07, Krzysztof Kozlowski wrote:
>>> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>>>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>>>> to measure the utilization of each IP in Exynos SoC.
>>>>
>>>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>>>   block with VDD_MIF power source.
>>>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>>>   block with VDD_INT power source.
>>>>
>>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>>> ---
>>>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>>>  1 file changed, 24 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> index 64226d5ae471..8c4ee84d5232 100644
>>>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> @@ -599,6 +599,30 @@
>>>>                     clock-names = "fin_pll", "mct";
>>>>             };
>>>>
>>>> +           ppmu_d0_cpu: ppmu@10480000 {
>>>> +                   compatible = "samsung,exynos-ppmu-v2";
>>>> +                   reg = <0x10480000 0x2000>;
>>>> +                   status = "disabled";
>>>
>>> Why these are disabled? They have some external dependencies?
>>
>> There is no any dependency. If you want to remain it always enabled,
>> I'm OK.
>
> One more comment. Each PPMU has the four events which is used for devfreq driver
> to get the utilization. If I remove the 'status = "disabled"' from exynos5433.dtsi,
> first probe of PPMU device is fail on case1.
>
> Case1. Disable PPMU device and then enable it on exynos5433-tm2.dts
> [    2.560126] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
> [    2.565957] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)
>
> Case2. Enable PPMU device always. First probe is failed and then second probe is successful.
> [    2.898781] exynos-ppmu 10480000.ppmu: failed to get child node of devfreq-event devices
> [    2.899077] exynos-ppmu 10480000.ppmu: failed to parse exynos ppmu dt node
> [    2.899289] exynos-ppmu 10480000.ppmu: failed to parse devicetree for resource
> [    2.899602] exynos-ppmu: probe of 10480000.ppmu failed with error -22
> [    2.905364] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
> [    2.913535] exynos-ppmu 104b0000.ppmu: failed to get child node of devfreq-event devices
> [    2.921402] exynos-ppmu 104b0000.ppmu: failed to parse exynos ppmu dt node
> [    2.928250] exynos-ppmu 104b0000.ppmu: failed to parse devicetree for resource
> [    2.935571] exynos-ppmu: probe of 104b0000.ppmu failed with error -22
> [    2.942144] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)

I got it, so leaving it as disabled makes sense. For the reference:
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

Re: [PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Krzysztof Kozlowski]

On Wed, Dec 7, 2016 at 7:54 AM, Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:
> On 2016년 12월 07일 13:12, Chanwoo Choi wrote:
>> On 2016년 12월 07일 04:07, Krzysztof Kozlowski wrote:
>>> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>>>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>>>> to measure the utilization of each IP in Exynos SoC.
>>>>
>>>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>>>   block with VDD_MIF power source.
>>>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>>>   block with VDD_INT power source.
>>>>
>>>> Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
>>>> ---
>>>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>>>  1 file changed, 24 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> index 64226d5ae471..8c4ee84d5232 100644
>>>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> @@ -599,6 +599,30 @@
>>>>                     clock-names = "fin_pll", "mct";
>>>>             };
>>>>
>>>> +           ppmu_d0_cpu: ppmu@10480000 {
>>>> +                   compatible = "samsung,exynos-ppmu-v2";
>>>> +                   reg = <0x10480000 0x2000>;
>>>> +                   status = "disabled";
>>>
>>> Why these are disabled? They have some external dependencies?
>>
>> There is no any dependency. If you want to remain it always enabled,
>> I'm OK.
>
> One more comment. Each PPMU has the four events which is used for devfreq driver
> to get the utilization. If I remove the 'status = "disabled"' from exynos5433.dtsi,
> first probe of PPMU device is fail on case1.
>
> Case1. Disable PPMU device and then enable it on exynos5433-tm2.dts
> [    2.560126] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
> [    2.565957] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)
>
> Case2. Enable PPMU device always. First probe is failed and then second probe is successful.
> [    2.898781] exynos-ppmu 10480000.ppmu: failed to get child node of devfreq-event devices
> [    2.899077] exynos-ppmu 10480000.ppmu: failed to parse exynos ppmu dt node
> [    2.899289] exynos-ppmu 10480000.ppmu: failed to parse devicetree for resource
> [    2.899602] exynos-ppmu: probe of 10480000.ppmu failed with error -22
> [    2.905364] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
> [    2.913535] exynos-ppmu 104b0000.ppmu: failed to get child node of devfreq-event devices
> [    2.921402] exynos-ppmu 104b0000.ppmu: failed to parse exynos ppmu dt node
> [    2.928250] exynos-ppmu 104b0000.ppmu: failed to parse devicetree for resource
> [    2.935571] exynos-ppmu: probe of 104b0000.ppmu failed with error -22
> [    2.942144] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)

I got it, so leaving it as disabled makes sense. For the reference:
Reviewed-by: Krzysztof Kozlowski <krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Best regards,
Krzysztof
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[PATCH 3/5] arm64: dts: exynos5433: Add PPMU dt node

[Krzysztof Kozlowski]

On Wed, Dec 7, 2016 at 7:54 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote:
> On 2016? 12? 07? 13:12, Chanwoo Choi wrote:
>> On 2016? 12? 07? 04:07, Krzysztof Kozlowski wrote:
>>> On Fri, Dec 02, 2016 at 04:18:05PM +0900, Chanwoo Choi wrote:
>>>> This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
>>>> to measure the utilization of each IP in Exynos SoC.
>>>>
>>>> - PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
>>>>   block with VDD_MIF power source.
>>>> - PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
>>>>   block with VDD_INT power source.
>>>>
>>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>>> ---
>>>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++++++++++
>>>>  1 file changed, 24 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> index 64226d5ae471..8c4ee84d5232 100644
>>>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>>> @@ -599,6 +599,30 @@
>>>>                     clock-names = "fin_pll", "mct";
>>>>             };
>>>>
>>>> +           ppmu_d0_cpu: ppmu at 10480000 {
>>>> +                   compatible = "samsung,exynos-ppmu-v2";
>>>> +                   reg = <0x10480000 0x2000>;
>>>> +                   status = "disabled";
>>>
>>> Why these are disabled? They have some external dependencies?
>>
>> There is no any dependency. If you want to remain it always enabled,
>> I'm OK.
>
> One more comment. Each PPMU has the four events which is used for devfreq driver
> to get the utilization. If I remove the 'status = "disabled"' from exynos5433.dtsi,
> first probe of PPMU device is fail on case1.
>
> Case1. Disable PPMU device and then enable it on exynos5433-tm2.dts
> [    2.560126] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
> [    2.565957] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)
>
> Case2. Enable PPMU device always. First probe is failed and then second probe is successful.
> [    2.898781] exynos-ppmu 10480000.ppmu: failed to get child node of devfreq-event devices
> [    2.899077] exynos-ppmu 10480000.ppmu: failed to parse exynos ppmu dt node
> [    2.899289] exynos-ppmu 10480000.ppmu: failed to parse devicetree for resource
> [    2.899602] exynos-ppmu: probe of 10480000.ppmu failed with error -22
> [    2.905364] exynos-ppmu: new PPMU device registered 10490000.ppmu (ppmu-event0-d0-general)
> [    2.913535] exynos-ppmu 104b0000.ppmu: failed to get child node of devfreq-event devices
> [    2.921402] exynos-ppmu 104b0000.ppmu: failed to parse exynos ppmu dt node
> [    2.928250] exynos-ppmu 104b0000.ppmu: failed to parse devicetree for resource
> [    2.935571] exynos-ppmu: probe of 104b0000.ppmu failed with error -22
> [    2.942144] exynos-ppmu: new PPMU device registered 104c0000.ppmu (ppmu-event0-d1-general)

I got it, so leaving it as disabled makes sense. For the reference:
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

Re: [PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Chanwoo Choi]

On 2016년 12월 07일 04:21, Krzysztof Kozlowski wrote:
> On Fri, Dec 02, 2016 at 04:18:06PM +0900, Chanwoo Choi wrote:
>> This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
>> Exynos5433 has the following AMBA AXI buses to translate data
>> between DRAM and sub-blocks.
>>
>> Following list specify the detailed correlation between sub-block and clock:
>> - CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
>> - CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
>> - CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
>> - CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
>> - CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
>> - CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
>> - CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
>> - CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
>> - CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
>>  2 files changed, 209 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>> new file mode 100644
>> index 000000000000..b1e1d9c622e1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>> @@ -0,0 +1,208 @@
>> +/*
>> + * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
>> + *
>> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
>> + * Chanwoo Choi <cw00.choi@samsung.com>
>> + *
>> + * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
>> + * as device tree nodes are listed in this file.
> 
> This duplicates the introduction line and does not make sense.

I'll remove it.

> 
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +/ {
> 
> Shouldn't these be under soc node? It looks like property of SoC itself.

OK. Move to them under SoC.
- "/ {" -> "&soc {"

> 
>> +	/* INT (Internal) block using VDD_INT */
>> +	bus_g2d_400: bus_g2d_400 {
> 
> In node name, the dash '-' is preferred. The name should describe
> general class of device so probably this should be just "bus"... but I
> don't see a way how to do it reasonable anyway.

I'll change them as following with 'busX'.

The each dt node has the unique number('X')
because each dt node does not have the base address
and then need to identify oneself.

	bus_g2d_400: bus0 {
	bus_g2d_266: bus1 {
	bus_gscl: bus2 {
	bus_hevc: bus3 {
	bus_jpeg: bus4 {
	bus_mfc: bus5 {
	bus_mscl: bus6 {
	bus_noc0: bus7 {
	bus_noc1: bus8 {
	bus_noc2: bus9 {

> 
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_G2D_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
> 
> Hm?

I'll fix it. disable -> disabled

> 
> 
>> +	};
>> +
>> +	bus_mscl: bus_mscl {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_jpeg: bus_jpeg {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_mfc: bus_mfc {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_MFC_400>;
>> +
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_g2d_266: bus_g2d_266 {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_G2D_266>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_266_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_gscl: bus_gscl {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_gscl_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_hevc: bus_hevc {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_hevc_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_bus0: bus_bus0 {
> 
> bus, bus, bus, bus, jackpot! Let's try to find better name and label for
> these. :)

I'll change the name with 'noc' prefix because this bus is used
for NoC (Network On Chip)'s bus clock as commit msg.
- old : bus_bus0
- new : bus_noc0


Best Regards,
Chanwoo Choi

Re: [PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Chanwoo Choi]

On 2016년 12월 07일 04:21, Krzysztof Kozlowski wrote:
> On Fri, Dec 02, 2016 at 04:18:06PM +0900, Chanwoo Choi wrote:
>> This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
>> Exynos5433 has the following AMBA AXI buses to translate data
>> between DRAM and sub-blocks.
>>
>> Following list specify the detailed correlation between sub-block and clock:
>> - CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
>> - CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
>> - CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
>> - CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
>> - CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
>> - CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
>> - CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
>> - CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
>> - CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
>>  2 files changed, 209 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>> new file mode 100644
>> index 000000000000..b1e1d9c622e1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>> @@ -0,0 +1,208 @@
>> +/*
>> + * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
>> + *
>> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
>> + * Chanwoo Choi <cw00.choi@samsung.com>
>> + *
>> + * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
>> + * as device tree nodes are listed in this file.
> 
> This duplicates the introduction line and does not make sense.

I'll remove it.

> 
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +/ {
> 
> Shouldn't these be under soc node? It looks like property of SoC itself.

OK. Move to them under SoC.
- "/ {" -> "&soc {"

> 
>> +	/* INT (Internal) block using VDD_INT */
>> +	bus_g2d_400: bus_g2d_400 {
> 
> In node name, the dash '-' is preferred. The name should describe
> general class of device so probably this should be just "bus"... but I
> don't see a way how to do it reasonable anyway.

I'll change them as following with 'busX'.

The each dt node has the unique number('X')
because each dt node does not have the base address
and then need to identify oneself.

	bus_g2d_400: bus0 {
	bus_g2d_266: bus1 {
	bus_gscl: bus2 {
	bus_hevc: bus3 {
	bus_jpeg: bus4 {
	bus_mfc: bus5 {
	bus_mscl: bus6 {
	bus_noc0: bus7 {
	bus_noc1: bus8 {
	bus_noc2: bus9 {

> 
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_G2D_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
> 
> Hm?

I'll fix it. disable -> disabled

> 
> 
>> +	};
>> +
>> +	bus_mscl: bus_mscl {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_jpeg: bus_jpeg {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_mfc: bus_mfc {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_MFC_400>;
>> +
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_g2d_266: bus_g2d_266 {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_G2D_266>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_266_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_gscl: bus_gscl {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_gscl_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_hevc: bus_hevc {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_hevc_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_bus0: bus_bus0 {
> 
> bus, bus, bus, bus, jackpot! Let's try to find better name and label for
> these. :)

I'll change the name with 'noc' prefix because this bus is used
for NoC (Network On Chip)'s bus clock as commit msg.
- old : bus_bus0
- new : bus_noc0


Best Regards,
Chanwoo Choi

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[PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433

[Chanwoo Choi]

On 2016? 12? 07? 04:21, Krzysztof Kozlowski wrote:
> On Fri, Dec 02, 2016 at 04:18:06PM +0900, Chanwoo Choi wrote:
>> This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
>> Exynos5433 has the following AMBA AXI buses to translate data
>> between DRAM and sub-blocks.
>>
>> Following list specify the detailed correlation between sub-block and clock:
>> - CLK_ACLK_G2D_{400|266}  : Bus clock for G2D
>> - CLK_ACLK_MSCL_400       : Bus clock for MSCL (Mobile Scaler)
>> - CLK_ACLK_GSCL_333       : Bus clock for GSCL (General Scaler)
>> - CLK_SCLK_JPEG_MSCL      : Bus clock for JPEG
>> - CLK_ACLK_MFC_400        : Bus clock for MFC (Multi Format Codec)
>> - CLK_ACLK_HEVC_400       : Bus clock for HEVC (High Effective Video Codec)
>> - CLK_ACLK_BUS0_400       : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL
>> - CLK_ACLK_BUS1_400       : NoC's bus clock for MFC/HEVC/G3D
>> - CLK_ACLK_BUS2_400       : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi     |   1 +
>>  2 files changed, 209 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>> new file mode 100644
>> index 000000000000..b1e1d9c622e1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
>> @@ -0,0 +1,208 @@
>> +/*
>> + * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
>> + *
>> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
>> + * Chanwoo Choi <cw00.choi@samsung.com>
>> + *
>> + * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed
>> + * as device tree nodes are listed in this file.
> 
> This duplicates the introduction line and does not make sense.

I'll remove it.

> 
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +/ {
> 
> Shouldn't these be under soc node? It looks like property of SoC itself.

OK. Move to them under SoC.
- "/ {" -> "&soc {"

> 
>> +	/* INT (Internal) block using VDD_INT */
>> +	bus_g2d_400: bus_g2d_400 {
> 
> In node name, the dash '-' is preferred. The name should describe
> general class of device so probably this should be just "bus"... but I
> don't see a way how to do it reasonable anyway.

I'll change them as following with 'busX'.

The each dt node has the unique number('X')
because each dt node does not have the base address
and then need to identify oneself.

	bus_g2d_400: bus0 {
	bus_g2d_266: bus1 {
	bus_gscl: bus2 {
	bus_hevc: bus3 {
	bus_jpeg: bus4 {
	bus_mfc: bus5 {
	bus_mscl: bus6 {
	bus_noc0: bus7 {
	bus_noc1: bus8 {
	bus_noc2: bus9 {

> 
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_G2D_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
> 
> Hm?

I'll fix it. disable -> disabled

> 
> 
>> +	};
>> +
>> +	bus_mscl: bus_mscl {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_jpeg: bus_jpeg {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_mfc: bus_mfc {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_MFC_400>;
>> +
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_400_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_g2d_266: bus_g2d_266 {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_G2D_266>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_g2d_266_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_gscl: bus_gscl {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_gscl_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_hevc: bus_hevc {
>> +		compatible = "samsung,exynos-bus";
>> +		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
>> +		clock-names = "bus";
>> +		operating-points-v2 = <&bus_hevc_opp_table>;
>> +		status ="disable";
>> +	};
>> +
>> +	bus_bus0: bus_bus0 {
> 
> bus, bus, bus, bus, jackpot! Let's try to find better name and label for
> these. :)

I'll change the name with 'noc' prefix because this bus is used
for NoC (Network On Chip)'s bus clock as commit msg.
- old : bus_bus0
- new : bus_noc0


Best Regards,
Chanwoo Choi