[PATCH v2 0/5] ARM: shmobile: R-Car Gen2: Allow booting secondary CPU cores in debug mode

[PATCH v2 0/5] ARM: shmobile: R-Car Gen2: Allow booting secondary CPU cores in debug mode

[Geert Uytterhoeven]

	Hi Simon, Magnus,

This patch series allows booting secondary CPU cores on R-Car Gen2 when
hardware debug mode is enabled. In this mode, reset requests derived
from power-shutoff to the AP-system CPU cores must be enabled before the
AP-system CPU cores resume from power-shutoff for the first time.
Else resume may fail, causing the system to hang during boot.
Currently we avoid the hang by prohibiting booting secondary CPU cores
when hardware debug mode is enabled (except on legacy r8a7790, see
below).

On all R-Car Gen2 SoCs, hardware debug mode is enabled by setting
MD21=1.  On both Koelsch and Lager, this is done by setting mode switch
SW8-4 to OFF.

Unfortunately the hang is not easy to reproduce: I only saw it (on
Koelsch) during real cold boot (power off during the night), and even
then it's not guaranteed to trigger. Pressing the reset button
afterwards recovers the system, and a subsequent boot will succeed
(incl. secondary CPU core boot).

This series configures the reset requests as documented in the R-Car
Gen2 datasheet, and removes the check for MD21 during secondary CPU
bringup.  It was inspired by CPU-specific patches in the BSP by
Nakamura-san.

And finally, we get rid of reading the Mode Monitoring register using
hardcoded addresses in platform code!

This series also fixes a minor regression introduced by adding the
"renesas,apmu" enable-method on Lager, where secondary CPU cores are no
longer available when hardware debug mode is enabled.

This has been boot-tested on r8a7791/koelsch (both debug mode and normal
mode), on r8a7790/lager, r8a7792/blanche, and r8a7793/gose (normal mode
only), and on r8a7794/alt (normal mode UP only).  Its core parts have
been in renesas-drivers since renesas-drivers-2016-09-06-v4.8-rc5.

Changes compared to v1:
  - Add Tested-by,
  - New patch "ARM: shmobile: rcar-gen2: Remove unused
    rcar_gen2_read_mode_pins()".

This series is against renesas-devel-20161202-v4.9-rc7, with my
"rcar-rst" branch merged in, which resulted in a merge conflict.
The latter dependency is present in clk-next, and expected to land
upstream in v4.10-rc1.

For your convenience (and for conflict resolution), this series is also
available in the topic/rcar-secondary-booting-in-debug-mode-v2 branch of
my renesas-drivers git repository at
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git

Thanks for applying!

Geert Uytterhoeven (5):
  ARM: shmobile: apmu: Add more register documentation
  ARM: shmobile: apmu: Add debug resource reset for secondary CPU boot
  ARM: shmobile: apmu: Allow booting secondary CPU cores in debug mode
  ARM: shmobile: r8a7791: Allow booting secondary CPU cores in debug
    mode
  ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()

 arch/arm/mach-shmobile/platsmp-apmu.c    | 41 +++++++++++++++++++-------------
 arch/arm/mach-shmobile/rcar-gen2.h       |  2 --
 arch/arm/mach-shmobile/setup-rcar-gen2.c | 18 --------------
 arch/arm/mach-shmobile/smp-r8a7791.c     | 14 +----------
 4 files changed, 25 insertions(+), 50 deletions(-)

-- 
1.9.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH v2 1/5] ARM: shmobile: apmu: Add more register documentation

[Geert Uytterhoeven]

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
---
v2:
  - Add Tested-by.
---
 arch/arm/mach-shmobile/platsmp-apmu.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 0c6bb458b7a45128..933f9b9024050223 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -31,9 +31,15 @@
 	int bit;
 } apmu_cpus[NR_CPUS];
 
-#define WUPCR_OFFS 0x10
-#define PSTR_OFFS 0x40
-#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
+#define WUPCR_OFFS	 0x10		/* Wake Up Control Register */
+#define PSTR_OFFS	 0x40		/* Power Status Register */
+#define CPUNCR_OFFS(n)	(0x100 + (0x10 * (n)))
+					/* CPUn Power Status Control Register */
+
+/* Power Status Register */
+#define CPUNST(r, n)	(((r) >> (n * 4)) & 3)	/* CPUn Status Bit */
+#define CPUST_RUN	0		/* Run Mode */
+#define CPUST_STANDBY	3		/* CoreStandby Mode */
 
 static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
 {
@@ -59,7 +65,7 @@ static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
 	int k;
 
 	for (k = 0; k < 1000; k++) {
-		if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3)
+		if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
 			return 1;
 
 		mdelay(1);
-- 
1.9.1

[PATCH v2 2/5] ARM: shmobile: apmu: Add debug resource reset for secondary CPU boot

[Geert Uytterhoeven]

In debug mode (MD21=1), reset requests derived from power-shutoff to the
AP-system CPU cores must be enabled before the AP-system CPU cores
resume from power-shutoff for the first time. Else resume may fail,
causing the system to hang during boot.

As setting these bits is a no-op in normal mode, there's no need to
check the actual state of MD21 first.

Inspired by CPU-specific patches in the BSP by Hisashi Nakamura
<hisashi.nakamura.ak@renesas.com>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
---
v2:
  - Add Tested-by.
---
 arch/arm/mach-shmobile/platsmp-apmu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 933f9b9024050223..7e4ca6788be521dc 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -35,12 +35,18 @@
 #define PSTR_OFFS	 0x40		/* Power Status Register */
 #define CPUNCR_OFFS(n)	(0x100 + (0x10 * (n)))
 					/* CPUn Power Status Control Register */
+#define DBGRCR_OFFS	0x180		/* Debug Resource Reset Control Reg. */
 
 /* Power Status Register */
 #define CPUNST(r, n)	(((r) >> (n * 4)) & 3)	/* CPUn Status Bit */
 #define CPUST_RUN	0		/* Run Mode */
 #define CPUST_STANDBY	3		/* CoreStandby Mode */
 
+/* Debug Resource Reset Control Register */
+#define DBGCPUREN	BIT(24)		/* CPU Other Reset Request Enable */
+#define DBGCPUNREN(n)	BIT((n) + 20)	/* CPUn Reset Request Enable */
+#define DBGCPUPREN	BIT(19)		/* CPU Peripheral Reset Req. Enable */
+
 static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
 {
 	/* request power on */
@@ -84,6 +90,8 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu)
 #ifdef CONFIG_SMP
 static void apmu_init_cpu(struct resource *res, int cpu, int bit)
 {
+	u32 x;
+
 	if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
 		return;
 
@@ -91,6 +99,11 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit)
 	apmu_cpus[cpu].bit = bit;
 
 	pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res);
+
+	/* Setup for debug mode */
+	x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS);
+	x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN;
+	writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS);
 }
 
 static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
-- 
1.9.1

[PATCH v2 3/5] ARM: shmobile: apmu: Allow booting secondary CPU cores in debug mode

[Geert Uytterhoeven]

Now debug resource reset is handled properly, allow booting secondary
CPU cores when hardware debug mode is enabled (MD21=1) on SoCs using the
"renesas,apmu" enable method.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
---
v2:
  - Add Tested-by.
---
 arch/arm/mach-shmobile/platsmp-apmu.c | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 7e4ca6788be521dc..e19266844e16126b 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -216,21 +216,9 @@ static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
 	rcar_gen2_pm_init();
 }
 
-static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
-						 struct task_struct *idle)
-{
-	/* Error out when hardware debug mode is enabled */
-	if (rcar_gen2_read_mode_pins() & BIT(21)) {
-		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
-		return -ENOTSUPP;
-	}
-
-	return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
 static struct smp_operations apmu_smp_ops __initdata = {
 	.smp_prepare_cpus	= shmobile_smp_apmu_prepare_cpus_dt,
-	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary_md21,
+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
 	.cpu_can_disable	= shmobile_smp_cpu_can_disable,
 	.cpu_die		= shmobile_smp_apmu_cpu_die,
-- 
1.9.1

[PATCH v2 4/5] ARM: shmobile: r8a7791: Allow booting secondary CPU cores in debug mode

[Geert Uytterhoeven]

Now debug resource reset is handled properly, allow booting secondary
CPU cores when hardware debug mode is enabled (MD21=1, SW8-4=OFF on
koelsch) on legacy r8a7791.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - No changes.
---
 arch/arm/mach-shmobile/smp-r8a7791.c | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index 2d6417af73b5b722..2948c22cfc53026c 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -42,21 +42,9 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
 	rcar_gen2_pm_init();
 }
 
-static int r8a7791_smp_boot_secondary(unsigned int cpu,
-				      struct task_struct *idle)
-{
-	/* Error out when hardware debug mode is enabled */
-	if (rcar_gen2_read_mode_pins() & BIT(21)) {
-		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
-		return -ENOTSUPP;
-	}
-
-	return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
 const struct smp_operations r8a7791_smp_ops __initconst = {
 	.smp_prepare_cpus	= r8a7791_smp_prepare_cpus,
-	.smp_boot_secondary	= r8a7791_smp_boot_secondary,
+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
 	.cpu_can_disable	= shmobile_smp_cpu_can_disable,
 	.cpu_die		= shmobile_smp_apmu_cpu_die,
-- 
1.9.1

[PATCH v2 5/5] ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()

[Geert Uytterhoeven]

After
  1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal
     frequency from DT"),
  2. commit 80951f04c3f92533 ("ARM: shmobile: rcar-gen2: Stop passing
     mode pins state to clock driver"),
  3. and handling of debug resource reset,
there are no more users of rcar_gen2_read_mode_pins() left.
Remove the function and its support definitions.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - New.
---
 arch/arm/mach-shmobile/rcar-gen2.h       |  2 --
 arch/arm/mach-shmobile/setup-rcar-gen2.c | 18 ------------------
 2 files changed, 20 deletions(-)

diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h
index 8a66b4aae03548ce..6792e249cf56d5d5 100644
--- a/arch/arm/mach-shmobile/rcar-gen2.h
+++ b/arch/arm/mach-shmobile/rcar-gen2.h
@@ -2,8 +2,6 @@
 #define __ASM_RCAR_GEN2_H__
 
 void rcar_gen2_timer_init(void);
-#define MD(nr) BIT(nr)
-u32 rcar_gen2_read_mode_pins(void);
 void rcar_gen2_reserve(void);
 void rcar_gen2_pm_init(void);
 
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index ac63fa407b6465d8..52d466b759730d74 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -29,24 +29,6 @@
 #include "common.h"
 #include "rcar-gen2.h"
 
-#define MODEMR 0xe6160060
-
-u32 rcar_gen2_read_mode_pins(void)
-{
-	static u32 mode;
-	static bool mode_valid;
-
-	if (!mode_valid) {
-		void __iomem *modemr = ioremap_nocache(MODEMR, 4);
-		BUG_ON(!modemr);
-		mode = ioread32(modemr);
-		iounmap(modemr);
-		mode_valid = true;
-	}
-
-	return mode;
-}
-
 static unsigned int __init get_extal_freq(void)
 {
 	struct device_node *cpg, *extal;
-- 
1.9.1

Re: [PATCH v2 0/5] ARM: shmobile: R-Car Gen2: Allow booting secondary CPU cores in debug mode

[Simon Horman]

On Mon, Dec 05, 2016 at 11:39:36AM +0100, Geert Uytterhoeven wrote:
> 	Hi Simon, Magnus,
> 
> This patch series allows booting secondary CPU cores on R-Car Gen2 when
> hardware debug mode is enabled. In this mode, reset requests derived
> from power-shutoff to the AP-system CPU cores must be enabled before the
> AP-system CPU cores resume from power-shutoff for the first time.
> Else resume may fail, causing the system to hang during boot.
> Currently we avoid the hang by prohibiting booting secondary CPU cores
> when hardware debug mode is enabled (except on legacy r8a7790, see
> below).
> 
> On all R-Car Gen2 SoCs, hardware debug mode is enabled by setting
> MD21=1.  On both Koelsch and Lager, this is done by setting mode switch
> SW8-4 to OFF.
> 
> Unfortunately the hang is not easy to reproduce: I only saw it (on
> Koelsch) during real cold boot (power off during the night), and even
> then it's not guaranteed to trigger. Pressing the reset button
> afterwards recovers the system, and a subsequent boot will succeed
> (incl. secondary CPU core boot).
> 
> This series configures the reset requests as documented in the R-Car
> Gen2 datasheet, and removes the check for MD21 during secondary CPU
> bringup.  It was inspired by CPU-specific patches in the BSP by
> Nakamura-san.
> 
> And finally, we get rid of reading the Mode Monitoring register using
> hardcoded addresses in platform code!
> 
> This series also fixes a minor regression introduced by adding the
> "renesas,apmu" enable-method on Lager, where secondary CPU cores are no
> longer available when hardware debug mode is enabled.
> 
> This has been boot-tested on r8a7791/koelsch (both debug mode and normal
> mode), on r8a7790/lager, r8a7792/blanche, and r8a7793/gose (normal mode
> only), and on r8a7794/alt (normal mode UP only).  Its core parts have
> been in renesas-drivers since renesas-drivers-2016-09-06-v4.8-rc5.
> 
> Changes compared to v1:
>   - Add Tested-by,
>   - New patch "ARM: shmobile: rcar-gen2: Remove unused
>     rcar_gen2_read_mode_pins()".
> 
> This series is against renesas-devel-20161202-v4.9-rc7, with my
> "rcar-rst" branch merged in, which resulted in a merge conflict.
> The latter dependency is present in clk-next, and expected to land
> upstream in v4.10-rc1.
> 
> For your convenience (and for conflict resolution), this series is also
> available in the topic/rcar-secondary-booting-in-debug-mode-v2 branch of
> my renesas-drivers git repository at
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
> 
> Thanks for applying!

Thanks, I have tentatively queued this up for v4.11.

I have pulled in the rcar-rst dependency with the expectation ttha
it will disappear when I rebase on v4.10-rc1 once it has been released.

[PATCH v2 0/5] ARM: shmobile: R-Car Gen2: Allow booting secondary CPU cores in debug mode

[Simon Horman]

On Mon, Dec 05, 2016 at 11:39:36AM +0100, Geert Uytterhoeven wrote:
> 	Hi Simon, Magnus,
> 
> This patch series allows booting secondary CPU cores on R-Car Gen2 when
> hardware debug mode is enabled. In this mode, reset requests derived
> from power-shutoff to the AP-system CPU cores must be enabled before the
> AP-system CPU cores resume from power-shutoff for the first time.
> Else resume may fail, causing the system to hang during boot.
> Currently we avoid the hang by prohibiting booting secondary CPU cores
> when hardware debug mode is enabled (except on legacy r8a7790, see
> below).
> 
> On all R-Car Gen2 SoCs, hardware debug mode is enabled by setting
> MD21=1.  On both Koelsch and Lager, this is done by setting mode switch
> SW8-4 to OFF.
> 
> Unfortunately the hang is not easy to reproduce: I only saw it (on
> Koelsch) during real cold boot (power off during the night), and even
> then it's not guaranteed to trigger. Pressing the reset button
> afterwards recovers the system, and a subsequent boot will succeed
> (incl. secondary CPU core boot).
> 
> This series configures the reset requests as documented in the R-Car
> Gen2 datasheet, and removes the check for MD21 during secondary CPU
> bringup.  It was inspired by CPU-specific patches in the BSP by
> Nakamura-san.
> 
> And finally, we get rid of reading the Mode Monitoring register using
> hardcoded addresses in platform code!
> 
> This series also fixes a minor regression introduced by adding the
> "renesas,apmu" enable-method on Lager, where secondary CPU cores are no
> longer available when hardware debug mode is enabled.
> 
> This has been boot-tested on r8a7791/koelsch (both debug mode and normal
> mode), on r8a7790/lager, r8a7792/blanche, and r8a7793/gose (normal mode
> only), and on r8a7794/alt (normal mode UP only).  Its core parts have
> been in renesas-drivers since renesas-drivers-2016-09-06-v4.8-rc5.
> 
> Changes compared to v1:
>   - Add Tested-by,
>   - New patch "ARM: shmobile: rcar-gen2: Remove unused
>     rcar_gen2_read_mode_pins()".
> 
> This series is against renesas-devel-20161202-v4.9-rc7, with my
> "rcar-rst" branch merged in, which resulted in a merge conflict.
> The latter dependency is present in clk-next, and expected to land
> upstream in v4.10-rc1.
> 
> For your convenience (and for conflict resolution), this series is also
> available in the topic/rcar-secondary-booting-in-debug-mode-v2 branch of
> my renesas-drivers git repository at
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
> 
> Thanks for applying!

Thanks, I have tentatively queued this up for v4.11.

I have pulled in the rcar-rst dependency with the expectation ttha
it will disappear when I rebase on v4.10-rc1 once it has been released.

Re: [PATCH v2 0/5] ARM: shmobile: R-Car Gen2: Allow booting secondary CPU cores in debug mode

[Geert Uytterhoeven]

Hi Simon,

On Tue, Dec 6, 2016 at 1:39 PM, Simon Horman <horms@verge.net.au> wrote:
> On Mon, Dec 05, 2016 at 11:39:36AM +0100, Geert Uytterhoeven wrote:
>> This patch series allows booting secondary CPU cores on R-Car Gen2 when
>> hardware debug mode is enabled. In this mode, reset requests derived

> Thanks, I have tentatively queued this up for v4.11.
>
> I have pulled in the rcar-rst dependency with the expectation ttha
> it will disappear when I rebase on v4.10-rc1 once it has been released.

Thank you very much!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 0/5] ARM: shmobile: R-Car Gen2: Allow booting secondary CPU cores in debug mode

[Geert Uytterhoeven]

Hi Simon,

On Tue, Dec 6, 2016 at 1:39 PM, Simon Horman <horms@verge.net.au> wrote:
> On Mon, Dec 05, 2016 at 11:39:36AM +0100, Geert Uytterhoeven wrote:
>> This patch series allows booting secondary CPU cores on R-Car Gen2 when
>> hardware debug mode is enabled. In this mode, reset requests derived

> Thanks, I have tentatively queued this up for v4.11.
>
> I have pulled in the rcar-rst dependency with the expectation ttha
> it will disappear when I rebase on v4.10-rc1 once it has been released.

Thank you very much!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds