[U-Boot] CPU Sleep in ARM Cortex A8

[U-Boot] CPU Sleep in ARM Cortex A8

[akshay ts]

Hi,
I want to know what is the instruction for sleeping in ARM Cortex A8.
I did execute a WFI instruction seems to be a NOP.
void cpu_idle()
{
    unsigned long tmp = 0;
    asm("b 1f\n\t"
            ".align 5\n\t"
            "1:\n\t"
            "mcr p15, 0, %0, c7, c10, 5\n\t"
            "mcr p15, 0, %0, c7, c10, 4\n\t"
            "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
    return;
}
The above function doesnt seem to work.
Please let me know exact instructions to follow.

Warm Regards,
Akshay


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[U-Boot] CPU Sleep in ARM Cortex A8

[Magnus Lilja]

Hi

2009/10/12 akshay ts <takshays@yahoo.co.in>:
> Hi,
> I want to know what is the instruction for sleeping in ARM Cortex A8.
> I did execute a WFI instruction seems to be a NOP.
> void cpu_idle()
> {
> ? ?unsigned long tmp = 0;
> ? ?asm("b 1f\n\t"
> ? ? ? ? ? ?".align 5\n\t"
> ? ? ? ? ? ?"1:\n\t"
> ? ? ? ? ? ?"mcr p15, 0, %0, c7, c10, 5\n\t"
> ? ? ? ? ? ?"mcr p15, 0, %0, c7, c10, 4\n\t"
> ? ? ? ? ? ?"mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
> ? ?return;
> }
> The above function doesnt seem to work.
> Please let me know exact instructions to follow.

Well, the idle-code in Linux looks like:
/*
 *      cpu_v7_do_idle()
 *
 *      Idle the processor (eg, wait for interrupt).
 *
 *      IRQs are already disabled.
 */
ENTRY(cpu_v7_do_idle)
        dsb                                     @ WFI may enter a low-power mode
        wfi
        mov     pc, lr
ENDPROC(cpu_v7_do_idle)

So you may want to try that instead.

[U-Boot] strex/ldrex compilation error while using atomic_inc u-boot

[akshay ts]

Hi all,
I am getting the following error while building using ARMV7 toolchain.

{standard input}:599: Error: selected processor does not support `ldrex r1,[r2]'
{standard input}:601: Error: selected processor does not support `strex r3,r1,[r2]'

For example the following code uses strex and ldrex but it is not specified which register to use.
atomic_inc in turn uses ->

static inline int atomic_add_return(int i, atomic_t *v)
{
    unsigned long tmp;
    int result;

    __asm__ __volatile__("@ atomic_add_return\n"
"1: ldrex   %0, [%2]\n"
"   add %0, %0, %3\n"
"   strex   %1, %0, [%2]\n"
"   teq %1, #0\n"
"   bne 1b"
    : "=&r" (result), "=&r" (tmp)
    : "r" (&v->counter), "Ir" (i)
    : "cc");

    return result;
}


According to arm architecture reference manual strex/ldrex are valid for ARMV6 and above. 

The above code i copied from kernel and it is building in kernel.

I dont know how to solve this issue Any toolchain specific CFLAGS/attributes i need to set/unset. Please Help

Warm Regards,
Akshay



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