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From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Chen-Yu Tsai <wens@csie.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org
Subject: [PATCH 2/3] arm64: dts: sun50i: add UART1 pin nodes
Date: Tue, 10 Jan 2017 01:22:32 +0000	[thread overview]
Message-ID: <1484011353-21480-3-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1484011353-21480-1-git-send-email-andre.przywara@arm.com>

On many boards UART1 connects to a Bluetooth chip, so add the pinctrl
nodes for the only pins providing access to that UART. That includes
those pins for hardware flow control (RTS/CTS).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index f46ae96..419b0b1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -234,6 +234,16 @@
 				pins = "PB8", "PB9";
 				function = "uart0";
 			};
+
+			uart1_pins: uart1_pins {
+				pins = "PG6", "PG7";
+				function = "uart1";
+			};
+
+			uart1_rts_cts_pins: uart1_rts_cts_pins {
+				pins = "PG8", "PG9";
+				function = "uart1";
+			};
 		};
 
 		uart0: serial@1c28000 {
-- 
2.8.2

WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
To: Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 2/3] arm64: dts: sun50i: add UART1 pin nodes
Date: Tue, 10 Jan 2017 01:22:32 +0000	[thread overview]
Message-ID: <1484011353-21480-3-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1484011353-21480-1-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>

On many boards UART1 connects to a Bluetooth chip, so add the pinctrl
nodes for the only pins providing access to that UART. That includes
those pins for hardware flow control (RTS/CTS).

Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index f46ae96..419b0b1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -234,6 +234,16 @@
 				pins = "PB8", "PB9";
 				function = "uart0";
 			};
+
+			uart1_pins: uart1_pins {
+				pins = "PG6", "PG7";
+				function = "uart1";
+			};
+
+			uart1_rts_cts_pins: uart1_rts_cts_pins {
+				pins = "PG8", "PG9";
+				function = "uart1";
+			};
 		};
 
 		uart0: serial@1c28000 {
-- 
2.8.2

WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] arm64: dts: sun50i: add UART1 pin nodes
Date: Tue, 10 Jan 2017 01:22:32 +0000	[thread overview]
Message-ID: <1484011353-21480-3-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1484011353-21480-1-git-send-email-andre.przywara@arm.com>

On many boards UART1 connects to a Bluetooth chip, so add the pinctrl
nodes for the only pins providing access to that UART. That includes
those pins for hardware flow control (RTS/CTS).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index f46ae96..419b0b1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -234,6 +234,16 @@
 				pins = "PB8", "PB9";
 				function = "uart0";
 			};
+
+			uart1_pins: uart1_pins {
+				pins = "PG6", "PG7";
+				function = "uart1";
+			};
+
+			uart1_rts_cts_pins: uart1_rts_cts_pins {
+				pins = "PG8", "PG9";
+				function = "uart1";
+			};
 		};
 
 		uart0: serial at 1c28000 {
-- 
2.8.2

  parent reply	other threads:[~2017-01-10  1:23 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-10  1:22 [PATCH 0/3] arm64: dts: A64 board MMC support Andre Przywara
2017-01-10  1:22 ` Andre Przywara
2017-01-10  1:22 ` Andre Przywara
2017-01-10  1:22 ` [PATCH 1/3] arm64: dts: Pine64: add " Andre Przywara
2017-01-10  1:22   ` Andre Przywara
2017-01-10  1:22   ` Andre Przywara
2017-01-10  9:24   ` kbuild test robot
2017-01-10  9:24     ` kbuild test robot
2017-01-10  9:24     ` kbuild test robot
2017-01-10  1:22 ` Andre Przywara [this message]
2017-01-10  1:22   ` [PATCH 2/3] arm64: dts: sun50i: add UART1 pin nodes Andre Przywara
2017-01-10  1:22   ` Andre Przywara
2017-01-10  1:22 ` [PATCH 3/3] arm64: dts: add BananaPi-M64 support Andre Przywara
2017-01-10  1:22   ` Andre Przywara
2017-01-10  1:22   ` Andre Przywara
2017-01-10 13:37   ` kbuild test robot
2017-01-10 13:37     ` kbuild test robot
2017-01-10 13:37     ` kbuild test robot
2017-01-11 13:51 ` [PATCH 0/3] arm64: dts: A64 board MMC support Maxime Ripard
2017-01-11 13:51   ` Maxime Ripard
2017-01-11 13:51   ` Maxime Ripard
2017-01-11 14:24   ` Andre Przywara
2017-01-11 14:24     ` Andre Przywara

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