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From: Alexandre TORGUE <alexandre.torgue@st.com>
To: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Russell King <linux@armlinux.org.uk>,
	Olof Johansson <olof@lixom.net>,
	Patrice Chotard <patrice.chotard@st.com>,
	lee.jones@linaro.org
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 1/8] pinctrl: stm32: fix bad location of gpiochip_lock_as_irq
Date: Fri, 27 Jan 2017 17:15:14 +0100	[thread overview]
Message-ID: <1485533721-9019-2-git-send-email-alexandre.torgue@st.com> (raw)
In-Reply-To: <1485533721-9019-1-git-send-email-alexandre.torgue@st.com>

Move gpio lock as irq from "domain alloc" callback to "domain activate"
callback. It will allow to use gpiolib sysfs correctly.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>

diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index efc4371..b145431 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -236,6 +236,15 @@ static void stm32_gpio_domain_activate(struct irq_domain *d,
 	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
 
 	regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->range.id);
+	gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq);
+}
+
+static void stm32_gpio_domain_deactivate(struct irq_domain *d,
+				       struct irq_data *irq_data)
+{
+	struct stm32_gpio_bank *bank = d->host_data;
+
+	gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq);
 }
 
 static int stm32_gpio_domain_alloc(struct irq_domain *d,
@@ -243,11 +252,9 @@ static int stm32_gpio_domain_alloc(struct irq_domain *d,
 				   unsigned int nr_irqs, void *data)
 {
 	struct stm32_gpio_bank *bank = d->host_data;
-	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
 	struct irq_fwspec *fwspec = data;
 	struct irq_fwspec parent_fwspec;
 	irq_hw_number_t hwirq;
-	int ret;
 
 	hwirq = fwspec->param[0];
 	parent_fwspec.fwnode = d->parent->fwnode;
@@ -258,35 +265,15 @@ static int stm32_gpio_domain_alloc(struct irq_domain *d,
 	irq_domain_set_hwirq_and_chip(d, virq, hwirq, &stm32_gpio_irq_chip,
 				      bank);
 
-	ret = gpiochip_lock_as_irq(&bank->gpio_chip, hwirq);
-	if (ret) {
-		dev_err(pctl->dev, "Unable to configure STM32 %s%ld as IRQ\n",
-			bank->gpio_chip.label, hwirq);
-		return ret;
-	}
-
-	ret = irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &parent_fwspec);
-	if (ret)
-		gpiochip_unlock_as_irq(&bank->gpio_chip, hwirq);
-
-	return ret;
-}
-
-static void stm32_gpio_domain_free(struct irq_domain *d, unsigned int virq,
-				   unsigned int nr_irqs)
-{
-	struct stm32_gpio_bank *bank = d->host_data;
-	struct irq_data *data = irq_get_irq_data(virq);
-
-	irq_domain_free_irqs_common(d, virq, nr_irqs);
-	gpiochip_unlock_as_irq(&bank->gpio_chip, data->hwirq);
+	return irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &parent_fwspec);
 }
 
 static const struct irq_domain_ops stm32_gpio_domain_ops = {
 	.translate      = stm32_gpio_domain_translate,
 	.alloc          = stm32_gpio_domain_alloc,
-	.free           = stm32_gpio_domain_free,
+	.free           = irq_domain_free_irqs_common,
 	.activate	= stm32_gpio_domain_activate,
+	.deactivate	= stm32_gpio_domain_deactivate,
 };
 
 /* Pinctrl functions */
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: Alexandre TORGUE <alexandre.torgue@st.com>
To: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Russell King <linux@armlinux.org.uk>,
	Olof Johansson <olof@lixom.net>,
	Patrice Chotard <patrice.chotard@st.com>, <lee.jones@linaro.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-gpio@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH 1/8] pinctrl: stm32: fix bad location of gpiochip_lock_as_irq
Date: Fri, 27 Jan 2017 17:15:14 +0100	[thread overview]
Message-ID: <1485533721-9019-2-git-send-email-alexandre.torgue@st.com> (raw)
In-Reply-To: <1485533721-9019-1-git-send-email-alexandre.torgue@st.com>

Move gpio lock as irq from "domain alloc" callback to "domain activate"
callback. It will allow to use gpiolib sysfs correctly.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>

diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index efc4371..b145431 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -236,6 +236,15 @@ static void stm32_gpio_domain_activate(struct irq_domain *d,
 	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
 
 	regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->range.id);
+	gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq);
+}
+
+static void stm32_gpio_domain_deactivate(struct irq_domain *d,
+				       struct irq_data *irq_data)
+{
+	struct stm32_gpio_bank *bank = d->host_data;
+
+	gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq);
 }
 
 static int stm32_gpio_domain_alloc(struct irq_domain *d,
@@ -243,11 +252,9 @@ static int stm32_gpio_domain_alloc(struct irq_domain *d,
 				   unsigned int nr_irqs, void *data)
 {
 	struct stm32_gpio_bank *bank = d->host_data;
-	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
 	struct irq_fwspec *fwspec = data;
 	struct irq_fwspec parent_fwspec;
 	irq_hw_number_t hwirq;
-	int ret;
 
 	hwirq = fwspec->param[0];
 	parent_fwspec.fwnode = d->parent->fwnode;
@@ -258,35 +265,15 @@ static int stm32_gpio_domain_alloc(struct irq_domain *d,
 	irq_domain_set_hwirq_and_chip(d, virq, hwirq, &stm32_gpio_irq_chip,
 				      bank);
 
-	ret = gpiochip_lock_as_irq(&bank->gpio_chip, hwirq);
-	if (ret) {
-		dev_err(pctl->dev, "Unable to configure STM32 %s%ld as IRQ\n",
-			bank->gpio_chip.label, hwirq);
-		return ret;
-	}
-
-	ret = irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &parent_fwspec);
-	if (ret)
-		gpiochip_unlock_as_irq(&bank->gpio_chip, hwirq);
-
-	return ret;
-}
-
-static void stm32_gpio_domain_free(struct irq_domain *d, unsigned int virq,
-				   unsigned int nr_irqs)
-{
-	struct stm32_gpio_bank *bank = d->host_data;
-	struct irq_data *data = irq_get_irq_data(virq);
-
-	irq_domain_free_irqs_common(d, virq, nr_irqs);
-	gpiochip_unlock_as_irq(&bank->gpio_chip, data->hwirq);
+	return irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &parent_fwspec);
 }
 
 static const struct irq_domain_ops stm32_gpio_domain_ops = {
 	.translate      = stm32_gpio_domain_translate,
 	.alloc          = stm32_gpio_domain_alloc,
-	.free           = stm32_gpio_domain_free,
+	.free           = irq_domain_free_irqs_common,
 	.activate	= stm32_gpio_domain_activate,
+	.deactivate	= stm32_gpio_domain_deactivate,
 };
 
 /* Pinctrl functions */
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: alexandre.torgue@st.com (Alexandre TORGUE)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/8] pinctrl: stm32: fix bad location of gpiochip_lock_as_irq
Date: Fri, 27 Jan 2017 17:15:14 +0100	[thread overview]
Message-ID: <1485533721-9019-2-git-send-email-alexandre.torgue@st.com> (raw)
In-Reply-To: <1485533721-9019-1-git-send-email-alexandre.torgue@st.com>

Move gpio lock as irq from "domain alloc" callback to "domain activate"
callback. It will allow to use gpiolib sysfs correctly.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>

diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index efc4371..b145431 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -236,6 +236,15 @@ static void stm32_gpio_domain_activate(struct irq_domain *d,
 	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
 
 	regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->range.id);
+	gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq);
+}
+
+static void stm32_gpio_domain_deactivate(struct irq_domain *d,
+				       struct irq_data *irq_data)
+{
+	struct stm32_gpio_bank *bank = d->host_data;
+
+	gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq);
 }
 
 static int stm32_gpio_domain_alloc(struct irq_domain *d,
@@ -243,11 +252,9 @@ static int stm32_gpio_domain_alloc(struct irq_domain *d,
 				   unsigned int nr_irqs, void *data)
 {
 	struct stm32_gpio_bank *bank = d->host_data;
-	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
 	struct irq_fwspec *fwspec = data;
 	struct irq_fwspec parent_fwspec;
 	irq_hw_number_t hwirq;
-	int ret;
 
 	hwirq = fwspec->param[0];
 	parent_fwspec.fwnode = d->parent->fwnode;
@@ -258,35 +265,15 @@ static int stm32_gpio_domain_alloc(struct irq_domain *d,
 	irq_domain_set_hwirq_and_chip(d, virq, hwirq, &stm32_gpio_irq_chip,
 				      bank);
 
-	ret = gpiochip_lock_as_irq(&bank->gpio_chip, hwirq);
-	if (ret) {
-		dev_err(pctl->dev, "Unable to configure STM32 %s%ld as IRQ\n",
-			bank->gpio_chip.label, hwirq);
-		return ret;
-	}
-
-	ret = irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &parent_fwspec);
-	if (ret)
-		gpiochip_unlock_as_irq(&bank->gpio_chip, hwirq);
-
-	return ret;
-}
-
-static void stm32_gpio_domain_free(struct irq_domain *d, unsigned int virq,
-				   unsigned int nr_irqs)
-{
-	struct stm32_gpio_bank *bank = d->host_data;
-	struct irq_data *data = irq_get_irq_data(virq);
-
-	irq_domain_free_irqs_common(d, virq, nr_irqs);
-	gpiochip_unlock_as_irq(&bank->gpio_chip, data->hwirq);
+	return irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &parent_fwspec);
 }
 
 static const struct irq_domain_ops stm32_gpio_domain_ops = {
 	.translate      = stm32_gpio_domain_translate,
 	.alloc          = stm32_gpio_domain_alloc,
-	.free           = stm32_gpio_domain_free,
+	.free           = irq_domain_free_irqs_common,
 	.activate	= stm32_gpio_domain_activate,
+	.deactivate	= stm32_gpio_domain_deactivate,
 };
 
 /* Pinctrl functions */
-- 
1.9.1

  reply	other threads:[~2017-01-27 16:16 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-27 16:15 [PATCH 0/8] Add STM32F469 pinctrl and fix issues in STM32 pinctrl Alexandre TORGUE
2017-01-27 16:15 ` Alexandre TORGUE
2017-01-27 16:15 ` Alexandre TORGUE
2017-01-27 16:15 ` Alexandre TORGUE [this message]
2017-01-27 16:15   ` [PATCH 1/8] pinctrl: stm32: fix bad location of gpiochip_lock_as_irq Alexandre TORGUE
2017-01-27 16:15   ` Alexandre TORGUE
2017-01-30 15:15   ` Linus Walleij
2017-01-30 15:15     ` Linus Walleij
2017-01-30 15:15     ` Linus Walleij
     [not found] ` <1485533721-9019-1-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
2017-01-27 16:15   ` [PATCH 2/8] pinctrl: stm32: use gpio-ranges to declare bank range Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-01-30 15:19     ` Linus Walleij
2017-01-30 15:19       ` Linus Walleij
2017-01-30 15:19       ` Linus Walleij
2017-01-30 16:29       ` Alexandre Torgue
2017-01-30 16:29         ` Alexandre Torgue
2017-01-30 16:29         ` Alexandre Torgue
2017-02-01 15:01         ` Linus Walleij
2017-02-01 15:01           ` Linus Walleij
2017-02-01 15:01           ` Linus Walleij
2017-03-27 10:23           ` Alexandre Torgue
2017-03-27 10:23             ` Alexandre Torgue
2017-03-27 10:23             ` Alexandre Torgue
2017-01-27 16:15   ` [PATCH 3/8] Documentation: dt: Add bindings for STM32 pinctrl Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-02-01 15:04     ` Rob Herring
2017-02-01 15:04       ` Rob Herring
2017-02-06  8:45     ` Linus Walleij
2017-02-06  8:45       ` Linus Walleij
2017-02-06  8:45       ` Linus Walleij
2017-01-27 16:15   ` [PATCH 4/8] includes: dt-bindings: Rename STM32F429 pinctrl DT bindings Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-01-27 16:15   ` [PATCH 8/8] ARM: dts: stm32: create dedicated files for pinctrl definitions Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-01-27 16:15     ` Alexandre TORGUE
2017-01-27 16:15 ` [PATCH 5/8] pinctrl: stm32: Add STM32F469 MCU support Alexandre TORGUE
2017-01-27 16:15   ` Alexandre TORGUE
2017-01-27 16:15   ` Alexandre TORGUE
2017-01-27 16:15 ` [PATCH 6/8] Documentation: dt: Add new compatible to STM32 pinctrl driver bindings Alexandre TORGUE
2017-01-27 16:15   ` Alexandre TORGUE
2017-01-27 16:15   ` Alexandre TORGUE
     [not found]   ` <1485533721-9019-7-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
2017-02-01 15:06     ` Rob Herring
2017-02-01 15:06       ` Rob Herring
2017-02-01 15:06       ` Rob Herring
2017-02-01 15:58       ` Alexandre Torgue
2017-02-01 15:58         ` Alexandre Torgue
2017-02-01 15:58         ` Alexandre Torgue
     [not found]         ` <abee01c1-da4f-97b4-258a-3ab937f620eb-qxv4g6HH51o@public.gmane.org>
2017-02-06  8:46           ` Linus Walleij
2017-02-06  8:46             ` Linus Walleij
2017-02-06  8:46             ` Linus Walleij
     [not found]             ` <CACRpkdb=U+UMRqR2GKGwDzk9X_nLv0tf2dZ8LhDGceAD83LKag-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-06 11:21               ` Alexandre Torgue
2017-02-06 11:21                 ` Alexandre Torgue
2017-02-06 11:21                 ` Alexandre Torgue
2017-01-27 16:15 ` [PATCH 7/8] ARM: Kconfig: Introduce MACH_STM32F469 flag Alexandre TORGUE
2017-01-27 16:15   ` Alexandre TORGUE
2017-01-27 16:15   ` Alexandre TORGUE
2017-01-30 14:55 ` [PATCH 0/8] Add STM32F469 pinctrl and fix issues in STM32 pinctrl Alexandre Torgue
2017-01-30 14:55   ` Alexandre Torgue
2017-01-30 14:55   ` Alexandre Torgue

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