* [PATCH 0/3] drm/sti: gdp pixel clock and plane update fixes
@ 2017-02-03 9:51 Vincent Abriou
2017-02-03 9:51 ` [PATCH 1/3] drm/sti: enable gdp pixel clock in atomic_update Vincent Abriou
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Vincent Abriou @ 2017-02-03 9:51 UTC (permalink / raw)
To: dri-devel; +Cc: Yannick Fertre, Vincent Abriou, Fabien Dessenne
This patch series fix issues met around gpd plane:
- fix gdp clock selection and enabling
- fix div by zero when GDP plane is being disabled
- do not process gdp update requests with unmodified parameters
Vincent Abriou (3):
drm/sti: enable gdp pixel clock in atomic_update
drm/sti: do not set gdp pixel clock rate if mode is not set
drm/sti: do not post GDP command if no update
drivers/gpu/drm/sti/sti_gdp.c | 85 ++++++++++++++++++++++++-------------------
1 file changed, 47 insertions(+), 38 deletions(-)
--
2.7.4
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/3] drm/sti: enable gdp pixel clock in atomic_update
2017-02-03 9:51 [PATCH 0/3] drm/sti: gdp pixel clock and plane update fixes Vincent Abriou
@ 2017-02-03 9:51 ` Vincent Abriou
2017-02-03 9:51 ` [PATCH 2/3] drm/sti: do not set gdp pixel clock rate if mode is not set Vincent Abriou
2017-02-03 9:51 ` [PATCH 3/3] drm/sti: do not post GDP command if no update Vincent Abriou
2 siblings, 0 replies; 4+ messages in thread
From: Vincent Abriou @ 2017-02-03 9:51 UTC (permalink / raw)
To: dri-devel; +Cc: Yannick Fertre, Vincent Abriou, Fabien Dessenne
Set gdp pix clock rate and parent in atomic_check function and enable
it in the atomic_update only the first time.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
---
drivers/gpu/drm/sti/sti_gdp.c | 70 ++++++++++++++++++++-----------------------
1 file changed, 32 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 877d053..7255234 100644
--- a/drivers/gpu/drm/sti/sti_gdp.c
+++ b/drivers/gpu/drm/sti/sti_gdp.c
@@ -610,7 +610,6 @@ static int sti_gdp_atomic_check(struct drm_plane *drm_plane,
struct sti_plane *plane = to_sti_plane(drm_plane);
struct sti_gdp *gdp = to_sti_gdp(plane);
struct drm_crtc *crtc = state->crtc;
- struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
struct drm_framebuffer *fb = state->fb;
struct drm_crtc_state *crtc_state;
struct sti_mixer *mixer;
@@ -648,45 +647,30 @@ static int sti_gdp_atomic_check(struct drm_plane *drm_plane,
return -EINVAL;
}
- if (!gdp->vtg) {
- /* Register gdp callback */
- gdp->vtg = compo->vtg[mixer->id];
- if (sti_vtg_register_client(gdp->vtg,
- &gdp->vtg_field_nb, crtc)) {
- DRM_ERROR("Cannot register VTG notifier\n");
+ /* Set gdp clock */
+ if (gdp->clk_pix) {
+ struct clk *clkp;
+ int rate = mode->clock * 1000;
+ int res;
+
+ /*
+ * According to the mixer used, the gdp pixel clock
+ * should have a different parent clock.
+ */
+ if (mixer->id == STI_MIXER_MAIN)
+ clkp = gdp->clk_main_parent;
+ else
+ clkp = gdp->clk_aux_parent;
+
+ if (clkp)
+ clk_set_parent(gdp->clk_pix, clkp);
+
+ res = clk_set_rate(gdp->clk_pix, rate);
+ if (res < 0) {
+ DRM_ERROR("Cannot set rate (%dHz) for gdp\n",
+ rate);
return -EINVAL;
}
-
- /* Set and enable gdp clock */
- if (gdp->clk_pix) {
- struct clk *clkp;
- int rate = mode->clock * 1000;
- int res;
-
- /*
- * According to the mixer used, the gdp pixel clock
- * should have a different parent clock.
- */
- if (mixer->id == STI_MIXER_MAIN)
- clkp = gdp->clk_main_parent;
- else
- clkp = gdp->clk_aux_parent;
-
- if (clkp)
- clk_set_parent(gdp->clk_pix, clkp);
-
- res = clk_set_rate(gdp->clk_pix, rate);
- if (res < 0) {
- DRM_ERROR("Cannot set rate (%dHz) for gdp\n",
- rate);
- return -EINVAL;
- }
-
- if (clk_prepare_enable(gdp->clk_pix)) {
- DRM_ERROR("Failed to prepare/enable gdp\n");
- return -EINVAL;
- }
- }
}
DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
@@ -724,6 +708,16 @@ static void sti_gdp_atomic_update(struct drm_plane *drm_plane,
if (!crtc || !fb)
return;
+ if (!gdp->vtg) {
+ struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
+ struct sti_mixer *mixer = to_sti_mixer(crtc);
+
+ /* Register gdp callback */
+ gdp->vtg = compo->vtg[mixer->id];
+ sti_vtg_register_client(gdp->vtg, &gdp->vtg_field_nb, crtc);
+ clk_prepare_enable(gdp->clk_pix);
+ }
+
mode = &crtc->mode;
dst_x = state->crtc_x;
dst_y = state->crtc_y;
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] drm/sti: do not set gdp pixel clock rate if mode is not set
2017-02-03 9:51 [PATCH 0/3] drm/sti: gdp pixel clock and plane update fixes Vincent Abriou
2017-02-03 9:51 ` [PATCH 1/3] drm/sti: enable gdp pixel clock in atomic_update Vincent Abriou
@ 2017-02-03 9:51 ` Vincent Abriou
2017-02-03 9:51 ` [PATCH 3/3] drm/sti: do not post GDP command if no update Vincent Abriou
2 siblings, 0 replies; 4+ messages in thread
From: Vincent Abriou @ 2017-02-03 9:51 UTC (permalink / raw)
To: dri-devel; +Cc: Yannick Fertre, Vincent Abriou, Fabien Dessenne
Fix a division by 0 case : in some cases, when the GDP plane is being
disabled atomic_check() is called with "mode->clock = 0".
In that case, do not set parent and pixel clock rate.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
---
drivers/gpu/drm/sti/sti_gdp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 7255234..7f6d079 100644
--- a/drivers/gpu/drm/sti/sti_gdp.c
+++ b/drivers/gpu/drm/sti/sti_gdp.c
@@ -648,7 +648,7 @@ static int sti_gdp_atomic_check(struct drm_plane *drm_plane,
}
/* Set gdp clock */
- if (gdp->clk_pix) {
+ if (mode->clock && gdp->clk_pix) {
struct clk *clkp;
int rate = mode->clock * 1000;
int res;
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] drm/sti: do not post GDP command if no update
2017-02-03 9:51 [PATCH 0/3] drm/sti: gdp pixel clock and plane update fixes Vincent Abriou
2017-02-03 9:51 ` [PATCH 1/3] drm/sti: enable gdp pixel clock in atomic_update Vincent Abriou
2017-02-03 9:51 ` [PATCH 2/3] drm/sti: do not set gdp pixel clock rate if mode is not set Vincent Abriou
@ 2017-02-03 9:51 ` Vincent Abriou
2 siblings, 0 replies; 4+ messages in thread
From: Vincent Abriou @ 2017-02-03 9:51 UTC (permalink / raw)
To: dri-devel; +Cc: Yannick Fertre, Vincent Abriou, Fabien Dessenne
Do not process update requests with unmodified parameters.
This typically happens when the driver is called with legacy
(non-atomic) IOCTL : in that case atomic_update() is called multiple
times with the same parameters.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
---
drivers/gpu/drm/sti/sti_gdp.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 7f6d079..86279f5 100644
--- a/drivers/gpu/drm/sti/sti_gdp.c
+++ b/drivers/gpu/drm/sti/sti_gdp.c
@@ -708,6 +708,21 @@ static void sti_gdp_atomic_update(struct drm_plane *drm_plane,
if (!crtc || !fb)
return;
+ if ((oldstate->fb == state->fb) &&
+ (oldstate->crtc_x == state->crtc_x) &&
+ (oldstate->crtc_y == state->crtc_y) &&
+ (oldstate->crtc_w == state->crtc_w) &&
+ (oldstate->crtc_h == state->crtc_h) &&
+ (oldstate->src_x == state->src_x) &&
+ (oldstate->src_y == state->src_y) &&
+ (oldstate->src_w == state->src_w) &&
+ (oldstate->src_h == state->src_h)) {
+ /* No change since last update, do not post cmd */
+ DRM_DEBUG_DRIVER("No change, not posting cmd\n");
+ plane->status = STI_PLANE_UPDATED;
+ return;
+ }
+
if (!gdp->vtg) {
struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
struct sti_mixer *mixer = to_sti_mixer(crtc);
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-02-03 9:51 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-02-03 9:51 [PATCH 0/3] drm/sti: gdp pixel clock and plane update fixes Vincent Abriou
2017-02-03 9:51 ` [PATCH 1/3] drm/sti: enable gdp pixel clock in atomic_update Vincent Abriou
2017-02-03 9:51 ` [PATCH 2/3] drm/sti: do not set gdp pixel clock rate if mode is not set Vincent Abriou
2017-02-03 9:51 ` [PATCH 3/3] drm/sti: do not post GDP command if no update Vincent Abriou
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