* [PATCH] drm: Add DPCD definitions for DP 1.4 DSC feature
@ 2017-02-15 17:28 Manasi Navare
2017-02-15 19:52 ` ✗ Fi.CI.BAT: failure for drm: Add DPCD definitions for DP 1.4 DSC feature (rev2) Patchwork
2017-02-16 10:05 ` Patchwork
0 siblings, 2 replies; 5+ messages in thread
From: Manasi Navare @ 2017-02-15 17:28 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare, dri-devel, Paulo Zanoni
Display stream compression is supported on DP 1.4 DP
devices. This patch adds the corersponding DPCD
register definitions for DSC.
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: dri-devel@lists.freedesktop.org
---
include/drm/drm_dp_helper.h | 102 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index ba89295..4c1fc26 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -179,6 +179,108 @@
#define DP_GUID 0x030 /* 1.2 */
+#define DP_DSC_SUPPORT 0x060 /* DP 1.4 */
+# define DP_DSC_DECOMPRESSION_IS_SUPPORTED (1 << 0)
+
+#define DP_DSC_REV 0x061
+# define DP_DSC_MAJOR_MASK (15 << 0)
+# define DP_DSC_MINOR_MASK (15 << 4)
+# define DP_DSC_MINOR_SHIFT 4
+
+#define DP_DSC_RC_BUF_BLK_SIZE 0x062
+# define DP_DSC_RC_BUF_BLK_SIZE_1 0x0
+# define DP_DSC_RC_BUF_BLK_SIZE_4 0x1
+# define DP_DSC_RC_BUF_BLK_SIZE_16 0x2
+# define DP_DSC_RC_BUF_BLK_SIZE_64 0x3
+
+#define DP_DSC_RC_BUF_SIZE 0x063
+
+#define DP_DSC_SLICE_CAP_1 0x064
+# define DP_DSC_1_PER_DP_DSC_SINK (1 << 0)
+# define DP_DSC_2_PER_DP_DSC_SINK (1 << 1)
+# define DP_DSC_4_PER_DP_DSC_SINK (1 << 3)
+# define DP_DSC_6_PER_DP_DSC_SINK (1 << 4)
+# define DP_DSC_8_PER_DP_DSC_SINK (1 << 5)
+# define DP_DSC_10_PER_DP_DSC_SINK (1 << 6)
+# define DP_DSC_12_PER_DP_DSC_SINK (1 << 7)
+
+#define DP_DSC_LINE_BUF_BIT_DEPTH 0x065
+# define DP_DSC_LINE_BUF_BIT_DEPTH_MASK (15 << 0)
+# define DP_DSC_LINE_BUF_BIT_DEPTH_9 0x0
+# define DP_DSC_LINE_BUF_BIT_DEPTH_10 0x1
+# define DP_DSC_LINE_BUF_BIT_DEPTH_11 0x2
+# define DP_DSC_LINE_BUF_BIT_DEPTH_12 0x3
+# define DP_DSC_LINE_BUF_BIT_DEPTH_13 0x4
+# define DP_DSC_LINE_BUF_BIT_DEPTH_14 0x5
+# define DP_DSC_LINE_BUF_BIT_DEPTH_15 0x6
+# define DP_DSC_LINE_BUF_BIT_DEPTH_16 0x7
+# define DP_DSC_LINE_BUF_BIT_DEPTH_8 0x8
+
+#define DP_DSC_BLK_PREDICTION_SUPPORT 0x066
+# define DP_DSC_BLK_PREDICTION_IS_SUPPORTED (1 << 0)
+
+#define DP_DSC_MAX_BITS_PER_PIXEL_LOW 0x067 /* eDP 1.4 */
+
+#define DP_DSC_MAX_BITS_PER_PIXEL_HI 0x068 /* eDP 1.4 */
+
+#define DP_DSC_DEC_COLOR_FORMAT_CAP 0x069
+# define DP_DSC_RGB (1 << 0)
+# define DP_DSC_YCbCr444 (1 << 1)
+# define DP_DSC_YCbCr422_Simple (1 << 2)
+# define DP_DSC_YCbCr422_Native (1 << 3)
+# define DP_DSC_YCbCr420_Native (1 << 4)
+
+#define DP_DSC_DEC_COLOR_DEPTH_CAP 0x06A
+# define DP_DSC_8_BPC (1 << 1)
+# define DP_DSC_10_BPC (1 << 2)
+# define DP_DSC_12_BPC (1 >> 3)
+
+#define DP_DSC_PEAK_THROUGHPUT 0x06B
+# define DP_DSC_THROUGHPUT_MODE_0_340 0x1
+# define DP_DSC_THROUGHPUT_MODE_0_400 0x2
+# define DP_DSC_THROUGHPUT_MODE_0_450 0x3
+# define DP_DSC_THROUGHPUT_MODE_0_500 0x4
+# define DP_DSC_THROUGHPUT_MODE_0_550 0x5
+# define DP_DSC_THROUGHPUT_MODE_0_600 0x6
+# define DP_DSC_THROUGHPUT_MODE_0_650 0x7
+# define DP_DSC_THROUGHPUT_MODE_0_700 0x8
+# define DP_DSC_THROUGHPUT_MODE_0_750 0x9
+# define DP_DSC_THROUGHPUT_MODE_0_800 0xA
+# define DP_DSC_THROUGHPUT_MODE_0_850 0xB
+# define DP_DSC_THROUGHPUT_MODE_0_900 0xC
+# define DP_DSC_THROUGHPUT_MODE_0_950 0xD
+# define DP_DSC_THROUGHPUT_MODE_0_1000 0xE
+# define DP_DSC_THROUGHPUT_MODE_1_MASK (15 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_SHIFT 4
+# define DP_DSC_THROUGHPUT_MODE_1_340 (1 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_400 (2 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_450 (3 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_500 (4 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_550 (5 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_600 (6 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_650 (7 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_700 (8 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_750 (9 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_800 (10 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_850 (11 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_900 (12 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_950 (13 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_1000 (14 << 4)
+
+#define DP_DSC_MAX_SLICE_WIDTH 0x06C
+
+#define DP_DSC_SLICE_CAP_2 0x06D
+# define DP_DSC_16_PER_DP_DSC_SINK (1 << 0)
+# define DP_DSC_20_PER_DP_DSC_SINK (1 << 1)
+# define DP_DSC_24_PER_DP_DSC_SINK (1 << 2)
+
+#define DP_DSC_BITS_PER_PIXEL_INC 0x06F
+# define DP_DSC_BITS_PER_PIXEL_1_16 0x0
+# define DP_DSC_BITS_PER_PIXEL_1_8 0x1
+# define DP_DSC_BITS_PER_PIXEL_1_4 0x2
+# define DP_DSC_BITS_PER_PIXEL_1_2 0x3
+# define DP_DSC_BITS_PER_PIXEL_1 0x4
+
#define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
# define DP_PSR_IS_SUPPORTED 1
# define DP_PSR2_IS_SUPPORTED 2 /* eDP 1.4 */
--
2.1.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✗ Fi.CI.BAT: failure for drm: Add DPCD definitions for DP 1.4 DSC feature (rev2)
2017-02-15 17:28 [PATCH] drm: Add DPCD definitions for DP 1.4 DSC feature Manasi Navare
@ 2017-02-15 19:52 ` Patchwork
2017-02-16 10:05 ` Patchwork
1 sibling, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-02-15 19:52 UTC (permalink / raw)
To: Navare, Manasi D; +Cc: intel-gfx
== Series Details ==
Series: drm: Add DPCD definitions for DP 1.4 DSC feature (rev2)
URL : https://patchwork.freedesktop.org/series/19666/
State : failure
== Summary ==
Series 19666v2 drm: Add DPCD definitions for DP 1.4 DSC feature
https://patchwork.freedesktop.org/api/1.0/series/19666/revisions/2/mbox/
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-b:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-a:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-a-frame-sequence:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-b:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-c:
skip -> INCOMPLETE (fi-snb-2520m)
fi-bdw-5557u total:252 pass:238 dwarn:3 dfail:0 fail:0 skip:11
fi-bsw-n3050 total:252 pass:210 dwarn:3 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:252 pass:230 dwarn:3 dfail:0 fail:0 skip:19
fi-bxt-t5700 total:83 pass:70 dwarn:0 dfail:0 fail:0 skip:12
fi-byt-j1900 total:252 pass:222 dwarn:3 dfail:0 fail:0 skip:27
fi-byt-n2820 total:252 pass:218 dwarn:3 dfail:0 fail:0 skip:31
fi-hsw-4770 total:252 pass:233 dwarn:3 dfail:0 fail:0 skip:16
fi-hsw-4770r total:252 pass:233 dwarn:3 dfail:0 fail:0 skip:16
fi-ilk-650 total:252 pass:199 dwarn:3 dfail:0 fail:0 skip:50
fi-ivb-3520m total:252 pass:231 dwarn:3 dfail:0 fail:0 skip:18
fi-ivb-3770 total:252 pass:231 dwarn:3 dfail:0 fail:0 skip:18
fi-skl-6260u total:252 pass:239 dwarn:3 dfail:0 fail:0 skip:10
fi-skl-6700hq total:252 pass:232 dwarn:3 dfail:0 fail:0 skip:17
fi-skl-6700k total:252 pass:230 dwarn:4 dfail:0 fail:0 skip:18
fi-skl-6770hq total:252 pass:239 dwarn:3 dfail:0 fail:0 skip:10
fi-snb-2520m total:201 pass:176 dwarn:0 dfail:5 fail:0 skip:19
fi-snb-2600 total:252 pass:220 dwarn:3 dfail:0 fail:0 skip:29
fi-kbl-7500u failed to collect. IGT log at Patchwork_3832/fi-kbl-7500u/igt.log
890e171e84eb11944701de9d53c1162dd5c38142 drm-tip: 2017y-02m-15d-15h-34m-13s UTC integration manifest
558f73a drm: Add DPCD definitions for DP 1.4 DSC feature
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3832/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* ✗ Fi.CI.BAT: failure for drm: Add DPCD definitions for DP 1.4 DSC feature (rev2)
2017-02-15 17:28 [PATCH] drm: Add DPCD definitions for DP 1.4 DSC feature Manasi Navare
2017-02-15 19:52 ` ✗ Fi.CI.BAT: failure for drm: Add DPCD definitions for DP 1.4 DSC feature (rev2) Patchwork
@ 2017-02-16 10:05 ` Patchwork
1 sibling, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-02-16 10:05 UTC (permalink / raw)
To: Navare, Manasi D; +Cc: intel-gfx
== Series Details ==
Series: drm: Add DPCD definitions for DP 1.4 DSC feature (rev2)
URL : https://patchwork.freedesktop.org/series/19666/
State : failure
== Summary ==
Series 19666v2 drm: Add DPCD definitions for DP 1.4 DSC feature
https://patchwork.freedesktop.org/api/1.0/series/19666/revisions/2/mbox/
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-b:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-a:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-a-frame-sequence:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-b:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass -> DMESG-FAIL (fi-snb-2520m)
Subgroup nonblocking-crc-pipe-c:
skip -> INCOMPLETE (fi-snb-2520m)
fi-bdw-5557u total:252 pass:238 dwarn:3 dfail:0 fail:0 skip:11
fi-bsw-n3050 total:252 pass:210 dwarn:3 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:252 pass:230 dwarn:3 dfail:0 fail:0 skip:19
fi-bxt-t5700 total:83 pass:70 dwarn:0 dfail:0 fail:0 skip:12
fi-byt-j1900 total:252 pass:222 dwarn:3 dfail:0 fail:0 skip:27
fi-byt-n2820 total:252 pass:218 dwarn:3 dfail:0 fail:0 skip:31
fi-hsw-4770 total:252 pass:233 dwarn:3 dfail:0 fail:0 skip:16
fi-hsw-4770r total:252 pass:233 dwarn:3 dfail:0 fail:0 skip:16
fi-ilk-650 total:252 pass:199 dwarn:3 dfail:0 fail:0 skip:50
fi-ivb-3520m total:252 pass:231 dwarn:3 dfail:0 fail:0 skip:18
fi-ivb-3770 total:252 pass:231 dwarn:3 dfail:0 fail:0 skip:18
fi-kbl-7500u total:252 pass:231 dwarn:3 dfail:0 fail:0 skip:18
fi-skl-6260u total:252 pass:239 dwarn:3 dfail:0 fail:0 skip:10
fi-skl-6700hq total:252 pass:232 dwarn:3 dfail:0 fail:0 skip:17
fi-skl-6700k total:252 pass:230 dwarn:4 dfail:0 fail:0 skip:18
fi-skl-6770hq total:252 pass:239 dwarn:3 dfail:0 fail:0 skip:10
fi-snb-2520m total:201 pass:176 dwarn:0 dfail:5 fail:0 skip:19
fi-snb-2600 total:252 pass:220 dwarn:3 dfail:0 fail:0 skip:29
5bec901e7ea94b6e656c8b0813c45c90d37a5673 drm-tip: 2017y-02m-16d-04h-31m-41s UTC integration manifest
70d24d5 drm: Add DPCD definitions for DP 1.4 DSC feature
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3842/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] drm: Add DPCD definitions for DP 1.4 DSC feature
@ 2017-02-14 23:32 Manasi Navare
2017-02-15 9:29 ` Jani Nikula
0 siblings, 1 reply; 5+ messages in thread
From: Manasi Navare @ 2017-02-14 23:32 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni
Display stream compression is supported on DP 1.4 DP
devices. This patch adds the corersponding DPCD
register definitions for DSC.
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
include/drm/drm_dp_helper.h | 102 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index ba89295..4c1fc26 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -179,6 +179,108 @@
#define DP_GUID 0x030 /* 1.2 */
+#define DP_DSC_SUPPORT 0x060 /* DP 1.4 */
+# define DP_DSC_DECOMPRESSION_IS_SUPPORTED (1 << 0)
+
+#define DP_DSC_REV 0x061
+# define DP_DSC_MAJOR_MASK (15 << 0)
+# define DP_DSC_MINOR_MASK (15 << 4)
+# define DP_DSC_MINOR_SHIFT 4
+
+#define DP_DSC_RC_BUF_BLK_SIZE 0x062
+# define DP_DSC_RC_BUF_BLK_SIZE_1 0x0
+# define DP_DSC_RC_BUF_BLK_SIZE_4 0x1
+# define DP_DSC_RC_BUF_BLK_SIZE_16 0x2
+# define DP_DSC_RC_BUF_BLK_SIZE_64 0x3
+
+#define DP_DSC_RC_BUF_SIZE 0x063
+
+#define DP_DSC_SLICE_CAP_1 0x064
+# define DP_DSC_1_PER_DP_DSC_SINK (1 << 0)
+# define DP_DSC_2_PER_DP_DSC_SINK (1 << 1)
+# define DP_DSC_4_PER_DP_DSC_SINK (1 << 3)
+# define DP_DSC_6_PER_DP_DSC_SINK (1 << 4)
+# define DP_DSC_8_PER_DP_DSC_SINK (1 << 5)
+# define DP_DSC_10_PER_DP_DSC_SINK (1 << 6)
+# define DP_DSC_12_PER_DP_DSC_SINK (1 << 7)
+
+#define DP_DSC_LINE_BUF_BIT_DEPTH 0x065
+# define DP_DSC_LINE_BUF_BIT_DEPTH_MASK (15 << 0)
+# define DP_DSC_LINE_BUF_BIT_DEPTH_9 0x0
+# define DP_DSC_LINE_BUF_BIT_DEPTH_10 0x1
+# define DP_DSC_LINE_BUF_BIT_DEPTH_11 0x2
+# define DP_DSC_LINE_BUF_BIT_DEPTH_12 0x3
+# define DP_DSC_LINE_BUF_BIT_DEPTH_13 0x4
+# define DP_DSC_LINE_BUF_BIT_DEPTH_14 0x5
+# define DP_DSC_LINE_BUF_BIT_DEPTH_15 0x6
+# define DP_DSC_LINE_BUF_BIT_DEPTH_16 0x7
+# define DP_DSC_LINE_BUF_BIT_DEPTH_8 0x8
+
+#define DP_DSC_BLK_PREDICTION_SUPPORT 0x066
+# define DP_DSC_BLK_PREDICTION_IS_SUPPORTED (1 << 0)
+
+#define DP_DSC_MAX_BITS_PER_PIXEL_LOW 0x067 /* eDP 1.4 */
+
+#define DP_DSC_MAX_BITS_PER_PIXEL_HI 0x068 /* eDP 1.4 */
+
+#define DP_DSC_DEC_COLOR_FORMAT_CAP 0x069
+# define DP_DSC_RGB (1 << 0)
+# define DP_DSC_YCbCr444 (1 << 1)
+# define DP_DSC_YCbCr422_Simple (1 << 2)
+# define DP_DSC_YCbCr422_Native (1 << 3)
+# define DP_DSC_YCbCr420_Native (1 << 4)
+
+#define DP_DSC_DEC_COLOR_DEPTH_CAP 0x06A
+# define DP_DSC_8_BPC (1 << 1)
+# define DP_DSC_10_BPC (1 << 2)
+# define DP_DSC_12_BPC (1 >> 3)
+
+#define DP_DSC_PEAK_THROUGHPUT 0x06B
+# define DP_DSC_THROUGHPUT_MODE_0_340 0x1
+# define DP_DSC_THROUGHPUT_MODE_0_400 0x2
+# define DP_DSC_THROUGHPUT_MODE_0_450 0x3
+# define DP_DSC_THROUGHPUT_MODE_0_500 0x4
+# define DP_DSC_THROUGHPUT_MODE_0_550 0x5
+# define DP_DSC_THROUGHPUT_MODE_0_600 0x6
+# define DP_DSC_THROUGHPUT_MODE_0_650 0x7
+# define DP_DSC_THROUGHPUT_MODE_0_700 0x8
+# define DP_DSC_THROUGHPUT_MODE_0_750 0x9
+# define DP_DSC_THROUGHPUT_MODE_0_800 0xA
+# define DP_DSC_THROUGHPUT_MODE_0_850 0xB
+# define DP_DSC_THROUGHPUT_MODE_0_900 0xC
+# define DP_DSC_THROUGHPUT_MODE_0_950 0xD
+# define DP_DSC_THROUGHPUT_MODE_0_1000 0xE
+# define DP_DSC_THROUGHPUT_MODE_1_MASK (15 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_SHIFT 4
+# define DP_DSC_THROUGHPUT_MODE_1_340 (1 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_400 (2 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_450 (3 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_500 (4 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_550 (5 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_600 (6 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_650 (7 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_700 (8 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_750 (9 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_800 (10 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_850 (11 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_900 (12 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_950 (13 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_1000 (14 << 4)
+
+#define DP_DSC_MAX_SLICE_WIDTH 0x06C
+
+#define DP_DSC_SLICE_CAP_2 0x06D
+# define DP_DSC_16_PER_DP_DSC_SINK (1 << 0)
+# define DP_DSC_20_PER_DP_DSC_SINK (1 << 1)
+# define DP_DSC_24_PER_DP_DSC_SINK (1 << 2)
+
+#define DP_DSC_BITS_PER_PIXEL_INC 0x06F
+# define DP_DSC_BITS_PER_PIXEL_1_16 0x0
+# define DP_DSC_BITS_PER_PIXEL_1_8 0x1
+# define DP_DSC_BITS_PER_PIXEL_1_4 0x2
+# define DP_DSC_BITS_PER_PIXEL_1_2 0x3
+# define DP_DSC_BITS_PER_PIXEL_1 0x4
+
#define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
# define DP_PSR_IS_SUPPORTED 1
# define DP_PSR2_IS_SUPPORTED 2 /* eDP 1.4 */
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
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2017-02-15 17:28 [PATCH] drm: Add DPCD definitions for DP 1.4 DSC feature Manasi Navare
2017-02-15 19:52 ` ✗ Fi.CI.BAT: failure for drm: Add DPCD definitions for DP 1.4 DSC feature (rev2) Patchwork
2017-02-16 10:05 ` Patchwork
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2017-02-14 23:32 [PATCH] drm: Add DPCD definitions for DP 1.4 DSC feature Manasi Navare
2017-02-15 9:29 ` Jani Nikula
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