* [Qemu-devel] [PATCH] Add missing fp_access_check() to aarch64 crypto instructions
@ 2017-02-17 17:58 Nick Reilly
2017-02-17 18:16 ` Peter Maydell
0 siblings, 1 reply; 2+ messages in thread
From: Nick Reilly @ 2017-02-17 17:58 UTC (permalink / raw)
To: qemu-devel, qemu-arm; +Cc: peter.maydell, Nick Reilly
The aarch64 crypto instructions for AES and SHA are missing the
check for if the FPU is enabled.
Signed-off-by: Nick Reilly <nreilly@blackberry.com>
---
target/arm/translate-a64.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e61bbd6..8105e7e 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10929,6 +10929,10 @@ static void disas_crypto_aes(DisasContext *s, uint32_t insn)
return;
}
+ if (!fp_access_check(s)) {
+ return;
+ }
+
/* Note that we convert the Vx register indexes into the
* index within the vfp.regs[] array, so we can share the
* helper with the AArch32 instructions.
@@ -10993,6 +10997,10 @@ static void disas_crypto_three_reg_sha(DisasContext *s, uint32_t insn)
return;
}
+ if (!fp_access_check(s)) {
+ return;
+ }
+
tcg_rd_regno = tcg_const_i32(rd << 1);
tcg_rn_regno = tcg_const_i32(rn << 1);
tcg_rm_regno = tcg_const_i32(rm << 1);
@@ -11056,6 +11064,10 @@ static void disas_crypto_two_reg_sha(DisasContext *s, uint32_t insn)
return;
}
+ if (!fp_access_check(s)) {
+ return;
+ }
+
tcg_rd_regno = tcg_const_i32(rd << 1);
tcg_rn_regno = tcg_const_i32(rn << 1);
--
1.9.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] Add missing fp_access_check() to aarch64 crypto instructions
2017-02-17 17:58 [Qemu-devel] [PATCH] Add missing fp_access_check() to aarch64 crypto instructions Nick Reilly
@ 2017-02-17 18:16 ` Peter Maydell
0 siblings, 0 replies; 2+ messages in thread
From: Peter Maydell @ 2017-02-17 18:16 UTC (permalink / raw)
To: Nick Reilly; +Cc: QEMU Developers, qemu-arm
On 17 February 2017 at 17:58, Nick Reilly <nreilly@blackberry.com> wrote:
> The aarch64 crypto instructions for AES and SHA are missing the
> check for if the FPU is enabled.
>
> Signed-off-by: Nick Reilly <nreilly@blackberry.com>
Oops, nice catch. Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 2+ messages in thread
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