* [PATCH 0/2] aspeed: add bindings and defconfig for SPI controllers
@ 2017-03-01 14:26 ` Cédric Le Goater
0 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-01 14:26 UTC (permalink / raw)
To: Joel Stanley
Cc: Mark Rutland, devicetree, Russell King, Rob Herring,
Cédric Le Goater, linux-arm-kernel
Hi,
Here's a short series to activate by the default the SPI controllers
on the Aspeed SoC AST2400 and AST2500.
Thanks,
C.
Cédric Le Goater (2):
ARM: dts: aspeed: add SPI controller bindings
ARM: aspeed: Add CONFIG_SPI_ASPEED_SMC
arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
arch/arm/configs/aspeed_g4_defconfig | 3 ++
arch/arm/configs/aspeed_g5_defconfig | 3 ++
6 files changed, 134 insertions(+)
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 0/2] aspeed: add bindings and defconfig for SPI controllers
@ 2017-03-01 14:26 ` Cédric Le Goater
0 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-01 14:26 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Here's a short series to activate by the default the SPI controllers
on the Aspeed SoC AST2400 and AST2500.
Thanks,
C.
C?dric Le Goater (2):
ARM: dts: aspeed: add SPI controller bindings
ARM: aspeed: Add CONFIG_SPI_ASPEED_SMC
arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
arch/arm/configs/aspeed_g4_defconfig | 3 ++
arch/arm/configs/aspeed_g5_defconfig | 3 ++
6 files changed, 134 insertions(+)
--
2.7.4
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] ARM: dts: aspeed: add SPI controller bindings
2017-03-01 14:26 ` Cédric Le Goater
@ 2017-03-01 14:26 ` Cédric Le Goater
-1 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-01 14:26 UTC (permalink / raw)
To: Joel Stanley
Cc: Mark Rutland, devicetree, Russell King, Rob Herring,
Cédric Le Goater, linux-arm-kernel
Let's define the SPI controllers in the Aspeed SoCs AST2500 and
AST2400 and also enable these, as well as the chips, on the associated
platforms.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
4 files changed, 128 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
index d967603dade8..8f82e8ab1875 100644
--- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -20,6 +20,26 @@
};
};
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ label = "bmc";
+ };
+};
+
+&spi1 {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ label = "pnor";
+ };
+};
+
+&spi2 {
+ status = "okay";
+};
+
&uart5 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index 1d2fc1e1dc29..aab1889f702f 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -31,6 +31,22 @@
};
};
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ label = "bmc";
+ };
+};
+
+&spi {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ label = "pnor";
+ };
+};
+
&uart5 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 0b4932cc02a8..7ef6442d0ade 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -33,6 +33,35 @@
#size-cells = <1>;
ranges;
+ fmc: flash-controller@1e620000 {
+ reg = < 0x1e620000 0x94
+ 0x20000000 0x02000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2400-fmc";
+ status = "disabled";
+ interrupts = <19>;
+ flash@0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ spi: flash-controller@1e630000 {
+ reg = < 0x1e630000 0x18
+ 0x30000000 0x02000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2400-spi";
+ status = "disabled";
+ flash@0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
vic: interrupt-controller@1e6c0080 {
compatible = "aspeed,ast2400-vic";
interrupt-controller;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index b664fe380936..8970f3cb8e2b 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -24,6 +24,69 @@
#size-cells = <1>;
ranges;
+ fmc: flash-controller@1e620000 {
+ reg = < 0x1e620000 0xc4
+ 0x20000000 0x10000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-fmc";
+ status = "disabled";
+ interrupts = <19>;
+ flash@0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash@1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash@2 {
+ reg = < 2 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ spi1: flash-controller@1e630000 {
+ reg = < 0x1e630000 0xc4
+ 0x30000000 0x08000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-spi";
+ status = "disabled";
+ flash@0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash@1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ spi2: flash-controller@1e631000 {
+ reg = < 0x1e631000 0xc4
+ 0x38000000 0x08000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-spi";
+ status = "disabled";
+ flash@0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash@1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
vic: interrupt-controller@1e6c0080 {
compatible = "aspeed,ast2400-vic";
interrupt-controller;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 1/2] ARM: dts: aspeed: add SPI controller bindings
@ 2017-03-01 14:26 ` Cédric Le Goater
0 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-01 14:26 UTC (permalink / raw)
To: linux-arm-kernel
Let's define the SPI controllers in the Aspeed SoCs AST2500 and
AST2400 and also enable these, as well as the chips, on the associated
platforms.
Signed-off-by: C?dric Le Goater <clg@kaod.org>
---
arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
4 files changed, 128 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
index d967603dade8..8f82e8ab1875 100644
--- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -20,6 +20,26 @@
};
};
+&fmc {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ label = "bmc";
+ };
+};
+
+&spi1 {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ label = "pnor";
+ };
+};
+
+&spi2 {
+ status = "okay";
+};
+
&uart5 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index 1d2fc1e1dc29..aab1889f702f 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -31,6 +31,22 @@
};
};
+&fmc {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ label = "bmc";
+ };
+};
+
+&spi {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ label = "pnor";
+ };
+};
+
&uart5 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 0b4932cc02a8..7ef6442d0ade 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -33,6 +33,35 @@
#size-cells = <1>;
ranges;
+ fmc: flash-controller at 1e620000 {
+ reg = < 0x1e620000 0x94
+ 0x20000000 0x02000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2400-fmc";
+ status = "disabled";
+ interrupts = <19>;
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ spi: flash-controller at 1e630000 {
+ reg = < 0x1e630000 0x18
+ 0x30000000 0x02000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2400-spi";
+ status = "disabled";
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
vic: interrupt-controller at 1e6c0080 {
compatible = "aspeed,ast2400-vic";
interrupt-controller;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index b664fe380936..8970f3cb8e2b 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -24,6 +24,69 @@
#size-cells = <1>;
ranges;
+ fmc: flash-controller at 1e620000 {
+ reg = < 0x1e620000 0xc4
+ 0x20000000 0x10000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-fmc";
+ status = "disabled";
+ interrupts = <19>;
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 2 {
+ reg = < 2 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ spi1: flash-controller at 1e630000 {
+ reg = < 0x1e630000 0xc4
+ 0x30000000 0x08000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-spi";
+ status = "disabled";
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ spi2: flash-controller at 1e631000 {
+ reg = < 0x1e631000 0xc4
+ 0x38000000 0x08000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-spi";
+ status = "disabled";
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
vic: interrupt-controller at 1e6c0080 {
compatible = "aspeed,ast2400-vic";
interrupt-controller;
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] ARM: aspeed: Add CONFIG_SPI_ASPEED_SMC
2017-03-01 14:26 ` Cédric Le Goater
@ 2017-03-01 14:26 ` Cédric Le Goater
-1 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-01 14:26 UTC (permalink / raw)
To: Joel Stanley
Cc: Mark Rutland, devicetree, Russell King, Rob Herring,
Cédric Le Goater, linux-arm-kernel
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
arch/arm/configs/aspeed_g4_defconfig | 3 +++
arch/arm/configs/aspeed_g5_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff --git a/arch/arm/configs/aspeed_g4_defconfig b/arch/arm/configs/aspeed_g4_defconfig
index d25010e3a0bc..8bd9e6a91d41 100644
--- a/arch/arm/configs/aspeed_g4_defconfig
+++ b/arch/arm/configs/aspeed_g4_defconfig
@@ -40,6 +40,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_ASPEED_SMC=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set
diff --git a/arch/arm/configs/aspeed_g5_defconfig b/arch/arm/configs/aspeed_g5_defconfig
index 5f660b02abd9..0eff4a53fd46 100644
--- a/arch/arm/configs/aspeed_g5_defconfig
+++ b/arch/arm/configs/aspeed_g5_defconfig
@@ -46,6 +46,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_ASPEED_SMC=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] ARM: aspeed: Add CONFIG_SPI_ASPEED_SMC
@ 2017-03-01 14:26 ` Cédric Le Goater
0 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-01 14:26 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: C?dric Le Goater <clg@kaod.org>
---
arch/arm/configs/aspeed_g4_defconfig | 3 +++
arch/arm/configs/aspeed_g5_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff --git a/arch/arm/configs/aspeed_g4_defconfig b/arch/arm/configs/aspeed_g4_defconfig
index d25010e3a0bc..8bd9e6a91d41 100644
--- a/arch/arm/configs/aspeed_g4_defconfig
+++ b/arch/arm/configs/aspeed_g4_defconfig
@@ -40,6 +40,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_ASPEED_SMC=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set
diff --git a/arch/arm/configs/aspeed_g5_defconfig b/arch/arm/configs/aspeed_g5_defconfig
index 5f660b02abd9..0eff4a53fd46 100644
--- a/arch/arm/configs/aspeed_g5_defconfig
+++ b/arch/arm/configs/aspeed_g5_defconfig
@@ -46,6 +46,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_ASPEED_SMC=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] ARM: dts: aspeed: add SPI controller bindings
2017-03-01 14:26 ` Cédric Le Goater
@ 2017-03-05 23:13 ` Joel Stanley
-1 siblings, 0 replies; 10+ messages in thread
From: Joel Stanley @ 2017-03-05 23:13 UTC (permalink / raw)
To: Cédric Le Goater
Cc: Rob Herring, Mark Rutland, Russell King,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
Hi Cedric,
On Thu, Mar 2, 2017 at 12:56 AM, Cédric Le Goater <clg-Bxea+6Xhats@public.gmane.org> wrote:
> Let's define the SPI controllers in the Aspeed SoCs AST2500 and
> AST2400 and also enable these, as well as the chips, on the associated
> platforms.
Thanks for this. Was there a reason you didn't modify the romulus dts as well?
Cheers,
Joel
>
> Signed-off-by: Cédric Le Goater <clg-Bxea+6Xhats@public.gmane.org>
> ---
> arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
> arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
> arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
> arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
> 4 files changed, 128 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
> index d967603dade8..8f82e8ab1875 100644
> --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
> +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
> @@ -20,6 +20,26 @@
> };
> };
>
> +&fmc {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + label = "bmc";
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + label = "pnor";
> + };
> +};
> +
> +&spi2 {
> + status = "okay";
> +};
> +
> &uart5 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
> index 1d2fc1e1dc29..aab1889f702f 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
> @@ -31,6 +31,22 @@
> };
> };
>
> +&fmc {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + label = "bmc";
> + };
> +};
> +
> +&spi {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + label = "pnor";
> + };
> +};
> +
> &uart5 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
> index 0b4932cc02a8..7ef6442d0ade 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -33,6 +33,35 @@
> #size-cells = <1>;
> ranges;
>
> + fmc: flash-controller@1e620000 {
> + reg = < 0x1e620000 0x94
> + 0x20000000 0x02000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2400-fmc";
> + status = "disabled";
> + interrupts = <19>;
> + flash@0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> + spi: flash-controller@1e630000 {
> + reg = < 0x1e630000 0x18
> + 0x30000000 0x02000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2400-spi";
> + status = "disabled";
> + flash@0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> vic: interrupt-controller@1e6c0080 {
> compatible = "aspeed,ast2400-vic";
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index b664fe380936..8970f3cb8e2b 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -24,6 +24,69 @@
> #size-cells = <1>;
> ranges;
>
> + fmc: flash-controller@1e620000 {
> + reg = < 0x1e620000 0xc4
> + 0x20000000 0x10000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2500-fmc";
> + status = "disabled";
> + interrupts = <19>;
> + flash@0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash@1 {
> + reg = < 1 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash@2 {
> + reg = < 2 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> + spi1: flash-controller@1e630000 {
> + reg = < 0x1e630000 0xc4
> + 0x30000000 0x08000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2500-spi";
> + status = "disabled";
> + flash@0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash@1 {
> + reg = < 1 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> + spi2: flash-controller@1e631000 {
> + reg = < 0x1e631000 0xc4
> + 0x38000000 0x08000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2500-spi";
> + status = "disabled";
> + flash@0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash@1 {
> + reg = < 1 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> vic: interrupt-controller@1e6c0080 {
> compatible = "aspeed,ast2400-vic";
> interrupt-controller;
> --
> 2.7.4
>
--
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] ARM: dts: aspeed: add SPI controller bindings
@ 2017-03-05 23:13 ` Joel Stanley
0 siblings, 0 replies; 10+ messages in thread
From: Joel Stanley @ 2017-03-05 23:13 UTC (permalink / raw)
To: linux-arm-kernel
Hi Cedric,
On Thu, Mar 2, 2017 at 12:56 AM, C?dric Le Goater <clg@kaod.org> wrote:
> Let's define the SPI controllers in the Aspeed SoCs AST2500 and
> AST2400 and also enable these, as well as the chips, on the associated
> platforms.
Thanks for this. Was there a reason you didn't modify the romulus dts as well?
Cheers,
Joel
>
> Signed-off-by: C?dric Le Goater <clg@kaod.org>
> ---
> arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
> arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
> arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
> arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
> 4 files changed, 128 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
> index d967603dade8..8f82e8ab1875 100644
> --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
> +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
> @@ -20,6 +20,26 @@
> };
> };
>
> +&fmc {
> + status = "okay";
> + flash at 0 {
> + status = "okay";
> + label = "bmc";
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + flash at 0 {
> + status = "okay";
> + label = "pnor";
> + };
> +};
> +
> +&spi2 {
> + status = "okay";
> +};
> +
> &uart5 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
> index 1d2fc1e1dc29..aab1889f702f 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
> @@ -31,6 +31,22 @@
> };
> };
>
> +&fmc {
> + status = "okay";
> + flash at 0 {
> + status = "okay";
> + label = "bmc";
> + };
> +};
> +
> +&spi {
> + status = "okay";
> + flash at 0 {
> + status = "okay";
> + label = "pnor";
> + };
> +};
> +
> &uart5 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
> index 0b4932cc02a8..7ef6442d0ade 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -33,6 +33,35 @@
> #size-cells = <1>;
> ranges;
>
> + fmc: flash-controller at 1e620000 {
> + reg = < 0x1e620000 0x94
> + 0x20000000 0x02000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2400-fmc";
> + status = "disabled";
> + interrupts = <19>;
> + flash at 0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> + spi: flash-controller at 1e630000 {
> + reg = < 0x1e630000 0x18
> + 0x30000000 0x02000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2400-spi";
> + status = "disabled";
> + flash at 0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> vic: interrupt-controller at 1e6c0080 {
> compatible = "aspeed,ast2400-vic";
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index b664fe380936..8970f3cb8e2b 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -24,6 +24,69 @@
> #size-cells = <1>;
> ranges;
>
> + fmc: flash-controller at 1e620000 {
> + reg = < 0x1e620000 0xc4
> + 0x20000000 0x10000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2500-fmc";
> + status = "disabled";
> + interrupts = <19>;
> + flash at 0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash at 1 {
> + reg = < 1 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash at 2 {
> + reg = < 2 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> + spi1: flash-controller at 1e630000 {
> + reg = < 0x1e630000 0xc4
> + 0x30000000 0x08000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2500-spi";
> + status = "disabled";
> + flash at 0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash at 1 {
> + reg = < 1 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> + spi2: flash-controller at 1e631000 {
> + reg = < 0x1e631000 0xc4
> + 0x38000000 0x08000000 >;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2500-spi";
> + status = "disabled";
> + flash at 0 {
> + reg = < 0 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + flash at 1 {
> + reg = < 1 >;
> + compatible = "jedec,spi-nor";
> + status = "disabled";
> + };
> + };
> +
> vic: interrupt-controller at 1e6c0080 {
> compatible = "aspeed,ast2400-vic";
> interrupt-controller;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] ARM: dts: aspeed: add SPI controller bindings
2017-03-05 23:13 ` Joel Stanley
@ 2017-03-06 7:35 ` Cédric Le Goater
-1 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-06 7:35 UTC (permalink / raw)
To: Joel Stanley
Cc: Mark Rutland, devicetree, Rob Herring, Russell King, linux-arm-kernel
On 03/06/2017 12:13 AM, Joel Stanley wrote:
> Hi Cedric,
>
> On Thu, Mar 2, 2017 at 12:56 AM, Cédric Le Goater <clg@kaod.org> wrote:
>> Let's define the SPI controllers in the Aspeed SoCs AST2500 and
>> AST2400 and also enable these, as well as the chips, on the associated
>> platforms.
>
> Thanks for this. Was there a reason you didn't modify the romulus dts as well?
Mostly because this is a pre-romulus patch that I refreshed.
I will send a extra patch for the romulus platform.
Thanks,
C.
> Cheers,
>
> Joel
>
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>> arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
>> arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
>> arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
>> arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
>> 4 files changed, 128 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
>> index d967603dade8..8f82e8ab1875 100644
>> --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
>> +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
>> @@ -20,6 +20,26 @@
>> };
>> };
>>
>> +&fmc {
>> + status = "okay";
>> + flash@0 {
>> + status = "okay";
>> + label = "bmc";
>> + };
>> +};
>> +
>> +&spi1 {
>> + status = "okay";
>> + flash@0 {
>> + status = "okay";
>> + label = "pnor";
>> + };
>> +};
>> +
>> +&spi2 {
>> + status = "okay";
>> +};
>> +
>> &uart5 {
>> status = "okay";
>> };
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> index 1d2fc1e1dc29..aab1889f702f 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> @@ -31,6 +31,22 @@
>> };
>> };
>>
>> +&fmc {
>> + status = "okay";
>> + flash@0 {
>> + status = "okay";
>> + label = "bmc";
>> + };
>> +};
>> +
>> +&spi {
>> + status = "okay";
>> + flash@0 {
>> + status = "okay";
>> + label = "pnor";
>> + };
>> +};
>> +
>> &uart5 {
>> status = "okay";
>> };
>> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
>> index 0b4932cc02a8..7ef6442d0ade 100644
>> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
>> @@ -33,6 +33,35 @@
>> #size-cells = <1>;
>> ranges;
>>
>> + fmc: flash-controller@1e620000 {
>> + reg = < 0x1e620000 0x94
>> + 0x20000000 0x02000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2400-fmc";
>> + status = "disabled";
>> + interrupts = <19>;
>> + flash@0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + spi: flash-controller@1e630000 {
>> + reg = < 0x1e630000 0x18
>> + 0x30000000 0x02000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2400-spi";
>> + status = "disabled";
>> + flash@0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> vic: interrupt-controller@1e6c0080 {
>> compatible = "aspeed,ast2400-vic";
>> interrupt-controller;
>> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
>> index b664fe380936..8970f3cb8e2b 100644
>> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
>> @@ -24,6 +24,69 @@
>> #size-cells = <1>;
>> ranges;
>>
>> + fmc: flash-controller@1e620000 {
>> + reg = < 0x1e620000 0xc4
>> + 0x20000000 0x10000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2500-fmc";
>> + status = "disabled";
>> + interrupts = <19>;
>> + flash@0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash@1 {
>> + reg = < 1 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash@2 {
>> + reg = < 2 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + spi1: flash-controller@1e630000 {
>> + reg = < 0x1e630000 0xc4
>> + 0x30000000 0x08000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2500-spi";
>> + status = "disabled";
>> + flash@0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash@1 {
>> + reg = < 1 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + spi2: flash-controller@1e631000 {
>> + reg = < 0x1e631000 0xc4
>> + 0x38000000 0x08000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2500-spi";
>> + status = "disabled";
>> + flash@0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash@1 {
>> + reg = < 1 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> vic: interrupt-controller@1e6c0080 {
>> compatible = "aspeed,ast2400-vic";
>> interrupt-controller;
>> --
>> 2.7.4
>>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] ARM: dts: aspeed: add SPI controller bindings
@ 2017-03-06 7:35 ` Cédric Le Goater
0 siblings, 0 replies; 10+ messages in thread
From: Cédric Le Goater @ 2017-03-06 7:35 UTC (permalink / raw)
To: linux-arm-kernel
On 03/06/2017 12:13 AM, Joel Stanley wrote:
> Hi Cedric,
>
> On Thu, Mar 2, 2017 at 12:56 AM, C?dric Le Goater <clg@kaod.org> wrote:
>> Let's define the SPI controllers in the Aspeed SoCs AST2500 and
>> AST2400 and also enable these, as well as the chips, on the associated
>> platforms.
>
> Thanks for this. Was there a reason you didn't modify the romulus dts as well?
Mostly because this is a pre-romulus patch that I refreshed.
I will send a extra patch for the romulus platform.
Thanks,
C.
> Cheers,
>
> Joel
>
>>
>> Signed-off-by: C?dric Le Goater <clg@kaod.org>
>> ---
>> arch/arm/boot/dts/aspeed-ast2500-evb.dts | 20 +++++++++
>> arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 16 +++++++
>> arch/arm/boot/dts/aspeed-g4.dtsi | 29 ++++++++++++
>> arch/arm/boot/dts/aspeed-g5.dtsi | 63 +++++++++++++++++++++++++++
>> 4 files changed, 128 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
>> index d967603dade8..8f82e8ab1875 100644
>> --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
>> +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
>> @@ -20,6 +20,26 @@
>> };
>> };
>>
>> +&fmc {
>> + status = "okay";
>> + flash at 0 {
>> + status = "okay";
>> + label = "bmc";
>> + };
>> +};
>> +
>> +&spi1 {
>> + status = "okay";
>> + flash at 0 {
>> + status = "okay";
>> + label = "pnor";
>> + };
>> +};
>> +
>> +&spi2 {
>> + status = "okay";
>> +};
>> +
>> &uart5 {
>> status = "okay";
>> };
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> index 1d2fc1e1dc29..aab1889f702f 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
>> @@ -31,6 +31,22 @@
>> };
>> };
>>
>> +&fmc {
>> + status = "okay";
>> + flash at 0 {
>> + status = "okay";
>> + label = "bmc";
>> + };
>> +};
>> +
>> +&spi {
>> + status = "okay";
>> + flash at 0 {
>> + status = "okay";
>> + label = "pnor";
>> + };
>> +};
>> +
>> &uart5 {
>> status = "okay";
>> };
>> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
>> index 0b4932cc02a8..7ef6442d0ade 100644
>> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
>> @@ -33,6 +33,35 @@
>> #size-cells = <1>;
>> ranges;
>>
>> + fmc: flash-controller at 1e620000 {
>> + reg = < 0x1e620000 0x94
>> + 0x20000000 0x02000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2400-fmc";
>> + status = "disabled";
>> + interrupts = <19>;
>> + flash at 0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + spi: flash-controller at 1e630000 {
>> + reg = < 0x1e630000 0x18
>> + 0x30000000 0x02000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2400-spi";
>> + status = "disabled";
>> + flash at 0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> vic: interrupt-controller at 1e6c0080 {
>> compatible = "aspeed,ast2400-vic";
>> interrupt-controller;
>> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
>> index b664fe380936..8970f3cb8e2b 100644
>> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
>> @@ -24,6 +24,69 @@
>> #size-cells = <1>;
>> ranges;
>>
>> + fmc: flash-controller at 1e620000 {
>> + reg = < 0x1e620000 0xc4
>> + 0x20000000 0x10000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2500-fmc";
>> + status = "disabled";
>> + interrupts = <19>;
>> + flash at 0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash at 1 {
>> + reg = < 1 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash at 2 {
>> + reg = < 2 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + spi1: flash-controller at 1e630000 {
>> + reg = < 0x1e630000 0xc4
>> + 0x30000000 0x08000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2500-spi";
>> + status = "disabled";
>> + flash at 0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash at 1 {
>> + reg = < 1 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> + spi2: flash-controller at 1e631000 {
>> + reg = < 0x1e631000 0xc4
>> + 0x38000000 0x08000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "aspeed,ast2500-spi";
>> + status = "disabled";
>> + flash at 0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + flash at 1 {
>> + reg = < 1 >;
>> + compatible = "jedec,spi-nor";
>> + status = "disabled";
>> + };
>> + };
>> +
>> vic: interrupt-controller at 1e6c0080 {
>> compatible = "aspeed,ast2400-vic";
>> interrupt-controller;
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2017-03-06 7:35 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-03-01 14:26 [PATCH 0/2] aspeed: add bindings and defconfig for SPI controllers Cédric Le Goater
2017-03-01 14:26 ` Cédric Le Goater
2017-03-01 14:26 ` [PATCH 1/2] ARM: dts: aspeed: add SPI controller bindings Cédric Le Goater
2017-03-01 14:26 ` Cédric Le Goater
[not found] ` <1488378403-24640-2-git-send-email-clg-Bxea+6Xhats@public.gmane.org>
2017-03-05 23:13 ` Joel Stanley
2017-03-05 23:13 ` Joel Stanley
2017-03-06 7:35 ` Cédric Le Goater
2017-03-06 7:35 ` Cédric Le Goater
2017-03-01 14:26 ` [PATCH 2/2] ARM: aspeed: Add CONFIG_SPI_ASPEED_SMC Cédric Le Goater
2017-03-01 14:26 ` Cédric Le Goater
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