[PATCH 0/5] ARM: OMAP2+: Add and enable operating-points-v2

[PATCH 0/5] ARM: OMAP2+: Add and enable operating-points-v2

[Dave Gerlach]

Hi,
This series adds the necessary changes to get proper operating-points-v2 tables
for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq
driver and allows the platform to detect which CPU OPPs are valid for the
configuration in use and enable them.

This series adds complete tables for am335x and adds 1GHz support for all
beaglebone black boards and updates the already merged but unused am437x table
to match the finalized DT bindings. It also moves the existing dra7xx/am57xx
OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator
support which will come at a later date.

Also, now that so many TI platforms will depend on the ti-cpufreq driver let's
add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the
default configuration.

Pushed a branch containing these patches on top of v4.11-rc1 if anyone wants
to try it out [1].

Regards,
Dave

[1] https://github.com/dgerlach/linux-pm/tree/upstream/v4.11/ti-cpufreq-dts

Dave Gerlach (5):
  ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
  ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
  ARM: dts: am4372: Update operating-points-v2 table for cpu
  ARM: dts: dra7: Add updated operating-points-v2 table for cpu
  ARM: omap2plus_defconfig: Enable support for ti-cpufreq

 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++
 arch/arm/boot/dts/am33xx.dtsi          | 87 +++++++++++++++++++++++++++++-----
 arch/arm/boot/dts/am4372.dtsi          |  7 ++-
 arch/arm/boot/dts/dra7.dtsi            | 24 ++++++++--
 arch/arm/boot/dts/dra74x.dtsi          |  5 ++
 arch/arm/configs/omap2plus_defconfig   |  1 +
 6 files changed, 113 insertions(+), 22 deletions(-)

-- 
2.11.0

[PATCH 0/5] ARM: OMAP2+: Add and enable operating-points-v2

[Dave Gerlach]

Hi,
This series adds the necessary changes to get proper operating-points-v2 tables
for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq
driver and allows the platform to detect which CPU OPPs are valid for the
configuration in use and enable them.

This series adds complete tables for am335x and adds 1GHz support for all
beaglebone black boards and updates the already merged but unused am437x table
to match the finalized DT bindings. It also moves the existing dra7xx/am57xx
OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator
support which will come at a later date.

Also, now that so many TI platforms will depend on the ti-cpufreq driver let's
add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the
default configuration.

Pushed a branch containing these patches on top of v4.11-rc1 if anyone wants
to try it out [1].

Regards,
Dave

[1] https://github.com/dgerlach/linux-pm/tree/upstream/v4.11/ti-cpufreq-dts

Dave Gerlach (5):
  ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
  ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
  ARM: dts: am4372: Update operating-points-v2 table for cpu
  ARM: dts: dra7: Add updated operating-points-v2 table for cpu
  ARM: omap2plus_defconfig: Enable support for ti-cpufreq

 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++
 arch/arm/boot/dts/am33xx.dtsi          | 87 +++++++++++++++++++++++++++++-----
 arch/arm/boot/dts/am4372.dtsi          |  7 ++-
 arch/arm/boot/dts/dra7.dtsi            | 24 ++++++++--
 arch/arm/boot/dts/dra74x.dtsi          |  5 ++
 arch/arm/configs/omap2plus_defconfig   |  1 +
 6 files changed, 113 insertions(+), 22 deletions(-)

-- 
2.11.0

[PATCH 1/5] ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

[Dave Gerlach]

After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in am33xx.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.

Signed-off-by: Dave Gerlach <d-gerlach-l0cyMroinI0@public.gmane.org>
---
 arch/arm/boot/dts/am33xx.dtsi | 87 ++++++++++++++++++++++++++++++++++++-------
 1 file changed, 74 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 9e96d60976b7..9e242943dcec 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -46,19 +46,7 @@
 			device_type = "cpu";
 			reg = <0>;
 
-			/*
-			 * To consider voltage drop between PMIC and SoC,
-			 * tolerance value is reduced to 2% from 4% and
-			 * voltage value is increased as a precaution.
-			 */
-			operating-points = <
-				/* kHz    uV */
-				720000  1285000
-				600000  1225000
-				500000  1125000
-				275000  1125000
-			>;
-			voltage-tolerance = <2>; /* 2 percentage */
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -67,6 +55,79 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
+
+		/*
+		 * The three following nodes are marked with opp-suspend
+		 * because the can not be enabled simultaneously on a
+		 * single SoC.
+		 */
+		opp50@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <950000 931000 969000>;
+			opp-supported-hw = <0x06 0x0010>;
+			opp-suspend;
+		};
+
+		opp100@275000000 {
+			opp-hz = /bits/ 64 <275000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0x00FF>;
+			opp-suspend;
+		};
+
+		opp100@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0020>;
+			opp-suspend;
+		};
+
+		opp100@500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp100@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0040>;
+		};
+
+		opp120@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp120@720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x06 0x0080>;
+		};
+
+		oppturbo@720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		oppturbo@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x06 0x0100>;
+		};
+
+		oppnitro@1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1325000 1298500 1351500>;
+			opp-supported-hw = <0x04 0x0200>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a8-pmu";
 		interrupts = <3>;
-- 
2.11.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 1/5] ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

[Dave Gerlach]

After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in am33xx.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi | 87 ++++++++++++++++++++++++++++++++++++-------
 1 file changed, 74 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 9e96d60976b7..9e242943dcec 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -46,19 +46,7 @@
 			device_type = "cpu";
 			reg = <0>;
 
-			/*
-			 * To consider voltage drop between PMIC and SoC,
-			 * tolerance value is reduced to 2% from 4% and
-			 * voltage value is increased as a precaution.
-			 */
-			operating-points = <
-				/* kHz    uV */
-				720000  1285000
-				600000  1225000
-				500000  1125000
-				275000  1125000
-			>;
-			voltage-tolerance = <2>; /* 2 percentage */
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -67,6 +55,79 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
+
+		/*
+		 * The three following nodes are marked with opp-suspend
+		 * because the can not be enabled simultaneously on a
+		 * single SoC.
+		 */
+		opp50 at 300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <950000 931000 969000>;
+			opp-supported-hw = <0x06 0x0010>;
+			opp-suspend;
+		};
+
+		opp100 at 275000000 {
+			opp-hz = /bits/ 64 <275000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0x00FF>;
+			opp-suspend;
+		};
+
+		opp100 at 300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0020>;
+			opp-suspend;
+		};
+
+		opp100 at 500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp100 at 600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0040>;
+		};
+
+		opp120 at 600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp120 at 720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x06 0x0080>;
+		};
+
+		oppturbo at 720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		oppturbo at 800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x06 0x0100>;
+		};
+
+		oppnitro at 1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1325000 1298500 1351500>;
+			opp-supported-hw = <0x04 0x0200>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a8-pmu";
 		interrupts = <3>;
-- 
2.11.0

[PATCH 2/5] ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu

[Dave Gerlach]

Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
Beaglebone Blacks may have PG2.0 silicon populated and these particular
parts are guaranteed to support the OPP, so enable it for PG2.0 on
am335x-boneblack only.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index 77273df1a028..935ed17d22e4 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -15,3 +15,14 @@
 	model = "TI AM335x BeagleBone Black";
 	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
 };
+
+&cpu0_opp_table {
+	/*
+	 * All PG 2.0 silicon may not support 1GHz but some of the early
+	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
+	 */
+	oppnitro@1000000000 {
+		opp-supported-hw = <0x06 0x0100>;
+	};
+};
-- 
2.11.0

[PATCH 2/5] ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu

[Dave Gerlach]

Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
Beaglebone Blacks may have PG2.0 silicon populated and these particular
parts are guaranteed to support the OPP, so enable it for PG2.0 on
am335x-boneblack only.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index 77273df1a028..935ed17d22e4 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -15,3 +15,14 @@
 	model = "TI AM335x BeagleBone Black";
 	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
 };
+
+&cpu0_opp_table {
+	/*
+	 * All PG 2.0 silicon may not support 1GHz but some of the early
+	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
+	 */
+	oppnitro at 1000000000 {
+		opp-supported-hw = <0x06 0x0100>;
+	};
+};
-- 
2.11.0

[PATCH 3/5] ARM: dts: am4372: Update operating-points-v2 table for cpu

[Dave Gerlach]

The operatings-points-v2 table for am4372 was merged before any user of
it was present in the kernel and before the binding had been finalized.
The new ti-cpufreq driver and binding expects the platform specific
properties to be part of the operating-points-v2 table rather than the
cpu node so let's move them there as the only user is the ti-cpufreq
driver.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 97fcaf415de1..176e09e9a45e 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -50,15 +50,14 @@
 			clock-names = "cpu";
 
 			operating-points-v2 = <&cpu0_opp_table>;
-			ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
-			ti,syscon-rev = <&scm_conf 0x600>;
 
 			clock-latency = <300000>; /* From omap-cpufreq driver */
 		};
 	};
 
-	cpu0_opp_table: opp_table0 {
-		compatible = "operating-points-v2";
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
 
 		opp50@300000000 {
 			opp-hz = /bits/ 64 <300000000>;
-- 
2.11.0

[PATCH 3/5] ARM: dts: am4372: Update operating-points-v2 table for cpu

[Dave Gerlach]

The operatings-points-v2 table for am4372 was merged before any user of
it was present in the kernel and before the binding had been finalized.
The new ti-cpufreq driver and binding expects the platform specific
properties to be part of the operating-points-v2 table rather than the
cpu node so let's move them there as the only user is the ti-cpufreq
driver.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 97fcaf415de1..176e09e9a45e 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -50,15 +50,14 @@
 			clock-names = "cpu";
 
 			operating-points-v2 = <&cpu0_opp_table>;
-			ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
-			ti,syscon-rev = <&scm_conf 0x600>;
 
 			clock-latency = <300000>; /* From omap-cpufreq driver */
 		};
 	};
 
-	cpu0_opp_table: opp_table0 {
-		compatible = "operating-points-v2";
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
 
 		opp50 at 300000000 {
 			opp-hz = /bits/ 64 <300000000>;
-- 
2.11.0

[PATCH 4/5] ARM: dts: dra7: Add updated operating-points-v2 table for cpu

[Dave Gerlach]

After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in dra7.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.

As we now need to define voltage ranges for each OPP, we define the
minimum and maximum voltage to match the ranges possible for AVS class0
voltage as defined by the DRA7/AM57 Data Manual, with the exception of
using a range for OPP_OD based on historical data to ensure that SoCs
from older lots still continue to boot, even though more optimal voltages
are now the standard. Once an AVS Class0 driver is in place it will be
possible for these OPP voltages to be adjusted to any voltage within the
provided range.

Information from SPRS953, Revised December 2015.

Signed-off-by: Dave Gerlach <d-gerlach-l0cyMroinI0@public.gmane.org>
---
 arch/arm/boot/dts/dra7.dtsi   | 24 +++++++++++++++++++-----
 arch/arm/boot/dts/dra74x.dtsi |  5 +++++
 2 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 2c9e56f4aac5..e9dc314b0dcf 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -81,11 +81,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0>;
 
-			operating-points = <
-				/* kHz    uV */
-				1000000	1060000
-				1176000	1160000
-				>;
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -99,6 +95,24 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_wkup>;
+
+		opp_nom@1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1060000 850000 1150000>;
+			opp-supported-hw = <0xFF 0x01>;
+			opp-suspend;
+		};
+
+		opp_od@1176000000 {
+			opp-hz = /bits/ 64 <1176000000>;
+			opp-microvolt = <1160000 885000 1160000>;
+			opp-supported-hw = <0xFF 0x02>;
+		};
+	};
+
 	/*
 	 * The soc node represents the soc top level view. It is used for IPs
 	 * that are not memory mapped in the MPU view or for the MPU itself.
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 0a78347e6615..24e6746c5b26 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -17,6 +17,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 	};
 
@@ -79,6 +80,10 @@
 	};
 };
 
+&cpu0_opp_table {
+	opp-shared;
+};
+
 &dss {
 	reg = <0x58000000 0x80>,
 	      <0x58004054 0x4>,
-- 
2.11.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 4/5] ARM: dts: dra7: Add updated operating-points-v2 table for cpu

[Dave Gerlach]

After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in dra7.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.

As we now need to define voltage ranges for each OPP, we define the
minimum and maximum voltage to match the ranges possible for AVS class0
voltage as defined by the DRA7/AM57 Data Manual, with the exception of
using a range for OPP_OD based on historical data to ensure that SoCs
from older lots still continue to boot, even though more optimal voltages
are now the standard. Once an AVS Class0 driver is in place it will be
possible for these OPP voltages to be adjusted to any voltage within the
provided range.

Information from SPRS953, Revised December 2015.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi   | 24 +++++++++++++++++++-----
 arch/arm/boot/dts/dra74x.dtsi |  5 +++++
 2 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 2c9e56f4aac5..e9dc314b0dcf 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -81,11 +81,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0>;
 
-			operating-points = <
-				/* kHz    uV */
-				1000000	1060000
-				1176000	1160000
-				>;
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -99,6 +95,24 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_wkup>;
+
+		opp_nom at 1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1060000 850000 1150000>;
+			opp-supported-hw = <0xFF 0x01>;
+			opp-suspend;
+		};
+
+		opp_od at 1176000000 {
+			opp-hz = /bits/ 64 <1176000000>;
+			opp-microvolt = <1160000 885000 1160000>;
+			opp-supported-hw = <0xFF 0x02>;
+		};
+	};
+
 	/*
 	 * The soc node represents the soc top level view. It is used for IPs
 	 * that are not memory mapped in the MPU view or for the MPU itself.
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 0a78347e6615..24e6746c5b26 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -17,6 +17,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 	};
 
@@ -79,6 +80,10 @@
 	};
 };
 
+&cpu0_opp_table {
+	opp-shared;
+};
+
 &dss {
 	reg = <0x58000000 0x80>,
 	      <0x58004054 0x4>,
-- 
2.11.0

[PATCH 5/5] ARM: omap2plus_defconfig: Enable support for ti-cpufreq

[Dave Gerlach]

AM335x, AM437x, DRA7xx, and AM57xx platforms all now depend on
ti-cpufreq driver to enable proper OPPs for use with cpufreq, so
enable the same.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/configs/omap2plus_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index f2462a6bdba6..62a4b6cf16f0 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -64,6 +64,7 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPUFREQ_DT=m
+CONFIG_ARM_TI_CPUFREQ=y
 # CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
 CONFIG_CPU_IDLE=y
 CONFIG_BINFMT_MISC=y
-- 
2.11.0

[PATCH 5/5] ARM: omap2plus_defconfig: Enable support for ti-cpufreq

[Dave Gerlach]

AM335x, AM437x, DRA7xx, and AM57xx platforms all now depend on
ti-cpufreq driver to enable proper OPPs for use with cpufreq, so
enable the same.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/configs/omap2plus_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index f2462a6bdba6..62a4b6cf16f0 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -64,6 +64,7 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPUFREQ_DT=m
+CONFIG_ARM_TI_CPUFREQ=y
 # CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
 CONFIG_CPU_IDLE=y
 CONFIG_BINFMT_MISC=y
-- 
2.11.0

Re: [PATCH 1/5] ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:38 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> After the ti-cpufreq driver has been added, we can now drop the
> operating-points table present in am33xx.dtsi for the cpu and add an
> operating-points-v2 table with all OPPs available for all silicon
> revisions. Also add necessary data for use by ti-cpufreq to
> selectively enable the appropriate OPPs at runtime as part of the
> operating-points table.
> 
> Information from AM335x Data Manual, SPRS717i, Revised December 2015,
> Table 5-7.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

[PATCH 1/5] ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:38 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> After the ti-cpufreq driver has been added, we can now drop the
> operating-points table present in am33xx.dtsi for the cpu and add an
> operating-points-v2 table with all OPPs available for all silicon
> revisions. Also add necessary data for use by ti-cpufreq to
> selectively enable the appropriate OPPs at runtime as part of the
> operating-points table.
> 
> Information from AM335x Data Manual, SPRS717i, Revised December 2015,
> Table 5-7.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

Re: [PATCH 2/5] ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:39 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
> Beaglebone Blacks may have PG2.0 silicon populated and these
> particular parts are guaranteed to support the OPP, so enable it for
> PG2.0 on am335x-boneblack only.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/am335x-boneblack.dts
> b/arch/arm/boot/dts/am335x-boneblack.dts index
> 77273df1a028..935ed17d22e4 100644 ---
> a/arch/arm/boot/dts/am335x-boneblack.dts +++
> b/arch/arm/boot/dts/am335x-boneblack.dts @@ -15,3 +15,14 @@
>  	model = "TI AM335x BeagleBone Black";
>  	compatible = "ti,am335x-bone-black", "ti,am335x-bone",
> "ti,am33xx"; };
> +
> +&cpu0_opp_table {
> +	/*
> +	 * All PG 2.0 silicon may not support 1GHz but some of the
> early
> +	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
> +	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
> +	 */
> +	oppnitro@1000000000 {
> +		opp-supported-hw = <0x06 0x0100>;
> +	};
> +};




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

[PATCH 2/5] ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:39 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
> Beaglebone Blacks may have PG2.0 silicon populated and these
> particular parts are guaranteed to support the OPP, so enable it for
> PG2.0 on am335x-boneblack only.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/am335x-boneblack.dts
> b/arch/arm/boot/dts/am335x-boneblack.dts index
> 77273df1a028..935ed17d22e4 100644 ---
> a/arch/arm/boot/dts/am335x-boneblack.dts +++
> b/arch/arm/boot/dts/am335x-boneblack.dts @@ -15,3 +15,14 @@
>  	model = "TI AM335x BeagleBone Black";
>  	compatible = "ti,am335x-bone-black", "ti,am335x-bone",
> "ti,am33xx"; };
> +
> +&cpu0_opp_table {
> +	/*
> +	 * All PG 2.0 silicon may not support 1GHz but some of the
> early
> +	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
> +	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
> +	 */
> +	oppnitro at 1000000000 {
> +		opp-supported-hw = <0x06 0x0100>;
> +	};
> +};




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

Re: [PATCH 3/5] ARM: dts: am4372: Update operating-points-v2 table for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:40 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> The operatings-points-v2 table for am4372 was merged before any user
> of it was present in the kernel and before the binding had been
> finalized. The new ti-cpufreq driver and binding expects the platform
> specific properties to be part of the operating-points-v2 table
> rather than the cpu node so let's move them there as the only user is
> the ti-cpufreq driver.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/boot/dts/am4372.dtsi | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/am4372.dtsi
> b/arch/arm/boot/dts/am4372.dtsi index 97fcaf415de1..176e09e9a45e
> 100644 --- a/arch/arm/boot/dts/am4372.dtsi
> +++ b/arch/arm/boot/dts/am4372.dtsi
> @@ -50,15 +50,14 @@
>  			clock-names = "cpu";
>  
>  			operating-points-v2 = <&cpu0_opp_table>;
> -			ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
> -			ti,syscon-rev = <&scm_conf 0x600>;
>  
>  			clock-latency = <300000>; /* From
> omap-cpufreq driver */ };
>  	};
>  
> -	cpu0_opp_table: opp_table0 {
> -		compatible = "operating-points-v2";
> +	cpu0_opp_table: opp-table {
> +		compatible = "operating-points-v2-ti-cpu";
> +		syscon = <&scm_conf>;
>  
>  		opp50@300000000 {
>  			opp-hz = /bits/ 64 <300000000>;




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

[PATCH 3/5] ARM: dts: am4372: Update operating-points-v2 table for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:40 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> The operatings-points-v2 table for am4372 was merged before any user
> of it was present in the kernel and before the binding had been
> finalized. The new ti-cpufreq driver and binding expects the platform
> specific properties to be part of the operating-points-v2 table
> rather than the cpu node so let's move them there as the only user is
> the ti-cpufreq driver.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/boot/dts/am4372.dtsi | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/am4372.dtsi
> b/arch/arm/boot/dts/am4372.dtsi index 97fcaf415de1..176e09e9a45e
> 100644 --- a/arch/arm/boot/dts/am4372.dtsi
> +++ b/arch/arm/boot/dts/am4372.dtsi
> @@ -50,15 +50,14 @@
>  			clock-names = "cpu";
>  
>  			operating-points-v2 = <&cpu0_opp_table>;
> -			ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
> -			ti,syscon-rev = <&scm_conf 0x600>;
>  
>  			clock-latency = <300000>; /* From
> omap-cpufreq driver */ };
>  	};
>  
> -	cpu0_opp_table: opp_table0 {
> -		compatible = "operating-points-v2";
> +	cpu0_opp_table: opp-table {
> +		compatible = "operating-points-v2-ti-cpu";
> +		syscon = <&scm_conf>;
>  
>  		opp50 at 300000000 {
>  			opp-hz = /bits/ 64 <300000000>;




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

Re: [PATCH 4/5] ARM: dts: dra7: Add updated operating-points-v2 table for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:41 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> After the ti-cpufreq driver has been added, we can now drop the
> operating-points table present in dra7.dtsi for the cpu and add an
> operating-points-v2 table with all OPPs available for all silicon
> revisions. Also add necessary data for use by ti-cpufreq to
> selectively enable the appropriate OPPs at runtime as part of the
> operating-points table.
> 
> As we now need to define voltage ranges for each OPP, we define the
> minimum and maximum voltage to match the ranges possible for AVS
> class0 voltage as defined by the DRA7/AM57 Data Manual, with the
> exception of using a range for OPP_OD based on historical data to
> ensure that SoCs from older lots still continue to boot, even though
> more optimal voltages are now the standard. Once an AVS Class0 driver
> is in place it will be possible for these OPP voltages to be adjusted
> to any voltage within the provided range.
> 
> Information from SPRS953, Revised December 2015.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/boot/dts/dra7.dtsi   | 24 +++++++++++++++++++-----
>  arch/arm/boot/dts/dra74x.dtsi |  5 +++++
>  2 files changed, 24 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 2c9e56f4aac5..e9dc314b0dcf 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -81,11 +81,7 @@
>  			compatible = "arm,cortex-a15";
>  			reg = <0>;
>  
> -			operating-points = <
> -				/* kHz    uV */
> -				1000000	1060000
> -				1176000	1160000
> -				>;
> +			operating-points-v2 = <&cpu0_opp_table>;
>  
>  			clocks = <&dpll_mpu_ck>;
>  			clock-names = "cpu";
> @@ -99,6 +95,24 @@
>  		};
>  	};
>  
> +	cpu0_opp_table: opp-table {
> +		compatible = "operating-points-v2-ti-cpu";
> +		syscon = <&scm_wkup>;
> +
> +		opp_nom@1000000000 {
> +			opp-hz = /bits/ 64 <1000000000>;
> +			opp-microvolt = <1060000 850000 1150000>;
> +			opp-supported-hw = <0xFF 0x01>;
> +			opp-suspend;
> +		};
> +
> +		opp_od@1176000000 {
> +			opp-hz = /bits/ 64 <1176000000>;
> +			opp-microvolt = <1160000 885000 1160000>;
> +			opp-supported-hw = <0xFF 0x02>;
> +		};
> +	};
> +
>  	/*
>  	 * The soc node represents the soc top level view. It is
> used for IPs
>  	 * that are not memory mapped in the MPU view or for the MPU
> itself. diff --git a/arch/arm/boot/dts/dra74x.dtsi
> b/arch/arm/boot/dts/dra74x.dtsi index 0a78347e6615..24e6746c5b26
> 100644 --- a/arch/arm/boot/dts/dra74x.dtsi
> +++ b/arch/arm/boot/dts/dra74x.dtsi
> @@ -17,6 +17,7 @@
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a15";
>  			reg = <1>;
> +			operating-points-v2 = <&cpu0_opp_table>;
>  		};
>  	};
>  
> @@ -79,6 +80,10 @@
>  	};
>  };
>  
> +&cpu0_opp_table {
> +	opp-shared;
> +};
> +
>  &dss {
>  	reg = <0x58000000 0x80>,
>  	      <0x58004054 0x4>,




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

[PATCH 4/5] ARM: dts: dra7: Add updated operating-points-v2 table for cpu

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:41 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> After the ti-cpufreq driver has been added, we can now drop the
> operating-points table present in dra7.dtsi for the cpu and add an
> operating-points-v2 table with all OPPs available for all silicon
> revisions. Also add necessary data for use by ti-cpufreq to
> selectively enable the appropriate OPPs at runtime as part of the
> operating-points table.
> 
> As we now need to define voltage ranges for each OPP, we define the
> minimum and maximum voltage to match the ranges possible for AVS
> class0 voltage as defined by the DRA7/AM57 Data Manual, with the
> exception of using a range for OPP_OD based on historical data to
> ensure that SoCs from older lots still continue to boot, even though
> more optimal voltages are now the standard. Once an AVS Class0 driver
> is in place it will be possible for these OPP voltages to be adjusted
> to any voltage within the provided range.
> 
> Information from SPRS953, Revised December 2015.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/boot/dts/dra7.dtsi   | 24 +++++++++++++++++++-----
>  arch/arm/boot/dts/dra74x.dtsi |  5 +++++
>  2 files changed, 24 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 2c9e56f4aac5..e9dc314b0dcf 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -81,11 +81,7 @@
>  			compatible = "arm,cortex-a15";
>  			reg = <0>;
>  
> -			operating-points = <
> -				/* kHz    uV */
> -				1000000	1060000
> -				1176000	1160000
> -				>;
> +			operating-points-v2 = <&cpu0_opp_table>;
>  
>  			clocks = <&dpll_mpu_ck>;
>  			clock-names = "cpu";
> @@ -99,6 +95,24 @@
>  		};
>  	};
>  
> +	cpu0_opp_table: opp-table {
> +		compatible = "operating-points-v2-ti-cpu";
> +		syscon = <&scm_wkup>;
> +
> +		opp_nom at 1000000000 {
> +			opp-hz = /bits/ 64 <1000000000>;
> +			opp-microvolt = <1060000 850000 1150000>;
> +			opp-supported-hw = <0xFF 0x01>;
> +			opp-suspend;
> +		};
> +
> +		opp_od at 1176000000 {
> +			opp-hz = /bits/ 64 <1176000000>;
> +			opp-microvolt = <1160000 885000 1160000>;
> +			opp-supported-hw = <0xFF 0x02>;
> +		};
> +	};
> +
>  	/*
>  	 * The soc node represents the soc top level view. It is
> used for IPs
>  	 * that are not memory mapped in the MPU view or for the MPU
> itself. diff --git a/arch/arm/boot/dts/dra74x.dtsi
> b/arch/arm/boot/dts/dra74x.dtsi index 0a78347e6615..24e6746c5b26
> 100644 --- a/arch/arm/boot/dts/dra74x.dtsi
> +++ b/arch/arm/boot/dts/dra74x.dtsi
> @@ -17,6 +17,7 @@
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a15";
>  			reg = <1>;
> +			operating-points-v2 = <&cpu0_opp_table>;
>  		};
>  	};
>  
> @@ -79,6 +80,10 @@
>  	};
>  };
>  
> +&cpu0_opp_table {
> +	opp-shared;
> +};
> +
>  &dss {
>  	reg = <0x58000000 0x80>,
>  	      <0x58004054 0x4>,




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

Re: [PATCH 5/5] ARM: omap2plus_defconfig: Enable support for ti-cpufreq

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:42 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> AM335x, AM437x, DRA7xx, and AM57xx platforms all now depend on
> ti-cpufreq driver to enable proper OPPs for use with cpufreq, so
> enable the same.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/configs/omap2plus_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/configs/omap2plus_defconfig
> b/arch/arm/configs/omap2plus_defconfig index
> f2462a6bdba6..62a4b6cf16f0 100644 ---
> a/arch/arm/configs/omap2plus_defconfig +++
> b/arch/arm/configs/omap2plus_defconfig @@ -64,6 +64,7 @@
> CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y
>  CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
>  CONFIG_CPUFREQ_DT=m
> +CONFIG_ARM_TI_CPUFREQ=y
>  # CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
>  CONFIG_CPU_IDLE=y
>  CONFIG_BINFMT_MISC=y




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

[PATCH 5/5] ARM: omap2plus_defconfig: Enable support for ti-cpufreq

[Lukasz Majewski]

On Mon, 6 Mar 2017 09:23:42 -0600
Dave Gerlach <d-gerlach@ti.com> wrote:

> AM335x, AM437x, DRA7xx, and AM57xx platforms all now depend on
> ti-cpufreq driver to enable proper OPPs for use with cpufreq, so
> enable the same.
> 
> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>

Reviewed-by: Lukasz Majewski <lukma@denx.de>

> ---
>  arch/arm/configs/omap2plus_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/configs/omap2plus_defconfig
> b/arch/arm/configs/omap2plus_defconfig index
> f2462a6bdba6..62a4b6cf16f0 100644 ---
> a/arch/arm/configs/omap2plus_defconfig +++
> b/arch/arm/configs/omap2plus_defconfig @@ -64,6 +64,7 @@
> CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y
>  CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
>  CONFIG_CPUFREQ_DT=m
> +CONFIG_ARM_TI_CPUFREQ=y
>  # CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
>  CONFIG_CPU_IDLE=y
>  CONFIG_BINFMT_MISC=y




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

Re: [PATCH 0/5] ARM: OMAP2+: Add and enable operating-points-v2

[Viresh Kumar]

On 06-03-17, 09:23, Dave Gerlach wrote:
> Hi,
> This series adds the necessary changes to get proper operating-points-v2 tables
> for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq
> driver and allows the platform to detect which CPU OPPs are valid for the
> configuration in use and enable them.
> 
> This series adds complete tables for am335x and adds 1GHz support for all
> beaglebone black boards and updates the already merged but unused am437x table
> to match the finalized DT bindings. It also moves the existing dra7xx/am57xx
> OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator
> support which will come at a later date.
> 
> Also, now that so many TI platforms will depend on the ti-cpufreq driver let's
> add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the
> default configuration.
> 
> Pushed a branch containing these patches on top of v4.11-rc1 if anyone wants
> to try it out [1].

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

[PATCH 0/5] ARM: OMAP2+: Add and enable operating-points-v2

[Viresh Kumar]

On 06-03-17, 09:23, Dave Gerlach wrote:
> Hi,
> This series adds the necessary changes to get proper operating-points-v2 tables
> for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq
> driver and allows the platform to detect which CPU OPPs are valid for the
> configuration in use and enable them.
> 
> This series adds complete tables for am335x and adds 1GHz support for all
> beaglebone black boards and updates the already merged but unused am437x table
> to match the finalized DT bindings. It also moves the existing dra7xx/am57xx
> OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator
> support which will come at a later date.
> 
> Also, now that so many TI platforms will depend on the ti-cpufreq driver let's
> add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the
> default configuration.
> 
> Pushed a branch containing these patches on top of v4.11-rc1 if anyone wants
> to try it out [1].

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

Re: [PATCH 0/5] ARM: OMAP2+: Add and enable operating-points-v2

[Tony Lindgren]

* Dave Gerlach <d-gerlach@ti.com> [170306 07:26]:
> Hi,
> This series adds the necessary changes to get proper operating-points-v2 tables
> for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq
> driver and allows the platform to detect which CPU OPPs are valid for the
> configuration in use and enable them.
> 
> This series adds complete tables for am335x and adds 1GHz support for all
> beaglebone black boards and updates the already merged but unused am437x table
> to match the finalized DT bindings. It also moves the existing dra7xx/am57xx
> OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator
> support which will come at a later date.
> 
> Also, now that so many TI platforms will depend on the ti-cpufreq driver let's
> add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the
> default configuration.

Applying all for v4.12 into dt-v2 and defconfig branches.

Thanks,

Tony

[PATCH 0/5] ARM: OMAP2+: Add and enable operating-points-v2

[Tony Lindgren]

* Dave Gerlach <d-gerlach@ti.com> [170306 07:26]:
> Hi,
> This series adds the necessary changes to get proper operating-points-v2 tables
> for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq
> driver and allows the platform to detect which CPU OPPs are valid for the
> configuration in use and enable them.
> 
> This series adds complete tables for am335x and adds 1GHz support for all
> beaglebone black boards and updates the already merged but unused am437x table
> to match the finalized DT bindings. It also moves the existing dra7xx/am57xx
> OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator
> support which will come at a later date.
> 
> Also, now that so many TI platforms will depend on the ti-cpufreq driver let's
> add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the
> default configuration.

Applying all for v4.12 into dt-v2 and defconfig branches.

Thanks,

Tony