From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: "# v4 . 9" <stable@vger.kernel.org>
Subject: Re: [PATCH] drm/i915: Check we have an wake device before flushing GTT writes
Date: Mon, 27 Mar 2017 13:29:18 +0300 [thread overview]
Message-ID: <1490610558.3166.15.camel@linux.intel.com> (raw)
In-Reply-To: <20170323150053.28582-1-chris@chris-wilson.co.uk>
On to, 2017-03-23 at 15:00 +0000, Chris Wilson wrote:
> We can assume that if the device is asleep then all pending GTT writes
> will have been posted, and so we can defer the flush from
> i915_gem_object_flush_gtt_write_domain()
>
> [ 1957.462568] WARNING: CPU: 0 PID: 6132 at drivers/gpu/drm/i915/intel_drv.h:1742 fwtable_read32+0x123/0x150 [i915]
> [ 1957.462582] RPM wakelock ref not held during HW access
> [ 1957.462583] Modules linked in: i915 intel_gtt drm_kms_helper prime_numbers
> [ 1957.462607] CPU: 0 PID: 6132 Comm: gem_concurrent_ Tainted: G U 4.11.0-rc1+ #464
> [ 1957.462619] Hardware name: / , BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
> [ 1957.462630] Call Trace:
> [ 1957.462646] dump_stack+0x4d/0x6f
> [ 1957.462657] __warn+0xc1/0xe0
> [ 1957.462667] warn_slowpath_fmt+0x4a/0x50
> [ 1957.462709] fwtable_read32+0x123/0x150 [i915]
> [ 1957.462750] i915_gem_object_flush_gtt_write_domain+0x43/0x70 [i915]
> [ 1957.462791] i915_gem_object_set_to_cpu_domain+0x46/0xa0 [i915]
> [ 1957.462831] i915_gem_set_domain_ioctl+0x15d/0x220 [i915]
> [ 1957.462843] drm_ioctl+0x1d7/0x440
> [ 1957.462885] ? i915_gem_obj_prepare_shmem_write+0x1d0/0x1d0 [i915]
> [ 1957.462896] ? pick_next_task_fair+0x436/0x440
> [ 1957.462906] ? mntput+0x1f/0x30
> [ 1957.462915] do_vfs_ioctl+0x8f/0x5c0
> [ 1957.462925] ? __schedule+0x16f/0x5f0
> [ 1957.462935] ? ____fput+0x9/0x10
> [ 1957.462943] SyS_ioctl+0x3c/0x70
> [ 1957.462952] entry_SYSCALL_64_fastpath+0x17/0x98
> [ 1957.462961] RIP: 0033:0x7fc542179ca7
> [ 1957.462968] RSP: 002b:00007ffeef12ff98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
> [ 1957.462982] RAX: ffffffffffffffda RBX: 00007ffeef1301d0 RCX: 00007fc542179ca7
> [ 1957.462990] RDX: 00007ffeef12ffd0 RSI: 00000000400c645f RDI: 0000000000000003
> [ 1957.462999] RBP: 0000000000000003 R08: 000055f433bc7c40 R09: 000000000000002c
> [ 1957.463006] R10: 0000000000000073 R11: 0000000000000246 R12: 0000000000000018
> [ 1957.463015] R13: 000055f432c89d20 R14: 000055f432c87690 R15: 0000000000000000
>
> Fixes: 3b5724d702ef ("drm/i915: Wait for writes through the GTT to land before reading back")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v4.9
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
WARNING: multiple messages have this Message-ID (diff)
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: "# v4 . 9" <stable@vger.kernel.org>
Subject: Re: [PATCH] drm/i915: Check we have an wake device before flushing GTT writes
Date: Mon, 27 Mar 2017 13:29:18 +0300 [thread overview]
Message-ID: <1490610558.3166.15.camel@linux.intel.com> (raw)
In-Reply-To: <20170323150053.28582-1-chris@chris-wilson.co.uk>
On to, 2017-03-23 at 15:00 +0000, Chris Wilson wrote:
> We can assume that if the device is asleep then all pending GTT writes
> will have been posted, and so we can defer the flush from
> i915_gem_object_flush_gtt_write_domain()
>
> [ 1957.462568] WARNING: CPU: 0 PID: 6132 at drivers/gpu/drm/i915/intel_drv.h:1742 fwtable_read32+0x123/0x150 [i915]
> [ 1957.462582] RPM wakelock ref not held during HW access
> [ 1957.462583] Modules linked in: i915 intel_gtt drm_kms_helper prime_numbers
> [ 1957.462607] CPU: 0 PID: 6132 Comm: gem_concurrent_ Tainted: G U 4.11.0-rc1+ #464
> [ 1957.462619] Hardware name: / , BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
> [ 1957.462630] Call Trace:
> [ 1957.462646] dump_stack+0x4d/0x6f
> [ 1957.462657] __warn+0xc1/0xe0
> [ 1957.462667] warn_slowpath_fmt+0x4a/0x50
> [ 1957.462709] fwtable_read32+0x123/0x150 [i915]
> [ 1957.462750] i915_gem_object_flush_gtt_write_domain+0x43/0x70 [i915]
> [ 1957.462791] i915_gem_object_set_to_cpu_domain+0x46/0xa0 [i915]
> [ 1957.462831] i915_gem_set_domain_ioctl+0x15d/0x220 [i915]
> [ 1957.462843] drm_ioctl+0x1d7/0x440
> [ 1957.462885] ? i915_gem_obj_prepare_shmem_write+0x1d0/0x1d0 [i915]
> [ 1957.462896] ? pick_next_task_fair+0x436/0x440
> [ 1957.462906] ? mntput+0x1f/0x30
> [ 1957.462915] do_vfs_ioctl+0x8f/0x5c0
> [ 1957.462925] ? __schedule+0x16f/0x5f0
> [ 1957.462935] ? ____fput+0x9/0x10
> [ 1957.462943] SyS_ioctl+0x3c/0x70
> [ 1957.462952] entry_SYSCALL_64_fastpath+0x17/0x98
> [ 1957.462961] RIP: 0033:0x7fc542179ca7
> [ 1957.462968] RSP: 002b:00007ffeef12ff98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
> [ 1957.462982] RAX: ffffffffffffffda RBX: 00007ffeef1301d0 RCX: 00007fc542179ca7
> [ 1957.462990] RDX: 00007ffeef12ffd0 RSI: 00000000400c645f RDI: 0000000000000003
> [ 1957.462999] RBP: 0000000000000003 R08: 000055f433bc7c40 R09: 000000000000002c
> [ 1957.463006] R10: 0000000000000073 R11: 0000000000000246 R12: 0000000000000018
> [ 1957.463015] R13: 000055f432c89d20 R14: 000055f432c87690 R15: 0000000000000000
>
> Fixes: 3b5724d702ef ("drm/i915: Wait for writes through the GTT to land before reading back")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v4.9
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2017-03-27 10:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 12:40 [PATCH] drm/i915: Check we have an wake device before flushing GTT writes Chris Wilson
2017-03-08 12:40 ` Chris Wilson
2017-03-08 14:53 ` ✗ Fi.CI.BAT: failure for " Patchwork
2017-03-23 15:00 ` [PATCH] " Chris Wilson
2017-03-23 15:00 ` Chris Wilson
2017-03-27 10:29 ` Joonas Lahtinen [this message]
2017-03-27 10:29 ` Joonas Lahtinen
2017-03-27 12:25 ` Chris Wilson
2017-03-27 12:25 ` Chris Wilson
2017-03-23 15:44 ` ✓ Fi.CI.BAT: success for drm/i915: Check we have an wake device before flushing GTT writes (rev2) Patchwork
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