* [U-Boot] [PATCH] ARM: socfpga: Fix broken implementation and enhancing boot header
@ 2017-03-28 9:25 tien.fong.chee at intel.com
2017-03-28 9:38 ` Marek Vasut
0 siblings, 1 reply; 3+ messages in thread
From: tien.fong.chee at intel.com @ 2017-03-28 9:25 UTC (permalink / raw)
To: u-boot
From: "Chee, Tien Fong" <tien.fong.chee@intel.com>
Fixing the broken implementation caused by the patch
commit:ce62e57fc57177352a02b76dace0173bd13404b6, ARM: boot0 hook:
remove macro, include whole header file. This patch also enhances
boot header to contain more special data.
Signed-off-by: Chee, Tien Fong <tien.fong.chee@intel.com>
---
arch/arm/mach-socfpga/include/mach/boot0.h | 30 ++++++++++++++++--------------
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
index aaada31..877866a 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -8,21 +8,23 @@
#define __BOOT0_H
#ifdef CONFIG_SPL_BUILD
-#define ARM_SOC_BOOT0_HOOK \
- .balignl 64,0xf33db33f; \
- \
- .word 0x1337c0d3; /* SoCFPGA preloader validation word */ \
- .word 0xc01df00d; /* Version, flags, length */ \
- .word 0xcafec0d3; /* Checksum, zero-pad */ \
- nop; \
- \
- b reset; /* SoCFPGA jumps here */ \
- nop; \
- nop; \
- nop;
-#else
-#define ARM_SOC_BOOT0_HOOK
+ .balignl 64,0xf33db33f;
+
+ /* Start of header offset */
+ .word 0x1337c0d3; /* SoCFPGA preloader validation word(4B) */
+ .word 0xc01df00d; /* Header length(2B),flags(1B),version(1B) */
+#ifndef CONFIG_TARGET_SOCFPGA_GEN5
+ .word 0xcafec0d3; /* Program length(4B) */
+ .word 0xf00dcafe; /* Program entry offset(4B),relative to */
+ /* the start of program header */
#endif
+ .word 0xfeedface; /* Simple checksum(2B),spare offset(2B) */
+ nop;
+ b reset; /* SoCFPGA jumps here */
+ nop;
+ nop;
+ nop;
+#endif
#endif /* __BOOT0_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] ARM: socfpga: Fix broken implementation and enhancing boot header
2017-03-28 9:25 [U-Boot] [PATCH] ARM: socfpga: Fix broken implementation and enhancing boot header tien.fong.chee at intel.com
@ 2017-03-28 9:38 ` Marek Vasut
2017-03-29 1:02 ` Chee, Tien Fong
0 siblings, 1 reply; 3+ messages in thread
From: Marek Vasut @ 2017-03-28 9:38 UTC (permalink / raw)
To: u-boot
On 03/28/2017 11:25 AM, tien.fong.chee at intel.com wrote:
> From: "Chee, Tien Fong" <tien.fong.chee@intel.com>
>
> Fixing the broken implementation caused by the patch
> commit:ce62e57fc57177352a02b76dace0173bd13404b6, ARM: boot0 hook:
See section 2) here [1] , in particular the part about referencing
commits and the Fixes: tag .
[1] https://www.kernel.org/doc/html/latest/process/submitting-patches.html
> remove macro, include whole header file. This patch also enhances
> boot header to contain more special data.
This should be a separate patch then.
> Signed-off-by: Chee, Tien Fong <tien.fong.chee@intel.com>
> ---
> arch/arm/mach-socfpga/include/mach/boot0.h | 30 ++++++++++++++++--------------
> 1 file changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
> index aaada31..877866a 100644
> --- a/arch/arm/mach-socfpga/include/mach/boot0.h
> +++ b/arch/arm/mach-socfpga/include/mach/boot0.h
> @@ -8,21 +8,23 @@
> #define __BOOT0_H
>
> #ifdef CONFIG_SPL_BUILD
> -#define ARM_SOC_BOOT0_HOOK \
> - .balignl 64,0xf33db33f; \
> - \
> - .word 0x1337c0d3; /* SoCFPGA preloader validation word */ \
> - .word 0xc01df00d; /* Version, flags, length */ \
> - .word 0xcafec0d3; /* Checksum, zero-pad */ \
> - nop; \
> - \
> - b reset; /* SoCFPGA jumps here */ \
> - nop; \
> - nop; \
> - nop;
> -#else
> -#define ARM_SOC_BOOT0_HOOK
> + .balignl 64,0xf33db33f;
> +
> + /* Start of header offset */
> + .word 0x1337c0d3; /* SoCFPGA preloader validation word(4B) */
> + .word 0xc01df00d; /* Header length(2B),flags(1B),version(1B) */
> +#ifndef CONFIG_TARGET_SOCFPGA_GEN5
> + .word 0xcafec0d3; /* Program length(4B) */
> + .word 0xf00dcafe; /* Program entry offset(4B),relative to */
> + /* the start of program header */
> #endif
> + .word 0xfeedface; /* Simple checksum(2B),spare offset(2B) */
> + nop;
>
> + b reset; /* SoCFPGA jumps here */
> + nop;
> + nop;
> + nop;
> +#endif
>
> #endif /* __BOOT0_H */
>
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] ARM: socfpga: Fix broken implementation and enhancing boot header
2017-03-28 9:38 ` Marek Vasut
@ 2017-03-29 1:02 ` Chee, Tien Fong
0 siblings, 0 replies; 3+ messages in thread
From: Chee, Tien Fong @ 2017-03-29 1:02 UTC (permalink / raw)
To: u-boot
On Sel, 2017-03-28 at 11:38 +0200, Marek Vasut wrote:
> On 03/28/2017 11:25 AM, tien.fong.chee at intel.com wrote:
> >
> > From: "Chee, Tien Fong" <tien.fong.chee@intel.com>
> >
> > Fixing the broken implementation caused by the patch
> > commit:ce62e57fc57177352a02b76dace0173bd13404b6, ARM: boot0 hook:
> See section 2) here [1] , in particular the part about referencing
> commits and the Fixes: tag .
>
> [1] https://www.kernel.org/doc/html/latest/process/submitting-patches
> .html
>
> >
> > remove macro, include whole header file. This patch also enhances
> > boot header to contain more special data.
> This should be a separate patch then.
>
okay. Thanks.
> >
> > Signed-off-by: Chee, Tien Fong <tien.fong.chee@intel.com>
> > ---
> > arch/arm/mach-socfpga/include/mach/boot0.h | 30 ++++++++++++++++
> > --------------
> > 1 file changed, 16 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
> > b/arch/arm/mach-socfpga/include/mach/boot0.h
> > index aaada31..877866a 100644
> > --- a/arch/arm/mach-socfpga/include/mach/boot0.h
> > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h
> > @@ -8,21 +8,23 @@
> > #define __BOOT0_H
> >
> > #ifdef CONFIG_SPL_BUILD
> > -#define ARM_SOC_BOOT0_HOOK
> > \
> > - .balignl 64,0xf33db33f;
> > \
> > -
> > \
> > - .word 0x1337c0d3; /* SoCFPGA preloader
> > validation word */ \
> > - .word 0xc01df00d; /* Version, flags, length
> > */ \
> > - .word 0xcafec0d3; /* Checksum, zero-pad */
> > \
> > - nop;
> > \
> > -
> > \
> > - b reset; /* SoCFPGA jumps here */
> > \
> > - nop;
> > \
> > - nop;
> > \
> > - nop;
> > -#else
> > -#define ARM_SOC_BOOT0_HOOK
> > + .balignl 64,0xf33db33f;
> > +
> > + /* Start of header offset */
> > + .word 0x1337c0d3; /* SoCFPGA preloader validation
> > word(4B) */
> > + .word 0xc01df00d; /* Header
> > length(2B),flags(1B),version(1B) */
> > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5
> > + .word 0xcafec0d3; /* Program length(4B) */
> > + .word 0xf00dcafe; /* Program entry
> > offset(4B),relative to */
> > + /* the start of program header */
> > #endif
> > + .word 0xfeedface; /* Simple checksum(2B),spare
> > offset(2B) */
> > + nop;
> >
> > + b reset; /* SoCFPGA jumps here */
> > + nop;
> > + nop;
> > + nop;
> > +#endif
> >
> > #endif /* __BOOT0_H */
> >
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-03-28 9:25 [U-Boot] [PATCH] ARM: socfpga: Fix broken implementation and enhancing boot header tien.fong.chee at intel.com
2017-03-28 9:38 ` Marek Vasut
2017-03-29 1:02 ` Chee, Tien Fong
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