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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Olliver Schinagl <oliver@schinagl.nl>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jslaby@suse.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Alexandre Courbot <gnurou@gmail.com>,
	"David S . Miller" <davem@davemloft.net>
Cc: dev@linux-sunxi.org, Ed Blake <ed.blake@imgtec.com>,
	Alexander Sverdlin <alexander.sverdlin@nokia.com>,
	Yegor Yefremov <yegorslists@googlemail.com>,
	Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>,
	Kefeng Wang <wangkefeng.wang@huawei.com>,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Jason Uy <jason.uy@broadcom.com>,
	Douglas Anderson <dianders@chromium.org>,
	Peter Hurley <peter@hurleysoftware.com>,
	Tony Lindgren <tony@atomide.com>, Vignesh R <vigneshr@ti.com>,
	Thor Thayer <tthayer@opensource.altera.com>,
	David Lechner <david@lechnology.com>,
	Jan Kiszka <jan.kiszka@siemens.com>,
	linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-tegra@vger.kernel.org, sparclinux@vger.kernel.org
Subject: Re: [PATCH] serial: Do not treat the IIR register as a bitfield
Date: Thu, 30 Mar 2017 12:56:03 +0300	[thread overview]
Message-ID: <1490867763.708.62.camel@linux.intel.com> (raw)
In-Reply-To: <20170329184431.6226-1-oliver@schinagl.nl>

On Wed, 2017-03-29 at 20:44 +0200, Olliver Schinagl wrote:
> It seems that at some point, someone made the assumption that the UART
> Interrupt ID Register was a bitfield and started to check if certain
> bits where set.
> 
> Actually however the register contains interrupt ID's where only the
> MSB
> seems to be used singular and the rest share at least one bit. Thus
> doing bitfield operations is wrong.
> 
> This patch cleans up the serial_reg include file by ordering it and
> replacing the UART_IIR_ID 'mask' with a proper mask for the register.
> The OMAP uart appears to have used the two commonly 'reserved' bits 4
> and 5 and thus get an UART_IIR_EXT_MASK for these two bits.
> 
> This patch then goes over all UART_IIR_* users and changes the code
> from
> bitfield checking, to ID checking instead.


Looking to implementation I would rather go with some helper like

int serial_in_IIR(port, [additional mask])
{
 return port->serial_in(port, UART_IIR) & (_IIR_MASK [| additional
mask]);
}

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Olliver Schinagl <oliver@schinagl.nl>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jslaby@suse.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Alexandre Courbot <gnurou@gmail.com>,
	"David S . Miller" <davem@davemloft.net>
Cc: dev@linux-sunxi.org, Ed Blake <ed.blake@imgtec.com>,
	Alexander Sverdlin <alexander.sverdlin@nokia.com>,
	Yegor Yefremov <yegorslists@googlemail.com>,
	Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>,
	Kefeng Wang <wangkefeng.wang@huawei.com>,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Jason Uy <jason.uy@broadcom.com>,
	Douglas Anderson <dianders@chromium.org>,
	Peter Hurley <peter@hurleysoftware.com>,
	Tony Lindgren <tony@atomide.com>, Vignesh R <vigneshr@ti.com>,
	Thor Thayer <tthayer@opensource.altera.com>,
	David Lechner <david@lechnology.com>,
	Jan Kiszka <jan.kiszka@siemens.com>,
	linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-tegra@vger.kernel.org, sparclinux@vger.kernel.org
Subject: Re: [PATCH] serial: Do not treat the IIR register as a bitfield
Date: Thu, 30 Mar 2017 09:56:03 +0000	[thread overview]
Message-ID: <1490867763.708.62.camel@linux.intel.com> (raw)
In-Reply-To: <20170329184431.6226-1-oliver@schinagl.nl>

On Wed, 2017-03-29 at 20:44 +0200, Olliver Schinagl wrote:
> It seems that at some point, someone made the assumption that the UART
> Interrupt ID Register was a bitfield and started to check if certain
> bits where set.
> 
> Actually however the register contains interrupt ID's where only the
> MSB
> seems to be used singular and the rest share at least one bit. Thus
> doing bitfield operations is wrong.
> 
> This patch cleans up the serial_reg include file by ordering it and
> replacing the UART_IIR_ID 'mask' with a proper mask for the register.
> The OMAP uart appears to have used the two commonly 'reserved' bits 4
> and 5 and thus get an UART_IIR_EXT_MASK for these two bits.
> 
> This patch then goes over all UART_IIR_* users and changes the code
> from
> bitfield checking, to ID checking instead.


Looking to implementation I would rather go with some helper like

int serial_in_IIR(port, [additional mask])
{
 return port->serial_in(port, UART_IIR) & (_IIR_MASK [| additional
mask]);
}

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

  reply	other threads:[~2017-03-30  9:56 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-29 18:44 [PATCH] serial: Do not treat the IIR register as a bitfield Olliver Schinagl
2017-03-29 18:44 ` Olliver Schinagl
2017-03-29 18:44 ` Olliver Schinagl
2017-03-30  9:56 ` Andy Shevchenko [this message]
2017-03-30  9:56   ` Andy Shevchenko
     [not found]   ` <1490867763.708.62.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-31 13:54     ` Olliver Schinagl
2017-03-31 13:54       ` Olliver Schinagl
2017-03-31 13:54       ` Olliver Schinagl
2017-03-31 14:44       ` Andy Shevchenko
2017-03-31 14:44         ` Andy Shevchenko
2017-03-31 14:44         ` Andy Shevchenko
     [not found] ` <20170329184431.6226-1-oliver-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>
2017-03-30  6:15   ` Vignesh R
2017-03-30  6:27     ` Vignesh R
2017-03-30  6:15     ` Vignesh R
2017-03-30  6:43     ` Olliver Schinagl
2017-03-30  6:43       ` Olliver Schinagl
2017-03-30  6:43       ` Olliver Schinagl
     [not found]       ` <D694FA74-1F31-4B57-8858-2DBE8DE57D45-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>
2017-03-30  7:57         ` Vignesh R
2017-03-30  8:09           ` Vignesh R
2017-03-30  7:57           ` Vignesh R
2017-03-30 15:39           ` Olliver Schinagl
2017-03-30 15:39             ` Olliver Schinagl
2017-03-30 15:39             ` Olliver Schinagl
2017-03-30 14:11       ` Theodore Ts'o
2017-03-30 14:11         ` Theodore Ts'o
2017-03-30 14:11         ` Theodore Ts'o
     [not found]         ` <20170330141153.mvxa6iqj72hnhlu3-AKGzg7BKzIDYtjvyW6yDsg@public.gmane.org>
2017-03-31 11:28           ` Olliver Schinagl
2017-03-31 11:28         ` Olliver Schinagl
2017-03-31 11:28           ` Olliver Schinagl
2017-03-30 10:06   ` kbuild test robot
2017-03-30 10:06     ` kbuild test robot
2017-03-30 10:06     ` kbuild test robot
2017-03-30 10:22   ` kbuild test robot
2017-03-30 10:22     ` kbuild test robot
2017-03-30 10:22     ` kbuild test robot
     [not found]     ` <201703301843.OZzxWtxO%fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2017-03-30 10:32       ` Andy Shevchenko
2017-03-30 10:32         ` Andy Shevchenko
2017-03-30 10:32         ` Andy Shevchenko
     [not found]         ` <1490869971.708.66.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-30 11:27           ` [kbuild-all] " Fengguang Wu
2017-03-30 11:27             ` Fengguang Wu
2017-03-30 11:27             ` Fengguang Wu
2017-03-30 12:18   ` kbuild test robot
2017-03-30 12:18     ` kbuild test robot
2017-03-30 12:18     ` kbuild test robot

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