[Patch v3 00/11] Add MFC v10.10 support

[Patch v3 00/11] Add MFC v10.10 support

[Smitha T Murthy]

This patch series adds MFC v10.10 support. MFC v10.10 is used in some
of Exynos7 variants.

This adds support for following:

* Add support for HEVC encoder and decoder
* Add support for VP9 decoder
* Update Documentation for control id definitions
* Update computation of min scratch buffer size requirement for V8 onwards

Changes since v2:
 - Addressed review comments by Andrzej Hajda.
 - Rebased on latest krzk/for-next tree.
 - This patches are tested on top of Marek's patch v2 [1]
 - Applied acked-by and r-o-b from Andrzej on respective patches.
 - Applied acked-by from Rob Herring on respective patch.

[1]: http://www.mail-archive.com/linux-media@vger.kernel.org/msg108520.html

Smitha T Murthy (11):
  [media] s5p-mfc: Rename IS_MFCV8 macro
  [media] s5p-mfc: Adding initial support for MFC v10.10
  [media] s5p-mfc: Use min scratch buffer size as provided by F/W
  [media] s5p-mfc: Support MFCv10.10 buffer requirements
  [media] videodev2.h: Add v4l2 definition for HEVC
  [media] s5p-mfc: Add support for HEVC decoder
  Documentation: v4l: Documentation for HEVC v4l2 definition
  [media] s5p-mfc: Add VP9 decoder support
  [media] v4l2: Add v4l2 control IDs for HEVC encoder
  [media] s5p-mfc: Add support for HEVC encoder
  Documention: v4l: Documentation for HEVC CIDs

 .../devicetree/bindings/media/s5p-mfc.txt          |   1 +
 Documentation/media/uapi/v4l/extended-controls.rst | 355 ++++++++++++
 Documentation/media/uapi/v4l/pixfmt-013.rst        |   5 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h      |  88 +++
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h       |   2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c           |  33 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c    |   9 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  71 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |   6 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       |  50 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 616 ++++++++++++++++++++-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h       |  14 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    | 410 ++++++++++++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  15 +
 drivers/media/v4l2-core/v4l2-ctrls.c               | 103 ++++
 include/uapi/linux/v4l2-controls.h                 | 133 +++++
 include/uapi/linux/videodev2.h                     |   1 +
 17 files changed, 1835 insertions(+), 77 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

-- 
2.7.4

[Patch v3 00/11] Add MFC v10.10 support

[Smitha T Murthy]

This patch series adds MFC v10.10 support. MFC v10.10 is used in some
of Exynos7 variants.

This adds support for following:

* Add support for HEVC encoder and decoder
* Add support for VP9 decoder
* Update Documentation for control id definitions
* Update computation of min scratch buffer size requirement for V8 onwards

Changes since v2:
 - Addressed review comments by Andrzej Hajda.
 - Rebased on latest krzk/for-next tree.
 - This patches are tested on top of Marek's patch v2 [1]
 - Applied acked-by and r-o-b from Andrzej on respective patches.
 - Applied acked-by from Rob Herring on respective patch.

[1]: http://www.mail-archive.com/linux-media at vger.kernel.org/msg108520.html

Smitha T Murthy (11):
  [media] s5p-mfc: Rename IS_MFCV8 macro
  [media] s5p-mfc: Adding initial support for MFC v10.10
  [media] s5p-mfc: Use min scratch buffer size as provided by F/W
  [media] s5p-mfc: Support MFCv10.10 buffer requirements
  [media] videodev2.h: Add v4l2 definition for HEVC
  [media] s5p-mfc: Add support for HEVC decoder
  Documentation: v4l: Documentation for HEVC v4l2 definition
  [media] s5p-mfc: Add VP9 decoder support
  [media] v4l2: Add v4l2 control IDs for HEVC encoder
  [media] s5p-mfc: Add support for HEVC encoder
  Documention: v4l: Documentation for HEVC CIDs

 .../devicetree/bindings/media/s5p-mfc.txt          |   1 +
 Documentation/media/uapi/v4l/extended-controls.rst | 355 ++++++++++++
 Documentation/media/uapi/v4l/pixfmt-013.rst        |   5 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h      |  88 +++
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h       |   2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c           |  33 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c    |   9 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  71 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |   6 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       |  50 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 616 ++++++++++++++++++++-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h       |  14 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    | 410 ++++++++++++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  15 +
 drivers/media/v4l2-core/v4l2-ctrls.c               | 103 ++++
 include/uapi/linux/v4l2-controls.h                 | 133 +++++
 include/uapi/linux/videodev2.h                     |   1 +
 17 files changed, 1835 insertions(+), 77 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

-- 
2.7.4

[Patch v3 01/11] [media] s5p-mfc: Rename IS_MFCV8 macro

[Smitha T Murthy]

This patch renames macro IS_MFCV8 to IS_MFCV8_PLUS so that the MFCv8
code can be resued for MFCv10.10 support. Since the MFCv8 specific code
holds good for MFC v10.10 also.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Acked-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c   |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 18 +++++++++---------
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index ab23236..b45d18c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -722,7 +722,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
 #define IS_TWOPORT(dev)		(dev->variant->port_num == 2 ? 1 : 0)
 #define IS_MFCV6_PLUS(dev)	(dev->variant->version >= 0x60 ? 1 : 0)
 #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
-#define IS_MFCV8(dev)		(dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
 
 #define MFC_V5_BIT	BIT(0)
 #define MFC_V6_BIT	BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index cc88871..484af6b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -427,7 +427,7 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev)
 	s5p_mfc_clear_cmds(dev);
 	s5p_mfc_clean_dev_int_flags(dev);
 	/* 3. Send MFC wakeup command and wait for completion*/
-	if (IS_MFCV8(dev))
+	if (IS_MFCV8_PLUS(dev))
 		ret = s5p_mfc_v8_wait_wakeup(dev);
 	else
 		ret = s5p_mfc_wait_wakeup(dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 367ef8e..0ec2928 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -1177,7 +1177,7 @@ void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
 	struct v4l2_format f;
 	f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
 	ctx->src_fmt = find_format(&f, MFC_FMT_DEC);
-	if (IS_MFCV8(ctx->dev))
+	if (IS_MFCV8_PLUS(ctx->dev))
 		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
 	else if (IS_MFCV6_PLUS(ctx->dev))
 		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index d6f207e..7682b0e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -74,7 +74,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
 		mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
 	} else if (ctx->type == MFCINST_ENCODER) {
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
 			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
 			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -89,7 +89,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
 				S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
 				S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
 						ctx->img_width, ctx->img_height,
 						mb_width, mb_height),
@@ -110,7 +110,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	switch (ctx->codec_mode) {
 	case S5P_MFC_CODEC_H264_DEC:
 	case S5P_MFC_CODEC_H264_MVC_DEC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
 					mb_width,
@@ -167,7 +167,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_VP8_DEC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
 						mb_width,
@@ -182,7 +182,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_H264_ENC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
 					mb_width,
@@ -215,7 +215,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank2.size = 0;
 		break;
 	case S5P_MFC_CODEC_VP8_ENC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
 					mb_width,
@@ -366,7 +366,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 
 	ctx->luma_size = calc_plane(ctx->img_width, ctx->img_height);
 	ctx->chroma_size = calc_plane(ctx->img_width, (ctx->img_height >> 1));
-	if (IS_MFCV8(ctx->dev)) {
+	if (IS_MFCV8_PLUS(ctx->dev)) {
 		/* MFCv8 needs additional 64 bytes for luma,chroma dpb*/
 		ctx->luma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
 		ctx->chroma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
@@ -447,7 +447,7 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 	writel(buf_addr1, mfc_regs->d_scratch_buffer_addr);
 	writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size);
 
-	if (IS_MFCV8(dev)) {
+	if (IS_MFCV8_PLUS(dev)) {
 		writel(ctx->img_width,
 			mfc_regs->d_first_plane_dpb_stride_size);
 		writel(ctx->img_width,
@@ -2111,7 +2111,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 			S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7);
 	R(e_vp8_options, S5P_FIMV_E_VP8_OPTIONS_V7);
 
-	if (!IS_MFCV8(dev))
+	if (!IS_MFCV8_PLUS(dev))
 		goto done;
 
 	/* Initialize registers used in MFC v8 only.
-- 
2.7.4

[Patch v3 01/11] [media] s5p-mfc: Rename IS_MFCV8 macro

[Smitha T Murthy]

This patch renames macro IS_MFCV8 to IS_MFCV8_PLUS so that the MFCv8
code can be resued for MFCv10.10 support. Since the MFCv8 specific code
holds good for MFC v10.10 also.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Acked-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c   |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 18 +++++++++---------
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index ab23236..b45d18c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -722,7 +722,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
 #define IS_TWOPORT(dev)		(dev->variant->port_num == 2 ? 1 : 0)
 #define IS_MFCV6_PLUS(dev)	(dev->variant->version >= 0x60 ? 1 : 0)
 #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
-#define IS_MFCV8(dev)		(dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
 
 #define MFC_V5_BIT	BIT(0)
 #define MFC_V6_BIT	BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index cc88871..484af6b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -427,7 +427,7 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev)
 	s5p_mfc_clear_cmds(dev);
 	s5p_mfc_clean_dev_int_flags(dev);
 	/* 3. Send MFC wakeup command and wait for completion*/
-	if (IS_MFCV8(dev))
+	if (IS_MFCV8_PLUS(dev))
 		ret = s5p_mfc_v8_wait_wakeup(dev);
 	else
 		ret = s5p_mfc_wait_wakeup(dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 367ef8e..0ec2928 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -1177,7 +1177,7 @@ void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
 	struct v4l2_format f;
 	f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
 	ctx->src_fmt = find_format(&f, MFC_FMT_DEC);
-	if (IS_MFCV8(ctx->dev))
+	if (IS_MFCV8_PLUS(ctx->dev))
 		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
 	else if (IS_MFCV6_PLUS(ctx->dev))
 		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index d6f207e..7682b0e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -74,7 +74,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
 		mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
 	} else if (ctx->type == MFCINST_ENCODER) {
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
 			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
 			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -89,7 +89,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
 				S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
 				S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
 						ctx->img_width, ctx->img_height,
 						mb_width, mb_height),
@@ -110,7 +110,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	switch (ctx->codec_mode) {
 	case S5P_MFC_CODEC_H264_DEC:
 	case S5P_MFC_CODEC_H264_MVC_DEC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
 					mb_width,
@@ -167,7 +167,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_VP8_DEC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
 						mb_width,
@@ -182,7 +182,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_H264_ENC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
 					mb_width,
@@ -215,7 +215,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank2.size = 0;
 		break;
 	case S5P_MFC_CODEC_VP8_ENC:
-		if (IS_MFCV8(dev))
+		if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
 					mb_width,
@@ -366,7 +366,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 
 	ctx->luma_size = calc_plane(ctx->img_width, ctx->img_height);
 	ctx->chroma_size = calc_plane(ctx->img_width, (ctx->img_height >> 1));
-	if (IS_MFCV8(ctx->dev)) {
+	if (IS_MFCV8_PLUS(ctx->dev)) {
 		/* MFCv8 needs additional 64 bytes for luma,chroma dpb*/
 		ctx->luma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
 		ctx->chroma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
@@ -447,7 +447,7 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 	writel(buf_addr1, mfc_regs->d_scratch_buffer_addr);
 	writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size);
 
-	if (IS_MFCV8(dev)) {
+	if (IS_MFCV8_PLUS(dev)) {
 		writel(ctx->img_width,
 			mfc_regs->d_first_plane_dpb_stride_size);
 		writel(ctx->img_width,
@@ -2111,7 +2111,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 			S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7);
 	R(e_vp8_options, S5P_FIMV_E_VP8_OPTIONS_V7);
 
-	if (!IS_MFCV8(dev))
+	if (!IS_MFCV8_PLUS(dev))
 		goto done;
 
 	/* Initialize registers used in MFC v8 only.
-- 
2.7.4

[Patch v3 02/11] [media] s5p-mfc: Adding initial support for MFC v10.10

[Smitha T Murthy]

Adding the support for MFC v10.10, with new register file and
necessary hw control, decoder, encoder and structural changes.

CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree@vger.kernel.org
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/media/s5p-mfc.txt          |  1 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h      | 36 ++++++++++++++++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc.c           | 30 ++++++++++++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  9 +++++-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |  4 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       | 32 ++++++++-----------
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 16 ++++------
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    |  9 ++++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  2 ++
 9 files changed, 106 insertions(+), 33 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index 2c90128..b83727b 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -13,6 +13,7 @@ Required properties:
 	(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
 	(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
 	(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
+	(f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
 
   - reg : Physical base address of the IP registers and length of memory
 	  mapped region.
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
new file mode 100644
index 0000000..1ca09d6
--- /dev/null
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -0,0 +1,36 @@
+/*
+ * Register definition file for Samsung MFC V10.x Interface (FIMV) driver
+ *
+ * Copyright (c) 2017 Samsung Electronics Co., Ltd.
+ *     http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _REGS_MFC_V10_H
+#define _REGS_MFC_V10_H
+
+#include <linux/sizes.h>
+#include "regs-mfc-v8.h"
+
+/* MFCv10 register definitions*/
+#define S5P_FIMV_MFC_CLOCK_OFF_V10			0x7120
+#define S5P_FIMV_MFC_STATE_V10				0x7124
+
+/* MFCv10 Context buffer sizes */
+#define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
+#define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
+#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
+#define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
+
+/* MFCv10 variant defines */
+#define MAX_FW_SIZE_V10		(SZ_1M)
+#define MAX_CPB_SIZE_V10	(3 * SZ_1M)
+#define MFC_VERSION_V10		0xA0
+#define MFC_NUM_PORTS_V10	1
+
+#endif /*_REGS_MFC_V10_H*/
+
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index c6f0754..443ff7e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1547,6 +1547,33 @@ static struct s5p_mfc_variant mfc_drvdata_v8_5433 = {
 	.num_clocks	= 3,
 };
 
+static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
+	.dev_ctx        = MFC_CTX_BUF_SIZE_V10,
+	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
+	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
+	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
+};
+
+static struct s5p_mfc_buf_size buf_size_v10 = {
+	.fw     = MAX_FW_SIZE_V10,
+	.cpb    = MAX_CPB_SIZE_V10,
+	.priv   = &mfc_buf_size_v10,
+};
+
+static struct s5p_mfc_buf_align mfc_buf_align_v10 = {
+	.base = 0,
+};
+
+static struct s5p_mfc_variant mfc_drvdata_v10 = {
+	.version        = MFC_VERSION_V10,
+	.version_bit    = MFC_V10_BIT,
+	.port_num       = MFC_NUM_PORTS_V10,
+	.buf_size       = &buf_size_v10,
+	.buf_align      = &mfc_buf_align_v10,
+	.fw_name[0]     = "s5p-mfc-v10.fw",
+};
+
 static const struct of_device_id exynos_mfc_match[] = {
 	{
 		.compatible = "samsung,mfc-v5",
@@ -1563,6 +1590,9 @@ static const struct of_device_id exynos_mfc_match[] = {
 	}, {
 		.compatible = "samsung,exynos5433-mfc",
 		.data = &mfc_drvdata_v8_5433,
+	}, {
+		.compatible = "samsung,mfc-v10",
+		.data = &mfc_drvdata_v10,
 	},
 	{},
 };
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index b45d18c..3a4ca55 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -23,7 +23,7 @@
 #include <media/v4l2-ioctl.h>
 #include <media/videobuf2-v4l2.h>
 #include "regs-mfc.h"
-#include "regs-mfc-v8.h"
+#include "regs-mfc-v10.h"
 
 #define S5P_MFC_NAME		"s5p-mfc"
 
@@ -723,11 +723,18 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
 #define IS_MFCV6_PLUS(dev)	(dev->variant->version >= 0x60 ? 1 : 0)
 #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
 #define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV10(dev)		(dev->variant->version >= 0xA0 ? 1 : 0)
 
 #define MFC_V5_BIT	BIT(0)
 #define MFC_V6_BIT	BIT(1)
 #define MFC_V7_BIT	BIT(2)
 #define MFC_V8_BIT	BIT(3)
+#define MFC_V10_BIT	BIT(5)
 
+#define MFC_V5PLUS_BITS		(MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT | \
+					MFC_V8_BIT | MFC_V10_BIT)
+#define MFC_V6PLUS_BITS		(MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT | \
+					MFC_V10_BIT)
+#define MFC_V7PLUS_BITS		(MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT)
 
 #endif /* S5P_MFC_COMMON_H_ */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 484af6b..0ded23c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -267,6 +267,10 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
 	}
 	else
 		mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
+
+	if (IS_MFCV10(dev))
+		mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
+
 	mfc_debug(2, "Will now wait for completion of firmware transfer\n");
 	if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_FW_STATUS_RET)) {
 		mfc_err("Failed to load firmware\n");
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 0ec2928..db6d9fa 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -54,7 +54,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "4:2:0 2 Planes Y/CrCb",
@@ -62,7 +62,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "H264 Encoded Stream",
@@ -70,8 +70,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H264_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "H264/MVC Encoded Stream",
@@ -79,7 +78,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H264_MVC_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "H263 Encoded Stream",
@@ -87,8 +86,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H263_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG1 Encoded Stream",
@@ -96,8 +94,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG2_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG2 Encoded Stream",
@@ -105,8 +102,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG2_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG4 Encoded Stream",
@@ -114,8 +110,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG4_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "XviD Encoded Stream",
@@ -123,8 +118,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG4_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VC1 Encoded Stream",
@@ -132,8 +126,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VC1_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VC1 RCV Encoded Stream",
@@ -141,8 +134,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VC1RCV_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VP8 Encoded Stream",
@@ -150,7 +142,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VP8_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index e39d9e0..e81b359 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -57,8 +57,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "4:2:0 2 Planes Y/CrCb",
@@ -66,7 +65,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "H264 Encoded Stream",
@@ -74,8 +73,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H264_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG4 Encoded Stream",
@@ -83,8 +81,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG4_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "H263 Encoded Stream",
@@ -92,8 +89,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H263_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VP8 Encoded Stream",
@@ -101,7 +97,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VP8_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V7PLUS_BITS,
 	},
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 7682b0e..9dc106e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -358,6 +358,7 @@ static int calc_plane(int width, int height)
 
 static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 {
+	struct s5p_mfc_dev *dev = ctx->dev;
 	ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
 	ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6);
 	mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n"
@@ -374,8 +375,12 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 
 	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
 			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
-		ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
-				ctx->img_height);
+		if (IS_MFCV10(dev))
+			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
+					ctx->img_height);
+		else
+			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
+					ctx->img_height);
 		ctx->mv_size = ALIGN(ctx->mv_size, 16);
 	} else {
 		ctx->mv_size = 0;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 8055848..021b8db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -24,6 +24,8 @@
 #define MB_HEIGHT(y_size)		DIV_ROUND_UP(y_size, 16)
 #define S5P_MFC_DEC_MV_SIZE_V6(x, y)	(MB_WIDTH(x) * \
 					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
+#define S5P_MFC_DEC_MV_SIZE_V10(x, y)	(MB_WIDTH(x) * \
+					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
 
 /* Definition */
 #define ENC_MULTI_SLICE_MB_MAX		((1 << 30) - 1)
-- 
2.7.4

[Patch v3 02/11] [media] s5p-mfc: Adding initial support for MFC v10.10

[Smitha T Murthy]

Adding the support for MFC v10.10, with new register file and
necessary hw control, decoder, encoder and structural changes.

CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree at vger.kernel.org
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/media/s5p-mfc.txt          |  1 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h      | 36 ++++++++++++++++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc.c           | 30 ++++++++++++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  9 +++++-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |  4 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       | 32 ++++++++-----------
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 16 ++++------
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    |  9 ++++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  2 ++
 9 files changed, 106 insertions(+), 33 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index 2c90128..b83727b 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -13,6 +13,7 @@ Required properties:
 	(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
 	(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
 	(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
+	(f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
 
   - reg : Physical base address of the IP registers and length of memory
 	  mapped region.
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
new file mode 100644
index 0000000..1ca09d6
--- /dev/null
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -0,0 +1,36 @@
+/*
+ * Register definition file for Samsung MFC V10.x Interface (FIMV) driver
+ *
+ * Copyright (c) 2017 Samsung Electronics Co., Ltd.
+ *     http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _REGS_MFC_V10_H
+#define _REGS_MFC_V10_H
+
+#include <linux/sizes.h>
+#include "regs-mfc-v8.h"
+
+/* MFCv10 register definitions*/
+#define S5P_FIMV_MFC_CLOCK_OFF_V10			0x7120
+#define S5P_FIMV_MFC_STATE_V10				0x7124
+
+/* MFCv10 Context buffer sizes */
+#define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
+#define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
+#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
+#define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
+
+/* MFCv10 variant defines */
+#define MAX_FW_SIZE_V10		(SZ_1M)
+#define MAX_CPB_SIZE_V10	(3 * SZ_1M)
+#define MFC_VERSION_V10		0xA0
+#define MFC_NUM_PORTS_V10	1
+
+#endif /*_REGS_MFC_V10_H*/
+
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index c6f0754..443ff7e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1547,6 +1547,33 @@ static struct s5p_mfc_variant mfc_drvdata_v8_5433 = {
 	.num_clocks	= 3,
 };
 
+static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
+	.dev_ctx        = MFC_CTX_BUF_SIZE_V10,
+	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
+	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
+	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
+};
+
+static struct s5p_mfc_buf_size buf_size_v10 = {
+	.fw     = MAX_FW_SIZE_V10,
+	.cpb    = MAX_CPB_SIZE_V10,
+	.priv   = &mfc_buf_size_v10,
+};
+
+static struct s5p_mfc_buf_align mfc_buf_align_v10 = {
+	.base = 0,
+};
+
+static struct s5p_mfc_variant mfc_drvdata_v10 = {
+	.version        = MFC_VERSION_V10,
+	.version_bit    = MFC_V10_BIT,
+	.port_num       = MFC_NUM_PORTS_V10,
+	.buf_size       = &buf_size_v10,
+	.buf_align      = &mfc_buf_align_v10,
+	.fw_name[0]     = "s5p-mfc-v10.fw",
+};
+
 static const struct of_device_id exynos_mfc_match[] = {
 	{
 		.compatible = "samsung,mfc-v5",
@@ -1563,6 +1590,9 @@ static const struct of_device_id exynos_mfc_match[] = {
 	}, {
 		.compatible = "samsung,exynos5433-mfc",
 		.data = &mfc_drvdata_v8_5433,
+	}, {
+		.compatible = "samsung,mfc-v10",
+		.data = &mfc_drvdata_v10,
 	},
 	{},
 };
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index b45d18c..3a4ca55 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -23,7 +23,7 @@
 #include <media/v4l2-ioctl.h>
 #include <media/videobuf2-v4l2.h>
 #include "regs-mfc.h"
-#include "regs-mfc-v8.h"
+#include "regs-mfc-v10.h"
 
 #define S5P_MFC_NAME		"s5p-mfc"
 
@@ -723,11 +723,18 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
 #define IS_MFCV6_PLUS(dev)	(dev->variant->version >= 0x60 ? 1 : 0)
 #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
 #define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV10(dev)		(dev->variant->version >= 0xA0 ? 1 : 0)
 
 #define MFC_V5_BIT	BIT(0)
 #define MFC_V6_BIT	BIT(1)
 #define MFC_V7_BIT	BIT(2)
 #define MFC_V8_BIT	BIT(3)
+#define MFC_V10_BIT	BIT(5)
 
+#define MFC_V5PLUS_BITS		(MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT | \
+					MFC_V8_BIT | MFC_V10_BIT)
+#define MFC_V6PLUS_BITS		(MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT | \
+					MFC_V10_BIT)
+#define MFC_V7PLUS_BITS		(MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT)
 
 #endif /* S5P_MFC_COMMON_H_ */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 484af6b..0ded23c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -267,6 +267,10 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
 	}
 	else
 		mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
+
+	if (IS_MFCV10(dev))
+		mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
+
 	mfc_debug(2, "Will now wait for completion of firmware transfer\n");
 	if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_FW_STATUS_RET)) {
 		mfc_err("Failed to load firmware\n");
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 0ec2928..db6d9fa 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -54,7 +54,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "4:2:0 2 Planes Y/CrCb",
@@ -62,7 +62,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "H264 Encoded Stream",
@@ -70,8 +70,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H264_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "H264/MVC Encoded Stream",
@@ -79,7 +78,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H264_MVC_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "H263 Encoded Stream",
@@ -87,8 +86,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H263_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG1 Encoded Stream",
@@ -96,8 +94,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG2_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG2 Encoded Stream",
@@ -105,8 +102,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG2_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG4 Encoded Stream",
@@ -114,8 +110,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG4_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "XviD Encoded Stream",
@@ -123,8 +118,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG4_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VC1 Encoded Stream",
@@ -132,8 +126,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VC1_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VC1 RCV Encoded Stream",
@@ -141,8 +134,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VC1RCV_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VP8 Encoded Stream",
@@ -150,7 +142,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VP8_DEC,
 		.type		= MFC_FMT_DEC,
 		.num_planes	= 1,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index e39d9e0..e81b359 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -57,8 +57,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "4:2:0 2 Planes Y/CrCb",
@@ -66,7 +65,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_NONE,
 		.type		= MFC_FMT_RAW,
 		.num_planes	= 2,
-		.versions	= MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V6PLUS_BITS,
 	},
 	{
 		.name		= "H264 Encoded Stream",
@@ -74,8 +73,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H264_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "MPEG4 Encoded Stream",
@@ -83,8 +81,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_MPEG4_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "H263 Encoded Stream",
@@ -92,8 +89,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_H263_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
-								MFC_V8_BIT,
+		.versions	= MFC_V5PLUS_BITS,
 	},
 	{
 		.name		= "VP8 Encoded Stream",
@@ -101,7 +97,7 @@ static struct s5p_mfc_fmt formats[] = {
 		.codec_mode	= S5P_MFC_CODEC_VP8_ENC,
 		.type		= MFC_FMT_ENC,
 		.num_planes	= 1,
-		.versions	= MFC_V7_BIT | MFC_V8_BIT,
+		.versions	= MFC_V7PLUS_BITS,
 	},
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 7682b0e..9dc106e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -358,6 +358,7 @@ static int calc_plane(int width, int height)
 
 static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 {
+	struct s5p_mfc_dev *dev = ctx->dev;
 	ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
 	ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6);
 	mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n"
@@ -374,8 +375,12 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 
 	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
 			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
-		ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
-				ctx->img_height);
+		if (IS_MFCV10(dev))
+			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
+					ctx->img_height);
+		else
+			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
+					ctx->img_height);
 		ctx->mv_size = ALIGN(ctx->mv_size, 16);
 	} else {
 		ctx->mv_size = 0;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 8055848..021b8db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -24,6 +24,8 @@
 #define MB_HEIGHT(y_size)		DIV_ROUND_UP(y_size, 16)
 #define S5P_MFC_DEC_MV_SIZE_V6(x, y)	(MB_WIDTH(x) * \
 					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
+#define S5P_MFC_DEC_MV_SIZE_V10(x, y)	(MB_WIDTH(x) * \
+					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
 
 /* Definition */
 #define ENC_MULTI_SLICE_MB_MAX		((1 << 30) - 1)
-- 
2.7.4

[Patch v3 03/11] [media] s5p-mfc: Use min scratch buffer size as provided by F/W

[Smitha T Murthy]

After MFC v8.0, mfc f/w lets the driver know how much scratch buffer
size is required for decoder. If mfc f/w has the functionality,
E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size
is required for encoder too.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h    |  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c        |  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    |  5 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |  4 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 ++++++++++++++++++-------
 6 files changed, 65 insertions(+), 17 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
index 4d1c375..2cd396b 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
@@ -17,6 +17,7 @@
 
 /* Additional registers for v8 */
 #define S5P_FIMV_D_MVC_NUM_VIEWS_V8		0xf104
+#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8	0xf108
 #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8	0xf144
 #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8	0xf148
 #define S5P_FIMV_D_MV_BUFFER_SIZE_V8		0xf150
@@ -84,6 +85,7 @@
 
 #define S5P_FIMV_E_VBV_BUFFER_SIZE_V8		0xf78c
 #define S5P_FIMV_E_VBV_INIT_DELAY_V8		0xf790
+#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8   0xf894
 
 #define S5P_FIMV_E_ASPECT_RATIO_V8		0xfb4c
 #define S5P_FIMV_E_EXTENDED_SAR_V8		0xfb50
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 443ff7e..399c547 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -520,6 +520,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
 				dev);
 		ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count,
 				dev);
+		ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+						get_min_scratch_buf_size, dev);
 		if (ctx->img_width == 0 || ctx->img_height == 0)
 			ctx->state = MFCINST_ERROR;
 		else
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 3a4ca55..8368d5c2 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -724,6 +724,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
 #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
 #define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
 #define IS_MFCV10(dev)		(dev->variant->version >= 0xA0 ? 1 : 0)
+#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
 
 #define MFC_V5_BIT	BIT(0)
 #define MFC_V6_BIT	BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index e81b359..57a40c0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -813,6 +813,11 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
 				get_enc_dpb_count, dev);
 		if (ctx->pb_count < enc_pb_count)
 			ctx->pb_count = enc_pb_count;
+		if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) {
+			ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+					get_e_min_scratch_buf_size, dev);
+			ctx->bank1.size += ctx->scratch_buf_size;
+		}
 		ctx->state = MFCINST_HEAD_PRODUCED;
 	}
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index b6ac417..6478f70 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -169,6 +169,7 @@ struct s5p_mfc_regs {
 	void __iomem *d_decoded_third_addr;/* only v7 */
 	void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
 	void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
+	void __iomem *d_min_scratch_buffer_size; /* v10 */
 
 	/* encoder registers */
 	void __iomem *e_frame_width;
@@ -268,6 +269,7 @@ struct s5p_mfc_regs {
 	void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */
 	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
 	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
+	void __iomem *e_min_scratch_buffer_size; /* v10 */
 };
 
 struct s5p_mfc_hw_ops {
@@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops {
 	unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx);
 	unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx);
 	unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx);
+	int (*get_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
+	int (*get_e_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
 };
 
 void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 9dc106e..5f0da0b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -110,7 +110,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	switch (ctx->codec_mode) {
 	case S5P_MFC_CODEC_H264_DEC:
 	case S5P_MFC_CODEC_H264_MVC_DEC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
 					mb_width,
@@ -127,7 +129,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			(ctx->mv_count * ctx->mv_size);
 		break;
 	case S5P_MFC_CODEC_MPEG4_DEC:
-		if (IS_MFCV7_PLUS(dev)) {
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else if (IS_MFCV7_PLUS(dev)) {
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(
 						mb_width,
@@ -145,10 +149,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		break;
 	case S5P_MFC_CODEC_VC1RCV_DEC:
 	case S5P_MFC_CODEC_VC1_DEC:
-		ctx->scratch_buf_size =
-			S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
-					mb_width,
-					mb_height);
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else
+			ctx->scratch_buf_size =
+				S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
+						mb_width,
+						mb_height);
+
 		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size = ctx->scratch_buf_size;
@@ -158,16 +166,21 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank2.size = 0;
 		break;
 	case S5P_MFC_CODEC_H263_DEC:
-		ctx->scratch_buf_size =
-			S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
-					mb_width,
-					mb_height);
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else
+			ctx->scratch_buf_size =
+				S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
+						mb_width,
+						mb_height);
 		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_VP8_DEC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
 						mb_width,
@@ -182,7 +195,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_H264_ENC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev)) {
+			mfc_debug(2, "Use min scratch buffer size\n");
+		} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
 					mb_width,
@@ -202,10 +217,13 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		break;
 	case S5P_MFC_CODEC_MPEG4_ENC:
 	case S5P_MFC_CODEC_H263_ENC:
-		ctx->scratch_buf_size =
-			S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
-					mb_width,
-					mb_height);
+		if (IS_MFCV10(dev)) {
+			mfc_debug(2, "Use min scratch buffer size\n");
+		} else
+			ctx->scratch_buf_size =
+				S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
+						mb_width,
+						mb_height);
 		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size =
@@ -215,7 +233,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank2.size = 0;
 		break;
 	case S5P_MFC_CODEC_VP8_ENC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev)) {
+			mfc_debug(2, "Use min scratch buffer size\n");
+			} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
 					mb_width,
@@ -1902,6 +1922,16 @@ static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev)
 	return readl(dev->mfc_regs->d_min_num_mv);
 }
 
+static int s5p_mfc_get_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+	return readl(dev->mfc_regs->d_min_scratch_buffer_size);
+}
+
+static int s5p_mfc_get_e_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+	return readl(dev->mfc_regs->e_min_scratch_buffer_size);
+}
+
 static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev)
 {
 	return readl(dev->mfc_regs->ret_instance_id);
@@ -2160,6 +2190,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(d_ret_picture_tag_bot, S5P_FIMV_D_RET_PICTURE_TAG_BOT_V8);
 	R(d_display_crop_info1, S5P_FIMV_D_DISPLAY_CROP_INFO1_V8);
 	R(d_display_crop_info2, S5P_FIMV_D_DISPLAY_CROP_INFO2_V8);
+	R(d_min_scratch_buffer_size, S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8);
 
 	/* encoder registers */
 	R(e_padding_ctrl, S5P_FIMV_E_PADDING_CTRL_V8);
@@ -2175,6 +2206,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(e_aspect_ratio, S5P_FIMV_E_ASPECT_RATIO_V8);
 	R(e_extended_sar, S5P_FIMV_E_EXTENDED_SAR_V8);
 	R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
+	R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
 
 done:
 	return &mfc_regs;
@@ -2223,6 +2255,8 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v6 = {
 	.get_pic_type_bot = s5p_mfc_get_pic_type_bot_v6,
 	.get_crop_info_h = s5p_mfc_get_crop_info_h_v6,
 	.get_crop_info_v = s5p_mfc_get_crop_info_v_v6,
+	.get_min_scratch_buf_size = s5p_mfc_get_min_scratch_buf_size,
+	.get_e_min_scratch_buf_size = s5p_mfc_get_e_min_scratch_buf_size,
 };
 
 struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void)
-- 
2.7.4

[Patch v3 03/11] [media] s5p-mfc: Use min scratch buffer size as provided by F/W

[Smitha T Murthy]

After MFC v8.0, mfc f/w lets the driver know how much scratch buffer
size is required for decoder. If mfc f/w has the functionality,
E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size
is required for encoder too.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h    |  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c        |  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    |  5 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |  4 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 ++++++++++++++++++-------
 6 files changed, 65 insertions(+), 17 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
index 4d1c375..2cd396b 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
@@ -17,6 +17,7 @@
 
 /* Additional registers for v8 */
 #define S5P_FIMV_D_MVC_NUM_VIEWS_V8		0xf104
+#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8	0xf108
 #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8	0xf144
 #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8	0xf148
 #define S5P_FIMV_D_MV_BUFFER_SIZE_V8		0xf150
@@ -84,6 +85,7 @@
 
 #define S5P_FIMV_E_VBV_BUFFER_SIZE_V8		0xf78c
 #define S5P_FIMV_E_VBV_INIT_DELAY_V8		0xf790
+#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8   0xf894
 
 #define S5P_FIMV_E_ASPECT_RATIO_V8		0xfb4c
 #define S5P_FIMV_E_EXTENDED_SAR_V8		0xfb50
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 443ff7e..399c547 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -520,6 +520,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
 				dev);
 		ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count,
 				dev);
+		ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+						get_min_scratch_buf_size, dev);
 		if (ctx->img_width == 0 || ctx->img_height == 0)
 			ctx->state = MFCINST_ERROR;
 		else
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 3a4ca55..8368d5c2 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -724,6 +724,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
 #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
 #define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
 #define IS_MFCV10(dev)		(dev->variant->version >= 0xA0 ? 1 : 0)
+#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
 
 #define MFC_V5_BIT	BIT(0)
 #define MFC_V6_BIT	BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index e81b359..57a40c0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -813,6 +813,11 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
 				get_enc_dpb_count, dev);
 		if (ctx->pb_count < enc_pb_count)
 			ctx->pb_count = enc_pb_count;
+		if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) {
+			ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+					get_e_min_scratch_buf_size, dev);
+			ctx->bank1.size += ctx->scratch_buf_size;
+		}
 		ctx->state = MFCINST_HEAD_PRODUCED;
 	}
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index b6ac417..6478f70 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -169,6 +169,7 @@ struct s5p_mfc_regs {
 	void __iomem *d_decoded_third_addr;/* only v7 */
 	void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
 	void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
+	void __iomem *d_min_scratch_buffer_size; /* v10 */
 
 	/* encoder registers */
 	void __iomem *e_frame_width;
@@ -268,6 +269,7 @@ struct s5p_mfc_regs {
 	void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */
 	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
 	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
+	void __iomem *e_min_scratch_buffer_size; /* v10 */
 };
 
 struct s5p_mfc_hw_ops {
@@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops {
 	unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx);
 	unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx);
 	unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx);
+	int (*get_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
+	int (*get_e_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
 };
 
 void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 9dc106e..5f0da0b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -110,7 +110,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	switch (ctx->codec_mode) {
 	case S5P_MFC_CODEC_H264_DEC:
 	case S5P_MFC_CODEC_H264_MVC_DEC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
 					mb_width,
@@ -127,7 +129,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			(ctx->mv_count * ctx->mv_size);
 		break;
 	case S5P_MFC_CODEC_MPEG4_DEC:
-		if (IS_MFCV7_PLUS(dev)) {
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else if (IS_MFCV7_PLUS(dev)) {
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(
 						mb_width,
@@ -145,10 +149,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		break;
 	case S5P_MFC_CODEC_VC1RCV_DEC:
 	case S5P_MFC_CODEC_VC1_DEC:
-		ctx->scratch_buf_size =
-			S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
-					mb_width,
-					mb_height);
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else
+			ctx->scratch_buf_size =
+				S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
+						mb_width,
+						mb_height);
+
 		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size = ctx->scratch_buf_size;
@@ -158,16 +166,21 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank2.size = 0;
 		break;
 	case S5P_MFC_CODEC_H263_DEC:
-		ctx->scratch_buf_size =
-			S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
-					mb_width,
-					mb_height);
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else
+			ctx->scratch_buf_size =
+				S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
+						mb_width,
+						mb_height);
 		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_VP8_DEC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev))
+			mfc_debug(2, "Use min scratch buffer size\n");
+		else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
 						mb_width,
@@ -182,7 +195,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
 	case S5P_MFC_CODEC_H264_ENC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev)) {
+			mfc_debug(2, "Use min scratch buffer size\n");
+		} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
 					mb_width,
@@ -202,10 +217,13 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		break;
 	case S5P_MFC_CODEC_MPEG4_ENC:
 	case S5P_MFC_CODEC_H263_ENC:
-		ctx->scratch_buf_size =
-			S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
-					mb_width,
-					mb_height);
+		if (IS_MFCV10(dev)) {
+			mfc_debug(2, "Use min scratch buffer size\n");
+		} else
+			ctx->scratch_buf_size =
+				S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
+						mb_width,
+						mb_height);
 		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size =
@@ -215,7 +233,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 		ctx->bank2.size = 0;
 		break;
 	case S5P_MFC_CODEC_VP8_ENC:
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev)) {
+			mfc_debug(2, "Use min scratch buffer size\n");
+			} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
 					mb_width,
@@ -1902,6 +1922,16 @@ static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev)
 	return readl(dev->mfc_regs->d_min_num_mv);
 }
 
+static int s5p_mfc_get_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+	return readl(dev->mfc_regs->d_min_scratch_buffer_size);
+}
+
+static int s5p_mfc_get_e_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+	return readl(dev->mfc_regs->e_min_scratch_buffer_size);
+}
+
 static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev)
 {
 	return readl(dev->mfc_regs->ret_instance_id);
@@ -2160,6 +2190,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(d_ret_picture_tag_bot, S5P_FIMV_D_RET_PICTURE_TAG_BOT_V8);
 	R(d_display_crop_info1, S5P_FIMV_D_DISPLAY_CROP_INFO1_V8);
 	R(d_display_crop_info2, S5P_FIMV_D_DISPLAY_CROP_INFO2_V8);
+	R(d_min_scratch_buffer_size, S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8);
 
 	/* encoder registers */
 	R(e_padding_ctrl, S5P_FIMV_E_PADDING_CTRL_V8);
@@ -2175,6 +2206,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(e_aspect_ratio, S5P_FIMV_E_ASPECT_RATIO_V8);
 	R(e_extended_sar, S5P_FIMV_E_EXTENDED_SAR_V8);
 	R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
+	R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
 
 done:
 	return &mfc_regs;
@@ -2223,6 +2255,8 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v6 = {
 	.get_pic_type_bot = s5p_mfc_get_pic_type_bot_v6,
 	.get_crop_info_h = s5p_mfc_get_crop_info_h_v6,
 	.get_crop_info_v = s5p_mfc_get_crop_info_v_v6,
+	.get_min_scratch_buf_size = s5p_mfc_get_min_scratch_buf_size,
+	.get_e_min_scratch_buf_size = s5p_mfc_get_e_min_scratch_buf_size,
 };
 
 struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void)
-- 
2.7.4

[Patch v3 04/11] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Smitha T Murthy]

Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
for MFCv10.10.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   | 19 +++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  2 +
 3 files changed, 95 insertions(+), 21 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 1ca09d6..3f0dab3 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -32,5 +32,24 @@
 #define MFC_VERSION_V10		0xA0
 #define MFC_NUM_PORTS_V10	1
 
+/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_ENC         26
+
+/* Encoder buffer size for MFC v10.0 */
+#define ENC_V100_BASE_SIZE(x, y) \
+	(((x + 3) * (y + 3) * 8) \
+	+  ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
+
+#define ENC_V100_H264_ME_SIZE(x, y) \
+	(ENC_V100_BASE_SIZE(x, y) \
+	+ (DIV_ROUND_UP(x * y, 64) * 32))
+
+#define ENC_V100_MPEG4_ME_SIZE(x, y) \
+	(ENC_V100_BASE_SIZE(x, y) \
+	+ (DIV_ROUND_UP(x * y, 128) * 16))
+
+#define ENC_V100_VP8_ME_SIZE(x, y) \
+	ENC_V100_BASE_SIZE(x, y)
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 5f0da0b..cb39484 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 {
 	struct s5p_mfc_dev *dev = ctx->dev;
 	unsigned int mb_width, mb_height;
+	unsigned int lcu_width = 0, lcu_height = 0;
 	int ret;
 
 	mb_width = MB_WIDTH(ctx->img_width);
@@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
 		mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
 	} else if (ctx->type == MFCINST_ENCODER) {
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev)) {
+			ctx->tmv_buffer_size = 0;
+		} else if (IS_MFCV8_PLUS(dev))
 			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
 			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
 			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
 			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
 			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
-
-		ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
-				S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
-				S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
-		ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
-				S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
-				S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+		if (IS_MFCV10(dev)) {
+			lcu_width = enc_lcu_width(ctx->img_width);
+			lcu_height = enc_lcu_height(ctx->img_height);
+			if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
+				ctx->luma_dpb_size =
+					ALIGN((mb_width * 16), 64)
+					* ALIGN((mb_height * 16), 32)
+						+ 64;
+				ctx->chroma_dpb_size =
+					ALIGN((mb_width * 16), 64)
+							* (mb_height * 8)
+							+ 64;
+			} else {
+				ctx->luma_dpb_size =
+					ALIGN((lcu_width * 32), 64)
+					* ALIGN((lcu_height * 32), 32)
+						+ 64;
+				ctx->chroma_dpb_size =
+					ALIGN((lcu_width * 32), 64)
+							* (lcu_height * 16)
+							+ 64;
+			}
+		} else {
+			ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
+					S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
+					S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
+			ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
+					S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
+					S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+		}
 		if (IS_MFCV8_PLUS(dev))
 			ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
 						ctx->img_width, ctx->img_height,
@@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_H264_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
+			ctx->me_buffer_size =
+			ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
 		} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
@@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_H263_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
+			ctx->me_buffer_size =
+				ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
+							mb_height), 16);
 		} else
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
@@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VP8_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
-			} else if (IS_MFCV8_PLUS(dev))
+			ctx->me_buffer_size =
+				ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
+						16);
+		} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
 					mb_width,
@@ -395,13 +429,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 
 	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
 			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
-		if (IS_MFCV10(dev))
+		if (IS_MFCV10(dev)) {
 			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
 					ctx->img_height);
-		else
+		} else {
 			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
 					ctx->img_height);
-		ctx->mv_size = ALIGN(ctx->mv_size, 16);
+		}
 	} else {
 		ctx->mv_size = 0;
 	}
@@ -598,15 +632,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
 
 	mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
 
-	for (i = 0; i < ctx->pb_count; i++) {
-		writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
-		buf_addr1 += ctx->luma_dpb_size;
-		writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
-		buf_addr1 += ctx->chroma_dpb_size;
-		writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
-		buf_addr1 += ctx->me_buffer_size;
-		buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
-			ctx->me_buffer_size);
+	if (IS_MFCV10(dev)) {
+		/* start address of per buffer is aligned */
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+			buf_addr1 += ctx->luma_dpb_size;
+			buf_size1 -= ctx->luma_dpb_size;
+		}
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+			buf_addr1 += ctx->chroma_dpb_size;
+			buf_size1 -= ctx->chroma_dpb_size;
+		}
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+			buf_addr1 += ctx->me_buffer_size;
+			buf_size1 -= ctx->me_buffer_size;
+		}
+	} else {
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+			buf_addr1 += ctx->luma_dpb_size;
+			writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+			buf_addr1 += ctx->chroma_dpb_size;
+			writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+			buf_addr1 += ctx->me_buffer_size;
+			buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
+					+ ctx->me_buffer_size);
+		}
 	}
 
 	writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 021b8db..975bbc5 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -26,6 +26,8 @@
 					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
 #define S5P_MFC_DEC_MV_SIZE_V10(x, y)	(MB_WIDTH(x) * \
 					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
+#define enc_lcu_width(x_size)		DIV_ROUND_UP(x_size, 32)
+#define enc_lcu_height(y_size)		DIV_ROUND_UP(y_size, 32)
 
 /* Definition */
 #define ENC_MULTI_SLICE_MB_MAX		((1 << 30) - 1)
-- 
2.7.4

[Patch v3 04/11] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Smitha T Murthy]

Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
for MFCv10.10.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   | 19 +++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  2 +
 3 files changed, 95 insertions(+), 21 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 1ca09d6..3f0dab3 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -32,5 +32,24 @@
 #define MFC_VERSION_V10		0xA0
 #define MFC_NUM_PORTS_V10	1
 
+/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_ENC         26
+
+/* Encoder buffer size for MFC v10.0 */
+#define ENC_V100_BASE_SIZE(x, y) \
+	(((x + 3) * (y + 3) * 8) \
+	+  ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
+
+#define ENC_V100_H264_ME_SIZE(x, y) \
+	(ENC_V100_BASE_SIZE(x, y) \
+	+ (DIV_ROUND_UP(x * y, 64) * 32))
+
+#define ENC_V100_MPEG4_ME_SIZE(x, y) \
+	(ENC_V100_BASE_SIZE(x, y) \
+	+ (DIV_ROUND_UP(x * y, 128) * 16))
+
+#define ENC_V100_VP8_ME_SIZE(x, y) \
+	ENC_V100_BASE_SIZE(x, y)
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 5f0da0b..cb39484 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 {
 	struct s5p_mfc_dev *dev = ctx->dev;
 	unsigned int mb_width, mb_height;
+	unsigned int lcu_width = 0, lcu_height = 0;
 	int ret;
 
 	mb_width = MB_WIDTH(ctx->img_width);
@@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
 		mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
 	} else if (ctx->type == MFCINST_ENCODER) {
-		if (IS_MFCV8_PLUS(dev))
+		if (IS_MFCV10(dev)) {
+			ctx->tmv_buffer_size = 0;
+		} else if (IS_MFCV8_PLUS(dev))
 			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
 			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
 			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
 			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
 			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
-
-		ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
-				S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
-				S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
-		ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
-				S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
-				S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+		if (IS_MFCV10(dev)) {
+			lcu_width = enc_lcu_width(ctx->img_width);
+			lcu_height = enc_lcu_height(ctx->img_height);
+			if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
+				ctx->luma_dpb_size =
+					ALIGN((mb_width * 16), 64)
+					* ALIGN((mb_height * 16), 32)
+						+ 64;
+				ctx->chroma_dpb_size =
+					ALIGN((mb_width * 16), 64)
+							* (mb_height * 8)
+							+ 64;
+			} else {
+				ctx->luma_dpb_size =
+					ALIGN((lcu_width * 32), 64)
+					* ALIGN((lcu_height * 32), 32)
+						+ 64;
+				ctx->chroma_dpb_size =
+					ALIGN((lcu_width * 32), 64)
+							* (lcu_height * 16)
+							+ 64;
+			}
+		} else {
+			ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
+					S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
+					S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
+			ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
+					S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
+					S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+		}
 		if (IS_MFCV8_PLUS(dev))
 			ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
 						ctx->img_width, ctx->img_height,
@@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_H264_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
+			ctx->me_buffer_size =
+			ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
 		} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
@@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_H263_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
+			ctx->me_buffer_size =
+				ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
+							mb_height), 16);
 		} else
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
@@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VP8_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
-			} else if (IS_MFCV8_PLUS(dev))
+			ctx->me_buffer_size =
+				ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
+						16);
+		} else if (IS_MFCV8_PLUS(dev))
 			ctx->scratch_buf_size =
 				S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
 					mb_width,
@@ -395,13 +429,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 
 	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
 			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
-		if (IS_MFCV10(dev))
+		if (IS_MFCV10(dev)) {
 			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
 					ctx->img_height);
-		else
+		} else {
 			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
 					ctx->img_height);
-		ctx->mv_size = ALIGN(ctx->mv_size, 16);
+		}
 	} else {
 		ctx->mv_size = 0;
 	}
@@ -598,15 +632,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
 
 	mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
 
-	for (i = 0; i < ctx->pb_count; i++) {
-		writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
-		buf_addr1 += ctx->luma_dpb_size;
-		writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
-		buf_addr1 += ctx->chroma_dpb_size;
-		writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
-		buf_addr1 += ctx->me_buffer_size;
-		buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
-			ctx->me_buffer_size);
+	if (IS_MFCV10(dev)) {
+		/* start address of per buffer is aligned */
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+			buf_addr1 += ctx->luma_dpb_size;
+			buf_size1 -= ctx->luma_dpb_size;
+		}
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+			buf_addr1 += ctx->chroma_dpb_size;
+			buf_size1 -= ctx->chroma_dpb_size;
+		}
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+			buf_addr1 += ctx->me_buffer_size;
+			buf_size1 -= ctx->me_buffer_size;
+		}
+	} else {
+		for (i = 0; i < ctx->pb_count; i++) {
+			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+			buf_addr1 += ctx->luma_dpb_size;
+			writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+			buf_addr1 += ctx->chroma_dpb_size;
+			writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+			buf_addr1 += ctx->me_buffer_size;
+			buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
+					+ ctx->me_buffer_size);
+		}
 	}
 
 	writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 021b8db..975bbc5 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -26,6 +26,8 @@
 					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
 #define S5P_MFC_DEC_MV_SIZE_V10(x, y)	(MB_WIDTH(x) * \
 					(((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
+#define enc_lcu_width(x_size)		DIV_ROUND_UP(x_size, 32)
+#define enc_lcu_height(y_size)		DIV_ROUND_UP(y_size, 32)
 
 /* Definition */
 #define ENC_MULTI_SLICE_MB_MAX		((1 << 30) - 1)
-- 
2.7.4

Re: [Patch v3 04/11] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Andrzej Hajda]

On 31.03.2017 11:06, Smitha T Murthy wrote:
> Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> for MFCv10.10.
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej

[Patch v3 04/11] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Andrzej Hajda]

On 31.03.2017 11:06, Smitha T Murthy wrote:
> Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> for MFCv10.10.
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej

Re: [Patch v3 04/11] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Smitha T Murthy]

On Mon, 2017-04-03 at 09:41 +0200, Andrzej Hajda wrote:
> On 31.03.2017 11:06, Smitha T Murthy wrote:
> > Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> > for MFCv10.10.
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> 
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> --
> Regards
> Andrzej
> 
> 
Thank you for the review.

Regards,
Smitha

[Patch v3 04/11] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Smitha T Murthy]

On Mon, 2017-04-03 at 09:41 +0200, Andrzej Hajda wrote:
> On 31.03.2017 11:06, Smitha T Murthy wrote:
> > Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> > for MFCv10.10.
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> 
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> --
> Regards
> Andrzej
> 
> 
Thank you for the review.

Regards,
Smitha

[Patch v3 05/11] [media] videodev2.h: Add v4l2 definition for HEVC

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 include/uapi/linux/videodev2.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 45184a2..38cf5f1 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -629,6 +629,7 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
 #define V4L2_PIX_FMT_VP8      v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
 #define V4L2_PIX_FMT_VP9      v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
+#define V4L2_PIX_FMT_HEVC     v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
 
 /*  Vendor-specific formats   */
 #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
-- 
2.7.4

[Patch v3 05/11] [media] videodev2.h: Add v4l2 definition for HEVC

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 include/uapi/linux/videodev2.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 45184a2..38cf5f1 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -629,6 +629,7 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
 #define V4L2_PIX_FMT_VP8      v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
 #define V4L2_PIX_FMT_VP9      v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
+#define V4L2_PIX_FMT_HEVC     v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
 
 /*  Vendor-specific formats   */
 #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
-- 
2.7.4

Re: [Patch v3 05/11] [media] videodev2.h: Add v4l2 definition for HEVC

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  include/uapi/linux/videodev2.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index 45184a2..38cf5f1 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -629,6 +629,7 @@ struct v4l2_pix_format {
>  #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
>  #define V4L2_PIX_FMT_VP8      v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
>  #define V4L2_PIX_FMT_VP9      v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> +#define V4L2_PIX_FMT_HEVC     v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
>  
>  /*  Vendor-specific formats   */
>  #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> 

You also need to update v4l2-ioctl.c, v4l_fill_fmtdesc().

Regards,

	Hans

[Patch v3 05/11] [media] videodev2.h: Add v4l2 definition for HEVC

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  include/uapi/linux/videodev2.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index 45184a2..38cf5f1 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -629,6 +629,7 @@ struct v4l2_pix_format {
>  #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
>  #define V4L2_PIX_FMT_VP8      v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
>  #define V4L2_PIX_FMT_VP9      v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> +#define V4L2_PIX_FMT_HEVC     v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
>  
>  /*  Vendor-specific formats   */
>  #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> 

You also need to update v4l2-ioctl.c, v4l_fill_fmtdesc().

Regards,

	Hans

Re: [Patch v3 05/11] [media] videodev2.h: Add v4l2 definition for HEVC

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:11 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  include/uapi/linux/videodev2.h | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> > index 45184a2..38cf5f1 100644
> > --- a/include/uapi/linux/videodev2.h
> > +++ b/include/uapi/linux/videodev2.h
> > @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> >  #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> >  #define V4L2_PIX_FMT_VP8      v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> >  #define V4L2_PIX_FMT_VP9      v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> > +#define V4L2_PIX_FMT_HEVC     v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
> >  
> >  /*  Vendor-specific formats   */
> >  #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> > 
> 
> You also need to update v4l2-ioctl.c, v4l_fill_fmtdesc().
> 
> Regards,
> 
> 	Hans
> 
Ok I will add it in the v4l_fill_fmtdesc() function.

Thank you for the review.
Regards,
Smitha
> 

[Patch v3 05/11] [media] videodev2.h: Add v4l2 definition for HEVC

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:11 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  include/uapi/linux/videodev2.h | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> > index 45184a2..38cf5f1 100644
> > --- a/include/uapi/linux/videodev2.h
> > +++ b/include/uapi/linux/videodev2.h
> > @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> >  #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> >  #define V4L2_PIX_FMT_VP8      v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> >  #define V4L2_PIX_FMT_VP9      v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> > +#define V4L2_PIX_FMT_HEVC     v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
> >  
> >  /*  Vendor-specific formats   */
> >  #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> > 
> 
> You also need to update v4l2-ioctl.c, v4l_fill_fmtdesc().
> 
> Regards,
> 
> 	Hans
> 
Ok I will add it in the v4l_fill_fmtdesc() function.

Thank you for the review.
Regards,
Smitha
> 

[Patch v3 06/11] [media] s5p-mfc: Add support for HEVC decoder

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for HEVC decoder.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
 6 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 3f0dab3..953a073 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -33,6 +33,7 @@
 #define MFC_NUM_PORTS_V10	1
 
 /* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_DEC		17
 #define S5P_FIMV_CODEC_HEVC_ENC         26
 
 /* Encoder buffer size for MFC v10.0 */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index b1b1491..76eca67 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VP8_DEC:
 		codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
 		break;
+	case S5P_MFC_CODEC_HEVC_DEC:
+		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
 		break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 8368d5c2..f49fa34 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -79,6 +79,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define S5P_MFC_CODEC_H263_DEC		5
 #define S5P_MFC_CODEC_VC1RCV_DEC	6
 #define S5P_MFC_CODEC_VP8_DEC		7
+#define S5P_MFC_CODEC_HEVC_DEC		17
 
 #define S5P_MFC_CODEC_H264_ENC		20
 #define S5P_MFC_CODEC_H264_MVC_ENC	21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index db6d9fa..4fdaec2 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -144,6 +144,14 @@ static struct s5p_mfc_fmt formats[] = {
 		.num_planes	= 1,
 		.versions	= MFC_V6PLUS_BITS,
 	},
+	{
+		.name		= "HEVC Encoded Stream",
+		.fourcc		= V4L2_PIX_FMT_HEVC,
+		.codec_mode	= S5P_FIMV_CODEC_HEVC_DEC,
+		.type		= MFC_FMT_DEC,
+		.num_planes	= 1,
+		.versions	= MFC_V10_BIT,
+	},
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index cb39484..033d655 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -220,6 +220,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
+	case S5P_MFC_CODEC_HEVC_DEC:
+		mfc_debug(2, "Use min scratch buffer size\n");
+		ctx->bank1.size =
+			ctx->scratch_buf_size +
+			(ctx->mv_count * ctx->mv_size);
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
@@ -322,6 +328,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
 	switch (ctx->codec_mode) {
 	case S5P_MFC_CODEC_H264_DEC:
 	case S5P_MFC_CODEC_H264_MVC_DEC:
+	case S5P_MFC_CODEC_HEVC_DEC:
 		ctx->ctx.size = buf_size->h264_dec_ctx;
 		break;
 	case S5P_MFC_CODEC_MPEG4_DEC:
@@ -436,6 +443,10 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
 					ctx->img_height);
 		}
+	} else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
+		ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width,
+				ctx->img_height);
+		ctx->mv_size = ALIGN(ctx->mv_size, 32);
 	} else {
 		ctx->mv_size = 0;
 	}
@@ -517,7 +528,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 	buf_size1 -= ctx->scratch_buf_size;
 
 	if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
-			ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC){
+			ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC ||
+			ctx->codec_mode == S5P_FIMV_CODEC_HEVC_DEC) {
 		writel(ctx->mv_size, mfc_regs->d_mv_buffer_size);
 		writel(ctx->mv_count, mfc_regs->d_num_mv);
 	}
@@ -540,7 +552,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 				mfc_regs->d_second_plane_dpb + i * 4);
 	}
 	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
-			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
+			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC ||
+			ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
 		for (i = 0; i < ctx->mv_count; i++) {
 			/* To test alignment */
 			align_gap = buf_addr1;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 975bbc5..2290f7e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -29,6 +29,9 @@
 #define enc_lcu_width(x_size)		DIV_ROUND_UP(x_size, 32)
 #define enc_lcu_height(y_size)		DIV_ROUND_UP(y_size, 32)
 
+#define s5p_mfc_dec_hevc_mv_size(x, y) \
+	(DIV_ROUND_UP(x, 64) * DIV_ROUND_UP(y, 64) * 256 + 512)
+
 /* Definition */
 #define ENC_MULTI_SLICE_MB_MAX		((1 << 30) - 1)
 #define ENC_MULTI_SLICE_BIT_MIN		2800
-- 
2.7.4

[Patch v3 06/11] [media] s5p-mfc: Add support for HEVC decoder

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for HEVC decoder.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
 6 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 3f0dab3..953a073 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -33,6 +33,7 @@
 #define MFC_NUM_PORTS_V10	1
 
 /* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_DEC		17
 #define S5P_FIMV_CODEC_HEVC_ENC         26
 
 /* Encoder buffer size for MFC v10.0 */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index b1b1491..76eca67 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VP8_DEC:
 		codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
 		break;
+	case S5P_MFC_CODEC_HEVC_DEC:
+		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
 		break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 8368d5c2..f49fa34 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -79,6 +79,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define S5P_MFC_CODEC_H263_DEC		5
 #define S5P_MFC_CODEC_VC1RCV_DEC	6
 #define S5P_MFC_CODEC_VP8_DEC		7
+#define S5P_MFC_CODEC_HEVC_DEC		17
 
 #define S5P_MFC_CODEC_H264_ENC		20
 #define S5P_MFC_CODEC_H264_MVC_ENC	21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index db6d9fa..4fdaec2 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -144,6 +144,14 @@ static struct s5p_mfc_fmt formats[] = {
 		.num_planes	= 1,
 		.versions	= MFC_V6PLUS_BITS,
 	},
+	{
+		.name		= "HEVC Encoded Stream",
+		.fourcc		= V4L2_PIX_FMT_HEVC,
+		.codec_mode	= S5P_FIMV_CODEC_HEVC_DEC,
+		.type		= MFC_FMT_DEC,
+		.num_planes	= 1,
+		.versions	= MFC_V10_BIT,
+	},
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index cb39484..033d655 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -220,6 +220,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 				S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
 		ctx->bank1.size = ctx->scratch_buf_size;
 		break;
+	case S5P_MFC_CODEC_HEVC_DEC:
+		mfc_debug(2, "Use min scratch buffer size\n");
+		ctx->bank1.size =
+			ctx->scratch_buf_size +
+			(ctx->mv_count * ctx->mv_size);
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
@@ -322,6 +328,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
 	switch (ctx->codec_mode) {
 	case S5P_MFC_CODEC_H264_DEC:
 	case S5P_MFC_CODEC_H264_MVC_DEC:
+	case S5P_MFC_CODEC_HEVC_DEC:
 		ctx->ctx.size = buf_size->h264_dec_ctx;
 		break;
 	case S5P_MFC_CODEC_MPEG4_DEC:
@@ -436,6 +443,10 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
 			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
 					ctx->img_height);
 		}
+	} else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
+		ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width,
+				ctx->img_height);
+		ctx->mv_size = ALIGN(ctx->mv_size, 32);
 	} else {
 		ctx->mv_size = 0;
 	}
@@ -517,7 +528,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 	buf_size1 -= ctx->scratch_buf_size;
 
 	if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
-			ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC){
+			ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC ||
+			ctx->codec_mode == S5P_FIMV_CODEC_HEVC_DEC) {
 		writel(ctx->mv_size, mfc_regs->d_mv_buffer_size);
 		writel(ctx->mv_count, mfc_regs->d_num_mv);
 	}
@@ -540,7 +552,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 				mfc_regs->d_second_plane_dpb + i * 4);
 	}
 	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
-			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
+			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC ||
+			ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
 		for (i = 0; i < ctx->mv_count; i++) {
 			/* To test alignment */
 			align_gap = buf_addr1;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 975bbc5..2290f7e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -29,6 +29,9 @@
 #define enc_lcu_width(x_size)		DIV_ROUND_UP(x_size, 32)
 #define enc_lcu_height(y_size)		DIV_ROUND_UP(y_size, 32)
 
+#define s5p_mfc_dec_hevc_mv_size(x, y) \
+	(DIV_ROUND_UP(x, 64) * DIV_ROUND_UP(y, 64) * 256 + 512)
+
 /* Definition */
 #define ENC_MULTI_SLICE_MB_MAX		((1 << 30) - 1)
 #define ENC_MULTI_SLICE_BIT_MIN		2800
-- 
2.7.4

Re: [Patch v3 06/11] [media] s5p-mfc: Add support for HEVC decoder

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add support for codec definition and corresponding buffer
> requirements for HEVC decoder.
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
>  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
>  6 files changed, 31 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 3f0dab3..953a073 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -33,6 +33,7 @@
>  #define MFC_NUM_PORTS_V10	1
>  
>  /* MFCv10 codec defines*/
> +#define S5P_FIMV_CODEC_HEVC_DEC		17
>  #define S5P_FIMV_CODEC_HEVC_ENC         26
>  
>  /* Encoder buffer size for MFC v10.0 */
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> index b1b1491..76eca67 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> @@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
>  	case S5P_MFC_CODEC_VP8_DEC:
>  		codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_DEC:
> +		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
> +		break;
>  	case S5P_MFC_CODEC_H264_ENC:
>  		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
>  		break;
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> index 8368d5c2..f49fa34 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> @@ -79,6 +79,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
>  #define S5P_MFC_CODEC_H263_DEC		5
>  #define S5P_MFC_CODEC_VC1RCV_DEC	6
>  #define S5P_MFC_CODEC_VP8_DEC		7
> +#define S5P_MFC_CODEC_HEVC_DEC		17
>  
>  #define S5P_MFC_CODEC_H264_ENC		20
>  #define S5P_MFC_CODEC_H264_MVC_ENC	21
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> index db6d9fa..4fdaec2 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> @@ -144,6 +144,14 @@ static struct s5p_mfc_fmt formats[] = {
>  		.num_planes	= 1,
>  		.versions	= MFC_V6PLUS_BITS,
>  	},
> +	{
> +		.name		= "HEVC Encoded Stream",
> +		.fourcc		= V4L2_PIX_FMT_HEVC,
> +		.codec_mode	= S5P_FIMV_CODEC_HEVC_DEC,
> +		.type		= MFC_FMT_DEC,
> +		.num_planes	= 1,
> +		.versions	= MFC_V10_BIT,
> +	},
>  };

The '.name' should probably be removed completely in this driver. The name is now filled
in by v4l_fill_fmtdesc() in v4l2-ioctl.c, so there is no longer any need to set it in a
driver.

This can be done in a separate patch before this patch is applied.

Doing this in v4l2-ioctl.c ensures consistent format naming across drivers.

Regards,

	Hans

[Patch v3 06/11] [media] s5p-mfc: Add support for HEVC decoder

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add support for codec definition and corresponding buffer
> requirements for HEVC decoder.
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
>  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
>  6 files changed, 31 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 3f0dab3..953a073 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -33,6 +33,7 @@
>  #define MFC_NUM_PORTS_V10	1
>  
>  /* MFCv10 codec defines*/
> +#define S5P_FIMV_CODEC_HEVC_DEC		17
>  #define S5P_FIMV_CODEC_HEVC_ENC         26
>  
>  /* Encoder buffer size for MFC v10.0 */
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> index b1b1491..76eca67 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> @@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
>  	case S5P_MFC_CODEC_VP8_DEC:
>  		codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_DEC:
> +		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
> +		break;
>  	case S5P_MFC_CODEC_H264_ENC:
>  		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
>  		break;
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> index 8368d5c2..f49fa34 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> @@ -79,6 +79,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
>  #define S5P_MFC_CODEC_H263_DEC		5
>  #define S5P_MFC_CODEC_VC1RCV_DEC	6
>  #define S5P_MFC_CODEC_VP8_DEC		7
> +#define S5P_MFC_CODEC_HEVC_DEC		17
>  
>  #define S5P_MFC_CODEC_H264_ENC		20
>  #define S5P_MFC_CODEC_H264_MVC_ENC	21
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> index db6d9fa..4fdaec2 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> @@ -144,6 +144,14 @@ static struct s5p_mfc_fmt formats[] = {
>  		.num_planes	= 1,
>  		.versions	= MFC_V6PLUS_BITS,
>  	},
> +	{
> +		.name		= "HEVC Encoded Stream",
> +		.fourcc		= V4L2_PIX_FMT_HEVC,
> +		.codec_mode	= S5P_FIMV_CODEC_HEVC_DEC,
> +		.type		= MFC_FMT_DEC,
> +		.num_planes	= 1,
> +		.versions	= MFC_V10_BIT,
> +	},
>  };

The '.name' should probably be removed completely in this driver. The name is now filled
in by v4l_fill_fmtdesc() in v4l2-ioctl.c, so there is no longer any need to set it in a
driver.

This can be done in a separate patch before this patch is applied.

Doing this in v4l2-ioctl.c ensures consistent format naming across drivers.

Regards,

	Hans

Re: [Patch v3 06/11] [media] s5p-mfc: Add support for HEVC decoder

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:13 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add support for codec definition and corresponding buffer
> > requirements for HEVC decoder.
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
> >  6 files changed, 31 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 3f0dab3..953a073 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -33,6 +33,7 @@
> >  #define MFC_NUM_PORTS_V10	1
> >  
> >  /* MFCv10 codec defines*/
> > +#define S5P_FIMV_CODEC_HEVC_DEC		17
> >  #define S5P_FIMV_CODEC_HEVC_ENC         26
> >  
> >  /* Encoder buffer size for MFC v10.0 */
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > index b1b1491..76eca67 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > @@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> >  	case S5P_MFC_CODEC_VP8_DEC:
> >  		codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_DEC:
> > +		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
> > +		break;
> >  	case S5P_MFC_CODEC_H264_ENC:
> >  		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
> >  		break;
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > index 8368d5c2..f49fa34 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > @@ -79,6 +79,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
> >  #define S5P_MFC_CODEC_H263_DEC		5
> >  #define S5P_MFC_CODEC_VC1RCV_DEC	6
> >  #define S5P_MFC_CODEC_VP8_DEC		7
> > +#define S5P_MFC_CODEC_HEVC_DEC		17
> >  
> >  #define S5P_MFC_CODEC_H264_ENC		20
> >  #define S5P_MFC_CODEC_H264_MVC_ENC	21
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> > index db6d9fa..4fdaec2 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> > @@ -144,6 +144,14 @@ static struct s5p_mfc_fmt formats[] = {
> >  		.num_planes	= 1,
> >  		.versions	= MFC_V6PLUS_BITS,
> >  	},
> > +	{
> > +		.name		= "HEVC Encoded Stream",
> > +		.fourcc		= V4L2_PIX_FMT_HEVC,
> > +		.codec_mode	= S5P_FIMV_CODEC_HEVC_DEC,
> > +		.type		= MFC_FMT_DEC,
> > +		.num_planes	= 1,
> > +		.versions	= MFC_V10_BIT,
> > +	},
> >  };
> 
> The '.name' should probably be removed completely in this driver. The name is now filled
> in by v4l_fill_fmtdesc() in v4l2-ioctl.c, so there is no longer any need to set it in a
> driver.
> 
> This can be done in a separate patch before this patch is applied.
> 
> Doing this in v4l2-ioctl.c ensures consistent format naming across drivers.
> 
> Regards,
> 
> 	Hans
> 
> 
I will remove the ".name" field in the next patch version. Also I will
create a separate patch for adding it in v4l_fill_fmtdesc().
Thank you for the review.
Regards,
Smitha

[Patch v3 06/11] [media] s5p-mfc: Add support for HEVC decoder

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:13 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add support for codec definition and corresponding buffer
> > requirements for HEVC decoder.
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
> >  6 files changed, 31 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 3f0dab3..953a073 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -33,6 +33,7 @@
> >  #define MFC_NUM_PORTS_V10	1
> >  
> >  /* MFCv10 codec defines*/
> > +#define S5P_FIMV_CODEC_HEVC_DEC		17
> >  #define S5P_FIMV_CODEC_HEVC_ENC         26
> >  
> >  /* Encoder buffer size for MFC v10.0 */
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > index b1b1491..76eca67 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > @@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> >  	case S5P_MFC_CODEC_VP8_DEC:
> >  		codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_DEC:
> > +		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
> > +		break;
> >  	case S5P_MFC_CODEC_H264_ENC:
> >  		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
> >  		break;
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > index 8368d5c2..f49fa34 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > @@ -79,6 +79,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
> >  #define S5P_MFC_CODEC_H263_DEC		5
> >  #define S5P_MFC_CODEC_VC1RCV_DEC	6
> >  #define S5P_MFC_CODEC_VP8_DEC		7
> > +#define S5P_MFC_CODEC_HEVC_DEC		17
> >  
> >  #define S5P_MFC_CODEC_H264_ENC		20
> >  #define S5P_MFC_CODEC_H264_MVC_ENC	21
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> > index db6d9fa..4fdaec2 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
> > @@ -144,6 +144,14 @@ static struct s5p_mfc_fmt formats[] = {
> >  		.num_planes	= 1,
> >  		.versions	= MFC_V6PLUS_BITS,
> >  	},
> > +	{
> > +		.name		= "HEVC Encoded Stream",
> > +		.fourcc		= V4L2_PIX_FMT_HEVC,
> > +		.codec_mode	= S5P_FIMV_CODEC_HEVC_DEC,
> > +		.type		= MFC_FMT_DEC,
> > +		.num_planes	= 1,
> > +		.versions	= MFC_V10_BIT,
> > +	},
> >  };
> 
> The '.name' should probably be removed completely in this driver. The name is now filled
> in by v4l_fill_fmtdesc() in v4l2-ioctl.c, so there is no longer any need to set it in a
> driver.
> 
> This can be done in a separate patch before this patch is applied.
> 
> Doing this in v4l2-ioctl.c ensures consistent format naming across drivers.
> 
> Regards,
> 
> 	Hans
> 
> 
I will remove the ".name" field in the next patch version. Also I will
create a separate patch for adding it in v4l_fill_fmtdesc().
Thank you for the review.
Regards,
Smitha

[Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
index 728d7ed..ff4cac2 100644
--- a/Documentation/media/uapi/v4l/pixfmt-013.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
@@ -90,3 +90,8 @@ Compressed Formats
       - ``V4L2_PIX_FMT_VP9``
       - 'VP90'
       - VP9 video elementary stream.
+    * .. _V4L2-PIX-FMT-HEVC:
+
+      - ``V4L2_PIX_FMT_HEVC``
+      - 'HEVC'
+      - HEVC video elementary stream.
-- 
2.7.4

[Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
index 728d7ed..ff4cac2 100644
--- a/Documentation/media/uapi/v4l/pixfmt-013.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
@@ -90,3 +90,8 @@ Compressed Formats
       - ``V4L2_PIX_FMT_VP9``
       - 'VP90'
       - VP9 video elementary stream.
+    * .. _V4L2-PIX-FMT-HEVC:
+
+      - ``V4L2_PIX_FMT_HEVC``
+      - 'HEVC'
+      - HEVC video elementary stream.
-- 
2.7.4

Re: [Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
> index 728d7ed..ff4cac2 100644
> --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
> +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
> @@ -90,3 +90,8 @@ Compressed Formats
>        - ``V4L2_PIX_FMT_VP9``
>        - 'VP90'
>        - VP9 video elementary stream.
> +    * .. _V4L2-PIX-FMT-HEVC:
> +
> +      - ``V4L2_PIX_FMT_HEVC``
> +      - 'HEVC'
> +      - HEVC video elementary stream.
> 

You should mention here that HEVC == H.265.

Regards,

	Hans

[Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
> index 728d7ed..ff4cac2 100644
> --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
> +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
> @@ -90,3 +90,8 @@ Compressed Formats
>        - ``V4L2_PIX_FMT_VP9``
>        - 'VP90'
>        - VP9 video elementary stream.
> +    * .. _V4L2-PIX-FMT-HEVC:
> +
> +      - ``V4L2_PIX_FMT_HEVC``
> +      - 'HEVC'
> +      - HEVC video elementary stream.
> 

You should mention here that HEVC == H.265.

Regards,

	Hans

Re: [Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:10 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
> >  1 file changed, 5 insertions(+)
> > 
> > diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
> > index 728d7ed..ff4cac2 100644
> > --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
> > +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
> > @@ -90,3 +90,8 @@ Compressed Formats
> >        - ``V4L2_PIX_FMT_VP9``
> >        - 'VP90'
> >        - VP9 video elementary stream.
> > +    * .. _V4L2-PIX-FMT-HEVC:
> > +
> > +      - ``V4L2_PIX_FMT_HEVC``
> > +      - 'HEVC'
> > +      - HEVC video elementary stream.
> > 
> 
> You should mention here that HEVC == H.265.
> 
> Regards,
> 
> 	Hans
> 
Do you mean change to "HEVC/H.265 video elementary stream" ?

Thank you for the review.
Regards,
Smitha
> 

[Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:10 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
> >  1 file changed, 5 insertions(+)
> > 
> > diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
> > index 728d7ed..ff4cac2 100644
> > --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
> > +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
> > @@ -90,3 +90,8 @@ Compressed Formats
> >        - ``V4L2_PIX_FMT_VP9``
> >        - 'VP90'
> >        - VP9 video elementary stream.
> > +    * .. _V4L2-PIX-FMT-HEVC:
> > +
> > +      - ``V4L2_PIX_FMT_HEVC``
> > +      - 'HEVC'
> > +      - HEVC video elementary stream.
> > 
> 
> You should mention here that HEVC == H.265.
> 
> Regards,
> 
> 	Hans
> 
Do you mean change to "HEVC/H.265 video elementary stream" ?

Thank you for the review.
Regards,
Smitha
> 

Re: [Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Hans Verkuil]

On 04/03/2017 02:12 PM, Smitha T Murthy wrote:
> On Mon, 2017-04-03 at 10:10 +0200, Hans Verkuil wrote:
>> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
>>> Add V4L2 definition for HEVC compressed format
>>>
>>> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
>>> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
>>> ---
>>>  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
>>>  1 file changed, 5 insertions(+)
>>>
>>> diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
>>> index 728d7ed..ff4cac2 100644
>>> --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
>>> +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
>>> @@ -90,3 +90,8 @@ Compressed Formats
>>>        - ``V4L2_PIX_FMT_VP9``
>>>        - 'VP90'
>>>        - VP9 video elementary stream.
>>> +    * .. _V4L2-PIX-FMT-HEVC:
>>> +
>>> +      - ``V4L2_PIX_FMT_HEVC``
>>> +      - 'HEVC'
>>> +      - HEVC video elementary stream.
>>>
>>
>> You should mention here that HEVC == H.265.
>>
>> Regards,
>>
>> 	Hans
>>
> Do you mean change to "HEVC/H.265 video elementary stream" ?

Yes, that should do it.

Regards,

	Hans

> 
> Thank you for the review.
> Regards,
> Smitha
>>
> 
> 

[Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Hans Verkuil]

On 04/03/2017 02:12 PM, Smitha T Murthy wrote:
> On Mon, 2017-04-03 at 10:10 +0200, Hans Verkuil wrote:
>> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
>>> Add V4L2 definition for HEVC compressed format
>>>
>>> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
>>> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
>>> ---
>>>  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
>>>  1 file changed, 5 insertions(+)
>>>
>>> diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
>>> index 728d7ed..ff4cac2 100644
>>> --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
>>> +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
>>> @@ -90,3 +90,8 @@ Compressed Formats
>>>        - ``V4L2_PIX_FMT_VP9``
>>>        - 'VP90'
>>>        - VP9 video elementary stream.
>>> +    * .. _V4L2-PIX-FMT-HEVC:
>>> +
>>> +      - ``V4L2_PIX_FMT_HEVC``
>>> +      - 'HEVC'
>>> +      - HEVC video elementary stream.
>>>
>>
>> You should mention here that HEVC == H.265.
>>
>> Regards,
>>
>> 	Hans
>>
> Do you mean change to "HEVC/H.265 video elementary stream" ?

Yes, that should do it.

Regards,

	Hans

> 
> Thank you for the review.
> Regards,
> Smitha
>>
> 
> 

Re: [Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

On Mon, 2017-04-03 at 14:12 +0200, Hans Verkuil wrote:
> On 04/03/2017 02:12 PM, Smitha T Murthy wrote:
> > On Mon, 2017-04-03 at 10:10 +0200, Hans Verkuil wrote:
> >> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> >>> Add V4L2 definition for HEVC compressed format
> >>>
> >>> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> >>> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> >>> ---
> >>>  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
> >>>  1 file changed, 5 insertions(+)
> >>>
> >>> diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
> >>> index 728d7ed..ff4cac2 100644
> >>> --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
> >>> +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
> >>> @@ -90,3 +90,8 @@ Compressed Formats
> >>>        - ``V4L2_PIX_FMT_VP9``
> >>>        - 'VP90'
> >>>        - VP9 video elementary stream.
> >>> +    * .. _V4L2-PIX-FMT-HEVC:
> >>> +
> >>> +      - ``V4L2_PIX_FMT_HEVC``
> >>> +      - 'HEVC'
> >>> +      - HEVC video elementary stream.
> >>>
> >>
> >> You should mention here that HEVC == H.265.
> >>
> >> Regards,
> >>
> >> 	Hans
> >>
> > Do you mean change to "HEVC/H.265 video elementary stream" ?
> 
> Yes, that should do it.
> 
> Regards,
> 
> 	Hans
> 
> > 
> > Thank you for the review.
> > Regards,
> > Smitha
> >>
> > 
> > 
> 
Ok I will change it accordingly.

Thank you,
Smitha
> 
> 

[Patch v3 07/11] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

On Mon, 2017-04-03 at 14:12 +0200, Hans Verkuil wrote:
> On 04/03/2017 02:12 PM, Smitha T Murthy wrote:
> > On Mon, 2017-04-03 at 10:10 +0200, Hans Verkuil wrote:
> >> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> >>> Add V4L2 definition for HEVC compressed format
> >>>
> >>> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> >>> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> >>> ---
> >>>  Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
> >>>  1 file changed, 5 insertions(+)
> >>>
> >>> diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
> >>> index 728d7ed..ff4cac2 100644
> >>> --- a/Documentation/media/uapi/v4l/pixfmt-013.rst
> >>> +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
> >>> @@ -90,3 +90,8 @@ Compressed Formats
> >>>        - ``V4L2_PIX_FMT_VP9``
> >>>        - 'VP90'
> >>>        - VP9 video elementary stream.
> >>> +    * .. _V4L2-PIX-FMT-HEVC:
> >>> +
> >>> +      - ``V4L2_PIX_FMT_HEVC``
> >>> +      - 'HEVC'
> >>> +      - HEVC video elementary stream.
> >>>
> >>
> >> You should mention here that HEVC == H.265.
> >>
> >> Regards,
> >>
> >> 	Hans
> >>
> > Do you mean change to "HEVC/H.265 video elementary stream" ?
> 
> Yes, that should do it.
> 
> Regards,
> 
> 	Hans
> 
> > 
> > Thank you for the review.
> > Regards,
> > Smitha
> >>
> > 
> > 
> 
Ok I will change it accordingly.

Thank you,
Smitha
> 
> 

[Patch v3 08/11] [media] s5p-mfc: Add VP9 decoder support

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for VP9 decoder.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  6 ++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |  2 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 27 +++++++++++++++++++++++++
 6 files changed, 47 insertions(+)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 953a073..6754477 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -18,6 +18,8 @@
 /* MFCv10 register definitions*/
 #define S5P_FIMV_MFC_CLOCK_OFF_V10			0x7120
 #define S5P_FIMV_MFC_STATE_V10				0x7124
+#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
+#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
@@ -34,8 +36,12 @@
 
 /* MFCv10 codec defines*/
 #define S5P_FIMV_CODEC_HEVC_DEC		17
+#define S5P_FIMV_CODEC_VP9_DEC		18
 #define S5P_FIMV_CODEC_HEVC_ENC         26
 
+/* Decoder buffer size for MFC v10 */
+#define DEC_VP9_STATIC_BUFFER_SIZE	20480
+
 /* Encoder buffer size for MFC v10.0 */
 #define ENC_V100_BASE_SIZE(x, y) \
 	(((x + 3) * (y + 3) * 8) \
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 76eca67..102b47e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_HEVC_DEC:
 		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
 		break;
+	case S5P_MFC_CODEC_VP9_DEC:
+		codec_type = S5P_FIMV_CODEC_VP9_DEC;
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
 		break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index f49fa34..4082079 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -80,6 +80,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define S5P_MFC_CODEC_VC1RCV_DEC	6
 #define S5P_MFC_CODEC_VP8_DEC		7
 #define S5P_MFC_CODEC_HEVC_DEC		17
+#define S5P_MFC_CODEC_VP9_DEC		18
 
 #define S5P_MFC_CODEC_H264_ENC		20
 #define S5P_MFC_CODEC_H264_MVC_ENC	21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 4fdaec2..8e2f477 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -152,6 +152,14 @@ static struct s5p_mfc_fmt formats[] = {
 		.num_planes	= 1,
 		.versions	= MFC_V10_BIT,
 	},
+	{
+		.name		= "VP9 Encoded Stream",
+		.fourcc		= V4L2_PIX_FMT_VP9,
+		.codec_mode	= S5P_FIMV_CODEC_VP9_DEC,
+		.type		= MFC_FMT_DEC,
+		.num_planes	= 1,
+		.versions	= MFC_V10_BIT,
+	},
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 6478f70..565decf 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -170,6 +170,8 @@ struct s5p_mfc_regs {
 	void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
 	void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
 	void __iomem *d_min_scratch_buffer_size; /* v10 */
+	void __iomem *d_static_buffer_addr; /* v10 */
+	void __iomem *d_static_buffer_size; /* v10 */
 
 	/* encoder registers */
 	void __iomem *e_frame_width;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 033d655..ae5b871 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			ctx->scratch_buf_size +
 			(ctx->mv_count * ctx->mv_size);
 		break;
+	case S5P_MFC_CODEC_VP9_DEC:
+		mfc_debug(2, "Use min scratch buffer size\n");
+		ctx->bank1.size =
+			ctx->scratch_buf_size +
+			DEC_VP9_STATIC_BUFFER_SIZE;
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
@@ -337,6 +343,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VC1_DEC:
 	case S5P_MFC_CODEC_MPEG2_DEC:
 	case S5P_MFC_CODEC_VP8_DEC:
+	case S5P_MFC_CODEC_VP9_DEC:
 		ctx->ctx.size = buf_size->other_dec_ctx;
 		break;
 	case S5P_MFC_CODEC_H264_ENC:
@@ -569,6 +576,14 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 		}
 	}
 
+	if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_DEC) {
+		writel(buf_addr1, mfc_regs->d_static_buffer_addr);
+		writel(DEC_VP9_STATIC_BUFFER_SIZE,
+				mfc_regs->d_static_buffer_size);
+		buf_addr1 += DEC_VP9_STATIC_BUFFER_SIZE;
+		buf_size1 -= DEC_VP9_STATIC_BUFFER_SIZE;
+	}
+
 	mfc_debug(2, "Buf1: %zu, buf_size1: %d (frames %d)\n",
 			buf_addr1, buf_size1, ctx->total_dpb_count);
 	if (buf_size1 < 0) {
@@ -2274,6 +2289,18 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
 	R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
 
+	if (!IS_MFCV10(dev))
+		goto done;
+
+	/* Initialize registers used in MFC v10 only.
+	 * Also, over-write the registers which have
+	 * a different offset for MFC v10.
+	 */
+
+	/* decoder registers */
+	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
+	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
+
 done:
 	return &mfc_regs;
 #undef S5P_MFC_REG_ADDR
-- 
2.7.4

[Patch v3 08/11] [media] s5p-mfc: Add VP9 decoder support

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for VP9 decoder.

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  6 ++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c    |  8 ++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |  2 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 27 +++++++++++++++++++++++++
 6 files changed, 47 insertions(+)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 953a073..6754477 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -18,6 +18,8 @@
 /* MFCv10 register definitions*/
 #define S5P_FIMV_MFC_CLOCK_OFF_V10			0x7120
 #define S5P_FIMV_MFC_STATE_V10				0x7124
+#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
+#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
@@ -34,8 +36,12 @@
 
 /* MFCv10 codec defines*/
 #define S5P_FIMV_CODEC_HEVC_DEC		17
+#define S5P_FIMV_CODEC_VP9_DEC		18
 #define S5P_FIMV_CODEC_HEVC_ENC         26
 
+/* Decoder buffer size for MFC v10 */
+#define DEC_VP9_STATIC_BUFFER_SIZE	20480
+
 /* Encoder buffer size for MFC v10.0 */
 #define ENC_V100_BASE_SIZE(x, y) \
 	(((x + 3) * (y + 3) * 8) \
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 76eca67..102b47e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_HEVC_DEC:
 		codec_type = S5P_FIMV_CODEC_HEVC_DEC;
 		break;
+	case S5P_MFC_CODEC_VP9_DEC:
+		codec_type = S5P_FIMV_CODEC_VP9_DEC;
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
 		break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index f49fa34..4082079 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -80,6 +80,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define S5P_MFC_CODEC_VC1RCV_DEC	6
 #define S5P_MFC_CODEC_VP8_DEC		7
 #define S5P_MFC_CODEC_HEVC_DEC		17
+#define S5P_MFC_CODEC_VP9_DEC		18
 
 #define S5P_MFC_CODEC_H264_ENC		20
 #define S5P_MFC_CODEC_H264_MVC_ENC	21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 4fdaec2..8e2f477 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -152,6 +152,14 @@ static struct s5p_mfc_fmt formats[] = {
 		.num_planes	= 1,
 		.versions	= MFC_V10_BIT,
 	},
+	{
+		.name		= "VP9 Encoded Stream",
+		.fourcc		= V4L2_PIX_FMT_VP9,
+		.codec_mode	= S5P_FIMV_CODEC_VP9_DEC,
+		.type		= MFC_FMT_DEC,
+		.num_planes	= 1,
+		.versions	= MFC_V10_BIT,
+	},
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 6478f70..565decf 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -170,6 +170,8 @@ struct s5p_mfc_regs {
 	void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
 	void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
 	void __iomem *d_min_scratch_buffer_size; /* v10 */
+	void __iomem *d_static_buffer_addr; /* v10 */
+	void __iomem *d_static_buffer_size; /* v10 */
 
 	/* encoder registers */
 	void __iomem *e_frame_width;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 033d655..ae5b871 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			ctx->scratch_buf_size +
 			(ctx->mv_count * ctx->mv_size);
 		break;
+	case S5P_MFC_CODEC_VP9_DEC:
+		mfc_debug(2, "Use min scratch buffer size\n");
+		ctx->bank1.size =
+			ctx->scratch_buf_size +
+			DEC_VP9_STATIC_BUFFER_SIZE;
+		break;
 	case S5P_MFC_CODEC_H264_ENC:
 		if (IS_MFCV10(dev)) {
 			mfc_debug(2, "Use min scratch buffer size\n");
@@ -337,6 +343,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VC1_DEC:
 	case S5P_MFC_CODEC_MPEG2_DEC:
 	case S5P_MFC_CODEC_VP8_DEC:
+	case S5P_MFC_CODEC_VP9_DEC:
 		ctx->ctx.size = buf_size->other_dec_ctx;
 		break;
 	case S5P_MFC_CODEC_H264_ENC:
@@ -569,6 +576,14 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
 		}
 	}
 
+	if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_DEC) {
+		writel(buf_addr1, mfc_regs->d_static_buffer_addr);
+		writel(DEC_VP9_STATIC_BUFFER_SIZE,
+				mfc_regs->d_static_buffer_size);
+		buf_addr1 += DEC_VP9_STATIC_BUFFER_SIZE;
+		buf_size1 -= DEC_VP9_STATIC_BUFFER_SIZE;
+	}
+
 	mfc_debug(2, "Buf1: %zu, buf_size1: %d (frames %d)\n",
 			buf_addr1, buf_size1, ctx->total_dpb_count);
 	if (buf_size1 < 0) {
@@ -2274,6 +2289,18 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
 	R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
 
+	if (!IS_MFCV10(dev))
+		goto done;
+
+	/* Initialize registers used in MFC v10 only.
+	 * Also, over-write the registers which have
+	 * a different offset for MFC v10.
+	 */
+
+	/* decoder registers */
+	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
+	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
+
 done:
 	return &mfc_regs;
 #undef S5P_MFC_REG_ADDR
-- 
2.7.4

[Patch v3 09/11] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Smitha T Murthy]

Add v4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++
 include/uapi/linux/v4l2-controls.h   | 133 +++++++++++++++++++++++++++++++++++
 2 files changed, 236 insertions(+)

diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index b9e08e3..5fa763b 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -479,6 +479,46 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
 		NULL,
 	};
 
+	static const char * const hevc_profile[] = {
+		"Main",
+		"Main still picture",
+		NULL,
+	};
+	static const char * const hevc_level[] = {
+		"1",
+		"2",
+		"2.1",
+		"3",
+		"3.1",
+		"4",
+		"4.1",
+		"5",
+		"5.1",
+		"5.2",
+		"6",
+		"6.1",
+		"6.2",
+		NULL,
+	};
+	static const char * const hevc_hierarchial_coding_type[] = {
+		"B",
+		"P",
+		NULL,
+	};
+	static const char * const hevc_refresh_type[] = {
+		"None",
+		"CRA",
+		"IDR",
+		NULL,
+	};
+	static const char * const hevc_size_of_length_field[] = {
+		"0",
+		"1",
+		"2",
+		"4",
+		NULL,
+	};
+
 
 	switch (id) {
 	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
@@ -574,6 +614,16 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
 		return dv_it_content_type;
 	case V4L2_CID_DETECT_MD_MODE:
 		return detect_md_mode;
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+		return hevc_profile;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+		return hevc_level;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
+		return hevc_hierarchial_coding_type;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+		return hevc_refresh_type;
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+		return hevc_size_of_length_field;
 
 	default:
 		return NULL;
@@ -775,6 +825,54 @@ const char *v4l2_ctrl_get_name(u32 id)
 	case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:		return "VPX P-Frame QP Value";
 	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:			return "VPX Profile";
 
+	/* HEVC controls */
+	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:		return "HEVC I frame QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:		return "HEVC P frame QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:		return "HEVC B frame QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:			return "HEVC Minimum QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:			return "HEVC Maximum QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:		return "HEVC Dark reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:	return "HEVC Smooth reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:	return "HEVC Static reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:	return "HEVC activity reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:			return "HEVC Profile";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:			return "HEVC Level";
+	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:		return "HEVC tier_flag";
+	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:	return "HEVC Frame rate resolution";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:	return "HEVC Maximum coding unit depth";
+	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:	return "HEVC Number of reference frames";
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:		return "HEVC Refresh type";
+	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:		return "HEVC Constant intra prediction";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:		return "HEVC Lossless encoding";
+	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:		return "HEVC Wavefront";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF:			return "HEVC Loop filter";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:	return "HEVC LF across slice boundary or not";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:		return "HEVC QP values";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:	return "HEVC Hierarchical Coding Type";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "HEVC Hierarchical Coding Layer";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "HEVC Hierarchical Layer QP";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:return "HEVC Hierarchical Lay 0 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:return "HEVC Hierarchical Lay 1 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:return "HEVC Hierarchical Lay 2 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:return "HEVC Hierarchical Lay 3 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:return "HEVC Hierarchical Lay 4 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:return "HEVC Hierarchical Lay 5 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:return "HEVC Hierarchical Lay 6 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "HEVC Hierarchical Coding Layer Change";
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:		return "HEVC Sign data hiding";
+	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:		return "HEVC General pb";
+	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:		return "HEVC Temporal id";
+	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:		return "HEVC Strong intra smoothing";
+	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:		return "HEVC intra pu split";
+	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:		return "HEVC tmv prediction";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:	return "HEVC Max number of candidate MVs";
+	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:	return "HEVC ENC without startcode";
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:		return "HEVC num of I frame b/w 2 IDR";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:	return "HEVC Loop filter beta offset";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:	return "HEVC Loop filter tc offset";
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:	return "HEVC Size of length field";
+	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:	return "HEVC Prepend SPS/PPS to IDR";
+
 	/* CAMERA controls */
 	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
 	case V4L2_CID_CAMERA_CLASS:		return "Camera Controls";
@@ -1063,6 +1161,11 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
 	case V4L2_CID_TUNE_DEEMPHASIS:
 	case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
 	case V4L2_CID_DETECT_MD_MODE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
 		*type = V4L2_CTRL_TYPE_MENU;
 		break;
 	case V4L2_CID_LINK_FREQ:
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index 0d2e1e0..1f6502a 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -579,6 +579,139 @@ enum v4l2_vp8_golden_frame_sel {
 #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_MPEG_BASE+510)
 #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE			(V4L2_CID_MPEG_BASE+511)
 
+/* CIDs for HEVC encoding. Number gaps are for compatibility */
+
+#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP                         \
+					(V4L2_CID_MPEG_BASE + 512)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP                         \
+					(V4L2_CID_MPEG_BASE + 513)
+#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP                     \
+					(V4L2_CID_MPEG_BASE + 514)
+#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP                     \
+					(V4L2_CID_MPEG_BASE + 515)
+#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP                     \
+					(V4L2_CID_MPEG_BASE + 516)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP \
+					(V4L2_CID_MPEG_BASE + 517)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE       \
+					(V4L2_CID_MPEG_BASE + 518)
+enum v4l2_mpeg_video_hevc_hier_coding_type {
+	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B	= 0,
+	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P	= 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER      \
+					(V4L2_CID_MPEG_BASE + 519)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP   \
+					(V4L2_CID_MPEG_BASE + 520)
+#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE                        \
+					(V4L2_CID_MPEG_BASE + 521)
+enum v4l2_mpeg_video_hevc_profile {
+	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
+	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL                          \
+					(V4L2_CID_MPEG_BASE + 522)
+enum v4l2_mpeg_video_hevc_level {
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_1	= 0,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_2	= 1,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1	= 2,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_3	= 3,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1	= 4,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_4	= 5,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1	= 6,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_5	= 7,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1	= 8,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2	= 9,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_6	= 10,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1	= 11,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2	= 12,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION    \
+					(V4L2_CID_MPEG_BASE + 523)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG                \
+					(V4L2_CID_MPEG_BASE + 524)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH      \
+					(V4L2_CID_MPEG_BASE + 525)
+#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES   \
+					(V4L2_CID_MPEG_BASE + 526)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF		          \
+					(V4L2_CID_MPEG_BASE + 527)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY        \
+					(V4L2_CID_MPEG_BASE + 528)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2      \
+					(V4L2_CID_MPEG_BASE + 529)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2        \
+					(V4L2_CID_MPEG_BASE + 530)
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE             \
+					(V4L2_CID_MPEG_BASE + 531)
+enum v4l2_cid_mpeg_video_hevc_refresh_type {
+	V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE		= 0,
+	V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA		= 1,
+	V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR		= 2,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD           \
+					(V4L2_CID_MPEG_BASE + 532)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU		  \
+					(V4L2_CID_MPEG_BASE + 533)
+#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED	  \
+					(V4L2_CID_MPEG_BASE + 534)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT	          \
+					(V4L2_CID_MPEG_BASE + 535)
+#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING         \
+					(V4L2_CID_MPEG_BASE + 536)
+#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB	          \
+					(V4L2_CID_MPEG_BASE + 537)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID	          \
+					(V4L2_CID_MPEG_BASE + 538)
+#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING	  \
+					(V4L2_CID_MPEG_BASE + 539)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1  \
+					(V4L2_CID_MPEG_BASE + 540)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK         \
+					(V4L2_CID_MPEG_BASE + 541)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH       \
+					(V4L2_CID_MPEG_BASE + 542)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC       \
+					(V4L2_CID_MPEG_BASE + 543)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY     \
+					(V4L2_CID_MPEG_BASE + 544)
+#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT		  \
+					(V4L2_CID_MPEG_BASE + 545)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION		  \
+					(V4L2_CID_MPEG_BASE + 546)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE	  \
+					(V4L2_CID_MPEG_BASE + 547)
+#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR              \
+					(V4L2_CID_MPEG_BASE + 548)
+#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB              \
+					(V4L2_CID_MPEG_BASE + 549)
+#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD     \
+					(V4L2_CID_MPEG_BASE + 550)
+enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
+	V4L2_MPEG_VIDEO_HEVC_SIZE_0		= 0,
+	V4L2_MPEG_VIDEO_HEVC_SIZE_1		= 1,
+	V4L2_MPEG_VIDEO_HEVC_SIZE_2		= 2,
+	V4L2_MPEG_VIDEO_HEVC_SIZE_4		= 3,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR          \
+					(V4L2_CID_MPEG_BASE + 551)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH   \
+					(V4L2_CID_MPEG_BASE + 552)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE \
+					(V4L2_CID_MPEG_BASE + 553)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE \
+					(V4L2_CID_MPEG_BASE + 554)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE \
+					(V4L2_CID_MPEG_BASE + 555)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE \
+					(V4L2_CID_MPEG_BASE + 556)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE \
+					(V4L2_CID_MPEG_BASE + 557)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE \
+					(V4L2_CID_MPEG_BASE + 558)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE \
+					(V4L2_CID_MPEG_BASE + 559)
+
 /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
 #define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
 #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
-- 
2.7.4

[Patch v3 09/11] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Smitha T Murthy]

Add v4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++
 include/uapi/linux/v4l2-controls.h   | 133 +++++++++++++++++++++++++++++++++++
 2 files changed, 236 insertions(+)

diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index b9e08e3..5fa763b 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -479,6 +479,46 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
 		NULL,
 	};
 
+	static const char * const hevc_profile[] = {
+		"Main",
+		"Main still picture",
+		NULL,
+	};
+	static const char * const hevc_level[] = {
+		"1",
+		"2",
+		"2.1",
+		"3",
+		"3.1",
+		"4",
+		"4.1",
+		"5",
+		"5.1",
+		"5.2",
+		"6",
+		"6.1",
+		"6.2",
+		NULL,
+	};
+	static const char * const hevc_hierarchial_coding_type[] = {
+		"B",
+		"P",
+		NULL,
+	};
+	static const char * const hevc_refresh_type[] = {
+		"None",
+		"CRA",
+		"IDR",
+		NULL,
+	};
+	static const char * const hevc_size_of_length_field[] = {
+		"0",
+		"1",
+		"2",
+		"4",
+		NULL,
+	};
+
 
 	switch (id) {
 	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
@@ -574,6 +614,16 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
 		return dv_it_content_type;
 	case V4L2_CID_DETECT_MD_MODE:
 		return detect_md_mode;
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+		return hevc_profile;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+		return hevc_level;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
+		return hevc_hierarchial_coding_type;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+		return hevc_refresh_type;
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+		return hevc_size_of_length_field;
 
 	default:
 		return NULL;
@@ -775,6 +825,54 @@ const char *v4l2_ctrl_get_name(u32 id)
 	case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:		return "VPX P-Frame QP Value";
 	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:			return "VPX Profile";
 
+	/* HEVC controls */
+	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:		return "HEVC I frame QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:		return "HEVC P frame QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:		return "HEVC B frame QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:			return "HEVC Minimum QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:			return "HEVC Maximum QP value";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:		return "HEVC Dark reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:	return "HEVC Smooth reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:	return "HEVC Static reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:	return "HEVC activity reg adaptive rc";
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:			return "HEVC Profile";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:			return "HEVC Level";
+	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:		return "HEVC tier_flag";
+	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:	return "HEVC Frame rate resolution";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:	return "HEVC Maximum coding unit depth";
+	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:	return "HEVC Number of reference frames";
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:		return "HEVC Refresh type";
+	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:		return "HEVC Constant intra prediction";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:		return "HEVC Lossless encoding";
+	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:		return "HEVC Wavefront";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF:			return "HEVC Loop filter";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:	return "HEVC LF across slice boundary or not";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:		return "HEVC QP values";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:	return "HEVC Hierarchical Coding Type";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "HEVC Hierarchical Coding Layer";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "HEVC Hierarchical Layer QP";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:return "HEVC Hierarchical Lay 0 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:return "HEVC Hierarchical Lay 1 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:return "HEVC Hierarchical Lay 2 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:return "HEVC Hierarchical Lay 3 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:return "HEVC Hierarchical Lay 4 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:return "HEVC Hierarchical Lay 5 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:return "HEVC Hierarchical Lay 6 bit rate";
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "HEVC Hierarchical Coding Layer Change";
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:		return "HEVC Sign data hiding";
+	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:		return "HEVC General pb";
+	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:		return "HEVC Temporal id";
+	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:		return "HEVC Strong intra smoothing";
+	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:		return "HEVC intra pu split";
+	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:		return "HEVC tmv prediction";
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:	return "HEVC Max number of candidate MVs";
+	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:	return "HEVC ENC without startcode";
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:		return "HEVC num of I frame b/w 2 IDR";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:	return "HEVC Loop filter beta offset";
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:	return "HEVC Loop filter tc offset";
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:	return "HEVC Size of length field";
+	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:	return "HEVC Prepend SPS/PPS to IDR";
+
 	/* CAMERA controls */
 	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
 	case V4L2_CID_CAMERA_CLASS:		return "Camera Controls";
@@ -1063,6 +1161,11 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
 	case V4L2_CID_TUNE_DEEMPHASIS:
 	case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
 	case V4L2_CID_DETECT_MD_MODE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
 		*type = V4L2_CTRL_TYPE_MENU;
 		break;
 	case V4L2_CID_LINK_FREQ:
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index 0d2e1e0..1f6502a 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -579,6 +579,139 @@ enum v4l2_vp8_golden_frame_sel {
 #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_MPEG_BASE+510)
 #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE			(V4L2_CID_MPEG_BASE+511)
 
+/* CIDs for HEVC encoding. Number gaps are for compatibility */
+
+#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP                         \
+					(V4L2_CID_MPEG_BASE + 512)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP                         \
+					(V4L2_CID_MPEG_BASE + 513)
+#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP                     \
+					(V4L2_CID_MPEG_BASE + 514)
+#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP                     \
+					(V4L2_CID_MPEG_BASE + 515)
+#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP                     \
+					(V4L2_CID_MPEG_BASE + 516)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP \
+					(V4L2_CID_MPEG_BASE + 517)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE       \
+					(V4L2_CID_MPEG_BASE + 518)
+enum v4l2_mpeg_video_hevc_hier_coding_type {
+	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B	= 0,
+	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P	= 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER      \
+					(V4L2_CID_MPEG_BASE + 519)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP   \
+					(V4L2_CID_MPEG_BASE + 520)
+#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE                        \
+					(V4L2_CID_MPEG_BASE + 521)
+enum v4l2_mpeg_video_hevc_profile {
+	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
+	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL                          \
+					(V4L2_CID_MPEG_BASE + 522)
+enum v4l2_mpeg_video_hevc_level {
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_1	= 0,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_2	= 1,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1	= 2,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_3	= 3,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1	= 4,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_4	= 5,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1	= 6,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_5	= 7,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1	= 8,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2	= 9,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_6	= 10,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1	= 11,
+	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2	= 12,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION    \
+					(V4L2_CID_MPEG_BASE + 523)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG                \
+					(V4L2_CID_MPEG_BASE + 524)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH      \
+					(V4L2_CID_MPEG_BASE + 525)
+#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES   \
+					(V4L2_CID_MPEG_BASE + 526)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF		          \
+					(V4L2_CID_MPEG_BASE + 527)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY        \
+					(V4L2_CID_MPEG_BASE + 528)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2      \
+					(V4L2_CID_MPEG_BASE + 529)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2        \
+					(V4L2_CID_MPEG_BASE + 530)
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE             \
+					(V4L2_CID_MPEG_BASE + 531)
+enum v4l2_cid_mpeg_video_hevc_refresh_type {
+	V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE		= 0,
+	V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA		= 1,
+	V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR		= 2,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD           \
+					(V4L2_CID_MPEG_BASE + 532)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU		  \
+					(V4L2_CID_MPEG_BASE + 533)
+#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED	  \
+					(V4L2_CID_MPEG_BASE + 534)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT	          \
+					(V4L2_CID_MPEG_BASE + 535)
+#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING         \
+					(V4L2_CID_MPEG_BASE + 536)
+#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB	          \
+					(V4L2_CID_MPEG_BASE + 537)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID	          \
+					(V4L2_CID_MPEG_BASE + 538)
+#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING	  \
+					(V4L2_CID_MPEG_BASE + 539)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1  \
+					(V4L2_CID_MPEG_BASE + 540)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK         \
+					(V4L2_CID_MPEG_BASE + 541)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH       \
+					(V4L2_CID_MPEG_BASE + 542)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC       \
+					(V4L2_CID_MPEG_BASE + 543)
+#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY     \
+					(V4L2_CID_MPEG_BASE + 544)
+#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT		  \
+					(V4L2_CID_MPEG_BASE + 545)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION		  \
+					(V4L2_CID_MPEG_BASE + 546)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE	  \
+					(V4L2_CID_MPEG_BASE + 547)
+#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR              \
+					(V4L2_CID_MPEG_BASE + 548)
+#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB              \
+					(V4L2_CID_MPEG_BASE + 549)
+#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD     \
+					(V4L2_CID_MPEG_BASE + 550)
+enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
+	V4L2_MPEG_VIDEO_HEVC_SIZE_0		= 0,
+	V4L2_MPEG_VIDEO_HEVC_SIZE_1		= 1,
+	V4L2_MPEG_VIDEO_HEVC_SIZE_2		= 2,
+	V4L2_MPEG_VIDEO_HEVC_SIZE_4		= 3,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR          \
+					(V4L2_CID_MPEG_BASE + 551)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH   \
+					(V4L2_CID_MPEG_BASE + 552)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE \
+					(V4L2_CID_MPEG_BASE + 553)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE \
+					(V4L2_CID_MPEG_BASE + 554)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE \
+					(V4L2_CID_MPEG_BASE + 555)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE \
+					(V4L2_CID_MPEG_BASE + 556)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE \
+					(V4L2_CID_MPEG_BASE + 557)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE \
+					(V4L2_CID_MPEG_BASE + 558)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE \
+					(V4L2_CID_MPEG_BASE + 559)
+
 /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
 #define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
 #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
-- 
2.7.4

Re: [Patch v3 09/11] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add v4l2 controls for HEVC encoder
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++
>  include/uapi/linux/v4l2-controls.h   | 133 +++++++++++++++++++++++++++++++++++
>  2 files changed, 236 insertions(+)
> 
> diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> index b9e08e3..5fa763b 100644
> --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> @@ -479,6 +479,46 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
>  		NULL,
>  	};
>  
> +	static const char * const hevc_profile[] = {
> +		"Main",
> +		"Main still picture",

All control and control menu names should follow the english capitalization rules for
titles. So this should become "Main Still Picture".

Please adjust this in this patch.

Regards,

	Hans

> +		NULL,
> +	};
> +	static const char * const hevc_level[] = {
> +		"1",
> +		"2",
> +		"2.1",
> +		"3",
> +		"3.1",
> +		"4",
> +		"4.1",
> +		"5",
> +		"5.1",
> +		"5.2",
> +		"6",
> +		"6.1",
> +		"6.2",
> +		NULL,
> +	};
> +	static const char * const hevc_hierarchial_coding_type[] = {
> +		"B",
> +		"P",
> +		NULL,
> +	};
> +	static const char * const hevc_refresh_type[] = {
> +		"None",
> +		"CRA",
> +		"IDR",
> +		NULL,
> +	};
> +	static const char * const hevc_size_of_length_field[] = {
> +		"0",
> +		"1",
> +		"2",
> +		"4",
> +		NULL,
> +	};
> +
>  
>  	switch (id) {
>  	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> @@ -574,6 +614,16 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
>  		return dv_it_content_type;
>  	case V4L2_CID_DETECT_MD_MODE:
>  		return detect_md_mode;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> +		return hevc_profile;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> +		return hevc_level;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> +		return hevc_hierarchial_coding_type;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> +		return hevc_refresh_type;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> +		return hevc_size_of_length_field;
>  
>  	default:
>  		return NULL;
> @@ -775,6 +825,54 @@ const char *v4l2_ctrl_get_name(u32 id)
>  	case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:		return "VPX P-Frame QP Value";
>  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:			return "VPX Profile";
>  
> +	/* HEVC controls */
> +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:		return "HEVC I frame QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:		return "HEVC P frame QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:		return "HEVC B frame QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:			return "HEVC Minimum QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:			return "HEVC Maximum QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:		return "HEVC Dark reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:	return "HEVC Smooth reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:	return "HEVC Static reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:	return "HEVC activity reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:			return "HEVC Profile";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:			return "HEVC Level";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:		return "HEVC tier_flag";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:	return "HEVC Frame rate resolution";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:	return "HEVC Maximum coding unit depth";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:	return "HEVC Number of reference frames";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:		return "HEVC Refresh type";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:		return "HEVC Constant intra prediction";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:		return "HEVC Lossless encoding";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:		return "HEVC Wavefront";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:			return "HEVC Loop filter";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:	return "HEVC LF across slice boundary or not";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:		return "HEVC QP values";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:	return "HEVC Hierarchical Coding Type";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "HEVC Hierarchical Coding Layer";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "HEVC Hierarchical Layer QP";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:return "HEVC Hierarchical Lay 0 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:return "HEVC Hierarchical Lay 1 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:return "HEVC Hierarchical Lay 2 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:return "HEVC Hierarchical Lay 3 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:return "HEVC Hierarchical Lay 4 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:return "HEVC Hierarchical Lay 5 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:return "HEVC Hierarchical Lay 6 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "HEVC Hierarchical Coding Layer Change";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:		return "HEVC Sign data hiding";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:		return "HEVC General pb";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:		return "HEVC Temporal id";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:		return "HEVC Strong intra smoothing";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:		return "HEVC intra pu split";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:		return "HEVC tmv prediction";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:	return "HEVC Max number of candidate MVs";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:	return "HEVC ENC without startcode";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:		return "HEVC num of I frame b/w 2 IDR";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:	return "HEVC Loop filter beta offset";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:	return "HEVC Loop filter tc offset";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:	return "HEVC Size of length field";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:	return "HEVC Prepend SPS/PPS to IDR";
> +
>  	/* CAMERA controls */
>  	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
>  	case V4L2_CID_CAMERA_CLASS:		return "Camera Controls";
> @@ -1063,6 +1161,11 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
>  	case V4L2_CID_TUNE_DEEMPHASIS:
>  	case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
>  	case V4L2_CID_DETECT_MD_MODE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
>  		*type = V4L2_CTRL_TYPE_MENU;
>  		break;
>  	case V4L2_CID_LINK_FREQ:
> diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> index 0d2e1e0..1f6502a 100644
> --- a/include/uapi/linux/v4l2-controls.h
> +++ b/include/uapi/linux/v4l2-controls.h
> @@ -579,6 +579,139 @@ enum v4l2_vp8_golden_frame_sel {
>  #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_MPEG_BASE+510)
>  #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE			(V4L2_CID_MPEG_BASE+511)
>  
> +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> +
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP                         \
> +					(V4L2_CID_MPEG_BASE + 512)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP                         \
> +					(V4L2_CID_MPEG_BASE + 513)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP                     \
> +					(V4L2_CID_MPEG_BASE + 514)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP                     \
> +					(V4L2_CID_MPEG_BASE + 515)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP                     \
> +					(V4L2_CID_MPEG_BASE + 516)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP \
> +					(V4L2_CID_MPEG_BASE + 517)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE       \
> +					(V4L2_CID_MPEG_BASE + 518)
> +enum v4l2_mpeg_video_hevc_hier_coding_type {
> +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B	= 0,
> +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P	= 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER      \
> +					(V4L2_CID_MPEG_BASE + 519)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP   \
> +					(V4L2_CID_MPEG_BASE + 520)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE                        \
> +					(V4L2_CID_MPEG_BASE + 521)
> +enum v4l2_mpeg_video_hevc_profile {
> +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL                          \
> +					(V4L2_CID_MPEG_BASE + 522)
> +enum v4l2_mpeg_video_hevc_level {
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_1	= 0,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2	= 1,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1	= 2,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3	= 3,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1	= 4,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4	= 5,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1	= 6,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5	= 7,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1	= 8,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2	= 9,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6	= 10,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1	= 11,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2	= 12,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION    \
> +					(V4L2_CID_MPEG_BASE + 523)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG                \
> +					(V4L2_CID_MPEG_BASE + 524)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH      \
> +					(V4L2_CID_MPEG_BASE + 525)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES   \
> +					(V4L2_CID_MPEG_BASE + 526)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF		          \
> +					(V4L2_CID_MPEG_BASE + 527)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY        \
> +					(V4L2_CID_MPEG_BASE + 528)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2      \
> +					(V4L2_CID_MPEG_BASE + 529)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2        \
> +					(V4L2_CID_MPEG_BASE + 530)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE             \
> +					(V4L2_CID_MPEG_BASE + 531)
> +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> +	V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE		= 0,
> +	V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA		= 1,
> +	V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR		= 2,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD           \
> +					(V4L2_CID_MPEG_BASE + 532)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU		  \
> +					(V4L2_CID_MPEG_BASE + 533)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED	  \
> +					(V4L2_CID_MPEG_BASE + 534)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT	          \
> +					(V4L2_CID_MPEG_BASE + 535)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING         \
> +					(V4L2_CID_MPEG_BASE + 536)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB	          \
> +					(V4L2_CID_MPEG_BASE + 537)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID	          \
> +					(V4L2_CID_MPEG_BASE + 538)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING	  \
> +					(V4L2_CID_MPEG_BASE + 539)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1  \
> +					(V4L2_CID_MPEG_BASE + 540)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK         \
> +					(V4L2_CID_MPEG_BASE + 541)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH       \
> +					(V4L2_CID_MPEG_BASE + 542)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC       \
> +					(V4L2_CID_MPEG_BASE + 543)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY     \
> +					(V4L2_CID_MPEG_BASE + 544)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT		  \
> +					(V4L2_CID_MPEG_BASE + 545)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION		  \
> +					(V4L2_CID_MPEG_BASE + 546)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE	  \
> +					(V4L2_CID_MPEG_BASE + 547)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR              \
> +					(V4L2_CID_MPEG_BASE + 548)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB              \
> +					(V4L2_CID_MPEG_BASE + 549)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD     \
> +					(V4L2_CID_MPEG_BASE + 550)
> +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_0		= 0,
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_1		= 1,
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_2		= 2,
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_4		= 3,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR          \
> +					(V4L2_CID_MPEG_BASE + 551)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH   \
> +					(V4L2_CID_MPEG_BASE + 552)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 553)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 554)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 555)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 556)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 557)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 558)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 559)
> +
>  /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
>  #define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
>  #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
> 

[Patch v3 09/11] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Add v4l2 controls for HEVC encoder
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++
>  include/uapi/linux/v4l2-controls.h   | 133 +++++++++++++++++++++++++++++++++++
>  2 files changed, 236 insertions(+)
> 
> diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> index b9e08e3..5fa763b 100644
> --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> @@ -479,6 +479,46 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
>  		NULL,
>  	};
>  
> +	static const char * const hevc_profile[] = {
> +		"Main",
> +		"Main still picture",

All control and control menu names should follow the english capitalization rules for
titles. So this should become "Main Still Picture".

Please adjust this in this patch.

Regards,

	Hans

> +		NULL,
> +	};
> +	static const char * const hevc_level[] = {
> +		"1",
> +		"2",
> +		"2.1",
> +		"3",
> +		"3.1",
> +		"4",
> +		"4.1",
> +		"5",
> +		"5.1",
> +		"5.2",
> +		"6",
> +		"6.1",
> +		"6.2",
> +		NULL,
> +	};
> +	static const char * const hevc_hierarchial_coding_type[] = {
> +		"B",
> +		"P",
> +		NULL,
> +	};
> +	static const char * const hevc_refresh_type[] = {
> +		"None",
> +		"CRA",
> +		"IDR",
> +		NULL,
> +	};
> +	static const char * const hevc_size_of_length_field[] = {
> +		"0",
> +		"1",
> +		"2",
> +		"4",
> +		NULL,
> +	};
> +
>  
>  	switch (id) {
>  	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> @@ -574,6 +614,16 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
>  		return dv_it_content_type;
>  	case V4L2_CID_DETECT_MD_MODE:
>  		return detect_md_mode;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> +		return hevc_profile;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> +		return hevc_level;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> +		return hevc_hierarchial_coding_type;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> +		return hevc_refresh_type;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> +		return hevc_size_of_length_field;
>  
>  	default:
>  		return NULL;
> @@ -775,6 +825,54 @@ const char *v4l2_ctrl_get_name(u32 id)
>  	case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:		return "VPX P-Frame QP Value";
>  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:			return "VPX Profile";
>  
> +	/* HEVC controls */
> +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:		return "HEVC I frame QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:		return "HEVC P frame QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:		return "HEVC B frame QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:			return "HEVC Minimum QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:			return "HEVC Maximum QP value";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:		return "HEVC Dark reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:	return "HEVC Smooth reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:	return "HEVC Static reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:	return "HEVC activity reg adaptive rc";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:			return "HEVC Profile";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:			return "HEVC Level";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:		return "HEVC tier_flag";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:	return "HEVC Frame rate resolution";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:	return "HEVC Maximum coding unit depth";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:	return "HEVC Number of reference frames";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:		return "HEVC Refresh type";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:		return "HEVC Constant intra prediction";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:		return "HEVC Lossless encoding";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:		return "HEVC Wavefront";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:			return "HEVC Loop filter";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:	return "HEVC LF across slice boundary or not";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:		return "HEVC QP values";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:	return "HEVC Hierarchical Coding Type";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "HEVC Hierarchical Coding Layer";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "HEVC Hierarchical Layer QP";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:return "HEVC Hierarchical Lay 0 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:return "HEVC Hierarchical Lay 1 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:return "HEVC Hierarchical Lay 2 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:return "HEVC Hierarchical Lay 3 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:return "HEVC Hierarchical Lay 4 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:return "HEVC Hierarchical Lay 5 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:return "HEVC Hierarchical Lay 6 bit rate";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "HEVC Hierarchical Coding Layer Change";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:		return "HEVC Sign data hiding";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:		return "HEVC General pb";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:		return "HEVC Temporal id";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:		return "HEVC Strong intra smoothing";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:		return "HEVC intra pu split";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:		return "HEVC tmv prediction";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:	return "HEVC Max number of candidate MVs";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:	return "HEVC ENC without startcode";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:		return "HEVC num of I frame b/w 2 IDR";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:	return "HEVC Loop filter beta offset";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:	return "HEVC Loop filter tc offset";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:	return "HEVC Size of length field";
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:	return "HEVC Prepend SPS/PPS to IDR";
> +
>  	/* CAMERA controls */
>  	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
>  	case V4L2_CID_CAMERA_CLASS:		return "Camera Controls";
> @@ -1063,6 +1161,11 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
>  	case V4L2_CID_TUNE_DEEMPHASIS:
>  	case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
>  	case V4L2_CID_DETECT_MD_MODE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
>  		*type = V4L2_CTRL_TYPE_MENU;
>  		break;
>  	case V4L2_CID_LINK_FREQ:
> diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> index 0d2e1e0..1f6502a 100644
> --- a/include/uapi/linux/v4l2-controls.h
> +++ b/include/uapi/linux/v4l2-controls.h
> @@ -579,6 +579,139 @@ enum v4l2_vp8_golden_frame_sel {
>  #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_MPEG_BASE+510)
>  #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE			(V4L2_CID_MPEG_BASE+511)
>  
> +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> +
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP                         \
> +					(V4L2_CID_MPEG_BASE + 512)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP                         \
> +					(V4L2_CID_MPEG_BASE + 513)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP                     \
> +					(V4L2_CID_MPEG_BASE + 514)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP                     \
> +					(V4L2_CID_MPEG_BASE + 515)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP                     \
> +					(V4L2_CID_MPEG_BASE + 516)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP \
> +					(V4L2_CID_MPEG_BASE + 517)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE       \
> +					(V4L2_CID_MPEG_BASE + 518)
> +enum v4l2_mpeg_video_hevc_hier_coding_type {
> +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B	= 0,
> +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P	= 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER      \
> +					(V4L2_CID_MPEG_BASE + 519)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP   \
> +					(V4L2_CID_MPEG_BASE + 520)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE                        \
> +					(V4L2_CID_MPEG_BASE + 521)
> +enum v4l2_mpeg_video_hevc_profile {
> +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL                          \
> +					(V4L2_CID_MPEG_BASE + 522)
> +enum v4l2_mpeg_video_hevc_level {
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_1	= 0,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2	= 1,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1	= 2,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3	= 3,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1	= 4,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4	= 5,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1	= 6,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5	= 7,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1	= 8,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2	= 9,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6	= 10,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1	= 11,
> +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2	= 12,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION    \
> +					(V4L2_CID_MPEG_BASE + 523)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG                \
> +					(V4L2_CID_MPEG_BASE + 524)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH      \
> +					(V4L2_CID_MPEG_BASE + 525)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES   \
> +					(V4L2_CID_MPEG_BASE + 526)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF		          \
> +					(V4L2_CID_MPEG_BASE + 527)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY        \
> +					(V4L2_CID_MPEG_BASE + 528)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2      \
> +					(V4L2_CID_MPEG_BASE + 529)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2        \
> +					(V4L2_CID_MPEG_BASE + 530)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE             \
> +					(V4L2_CID_MPEG_BASE + 531)
> +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> +	V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE		= 0,
> +	V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA		= 1,
> +	V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR		= 2,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD           \
> +					(V4L2_CID_MPEG_BASE + 532)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU		  \
> +					(V4L2_CID_MPEG_BASE + 533)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED	  \
> +					(V4L2_CID_MPEG_BASE + 534)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT	          \
> +					(V4L2_CID_MPEG_BASE + 535)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING         \
> +					(V4L2_CID_MPEG_BASE + 536)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB	          \
> +					(V4L2_CID_MPEG_BASE + 537)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID	          \
> +					(V4L2_CID_MPEG_BASE + 538)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING	  \
> +					(V4L2_CID_MPEG_BASE + 539)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1  \
> +					(V4L2_CID_MPEG_BASE + 540)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK         \
> +					(V4L2_CID_MPEG_BASE + 541)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH       \
> +					(V4L2_CID_MPEG_BASE + 542)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC       \
> +					(V4L2_CID_MPEG_BASE + 543)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY     \
> +					(V4L2_CID_MPEG_BASE + 544)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT		  \
> +					(V4L2_CID_MPEG_BASE + 545)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION		  \
> +					(V4L2_CID_MPEG_BASE + 546)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE	  \
> +					(V4L2_CID_MPEG_BASE + 547)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR              \
> +					(V4L2_CID_MPEG_BASE + 548)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB              \
> +					(V4L2_CID_MPEG_BASE + 549)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD     \
> +					(V4L2_CID_MPEG_BASE + 550)
> +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_0		= 0,
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_1		= 1,
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_2		= 2,
> +	V4L2_MPEG_VIDEO_HEVC_SIZE_4		= 3,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR          \
> +					(V4L2_CID_MPEG_BASE + 551)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH   \
> +					(V4L2_CID_MPEG_BASE + 552)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 553)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 554)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 555)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 556)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 557)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 558)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE \
> +					(V4L2_CID_MPEG_BASE + 559)
> +
>  /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
>  #define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
>  #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
> 

Re: [Patch v3 09/11] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:22 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add v4l2 controls for HEVC encoder
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++
> >  include/uapi/linux/v4l2-controls.h   | 133 +++++++++++++++++++++++++++++++++++
> >  2 files changed, 236 insertions(+)
> > 
> > diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> > index b9e08e3..5fa763b 100644
> > --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> > +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> > @@ -479,6 +479,46 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> >  		NULL,
> >  	};
> >  
> > +	static const char * const hevc_profile[] = {
> > +		"Main",
> > +		"Main still picture",
> 
> All control and control menu names should follow the english capitalization rules for
> titles. So this should become "Main Still Picture".
> 
> Please adjust this in this patch.
> 
> Regards,
> 
> 	Hans
> 
I will correct this in the next version.
Thank you for the review.
Regards,
Smitha
> > +		NULL,
> > +	};
> > +	static const char * const hevc_level[] = {
> > +		"1",
> > +		"2",
> > +		"2.1",
> > +		"3",
> > +		"3.1",
> > +		"4",
> > +		"4.1",
> > +		"5",
> > +		"5.1",
> > +		"5.2",
> > +		"6",
> > +		"6.1",
> > +		"6.2",
> > +		NULL,
> > +	};
> > +	static const char * const hevc_hierarchial_coding_type[] = {
> > +		"B",
> > +		"P",
> > +		NULL,
> > +	};
> > +	static const char * const hevc_refresh_type[] = {
> > +		"None",
> > +		"CRA",
> > +		"IDR",
> > +		NULL,
> > +	};
> > +	static const char * const hevc_size_of_length_field[] = {
> > +		"0",
> > +		"1",
> > +		"2",
> > +		"4",
> > +		NULL,
> > +	};
> > +
> >  
> >  	switch (id) {
> >  	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> > @@ -574,6 +614,16 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> >  		return dv_it_content_type;
> >  	case V4L2_CID_DETECT_MD_MODE:
> >  		return detect_md_mode;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > +		return hevc_profile;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > +		return hevc_level;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> > +		return hevc_hierarchial_coding_type;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > +		return hevc_refresh_type;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > +		return hevc_size_of_length_field;
> >  
> >  	default:
> >  		return NULL;
> > @@ -775,6 +825,54 @@ const char *v4l2_ctrl_get_name(u32 id)
> >  	case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:		return "VPX P-Frame QP Value";
> >  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:			return "VPX Profile";
> >  
> > +	/* HEVC controls */
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:		return "HEVC I frame QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:		return "HEVC P frame QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:		return "HEVC B frame QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:			return "HEVC Minimum QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:			return "HEVC Maximum QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:		return "HEVC Dark reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:	return "HEVC Smooth reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:	return "HEVC Static reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:	return "HEVC activity reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:			return "HEVC Profile";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:			return "HEVC Level";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:		return "HEVC tier_flag";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:	return "HEVC Frame rate resolution";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:	return "HEVC Maximum coding unit depth";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:	return "HEVC Number of reference frames";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:		return "HEVC Refresh type";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:		return "HEVC Constant intra prediction";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:		return "HEVC Lossless encoding";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:		return "HEVC Wavefront";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:			return "HEVC Loop filter";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:	return "HEVC LF across slice boundary or not";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:		return "HEVC QP values";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:	return "HEVC Hierarchical Coding Type";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "HEVC Hierarchical Coding Layer";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "HEVC Hierarchical Layer QP";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:return "HEVC Hierarchical Lay 0 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:return "HEVC Hierarchical Lay 1 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:return "HEVC Hierarchical Lay 2 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:return "HEVC Hierarchical Lay 3 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:return "HEVC Hierarchical Lay 4 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:return "HEVC Hierarchical Lay 5 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:return "HEVC Hierarchical Lay 6 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "HEVC Hierarchical Coding Layer Change";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:		return "HEVC Sign data hiding";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:		return "HEVC General pb";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:		return "HEVC Temporal id";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:		return "HEVC Strong intra smoothing";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:		return "HEVC intra pu split";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:		return "HEVC tmv prediction";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:	return "HEVC Max number of candidate MVs";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:	return "HEVC ENC without startcode";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:		return "HEVC num of I frame b/w 2 IDR";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:	return "HEVC Loop filter beta offset";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:	return "HEVC Loop filter tc offset";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:	return "HEVC Size of length field";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:	return "HEVC Prepend SPS/PPS to IDR";
> > +
> >  	/* CAMERA controls */
> >  	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
> >  	case V4L2_CID_CAMERA_CLASS:		return "Camera Controls";
> > @@ -1063,6 +1161,11 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
> >  	case V4L2_CID_TUNE_DEEMPHASIS:
> >  	case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
> >  	case V4L2_CID_DETECT_MD_MODE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> >  		*type = V4L2_CTRL_TYPE_MENU;
> >  		break;
> >  	case V4L2_CID_LINK_FREQ:
> > diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> > index 0d2e1e0..1f6502a 100644
> > --- a/include/uapi/linux/v4l2-controls.h
> > +++ b/include/uapi/linux/v4l2-controls.h
> > @@ -579,6 +579,139 @@ enum v4l2_vp8_golden_frame_sel {
> >  #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_MPEG_BASE+510)
> >  #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE			(V4L2_CID_MPEG_BASE+511)
> >  
> > +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> > +
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP                         \
> > +					(V4L2_CID_MPEG_BASE + 512)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP                         \
> > +					(V4L2_CID_MPEG_BASE + 513)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP                     \
> > +					(V4L2_CID_MPEG_BASE + 514)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP                     \
> > +					(V4L2_CID_MPEG_BASE + 515)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP                     \
> > +					(V4L2_CID_MPEG_BASE + 516)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP \
> > +					(V4L2_CID_MPEG_BASE + 517)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE       \
> > +					(V4L2_CID_MPEG_BASE + 518)
> > +enum v4l2_mpeg_video_hevc_hier_coding_type {
> > +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B	= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P	= 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER      \
> > +					(V4L2_CID_MPEG_BASE + 519)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP   \
> > +					(V4L2_CID_MPEG_BASE + 520)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE                        \
> > +					(V4L2_CID_MPEG_BASE + 521)
> > +enum v4l2_mpeg_video_hevc_profile {
> > +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> > +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL                          \
> > +					(V4L2_CID_MPEG_BASE + 522)
> > +enum v4l2_mpeg_video_hevc_level {
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_1	= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2	= 1,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1	= 2,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3	= 3,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1	= 4,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4	= 5,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1	= 6,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5	= 7,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1	= 8,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2	= 9,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6	= 10,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1	= 11,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2	= 12,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION    \
> > +					(V4L2_CID_MPEG_BASE + 523)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG                \
> > +					(V4L2_CID_MPEG_BASE + 524)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH      \
> > +					(V4L2_CID_MPEG_BASE + 525)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES   \
> > +					(V4L2_CID_MPEG_BASE + 526)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF		          \
> > +					(V4L2_CID_MPEG_BASE + 527)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY        \
> > +					(V4L2_CID_MPEG_BASE + 528)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2      \
> > +					(V4L2_CID_MPEG_BASE + 529)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2        \
> > +					(V4L2_CID_MPEG_BASE + 530)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE             \
> > +					(V4L2_CID_MPEG_BASE + 531)
> > +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> > +	V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE		= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA		= 1,
> > +	V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR		= 2,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD           \
> > +					(V4L2_CID_MPEG_BASE + 532)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU		  \
> > +					(V4L2_CID_MPEG_BASE + 533)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED	  \
> > +					(V4L2_CID_MPEG_BASE + 534)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT	          \
> > +					(V4L2_CID_MPEG_BASE + 535)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING         \
> > +					(V4L2_CID_MPEG_BASE + 536)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB	          \
> > +					(V4L2_CID_MPEG_BASE + 537)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID	          \
> > +					(V4L2_CID_MPEG_BASE + 538)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING	  \
> > +					(V4L2_CID_MPEG_BASE + 539)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1  \
> > +					(V4L2_CID_MPEG_BASE + 540)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK         \
> > +					(V4L2_CID_MPEG_BASE + 541)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH       \
> > +					(V4L2_CID_MPEG_BASE + 542)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC       \
> > +					(V4L2_CID_MPEG_BASE + 543)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY     \
> > +					(V4L2_CID_MPEG_BASE + 544)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT		  \
> > +					(V4L2_CID_MPEG_BASE + 545)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION		  \
> > +					(V4L2_CID_MPEG_BASE + 546)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE	  \
> > +					(V4L2_CID_MPEG_BASE + 547)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR              \
> > +					(V4L2_CID_MPEG_BASE + 548)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB              \
> > +					(V4L2_CID_MPEG_BASE + 549)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD     \
> > +					(V4L2_CID_MPEG_BASE + 550)
> > +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_0		= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_1		= 1,
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_2		= 2,
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_4		= 3,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR          \
> > +					(V4L2_CID_MPEG_BASE + 551)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH   \
> > +					(V4L2_CID_MPEG_BASE + 552)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 553)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 554)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 555)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 556)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 557)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 558)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 559)
> > +
> >  /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
> >  #define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
> >  #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
> > 
> 
> 
> 

[Patch v3 09/11] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:22 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Add v4l2 controls for HEVC encoder
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> >  drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++
> >  include/uapi/linux/v4l2-controls.h   | 133 +++++++++++++++++++++++++++++++++++
> >  2 files changed, 236 insertions(+)
> > 
> > diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> > index b9e08e3..5fa763b 100644
> > --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> > +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> > @@ -479,6 +479,46 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> >  		NULL,
> >  	};
> >  
> > +	static const char * const hevc_profile[] = {
> > +		"Main",
> > +		"Main still picture",
> 
> All control and control menu names should follow the english capitalization rules for
> titles. So this should become "Main Still Picture".
> 
> Please adjust this in this patch.
> 
> Regards,
> 
> 	Hans
> 
I will correct this in the next version.
Thank you for the review.
Regards,
Smitha
> > +		NULL,
> > +	};
> > +	static const char * const hevc_level[] = {
> > +		"1",
> > +		"2",
> > +		"2.1",
> > +		"3",
> > +		"3.1",
> > +		"4",
> > +		"4.1",
> > +		"5",
> > +		"5.1",
> > +		"5.2",
> > +		"6",
> > +		"6.1",
> > +		"6.2",
> > +		NULL,
> > +	};
> > +	static const char * const hevc_hierarchial_coding_type[] = {
> > +		"B",
> > +		"P",
> > +		NULL,
> > +	};
> > +	static const char * const hevc_refresh_type[] = {
> > +		"None",
> > +		"CRA",
> > +		"IDR",
> > +		NULL,
> > +	};
> > +	static const char * const hevc_size_of_length_field[] = {
> > +		"0",
> > +		"1",
> > +		"2",
> > +		"4",
> > +		NULL,
> > +	};
> > +
> >  
> >  	switch (id) {
> >  	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> > @@ -574,6 +614,16 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> >  		return dv_it_content_type;
> >  	case V4L2_CID_DETECT_MD_MODE:
> >  		return detect_md_mode;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > +		return hevc_profile;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > +		return hevc_level;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> > +		return hevc_hierarchial_coding_type;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > +		return hevc_refresh_type;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > +		return hevc_size_of_length_field;
> >  
> >  	default:
> >  		return NULL;
> > @@ -775,6 +825,54 @@ const char *v4l2_ctrl_get_name(u32 id)
> >  	case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:		return "VPX P-Frame QP Value";
> >  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:			return "VPX Profile";
> >  
> > +	/* HEVC controls */
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:		return "HEVC I frame QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:		return "HEVC P frame QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:		return "HEVC B frame QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:			return "HEVC Minimum QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:			return "HEVC Maximum QP value";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:		return "HEVC Dark reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:	return "HEVC Smooth reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:	return "HEVC Static reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:	return "HEVC activity reg adaptive rc";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:			return "HEVC Profile";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:			return "HEVC Level";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:		return "HEVC tier_flag";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:	return "HEVC Frame rate resolution";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:	return "HEVC Maximum coding unit depth";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:	return "HEVC Number of reference frames";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:		return "HEVC Refresh type";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:		return "HEVC Constant intra prediction";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:		return "HEVC Lossless encoding";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:		return "HEVC Wavefront";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:			return "HEVC Loop filter";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:	return "HEVC LF across slice boundary or not";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:		return "HEVC QP values";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:	return "HEVC Hierarchical Coding Type";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "HEVC Hierarchical Coding Layer";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "HEVC Hierarchical Layer QP";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:return "HEVC Hierarchical Lay 0 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:return "HEVC Hierarchical Lay 1 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:return "HEVC Hierarchical Lay 2 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:return "HEVC Hierarchical Lay 3 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:return "HEVC Hierarchical Lay 4 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:return "HEVC Hierarchical Lay 5 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:return "HEVC Hierarchical Lay 6 bit rate";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "HEVC Hierarchical Coding Layer Change";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:		return "HEVC Sign data hiding";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:		return "HEVC General pb";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:		return "HEVC Temporal id";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:		return "HEVC Strong intra smoothing";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:		return "HEVC intra pu split";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:		return "HEVC tmv prediction";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:	return "HEVC Max number of candidate MVs";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:	return "HEVC ENC without startcode";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:		return "HEVC num of I frame b/w 2 IDR";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:	return "HEVC Loop filter beta offset";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:	return "HEVC Loop filter tc offset";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:	return "HEVC Size of length field";
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:	return "HEVC Prepend SPS/PPS to IDR";
> > +
> >  	/* CAMERA controls */
> >  	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
> >  	case V4L2_CID_CAMERA_CLASS:		return "Camera Controls";
> > @@ -1063,6 +1161,11 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
> >  	case V4L2_CID_TUNE_DEEMPHASIS:
> >  	case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
> >  	case V4L2_CID_DETECT_MD_MODE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> >  		*type = V4L2_CTRL_TYPE_MENU;
> >  		break;
> >  	case V4L2_CID_LINK_FREQ:
> > diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> > index 0d2e1e0..1f6502a 100644
> > --- a/include/uapi/linux/v4l2-controls.h
> > +++ b/include/uapi/linux/v4l2-controls.h
> > @@ -579,6 +579,139 @@ enum v4l2_vp8_golden_frame_sel {
> >  #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_MPEG_BASE+510)
> >  #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE			(V4L2_CID_MPEG_BASE+511)
> >  
> > +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> > +
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP                         \
> > +					(V4L2_CID_MPEG_BASE + 512)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP                         \
> > +					(V4L2_CID_MPEG_BASE + 513)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP                     \
> > +					(V4L2_CID_MPEG_BASE + 514)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP                     \
> > +					(V4L2_CID_MPEG_BASE + 515)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP                     \
> > +					(V4L2_CID_MPEG_BASE + 516)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP \
> > +					(V4L2_CID_MPEG_BASE + 517)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE       \
> > +					(V4L2_CID_MPEG_BASE + 518)
> > +enum v4l2_mpeg_video_hevc_hier_coding_type {
> > +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B	= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P	= 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER      \
> > +					(V4L2_CID_MPEG_BASE + 519)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP   \
> > +					(V4L2_CID_MPEG_BASE + 520)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE                        \
> > +					(V4L2_CID_MPEG_BASE + 521)
> > +enum v4l2_mpeg_video_hevc_profile {
> > +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> > +	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL                          \
> > +					(V4L2_CID_MPEG_BASE + 522)
> > +enum v4l2_mpeg_video_hevc_level {
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_1	= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2	= 1,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1	= 2,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3	= 3,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1	= 4,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4	= 5,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1	= 6,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5	= 7,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1	= 8,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2	= 9,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6	= 10,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1	= 11,
> > +	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2	= 12,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION    \
> > +					(V4L2_CID_MPEG_BASE + 523)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG                \
> > +					(V4L2_CID_MPEG_BASE + 524)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH      \
> > +					(V4L2_CID_MPEG_BASE + 525)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES   \
> > +					(V4L2_CID_MPEG_BASE + 526)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF		          \
> > +					(V4L2_CID_MPEG_BASE + 527)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY        \
> > +					(V4L2_CID_MPEG_BASE + 528)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2      \
> > +					(V4L2_CID_MPEG_BASE + 529)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2        \
> > +					(V4L2_CID_MPEG_BASE + 530)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE             \
> > +					(V4L2_CID_MPEG_BASE + 531)
> > +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> > +	V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE		= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA		= 1,
> > +	V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR		= 2,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD           \
> > +					(V4L2_CID_MPEG_BASE + 532)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU		  \
> > +					(V4L2_CID_MPEG_BASE + 533)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED	  \
> > +					(V4L2_CID_MPEG_BASE + 534)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT	          \
> > +					(V4L2_CID_MPEG_BASE + 535)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING         \
> > +					(V4L2_CID_MPEG_BASE + 536)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB	          \
> > +					(V4L2_CID_MPEG_BASE + 537)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID	          \
> > +					(V4L2_CID_MPEG_BASE + 538)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING	  \
> > +					(V4L2_CID_MPEG_BASE + 539)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1  \
> > +					(V4L2_CID_MPEG_BASE + 540)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK         \
> > +					(V4L2_CID_MPEG_BASE + 541)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH       \
> > +					(V4L2_CID_MPEG_BASE + 542)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC       \
> > +					(V4L2_CID_MPEG_BASE + 543)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY     \
> > +					(V4L2_CID_MPEG_BASE + 544)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT		  \
> > +					(V4L2_CID_MPEG_BASE + 545)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION		  \
> > +					(V4L2_CID_MPEG_BASE + 546)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE	  \
> > +					(V4L2_CID_MPEG_BASE + 547)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR              \
> > +					(V4L2_CID_MPEG_BASE + 548)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB              \
> > +					(V4L2_CID_MPEG_BASE + 549)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD     \
> > +					(V4L2_CID_MPEG_BASE + 550)
> > +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_0		= 0,
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_1		= 1,
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_2		= 2,
> > +	V4L2_MPEG_VIDEO_HEVC_SIZE_4		= 3,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR          \
> > +					(V4L2_CID_MPEG_BASE + 551)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH   \
> > +					(V4L2_CID_MPEG_BASE + 552)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 553)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 554)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 555)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 556)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 557)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 558)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE \
> > +					(V4L2_CID_MPEG_BASE + 559)
> > +
> >  /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
> >  #define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
> >  #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
> > 
> 
> 
> 

[Patch v3 10/11] [media] s5p-mfc: Add support for HEVC encoder

[Smitha T Murthy]

Add HEVC encoder support and necessary registers, V4L2 CIDs,
and hevc encoder parameters

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
 drivers/media/platform/s5p-mfc/s5p_mfc.c        |   1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  57 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    | 595 ++++++++++++++++++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |   8 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 194 ++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
 8 files changed, 892 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 6754477..7065b9d 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -20,13 +20,35 @@
 #define S5P_FIMV_MFC_STATE_V10				0x7124
 #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
 #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
+#define S5P_FIMV_E_NUM_T_LAYER_V10			0xFBAC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10		0xFBB0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10		0xFBB4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10		0xFBB8
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10		0xFBBC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10		0xFBC0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10		0xFBC4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10		0xFBC8
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10	0xFD18
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10	0xFD1C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10	0xFD20
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10	0xFD24
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10	0xFD28
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10	0xFD2C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10	0xFD30
+#define S5P_FIMV_E_HEVC_OPTIONS_V10			0xFDD4
+#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10		0xFDD8
+#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10		0xFDDC
+#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10		0xFDE0
+#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10		0xFDE4
+#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10			0xFDE8
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
 #define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
 #define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
-#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
+#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10	(30 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
 
 /* MFCv10 variant defines */
 #define MAX_FW_SIZE_V10		(SZ_1M)
@@ -58,5 +80,9 @@
 #define ENC_V100_VP8_ME_SIZE(x, y) \
 	ENC_V100_BASE_SIZE(x, y)
 
+#define ENC_V100_HEVC_ME_SIZE(x, y)	\
+	(((x + 3) * (y + 3) * 32)	\
+	 + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 399c547..b3862d1 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1554,6 +1554,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
 	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
 	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
 	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+	.hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
 	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 102b47e..7521fce 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VP8_ENC:
 		codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
 		break;
+	case S5P_MFC_CODEC_HEVC_ENC:
+		codec_type = S5P_FIMV_CODEC_HEVC_ENC;
+		break;
 	default:
 		codec_type = S5P_FIMV_CODEC_NONE_V6;
 	}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 4082079..ad06e45 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -68,7 +68,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define MFC_ENC_CAP_PLANE_COUNT	1
 #define MFC_ENC_OUT_PLANE_COUNT	2
 #define STUFF_BYTE		4
-#define MFC_MAX_CTRLS		77
+#define MFC_MAX_CTRLS		128
 
 #define S5P_MFC_CODEC_NONE		-1
 #define S5P_MFC_CODEC_H264_DEC		0
@@ -87,6 +87,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define S5P_MFC_CODEC_MPEG4_ENC		22
 #define S5P_MFC_CODEC_H263_ENC		23
 #define S5P_MFC_CODEC_VP8_ENC		24
+#define S5P_MFC_CODEC_HEVC_ENC		26
 
 #define S5P_MFC_R2H_CMD_EMPTY			0
 #define S5P_MFC_R2H_CMD_SYS_INIT_RET		1
@@ -222,6 +223,7 @@ struct s5p_mfc_buf_size_v6 {
 	unsigned int h264_dec_ctx;
 	unsigned int other_dec_ctx;
 	unsigned int h264_enc_ctx;
+	unsigned int hevc_enc_ctx;
 	unsigned int other_enc_ctx;
 };
 
@@ -440,6 +442,58 @@ struct s5p_mfc_vp8_enc_params {
 	u8 profile;
 };
 
+struct s5p_mfc_hevc_enc_params {
+	enum v4l2_mpeg_video_hevc_profile profile;
+	u8 level;
+	enum v4l2_mpeg_video_h264_level level_v4l2;
+	u8 tier_flag;
+	/* HEVC Only */
+	u32 rc_framerate;
+	u8 rc_min_qp;
+	u8 rc_max_qp;
+	u8 rc_lcu_dark;
+	u8 rc_lcu_smooth;
+	u8 rc_lcu_static;
+	u8 rc_lcu_activity;
+	u8 rc_frame_qp;
+	u8 rc_p_frame_qp;
+	u8 rc_b_frame_qp;
+	u8 max_partition_depth;
+	u8 num_refs_for_p;
+	u8 refreshtype;
+	u16 refreshperiod;
+	s32 lf_beta_offset_div2;
+	s32 lf_tc_offset_div2;
+	u8 loopfilter_disable;
+	u8 loopfilter_across;
+	u8 nal_control_length_filed;
+	u8 nal_control_user_ref;
+	u8 nal_control_store_ref;
+	u8 const_intra_period_enable;
+	u8 lossless_cu_enable;
+	u8 wavefront_enable;
+	u8 enable_ltr;
+	u8 hier_qp_enable;
+	enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
+	u8 hier_ref_type;
+	u8 num_hier_layer;
+	u8 hier_qp_layer[7];
+	u32 hier_bit_layer[7];
+	u8 sign_data_hiding;
+	u8 general_pb_enable;
+	u8 temporal_id_enable;
+	u8 strong_intra_smooth;
+	u8 intra_pu_split_disable;
+	u8 tmv_prediction_disable;
+	u8 max_num_merge_mv;
+	u8 eco_mode_enable;
+	u8 encoding_nostartcode_enable;
+	u8 size_of_length_field;
+	u8 use_ref;
+	u8 store_ref;
+	u8 prepend_sps_pps_to_idr;
+};
+
 /**
  * struct s5p_mfc_enc_params - general encoding parameters
  */
@@ -477,6 +531,7 @@ struct s5p_mfc_enc_params {
 		struct s5p_mfc_h264_enc_params h264;
 		struct s5p_mfc_mpeg4_enc_params mpeg4;
 		struct s5p_mfc_vp8_enc_params vp8;
+		struct s5p_mfc_hevc_enc_params hevc;
 	} codec;
 
 };
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 57a40c0..f13e60b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
 		.num_planes	= 1,
 		.versions	= MFC_V7PLUS_BITS,
 	},
+	{
+		.name		= "HEVC Encoded Stream",
+		.fourcc		= V4L2_PIX_FMT_HEVC,
+		.codec_mode	= S5P_FIMV_CODEC_HEVC_ENC,
+		.type		= MFC_FMT_ENC,
+		.num_planes	= 1,
+		.versions	= MFC_V10_BIT,
+	},
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
@@ -693,6 +701,420 @@ static struct mfc_control controls[] = {
 		.default_value = 0,
 	},
 	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC I Frame QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC P frame QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC B frame QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Minimum QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Maximum QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC dark reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC smooth reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC static reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC activity reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC Profile",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC level",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC tier_flag",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Frame rate resolution",
+		.minimum = 1,
+		.maximum = (1 << 16) - 1,
+		.step = 1,
+		.default_value = 1,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Maximum coding unit depth",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Number of reference picture",
+		.minimum = 1,
+		.maximum = 2,
+		.step = 1,
+		.default_value = 1,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC Refresh type",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Constant intra prediction",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC lossless encoding",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Wavefront",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Loop Filter",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC LF across slice boundary",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC QP values",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC Hierarchical Coding Type",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Coding Layer",
+		.minimum = 0,
+		.maximum = 6,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Layer QP",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Lay 0 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Lay 1 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Lay 2 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 3 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 4 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 5 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 6 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Coding Layer Change",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Sign data hiding",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC General PB",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Temporal id",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Strong intra smoothing",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC intra pu split",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC tmv prediction",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "max number of candidate MVs",
+		.minimum = 0,
+		.maximum = 4,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "ENC without startcode",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC num of I frame b/w 2 IDR",
+		.minimum = 0,
+		.maximum = (1 << 16) - 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC loop filter beta offset",
+		.minimum = -6,
+		.maximum = 6,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC loop filter tc offset",
+		.minimum = -6,
+		.maximum = 6,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC size of length field",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Prepend SPS/PPS to IDR",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
 		.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
 		.type = V4L2_CTRL_TYPE_INTEGER,
 		.name = "Minimum number of output bufs",
@@ -1359,6 +1781,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
 	return t[lvl];
 }
 
+static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
+{
+	static unsigned int t[V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 + 1] = {
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_1    */ 10,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2    */ 20,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1  */ 21,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3    */ 30,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1  */ 31,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4    */ 40,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1  */ 41,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5    */ 50,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1  */ 51,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2  */ 52,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6    */ 60,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1  */ 61,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2  */ 62,
+	};
+	return t[lvl];
+}
+
 static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
 {
 	static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
@@ -1635,6 +2077,159 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
 	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
 		p->codec.vp8.profile = ctrl->val;
 		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
+		p->codec.hevc.rc_frame_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
+		p->codec.hevc.rc_p_frame_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
+		p->codec.hevc.rc_b_frame_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
+		p->codec.hevc.rc_framerate = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
+		p->codec.hevc.rc_min_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
+		p->codec.hevc.rc_max_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+		p->codec.hevc.level_v4l2 = ctrl->val;
+		p->codec.hevc.level = hevc_level(ctrl->val);
+		if (p->codec.hevc.level < 0) {
+			mfc_err("Level number is wrong\n");
+			ret = p->codec.hevc.level;
+		}
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+		switch (ctrl->val) {
+		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
+			ctrl->val = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
+			break;
+		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
+			ctrl->val =
+			V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
+			break;
+		default:
+			ret = -EINVAL;
+		}
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:
+		p->codec.hevc.rc_lcu_dark = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:
+		p->codec.hevc.rc_lcu_smooth = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:
+		p->codec.hevc.rc_lcu_static = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:
+		p->codec.hevc.rc_lcu_activity = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+		p->codec.hevc.tier_flag = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
+		p->codec.hevc.max_partition_depth = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
+		p->codec.hevc.num_refs_for_p = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+		p->codec.hevc.refreshtype = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
+		p->codec.hevc.const_intra_period_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
+		p->codec.hevc.lossless_cu_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
+		p->codec.hevc.wavefront_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF:
+		p->codec.hevc.loopfilter_disable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
+		p->codec.hevc.loopfilter_across = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:
+		p->codec.hevc.hier_qp_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
+		p->codec.hevc.hier_qp_type =
+			(enum v4l2_mpeg_video_hevc_hier_coding_type)(ctrl->val);
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:
+		p->codec.hevc.num_hier_layer = ctrl->val & 0x7;
+		p->codec.hevc.hier_ref_type = 0;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:
+		p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
+					= ctrl->val & 0xFF;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:
+		p->codec.hevc.hier_bit_layer[0] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:
+		p->codec.hevc.hier_bit_layer[1] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:
+		p->codec.hevc.hier_bit_layer[2] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:
+		p->codec.hevc.hier_bit_layer[3] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:
+		p->codec.hevc.hier_bit_layer[4] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:
+		p->codec.hevc.hier_bit_layer[5] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:
+		p->codec.hevc.hier_bit_layer[6] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:
+		p->codec.hevc.sign_data_hiding = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
+		p->codec.hevc.general_pb_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
+		p->codec.hevc.temporal_id_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
+		p->codec.hevc.strong_intra_smooth = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
+		p->codec.hevc.intra_pu_split_disable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
+		p->codec.hevc.tmv_prediction_disable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
+		p->codec.hevc.max_num_merge_mv = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
+		p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
+		p->codec.hevc.refreshperiod = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
+		p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
+		p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+		p->codec.hevc.size_of_length_field = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
+		p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
+		break;
 	default:
 		v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
 							ctrl->id, ctrl->val);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 565decf..7751272 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -272,6 +272,14 @@ struct s5p_mfc_regs {
 	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
 	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
 	void __iomem *e_min_scratch_buffer_size; /* v10 */
+	void __iomem *e_num_t_layer; /* v10 */
+	void __iomem *e_hier_qp_layer0; /* v10 */
+	void __iomem *e_hier_bit_rate_layer0; /* v10 */
+	void __iomem *e_hevc_options; /* v10 */
+	void __iomem *e_hevc_refresh_period; /* v10 */
+	void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
+	void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
+	void __iomem *e_hevc_nal_control; /* v10 */
 };
 
 struct s5p_mfc_hw_ops {
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index ae5b871..dc62e0b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			ctx->chroma_dpb_size + ctx->me_buffer_size));
 		ctx->bank2.size = 0;
 		break;
+	case S5P_MFC_CODEC_HEVC_ENC:
+		mfc_debug(2, "Use min scratch buffer size\n");
+		ctx->me_buffer_size =
+			ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
+		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
+		ctx->bank1.size =
+			ctx->scratch_buf_size + ctx->tmv_buffer_size +
+			(ctx->pb_count * (ctx->luma_dpb_size +
+			ctx->chroma_dpb_size + ctx->me_buffer_size));
+		ctx->bank2.size = 0;
+		break;
 	default:
 		break;
 	}
@@ -349,6 +360,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_H264_ENC:
 		ctx->ctx.size = buf_size->h264_enc_ctx;
 		break;
+	case S5P_MFC_CODEC_HEVC_ENC:
+		ctx->ctx.size = buf_size->hevc_enc_ctx;
+		break;
 	case S5P_MFC_CODEC_MPEG4_ENC:
 	case S5P_MFC_CODEC_H263_ENC:
 	case S5P_MFC_CODEC_VP8_ENC:
@@ -1429,6 +1443,174 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
 	return 0;
 }
 
+static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
+{
+	struct s5p_mfc_dev *dev = ctx->dev;
+	const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
+	struct s5p_mfc_enc_params *p = &ctx->enc_params;
+	struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
+	unsigned int reg = 0;
+	int i;
+
+	mfc_debug_enter();
+
+	s5p_mfc_set_enc_params(ctx);
+
+	/* pictype : number of B */
+	reg = readl(mfc_regs->e_gop_config);
+	/* num_b_frame - 0 ~ 2 */
+	reg &= ~(0x3 << 16);
+	reg |= (p->num_b_frame << 16);
+	writel(reg, mfc_regs->e_gop_config);
+
+	/* UHD encoding case */
+	if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
+		p_hevc->level = 51;
+		p_hevc->tier_flag = 0;
+	/* this tier_flag can be changed */
+	}
+
+	/* tier_flag & level */
+	reg = 0;
+	/* profile */
+	reg |= p_hevc->profile & 0x3;
+	/* level */
+	reg &= ~(0xFF << 8);
+	reg |= (p_hevc->level << 8);
+	/* tier_flag - 0 ~ 1 */
+	reg |= (p_hevc->tier_flag << 16);
+	writel(reg, mfc_regs->e_picture_profile);
+
+	/* max partition depth */
+	reg = 0;
+	reg |= (p_hevc->max_partition_depth & 0x1);
+	reg |= (p_hevc->num_refs_for_p-1) << 2;
+	reg |= (2 << 3); /* always set IDR encoding */
+	reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
+	reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
+	reg |= (p_hevc->wavefront_enable & 0x1) << 7;
+	reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
+	reg |= (p_hevc->loopfilter_across & 0x1) << 9;
+	reg |= (p_hevc->enable_ltr & 0x1) << 10;
+	reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
+	reg |= (p_hevc->sign_data_hiding & 0x1) << 12;
+	reg |= (p_hevc->general_pb_enable & 0x1) << 13;
+	reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
+	reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
+	reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
+	reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
+	reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
+	reg |= (0 << 21); /* always eco mode disable */
+	reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 22;
+	reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
+
+	writel(reg, mfc_regs->e_hevc_options);
+	/* refresh period */
+	if (p_hevc->refreshtype) {
+		reg = 0;
+		reg |= (p_hevc->refreshperiod & 0xFFFF);
+		writel(reg, mfc_regs->e_hevc_refresh_period);
+	}
+	/* loop filter setting */
+	if (!p_hevc->loopfilter_disable) {
+		reg = 0;
+		reg |= (p_hevc->lf_beta_offset_div2);
+		writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
+		reg = 0;
+		reg |= (p_hevc->lf_tc_offset_div2);
+		writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
+	}
+	/* hier qp enable */
+	if (p_hevc->num_hier_layer) {
+		reg = 0;
+		reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
+		reg |= p_hevc->num_hier_layer & 0x7;
+		if (p_hevc->hier_ref_type) {
+			reg |= 0x1 << 7;
+			reg |= 0x3 << 4;
+		} else {
+			reg |= 0x7 << 4;
+		}
+		writel(reg, mfc_regs->e_num_t_layer);
+		/* QP value for each layer */
+		if (p_hevc->hier_qp_enable) {
+			for (i = 0; i < 7; i++)
+				writel(p_hevc->hier_qp_layer[i],
+					mfc_regs->e_hier_qp_layer0 + i * 4);
+		}
+		if (p->rc_frame) {
+			for (i = 0; i < 7; i++)
+				writel(p_hevc->hier_bit_layer[i],
+						mfc_regs->e_hier_bit_rate_layer0
+						+ i * 4);
+		}
+	}
+
+	/* rate control config. */
+	reg = readl(mfc_regs->e_rc_config);
+	/* macroblock level rate control */
+	reg &= ~(0x1 << 8);
+	reg |= (p->rc_mb << 8);
+	writel(reg, mfc_regs->e_rc_config);
+	/* frame QP */
+	reg &= ~(0x3F);
+	reg |= p_hevc->rc_frame_qp;
+	writel(reg, mfc_regs->e_rc_config);
+
+	/* frame rate */
+	if (p->rc_frame) {
+		reg = 0;
+		reg &= ~(0xffff << 16);
+		reg |= ((p_hevc->rc_framerate * FRAME_DELTA_DEFAULT) << 16);
+		reg &= ~(0xffff);
+		reg |= FRAME_DELTA_DEFAULT;
+		writel(reg, mfc_regs->e_rc_frame_rate);
+	}
+
+	/* max & min value of QP */
+	reg = 0;
+	/* max QP */
+	reg &= ~(0x3F << 8);
+	reg |= (p_hevc->rc_max_qp << 8);
+	/* min QP */
+	reg &= ~(0x3F);
+	reg |= p_hevc->rc_min_qp;
+	writel(reg, mfc_regs->e_rc_qp_bound);
+
+	/* macroblock adaptive scaling features */
+	writel(0x0, mfc_regs->e_mb_rc_config);
+	if (p->rc_mb) {
+		reg = 0;
+		/* dark region */
+		reg &= ~(0x1 << 3);
+		reg |= (p_hevc->rc_lcu_dark << 3);
+		/* smooth region */
+		reg &= ~(0x1 << 2);
+		reg |= (p_hevc->rc_lcu_smooth << 2);
+		/* static region */
+		reg &= ~(0x1 << 1);
+		reg |= (p_hevc->rc_lcu_static << 1);
+		/* high activity region */
+		reg &= ~(0x1);
+		reg |= p_hevc->rc_lcu_activity;
+		writel(reg, mfc_regs->e_mb_rc_config);
+	}
+	writel(0x0, mfc_regs->e_fixed_picture_qp);
+	if (!p->rc_frame && !p->rc_mb) {
+		reg = 0;
+		reg &= ~(0x3f << 16);
+		reg |= (p_hevc->rc_b_frame_qp << 16);
+		reg &= ~(0x3f << 8);
+		reg |= (p_hevc->rc_p_frame_qp << 8);
+		reg &= ~(0x3f);
+		reg |= p_hevc->rc_frame_qp;
+		writel(reg, mfc_regs->e_fixed_picture_qp);
+	}
+	mfc_debug_leave();
+
+	return 0;
+}
+
 /* Initialize decoding */
 static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
 {
@@ -1548,6 +1730,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
 		s5p_mfc_set_enc_params_h263(ctx);
 	else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
 		s5p_mfc_set_enc_params_vp8(ctx);
+	else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
+		s5p_mfc_set_enc_params_hevc(ctx);
 	else {
 		mfc_err("Unknown codec for encoding (%x).\n",
 			ctx->codec_mode);
@@ -2301,6 +2485,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
 	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
 
+	/* encoder registers */
+	R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
+	R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
+	R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
+	R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
+	R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
+	R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
+	R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
+	R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
+
 done:
 	return &mfc_regs;
 #undef S5P_MFC_REG_ADDR
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 2290f7e..8a7d053 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -46,6 +46,14 @@
 #define ENC_MPEG4_VOP_TIME_RES_MAX	((1 << 16) - 1)
 #define FRAME_DELTA_H264_H263		1
 #define TIGHT_CBR_MAX			10
+#define ENC_HEVC_RC_FRAME_RATE_MAX	((1 << 16) - 1)
+#define ENC_HEVC_QP_INDEX_MIN		-12
+#define ENC_HEVC_QP_INDEX_MAX		12
+#define ENC_HEVC_LOOP_FILTER_MIN	-12
+#define ENC_HEVC_LOOP_FILTER_MAX	12
+#define ENC_HEVC_LEVEL_MAX		62
+
+#define FRAME_DELTA_DEFAULT		1
 
 struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
 const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);
-- 
2.7.4

[Patch v3 10/11] [media] s5p-mfc: Add support for HEVC encoder

[Smitha T Murthy]

Add HEVC encoder support and necessary registers, V4L2 CIDs,
and hevc encoder parameters

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
 drivers/media/platform/s5p-mfc/s5p_mfc.c        |   1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  57 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    | 595 ++++++++++++++++++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |   8 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 194 ++++++++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
 8 files changed, 892 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 6754477..7065b9d 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -20,13 +20,35 @@
 #define S5P_FIMV_MFC_STATE_V10				0x7124
 #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
 #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
+#define S5P_FIMV_E_NUM_T_LAYER_V10			0xFBAC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10		0xFBB0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10		0xFBB4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10		0xFBB8
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10		0xFBBC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10		0xFBC0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10		0xFBC4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10		0xFBC8
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10	0xFD18
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10	0xFD1C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10	0xFD20
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10	0xFD24
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10	0xFD28
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10	0xFD2C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10	0xFD30
+#define S5P_FIMV_E_HEVC_OPTIONS_V10			0xFDD4
+#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10		0xFDD8
+#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10		0xFDDC
+#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10		0xFDE0
+#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10		0xFDE4
+#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10			0xFDE8
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
 #define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
 #define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
-#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
+#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10	(30 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
 
 /* MFCv10 variant defines */
 #define MAX_FW_SIZE_V10		(SZ_1M)
@@ -58,5 +80,9 @@
 #define ENC_V100_VP8_ME_SIZE(x, y) \
 	ENC_V100_BASE_SIZE(x, y)
 
+#define ENC_V100_HEVC_ME_SIZE(x, y)	\
+	(((x + 3) * (y + 3) * 32)	\
+	 + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 399c547..b3862d1 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1554,6 +1554,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
 	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
 	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
 	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+	.hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
 	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 102b47e..7521fce 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_VP8_ENC:
 		codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
 		break;
+	case S5P_MFC_CODEC_HEVC_ENC:
+		codec_type = S5P_FIMV_CODEC_HEVC_ENC;
+		break;
 	default:
 		codec_type = S5P_FIMV_CODEC_NONE_V6;
 	}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 4082079..ad06e45 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -68,7 +68,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define MFC_ENC_CAP_PLANE_COUNT	1
 #define MFC_ENC_OUT_PLANE_COUNT	2
 #define STUFF_BYTE		4
-#define MFC_MAX_CTRLS		77
+#define MFC_MAX_CTRLS		128
 
 #define S5P_MFC_CODEC_NONE		-1
 #define S5P_MFC_CODEC_H264_DEC		0
@@ -87,6 +87,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define S5P_MFC_CODEC_MPEG4_ENC		22
 #define S5P_MFC_CODEC_H263_ENC		23
 #define S5P_MFC_CODEC_VP8_ENC		24
+#define S5P_MFC_CODEC_HEVC_ENC		26
 
 #define S5P_MFC_R2H_CMD_EMPTY			0
 #define S5P_MFC_R2H_CMD_SYS_INIT_RET		1
@@ -222,6 +223,7 @@ struct s5p_mfc_buf_size_v6 {
 	unsigned int h264_dec_ctx;
 	unsigned int other_dec_ctx;
 	unsigned int h264_enc_ctx;
+	unsigned int hevc_enc_ctx;
 	unsigned int other_enc_ctx;
 };
 
@@ -440,6 +442,58 @@ struct s5p_mfc_vp8_enc_params {
 	u8 profile;
 };
 
+struct s5p_mfc_hevc_enc_params {
+	enum v4l2_mpeg_video_hevc_profile profile;
+	u8 level;
+	enum v4l2_mpeg_video_h264_level level_v4l2;
+	u8 tier_flag;
+	/* HEVC Only */
+	u32 rc_framerate;
+	u8 rc_min_qp;
+	u8 rc_max_qp;
+	u8 rc_lcu_dark;
+	u8 rc_lcu_smooth;
+	u8 rc_lcu_static;
+	u8 rc_lcu_activity;
+	u8 rc_frame_qp;
+	u8 rc_p_frame_qp;
+	u8 rc_b_frame_qp;
+	u8 max_partition_depth;
+	u8 num_refs_for_p;
+	u8 refreshtype;
+	u16 refreshperiod;
+	s32 lf_beta_offset_div2;
+	s32 lf_tc_offset_div2;
+	u8 loopfilter_disable;
+	u8 loopfilter_across;
+	u8 nal_control_length_filed;
+	u8 nal_control_user_ref;
+	u8 nal_control_store_ref;
+	u8 const_intra_period_enable;
+	u8 lossless_cu_enable;
+	u8 wavefront_enable;
+	u8 enable_ltr;
+	u8 hier_qp_enable;
+	enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
+	u8 hier_ref_type;
+	u8 num_hier_layer;
+	u8 hier_qp_layer[7];
+	u32 hier_bit_layer[7];
+	u8 sign_data_hiding;
+	u8 general_pb_enable;
+	u8 temporal_id_enable;
+	u8 strong_intra_smooth;
+	u8 intra_pu_split_disable;
+	u8 tmv_prediction_disable;
+	u8 max_num_merge_mv;
+	u8 eco_mode_enable;
+	u8 encoding_nostartcode_enable;
+	u8 size_of_length_field;
+	u8 use_ref;
+	u8 store_ref;
+	u8 prepend_sps_pps_to_idr;
+};
+
 /**
  * struct s5p_mfc_enc_params - general encoding parameters
  */
@@ -477,6 +531,7 @@ struct s5p_mfc_enc_params {
 		struct s5p_mfc_h264_enc_params h264;
 		struct s5p_mfc_mpeg4_enc_params mpeg4;
 		struct s5p_mfc_vp8_enc_params vp8;
+		struct s5p_mfc_hevc_enc_params hevc;
 	} codec;
 
 };
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 57a40c0..f13e60b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
 		.num_planes	= 1,
 		.versions	= MFC_V7PLUS_BITS,
 	},
+	{
+		.name		= "HEVC Encoded Stream",
+		.fourcc		= V4L2_PIX_FMT_HEVC,
+		.codec_mode	= S5P_FIMV_CODEC_HEVC_ENC,
+		.type		= MFC_FMT_ENC,
+		.num_planes	= 1,
+		.versions	= MFC_V10_BIT,
+	},
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
@@ -693,6 +701,420 @@ static struct mfc_control controls[] = {
 		.default_value = 0,
 	},
 	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC I Frame QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC P frame QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC B frame QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Minimum QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Maximum QP value",
+		.minimum = 0,
+		.maximum = 51,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC dark reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC smooth reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC static reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC activity reg adaptive rc",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC Profile",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC level",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC tier_flag",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Frame rate resolution",
+		.minimum = 1,
+		.maximum = (1 << 16) - 1,
+		.step = 1,
+		.default_value = 1,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Maximum coding unit depth",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Number of reference picture",
+		.minimum = 1,
+		.maximum = 2,
+		.step = 1,
+		.default_value = 1,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC Refresh type",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Constant intra prediction",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC lossless encoding",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Wavefront",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Loop Filter",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC LF across slice boundary",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC QP values",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC Hierarchical Coding Type",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Coding Layer",
+		.minimum = 0,
+		.maximum = 6,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Layer QP",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Lay 0 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Lay 1 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC Hierarchical Lay 2 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 3 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 4 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 5 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Lay 6 Bit Rate",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hierarchical Coding Layer Change",
+		.minimum = INT_MIN,
+		.maximum = INT_MAX,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Sign data hiding",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC General PB",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Temporal id",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC Strong intra smoothing",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC intra pu split",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "HEVC tmv prediction",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "max number of candidate MVs",
+		.minimum = 0,
+		.maximum = 4,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "ENC without startcode",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC num of I frame b/w 2 IDR",
+		.minimum = 0,
+		.maximum = (1 << 16) - 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC loop filter beta offset",
+		.minimum = -6,
+		.maximum = 6,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "HEVC loop filter tc offset",
+		.minimum = -6,
+		.maximum = 6,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
+		.type = V4L2_CTRL_TYPE_MENU,
+		.name = "HEVC size of length field",
+		.minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+		.maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
+		.step = 1,
+		.default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+	},
+	{
+		.id = V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Prepend SPS/PPS to IDR",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
 		.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
 		.type = V4L2_CTRL_TYPE_INTEGER,
 		.name = "Minimum number of output bufs",
@@ -1359,6 +1781,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
 	return t[lvl];
 }
 
+static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
+{
+	static unsigned int t[V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 + 1] = {
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_1    */ 10,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2    */ 20,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1  */ 21,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3    */ 30,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1  */ 31,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4    */ 40,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1  */ 41,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5    */ 50,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1  */ 51,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2  */ 52,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6    */ 60,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1  */ 61,
+		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2  */ 62,
+	};
+	return t[lvl];
+}
+
 static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
 {
 	static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
@@ -1635,6 +2077,159 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
 	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
 		p->codec.vp8.profile = ctrl->val;
 		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
+		p->codec.hevc.rc_frame_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
+		p->codec.hevc.rc_p_frame_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
+		p->codec.hevc.rc_b_frame_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
+		p->codec.hevc.rc_framerate = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
+		p->codec.hevc.rc_min_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
+		p->codec.hevc.rc_max_qp = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+		p->codec.hevc.level_v4l2 = ctrl->val;
+		p->codec.hevc.level = hevc_level(ctrl->val);
+		if (p->codec.hevc.level < 0) {
+			mfc_err("Level number is wrong\n");
+			ret = p->codec.hevc.level;
+		}
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+		switch (ctrl->val) {
+		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
+			ctrl->val = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
+			break;
+		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
+			ctrl->val =
+			V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
+			break;
+		default:
+			ret = -EINVAL;
+		}
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:
+		p->codec.hevc.rc_lcu_dark = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:
+		p->codec.hevc.rc_lcu_smooth = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:
+		p->codec.hevc.rc_lcu_static = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:
+		p->codec.hevc.rc_lcu_activity = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+		p->codec.hevc.tier_flag = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
+		p->codec.hevc.max_partition_depth = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
+		p->codec.hevc.num_refs_for_p = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+		p->codec.hevc.refreshtype = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
+		p->codec.hevc.const_intra_period_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
+		p->codec.hevc.lossless_cu_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
+		p->codec.hevc.wavefront_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF:
+		p->codec.hevc.loopfilter_disable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
+		p->codec.hevc.loopfilter_across = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:
+		p->codec.hevc.hier_qp_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
+		p->codec.hevc.hier_qp_type =
+			(enum v4l2_mpeg_video_hevc_hier_coding_type)(ctrl->val);
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:
+		p->codec.hevc.num_hier_layer = ctrl->val & 0x7;
+		p->codec.hevc.hier_ref_type = 0;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:
+		p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
+					= ctrl->val & 0xFF;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:
+		p->codec.hevc.hier_bit_layer[0] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:
+		p->codec.hevc.hier_bit_layer[1] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:
+		p->codec.hevc.hier_bit_layer[2] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:
+		p->codec.hevc.hier_bit_layer[3] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:
+		p->codec.hevc.hier_bit_layer[4] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:
+		p->codec.hevc.hier_bit_layer[5] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:
+		p->codec.hevc.hier_bit_layer[6] = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:
+		p->codec.hevc.sign_data_hiding = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
+		p->codec.hevc.general_pb_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
+		p->codec.hevc.temporal_id_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
+		p->codec.hevc.strong_intra_smooth = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
+		p->codec.hevc.intra_pu_split_disable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
+		p->codec.hevc.tmv_prediction_disable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
+		p->codec.hevc.max_num_merge_mv = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
+		p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
+		p->codec.hevc.refreshperiod = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
+		p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
+		p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+		p->codec.hevc.size_of_length_field = ctrl->val;
+		break;
+	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
+		p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
+		break;
 	default:
 		v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
 							ctrl->id, ctrl->val);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 565decf..7751272 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -272,6 +272,14 @@ struct s5p_mfc_regs {
 	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
 	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
 	void __iomem *e_min_scratch_buffer_size; /* v10 */
+	void __iomem *e_num_t_layer; /* v10 */
+	void __iomem *e_hier_qp_layer0; /* v10 */
+	void __iomem *e_hier_bit_rate_layer0; /* v10 */
+	void __iomem *e_hevc_options; /* v10 */
+	void __iomem *e_hevc_refresh_period; /* v10 */
+	void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
+	void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
+	void __iomem *e_hevc_nal_control; /* v10 */
 };
 
 struct s5p_mfc_hw_ops {
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index ae5b871..dc62e0b 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
 			ctx->chroma_dpb_size + ctx->me_buffer_size));
 		ctx->bank2.size = 0;
 		break;
+	case S5P_MFC_CODEC_HEVC_ENC:
+		mfc_debug(2, "Use min scratch buffer size\n");
+		ctx->me_buffer_size =
+			ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
+		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
+		ctx->bank1.size =
+			ctx->scratch_buf_size + ctx->tmv_buffer_size +
+			(ctx->pb_count * (ctx->luma_dpb_size +
+			ctx->chroma_dpb_size + ctx->me_buffer_size));
+		ctx->bank2.size = 0;
+		break;
 	default:
 		break;
 	}
@@ -349,6 +360,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
 	case S5P_MFC_CODEC_H264_ENC:
 		ctx->ctx.size = buf_size->h264_enc_ctx;
 		break;
+	case S5P_MFC_CODEC_HEVC_ENC:
+		ctx->ctx.size = buf_size->hevc_enc_ctx;
+		break;
 	case S5P_MFC_CODEC_MPEG4_ENC:
 	case S5P_MFC_CODEC_H263_ENC:
 	case S5P_MFC_CODEC_VP8_ENC:
@@ -1429,6 +1443,174 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
 	return 0;
 }
 
+static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
+{
+	struct s5p_mfc_dev *dev = ctx->dev;
+	const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
+	struct s5p_mfc_enc_params *p = &ctx->enc_params;
+	struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
+	unsigned int reg = 0;
+	int i;
+
+	mfc_debug_enter();
+
+	s5p_mfc_set_enc_params(ctx);
+
+	/* pictype : number of B */
+	reg = readl(mfc_regs->e_gop_config);
+	/* num_b_frame - 0 ~ 2 */
+	reg &= ~(0x3 << 16);
+	reg |= (p->num_b_frame << 16);
+	writel(reg, mfc_regs->e_gop_config);
+
+	/* UHD encoding case */
+	if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
+		p_hevc->level = 51;
+		p_hevc->tier_flag = 0;
+	/* this tier_flag can be changed */
+	}
+
+	/* tier_flag & level */
+	reg = 0;
+	/* profile */
+	reg |= p_hevc->profile & 0x3;
+	/* level */
+	reg &= ~(0xFF << 8);
+	reg |= (p_hevc->level << 8);
+	/* tier_flag - 0 ~ 1 */
+	reg |= (p_hevc->tier_flag << 16);
+	writel(reg, mfc_regs->e_picture_profile);
+
+	/* max partition depth */
+	reg = 0;
+	reg |= (p_hevc->max_partition_depth & 0x1);
+	reg |= (p_hevc->num_refs_for_p-1) << 2;
+	reg |= (2 << 3); /* always set IDR encoding */
+	reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
+	reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
+	reg |= (p_hevc->wavefront_enable & 0x1) << 7;
+	reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
+	reg |= (p_hevc->loopfilter_across & 0x1) << 9;
+	reg |= (p_hevc->enable_ltr & 0x1) << 10;
+	reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
+	reg |= (p_hevc->sign_data_hiding & 0x1) << 12;
+	reg |= (p_hevc->general_pb_enable & 0x1) << 13;
+	reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
+	reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
+	reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
+	reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
+	reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
+	reg |= (0 << 21); /* always eco mode disable */
+	reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 22;
+	reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
+
+	writel(reg, mfc_regs->e_hevc_options);
+	/* refresh period */
+	if (p_hevc->refreshtype) {
+		reg = 0;
+		reg |= (p_hevc->refreshperiod & 0xFFFF);
+		writel(reg, mfc_regs->e_hevc_refresh_period);
+	}
+	/* loop filter setting */
+	if (!p_hevc->loopfilter_disable) {
+		reg = 0;
+		reg |= (p_hevc->lf_beta_offset_div2);
+		writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
+		reg = 0;
+		reg |= (p_hevc->lf_tc_offset_div2);
+		writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
+	}
+	/* hier qp enable */
+	if (p_hevc->num_hier_layer) {
+		reg = 0;
+		reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
+		reg |= p_hevc->num_hier_layer & 0x7;
+		if (p_hevc->hier_ref_type) {
+			reg |= 0x1 << 7;
+			reg |= 0x3 << 4;
+		} else {
+			reg |= 0x7 << 4;
+		}
+		writel(reg, mfc_regs->e_num_t_layer);
+		/* QP value for each layer */
+		if (p_hevc->hier_qp_enable) {
+			for (i = 0; i < 7; i++)
+				writel(p_hevc->hier_qp_layer[i],
+					mfc_regs->e_hier_qp_layer0 + i * 4);
+		}
+		if (p->rc_frame) {
+			for (i = 0; i < 7; i++)
+				writel(p_hevc->hier_bit_layer[i],
+						mfc_regs->e_hier_bit_rate_layer0
+						+ i * 4);
+		}
+	}
+
+	/* rate control config. */
+	reg = readl(mfc_regs->e_rc_config);
+	/* macroblock level rate control */
+	reg &= ~(0x1 << 8);
+	reg |= (p->rc_mb << 8);
+	writel(reg, mfc_regs->e_rc_config);
+	/* frame QP */
+	reg &= ~(0x3F);
+	reg |= p_hevc->rc_frame_qp;
+	writel(reg, mfc_regs->e_rc_config);
+
+	/* frame rate */
+	if (p->rc_frame) {
+		reg = 0;
+		reg &= ~(0xffff << 16);
+		reg |= ((p_hevc->rc_framerate * FRAME_DELTA_DEFAULT) << 16);
+		reg &= ~(0xffff);
+		reg |= FRAME_DELTA_DEFAULT;
+		writel(reg, mfc_regs->e_rc_frame_rate);
+	}
+
+	/* max & min value of QP */
+	reg = 0;
+	/* max QP */
+	reg &= ~(0x3F << 8);
+	reg |= (p_hevc->rc_max_qp << 8);
+	/* min QP */
+	reg &= ~(0x3F);
+	reg |= p_hevc->rc_min_qp;
+	writel(reg, mfc_regs->e_rc_qp_bound);
+
+	/* macroblock adaptive scaling features */
+	writel(0x0, mfc_regs->e_mb_rc_config);
+	if (p->rc_mb) {
+		reg = 0;
+		/* dark region */
+		reg &= ~(0x1 << 3);
+		reg |= (p_hevc->rc_lcu_dark << 3);
+		/* smooth region */
+		reg &= ~(0x1 << 2);
+		reg |= (p_hevc->rc_lcu_smooth << 2);
+		/* static region */
+		reg &= ~(0x1 << 1);
+		reg |= (p_hevc->rc_lcu_static << 1);
+		/* high activity region */
+		reg &= ~(0x1);
+		reg |= p_hevc->rc_lcu_activity;
+		writel(reg, mfc_regs->e_mb_rc_config);
+	}
+	writel(0x0, mfc_regs->e_fixed_picture_qp);
+	if (!p->rc_frame && !p->rc_mb) {
+		reg = 0;
+		reg &= ~(0x3f << 16);
+		reg |= (p_hevc->rc_b_frame_qp << 16);
+		reg &= ~(0x3f << 8);
+		reg |= (p_hevc->rc_p_frame_qp << 8);
+		reg &= ~(0x3f);
+		reg |= p_hevc->rc_frame_qp;
+		writel(reg, mfc_regs->e_fixed_picture_qp);
+	}
+	mfc_debug_leave();
+
+	return 0;
+}
+
 /* Initialize decoding */
 static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
 {
@@ -1548,6 +1730,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
 		s5p_mfc_set_enc_params_h263(ctx);
 	else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
 		s5p_mfc_set_enc_params_vp8(ctx);
+	else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
+		s5p_mfc_set_enc_params_hevc(ctx);
 	else {
 		mfc_err("Unknown codec for encoding (%x).\n",
 			ctx->codec_mode);
@@ -2301,6 +2485,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
 	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
 	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
 
+	/* encoder registers */
+	R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
+	R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
+	R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
+	R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
+	R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
+	R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
+	R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
+	R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
+
 done:
 	return &mfc_regs;
 #undef S5P_MFC_REG_ADDR
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 2290f7e..8a7d053 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -46,6 +46,14 @@
 #define ENC_MPEG4_VOP_TIME_RES_MAX	((1 << 16) - 1)
 #define FRAME_DELTA_H264_H263		1
 #define TIGHT_CBR_MAX			10
+#define ENC_HEVC_RC_FRAME_RATE_MAX	((1 << 16) - 1)
+#define ENC_HEVC_QP_INDEX_MIN		-12
+#define ENC_HEVC_QP_INDEX_MAX		12
+#define ENC_HEVC_LOOP_FILTER_MIN	-12
+#define ENC_HEVC_LOOP_FILTER_MAX	12
+#define ENC_HEVC_LEVEL_MAX		62
+
+#define FRAME_DELTA_DEFAULT		1
 
 struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
 const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);
-- 
2.7.4

Re: [Patch v3 10/11] [media] s5p-mfc: Add support for HEVC encoder

[Andrzej Hajda]

On 31.03.2017 11:06, Smitha T Murthy wrote:
> Add HEVC encoder support and necessary registers, V4L2 CIDs,
> and hevc encoder parameters
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
>  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
>  drivers/media/platform/s5p-mfc/s5p_mfc.c        |   1 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  57 ++-
>  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    | 595 ++++++++++++++++++++++++
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |   8 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 194 ++++++++
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
>  8 files changed, 892 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 6754477..7065b9d 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -20,13 +20,35 @@
>  #define S5P_FIMV_MFC_STATE_V10				0x7124
>  #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
>  #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
> +#define S5P_FIMV_E_NUM_T_LAYER_V10			0xFBAC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10		0xFBB0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10		0xFBB4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10		0xFBB8
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10		0xFBBC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10		0xFBC0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10		0xFBC4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10		0xFBC8
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10	0xFD18
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10	0xFD1C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10	0xFD20
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10	0xFD24
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10	0xFD28
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10	0xFD2C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10	0xFD30
> +#define S5P_FIMV_E_HEVC_OPTIONS_V10			0xFDD4
> +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10		0xFDD8
> +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10		0xFDDC
> +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10		0xFDE0
> +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10		0xFDE4
> +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10			0xFDE8
>  
>  /* MFCv10 Context buffer sizes */
>  #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
>  #define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
>  #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
>  #define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
> -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
> +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10	(30 * SZ_1K)
> +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
>  
>  /* MFCv10 variant defines */
>  #define MAX_FW_SIZE_V10		(SZ_1M)
> @@ -58,5 +80,9 @@
>  #define ENC_V100_VP8_ME_SIZE(x, y) \
>  	ENC_V100_BASE_SIZE(x, y)
>  
> +#define ENC_V100_HEVC_ME_SIZE(x, y)	\
> +	(((x + 3) * (y + 3) * 32)	\
> +	 + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> +
>  #endif /*_REGS_MFC_V10_H*/
>  
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> index 399c547..b3862d1 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> @@ -1554,6 +1554,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
>  	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
>  	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
>  	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> +	.hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
>  	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
>  };
>  
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> index 102b47e..7521fce 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
>  	case S5P_MFC_CODEC_VP8_ENC:
>  		codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_ENC:
> +		codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> +		break;
>  	default:
>  		codec_type = S5P_FIMV_CODEC_NONE_V6;
>  	}
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> index 4082079..ad06e45 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> @@ -68,7 +68,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
>  #define MFC_ENC_CAP_PLANE_COUNT	1
>  #define MFC_ENC_OUT_PLANE_COUNT	2
>  #define STUFF_BYTE		4
> -#define MFC_MAX_CTRLS		77
> +#define MFC_MAX_CTRLS		128
>  
>  #define S5P_MFC_CODEC_NONE		-1
>  #define S5P_MFC_CODEC_H264_DEC		0
> @@ -87,6 +87,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
>  #define S5P_MFC_CODEC_MPEG4_ENC		22
>  #define S5P_MFC_CODEC_H263_ENC		23
>  #define S5P_MFC_CODEC_VP8_ENC		24
> +#define S5P_MFC_CODEC_HEVC_ENC		26
>  
>  #define S5P_MFC_R2H_CMD_EMPTY			0
>  #define S5P_MFC_R2H_CMD_SYS_INIT_RET		1
> @@ -222,6 +223,7 @@ struct s5p_mfc_buf_size_v6 {
>  	unsigned int h264_dec_ctx;
>  	unsigned int other_dec_ctx;
>  	unsigned int h264_enc_ctx;
> +	unsigned int hevc_enc_ctx;
>  	unsigned int other_enc_ctx;
>  };
>  
> @@ -440,6 +442,58 @@ struct s5p_mfc_vp8_enc_params {
>  	u8 profile;
>  };
>  
> +struct s5p_mfc_hevc_enc_params {
> +	enum v4l2_mpeg_video_hevc_profile profile;
> +	u8 level;
> +	enum v4l2_mpeg_video_h264_level level_v4l2;
> +	u8 tier_flag;
> +	/* HEVC Only */

spare comment

> +	u32 rc_framerate;
> +	u8 rc_min_qp;
> +	u8 rc_max_qp;
> +	u8 rc_lcu_dark;
> +	u8 rc_lcu_smooth;
> +	u8 rc_lcu_static;
> +	u8 rc_lcu_activity;
> +	u8 rc_frame_qp;
> +	u8 rc_p_frame_qp;
> +	u8 rc_b_frame_qp;
> +	u8 max_partition_depth;
> +	u8 num_refs_for_p;
> +	u8 refreshtype;
> +	u16 refreshperiod;
> +	s32 lf_beta_offset_div2;
> +	s32 lf_tc_offset_div2;
> +	u8 loopfilter_disable;
> +	u8 loopfilter_across;
> +	u8 nal_control_length_filed;
> +	u8 nal_control_user_ref;
> +	u8 nal_control_store_ref;
> +	u8 const_intra_period_enable;
> +	u8 lossless_cu_enable;
> +	u8 wavefront_enable;
> +	u8 enable_ltr;
> +	u8 hier_qp_enable;
> +	enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> +	u8 hier_ref_type;
> +	u8 num_hier_layer;
> +	u8 hier_qp_layer[7];
> +	u32 hier_bit_layer[7];
> +	u8 sign_data_hiding;
> +	u8 general_pb_enable;
> +	u8 temporal_id_enable;
> +	u8 strong_intra_smooth;
> +	u8 intra_pu_split_disable;
> +	u8 tmv_prediction_disable;
> +	u8 max_num_merge_mv;
> +	u8 eco_mode_enable;
> +	u8 encoding_nostartcode_enable;
> +	u8 size_of_length_field;
> +	u8 use_ref;
> +	u8 store_ref;
> +	u8 prepend_sps_pps_to_idr;
> +};
> +
>  /**
>   * struct s5p_mfc_enc_params - general encoding parameters
>   */
> @@ -477,6 +531,7 @@ struct s5p_mfc_enc_params {
>  		struct s5p_mfc_h264_enc_params h264;
>  		struct s5p_mfc_mpeg4_enc_params mpeg4;
>  		struct s5p_mfc_vp8_enc_params vp8;
> +		struct s5p_mfc_hevc_enc_params hevc;
>  	} codec;
>  
>  };
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> index 57a40c0..f13e60b 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
>  		.num_planes	= 1,
>  		.versions	= MFC_V7PLUS_BITS,
>  	},
> +	{
> +		.name		= "HEVC Encoded Stream",
> +		.fourcc		= V4L2_PIX_FMT_HEVC,
> +		.codec_mode	= S5P_FIMV_CODEC_HEVC_ENC,
> +		.type		= MFC_FMT_ENC,
> +		.num_planes	= 1,
> +		.versions	= MFC_V10_BIT,
> +	},
>  };
>  
>  #define NUM_FORMATS ARRAY_SIZE(formats)
> @@ -693,6 +701,420 @@ static struct mfc_control controls[] = {
>  		.default_value = 0,
>  	},
>  	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC I Frame QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC P frame QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC B frame QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Minimum QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Maximum QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC dark reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC smooth reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC static reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC activity reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC Profile",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC level",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC tier_flag",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,

I am not sure if I said it already explicitly but tier fits more to menu
control.
It is the same category as profile, level,... And there are two tiers:
Main and High.

> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Frame rate resolution",
> +		.minimum = 1,
> +		.maximum = (1 << 16) - 1,
> +		.step = 1,
> +		.default_value = 1,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Maximum coding unit depth",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Number of reference picture",
> +		.minimum = 1,
> +		.maximum = 2,
> +		.step = 1,
> +		.default_value = 1,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC Refresh type",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Constant intra prediction",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC lossless encoding",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Wavefront",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Loop Filter",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC LF across slice boundary",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC QP values",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC Hierarchical Coding Type",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Coding Layer",
> +		.minimum = 0,
> +		.maximum = 6,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Layer QP",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Lay 0 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Lay 1 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Lay 2 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 3 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 4 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 5 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 6 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Coding Layer Change",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Sign data hiding",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC General PB",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Temporal id",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Strong intra smoothing",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC intra pu split",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC tmv prediction",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "max number of candidate MVs",
> +		.minimum = 0,
> +		.maximum = 4,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "ENC without startcode",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC num of I frame b/w 2 IDR",
> +		.minimum = 0,
> +		.maximum = (1 << 16) - 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC loop filter beta offset",
> +		.minimum = -6,
> +		.maximum = 6,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC loop filter tc offset",
> +		.minimum = -6,
> +		.maximum = 6,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC size of length field",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Prepend SPS/PPS to IDR",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
>  		.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
>  		.type = V4L2_CTRL_TYPE_INTEGER,
>  		.name = "Minimum number of output bufs",
> @@ -1359,6 +1781,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
>  	return t[lvl];
>  }
>  
> +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> +{
> +	static unsigned int t[V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 + 1] = {
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_1    */ 10,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2    */ 20,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1  */ 21,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3    */ 30,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1  */ 31,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4    */ 40,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1  */ 41,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5    */ 50,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1  */ 51,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2  */ 52,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6    */ 60,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1  */ 61,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2  */ 62,

Don't provide array size - compiler knows it already, and use array
initializers - it will be safer:
 

static unsigned int t[] = {
	[V4L2_MPEG_VIDEO_HEVC_LEVEL_1] = 10,
	...
};


> +	};
> +	return t[lvl];
> +}
> +
>  static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
>  {
>  	static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> @@ -1635,6 +2077,159 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
>  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
>  		p->codec.vp8.profile = ctrl->val;
>  		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> +		p->codec.hevc.rc_frame_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> +		p->codec.hevc.rc_p_frame_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> +		p->codec.hevc.rc_b_frame_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> +		p->codec.hevc.rc_framerate = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> +		p->codec.hevc.rc_min_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> +		p->codec.hevc.rc_max_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> +		p->codec.hevc.level_v4l2 = ctrl->val;
> +		p->codec.hevc.level = hevc_level(ctrl->val);
> +		if (p->codec.hevc.level < 0) {
> +			mfc_err("Level number is wrong\n");
> +			ret = p->codec.hevc.level;
> +		}

With proper control constrains (min,max) checking value is not necessary.

> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> +		switch (ctrl->val) {
> +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> +			ctrl->val = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> +			break;
> +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> +			ctrl->val =
> +			V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> +			break;
> +		default:
> +			ret = -EINVAL;
> +		}

What is this? I guess you wanted to write sth to p->codec.hevc.profile .


> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:
> +		p->codec.hevc.rc_lcu_dark = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:
> +		p->codec.hevc.rc_lcu_smooth = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:
> +		p->codec.hevc.rc_lcu_static = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:
> +		p->codec.hevc.rc_lcu_activity = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> +		p->codec.hevc.tier_flag = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> +		p->codec.hevc.max_partition_depth = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> +		p->codec.hevc.num_refs_for_p = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> +		p->codec.hevc.refreshtype = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> +		p->codec.hevc.const_intra_period_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> +		p->codec.hevc.lossless_cu_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> +		p->codec.hevc.wavefront_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> +		p->codec.hevc.loopfilter_disable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> +		p->codec.hevc.loopfilter_across = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:
> +		p->codec.hevc.hier_qp_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> +		p->codec.hevc.hier_qp_type =
> +			(enum v4l2_mpeg_video_hevc_hier_coding_type)(ctrl->val);

No need to cast.

> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:
> +		p->codec.hevc.num_hier_layer = ctrl->val & 0x7;

No need to "& 0x7";

> +		p->codec.hevc.hier_ref_type = 0;

hier_ref_type is always zero, what is the point of its existence?

Regards
Andrzej

> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:
> +		p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> +					= ctrl->val & 0xFF;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:
> +		p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:
> +		p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:
> +		p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:
> +		p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:
> +		p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:
> +		p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:
> +		p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:
> +		p->codec.hevc.sign_data_hiding = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> +		p->codec.hevc.general_pb_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> +		p->codec.hevc.temporal_id_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> +		p->codec.hevc.strong_intra_smooth = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> +		p->codec.hevc.intra_pu_split_disable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> +		p->codec.hevc.tmv_prediction_disable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> +		p->codec.hevc.max_num_merge_mv = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> +		p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> +		p->codec.hevc.refreshperiod = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> +		p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> +		p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> +		p->codec.hevc.size_of_length_field = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> +		p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> +		break;
>  	default:
>  		v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
>  							ctrl->id, ctrl->val);
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> index 565decf..7751272 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> @@ -272,6 +272,14 @@ struct s5p_mfc_regs {
>  	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
>  	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
>  	void __iomem *e_min_scratch_buffer_size; /* v10 */
> +	void __iomem *e_num_t_layer; /* v10 */
> +	void __iomem *e_hier_qp_layer0; /* v10 */
> +	void __iomem *e_hier_bit_rate_layer0; /* v10 */
> +	void __iomem *e_hevc_options; /* v10 */
> +	void __iomem *e_hevc_refresh_period; /* v10 */
> +	void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
> +	void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
> +	void __iomem *e_hevc_nal_control; /* v10 */
>  };
>  
>  struct s5p_mfc_hw_ops {
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> index ae5b871..dc62e0b 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> @@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>  			ctx->chroma_dpb_size + ctx->me_buffer_size));
>  		ctx->bank2.size = 0;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_ENC:
> +		mfc_debug(2, "Use min scratch buffer size\n");
> +		ctx->me_buffer_size =
> +			ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
> +		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
> +		ctx->bank1.size =
> +			ctx->scratch_buf_size + ctx->tmv_buffer_size +
> +			(ctx->pb_count * (ctx->luma_dpb_size +
> +			ctx->chroma_dpb_size + ctx->me_buffer_size));
> +		ctx->bank2.size = 0;
> +		break;
>  	default:
>  		break;
>  	}
> @@ -349,6 +360,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
>  	case S5P_MFC_CODEC_H264_ENC:
>  		ctx->ctx.size = buf_size->h264_enc_ctx;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_ENC:
> +		ctx->ctx.size = buf_size->hevc_enc_ctx;
> +		break;
>  	case S5P_MFC_CODEC_MPEG4_ENC:
>  	case S5P_MFC_CODEC_H263_ENC:
>  	case S5P_MFC_CODEC_VP8_ENC:
> @@ -1429,6 +1443,174 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
>  	return 0;
>  }
>  
> +static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
> +{
> +	struct s5p_mfc_dev *dev = ctx->dev;
> +	const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
> +	struct s5p_mfc_enc_params *p = &ctx->enc_params;
> +	struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
> +	unsigned int reg = 0;
> +	int i;
> +
> +	mfc_debug_enter();
> +
> +	s5p_mfc_set_enc_params(ctx);
> +
> +	/* pictype : number of B */
> +	reg = readl(mfc_regs->e_gop_config);
> +	/* num_b_frame - 0 ~ 2 */
> +	reg &= ~(0x3 << 16);
> +	reg |= (p->num_b_frame << 16);
> +	writel(reg, mfc_regs->e_gop_config);
> +
> +	/* UHD encoding case */
> +	if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
> +		p_hevc->level = 51;
> +		p_hevc->tier_flag = 0;
> +	/* this tier_flag can be changed */
> +	}
> +
> +	/* tier_flag & level */
> +	reg = 0;
> +	/* profile */
> +	reg |= p_hevc->profile & 0x3;
> +	/* level */
> +	reg &= ~(0xFF << 8);
> +	reg |= (p_hevc->level << 8);
> +	/* tier_flag - 0 ~ 1 */
> +	reg |= (p_hevc->tier_flag << 16);
> +	writel(reg, mfc_regs->e_picture_profile);
> +
> +	/* max partition depth */
> +	reg = 0;
> +	reg |= (p_hevc->max_partition_depth & 0x1);
> +	reg |= (p_hevc->num_refs_for_p-1) << 2;
> +	reg |= (2 << 3); /* always set IDR encoding */
> +	reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
> +	reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
> +	reg |= (p_hevc->wavefront_enable & 0x1) << 7;
> +	reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
> +	reg |= (p_hevc->loopfilter_across & 0x1) << 9;
> +	reg |= (p_hevc->enable_ltr & 0x1) << 10;
> +	reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
> +	reg |= (p_hevc->sign_data_hiding & 0x1) << 12;
> +	reg |= (p_hevc->general_pb_enable & 0x1) << 13;
> +	reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
> +	reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
> +	reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
> +	reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
> +	reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
> +	reg |= (0 << 21); /* always eco mode disable */
> +	reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 22;
> +	reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
> +
> +	writel(reg, mfc_regs->e_hevc_options);
> +	/* refresh period */
> +	if (p_hevc->refreshtype) {
> +		reg = 0;
> +		reg |= (p_hevc->refreshperiod & 0xFFFF);
> +		writel(reg, mfc_regs->e_hevc_refresh_period);
> +	}
> +	/* loop filter setting */
> +	if (!p_hevc->loopfilter_disable) {
> +		reg = 0;
> +		reg |= (p_hevc->lf_beta_offset_div2);
> +		writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
> +		reg = 0;
> +		reg |= (p_hevc->lf_tc_offset_div2);
> +		writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
> +	}
> +	/* hier qp enable */
> +	if (p_hevc->num_hier_layer) {
> +		reg = 0;
> +		reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
> +		reg |= p_hevc->num_hier_layer & 0x7;
> +		if (p_hevc->hier_ref_type) {
> +			reg |= 0x1 << 7;
> +			reg |= 0x3 << 4;
> +		} else {
> +			reg |= 0x7 << 4;
> +		}
> +		writel(reg, mfc_regs->e_num_t_layer);
> +		/* QP value for each layer */
> +		if (p_hevc->hier_qp_enable) {
> +			for (i = 0; i < 7; i++)
> +				writel(p_hevc->hier_qp_layer[i],
> +					mfc_regs->e_hier_qp_layer0 + i * 4);
> +		}
> +		if (p->rc_frame) {
> +			for (i = 0; i < 7; i++)
> +				writel(p_hevc->hier_bit_layer[i],
> +						mfc_regs->e_hier_bit_rate_layer0
> +						+ i * 4);
> +		}
> +	}
> +
> +	/* rate control config. */
> +	reg = readl(mfc_regs->e_rc_config);
> +	/* macroblock level rate control */
> +	reg &= ~(0x1 << 8);
> +	reg |= (p->rc_mb << 8);
> +	writel(reg, mfc_regs->e_rc_config);
> +	/* frame QP */
> +	reg &= ~(0x3F);
> +	reg |= p_hevc->rc_frame_qp;
> +	writel(reg, mfc_regs->e_rc_config);
> +
> +	/* frame rate */
> +	if (p->rc_frame) {
> +		reg = 0;
> +		reg &= ~(0xffff << 16);
> +		reg |= ((p_hevc->rc_framerate * FRAME_DELTA_DEFAULT) << 16);
> +		reg &= ~(0xffff);
> +		reg |= FRAME_DELTA_DEFAULT;
> +		writel(reg, mfc_regs->e_rc_frame_rate);
> +	}
> +
> +	/* max & min value of QP */
> +	reg = 0;
> +	/* max QP */
> +	reg &= ~(0x3F << 8);
> +	reg |= (p_hevc->rc_max_qp << 8);
> +	/* min QP */
> +	reg &= ~(0x3F);
> +	reg |= p_hevc->rc_min_qp;
> +	writel(reg, mfc_regs->e_rc_qp_bound);
> +
> +	/* macroblock adaptive scaling features */
> +	writel(0x0, mfc_regs->e_mb_rc_config);
> +	if (p->rc_mb) {
> +		reg = 0;
> +		/* dark region */
> +		reg &= ~(0x1 << 3);
> +		reg |= (p_hevc->rc_lcu_dark << 3);
> +		/* smooth region */
> +		reg &= ~(0x1 << 2);
> +		reg |= (p_hevc->rc_lcu_smooth << 2);
> +		/* static region */
> +		reg &= ~(0x1 << 1);
> +		reg |= (p_hevc->rc_lcu_static << 1);
> +		/* high activity region */
> +		reg &= ~(0x1);
> +		reg |= p_hevc->rc_lcu_activity;
> +		writel(reg, mfc_regs->e_mb_rc_config);
> +	}
> +	writel(0x0, mfc_regs->e_fixed_picture_qp);
> +	if (!p->rc_frame && !p->rc_mb) {
> +		reg = 0;
> +		reg &= ~(0x3f << 16);
> +		reg |= (p_hevc->rc_b_frame_qp << 16);
> +		reg &= ~(0x3f << 8);
> +		reg |= (p_hevc->rc_p_frame_qp << 8);
> +		reg &= ~(0x3f);
> +		reg |= p_hevc->rc_frame_qp;
> +		writel(reg, mfc_regs->e_fixed_picture_qp);
> +	}
> +	mfc_debug_leave();
> +
> +	return 0;
> +}
> +
>  /* Initialize decoding */
>  static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
>  {
> @@ -1548,6 +1730,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
>  		s5p_mfc_set_enc_params_h263(ctx);
>  	else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
>  		s5p_mfc_set_enc_params_vp8(ctx);
> +	else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
> +		s5p_mfc_set_enc_params_hevc(ctx);
>  	else {
>  		mfc_err("Unknown codec for encoding (%x).\n",
>  			ctx->codec_mode);
> @@ -2301,6 +2485,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
>  	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
>  	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
>  
> +	/* encoder registers */
> +	R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
> +	R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
> +	R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
> +	R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
> +	R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
> +	R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
> +	R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
> +	R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
> +
>  done:
>  	return &mfc_regs;
>  #undef S5P_MFC_REG_ADDR
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> index 2290f7e..8a7d053 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> @@ -46,6 +46,14 @@
>  #define ENC_MPEG4_VOP_TIME_RES_MAX	((1 << 16) - 1)
>  #define FRAME_DELTA_H264_H263		1
>  #define TIGHT_CBR_MAX			10
> +#define ENC_HEVC_RC_FRAME_RATE_MAX	((1 << 16) - 1)
> +#define ENC_HEVC_QP_INDEX_MIN		-12
> +#define ENC_HEVC_QP_INDEX_MAX		12
> +#define ENC_HEVC_LOOP_FILTER_MIN	-12
> +#define ENC_HEVC_LOOP_FILTER_MAX	12
> +#define ENC_HEVC_LEVEL_MAX		62
> +
> +#define FRAME_DELTA_DEFAULT		1
>  
>  struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
>  const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);

[Patch v3 10/11] [media] s5p-mfc: Add support for HEVC encoder

[Andrzej Hajda]

On 31.03.2017 11:06, Smitha T Murthy wrote:
> Add HEVC encoder support and necessary registers, V4L2 CIDs,
> and hevc encoder parameters
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
>  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
>  drivers/media/platform/s5p-mfc/s5p_mfc.c        |   1 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  57 ++-
>  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    | 595 ++++++++++++++++++++++++
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |   8 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 194 ++++++++
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
>  8 files changed, 892 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 6754477..7065b9d 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -20,13 +20,35 @@
>  #define S5P_FIMV_MFC_STATE_V10				0x7124
>  #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
>  #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
> +#define S5P_FIMV_E_NUM_T_LAYER_V10			0xFBAC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10		0xFBB0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10		0xFBB4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10		0xFBB8
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10		0xFBBC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10		0xFBC0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10		0xFBC4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10		0xFBC8
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10	0xFD18
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10	0xFD1C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10	0xFD20
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10	0xFD24
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10	0xFD28
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10	0xFD2C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10	0xFD30
> +#define S5P_FIMV_E_HEVC_OPTIONS_V10			0xFDD4
> +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10		0xFDD8
> +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10		0xFDDC
> +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10		0xFDE0
> +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10		0xFDE4
> +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10			0xFDE8
>  
>  /* MFCv10 Context buffer sizes */
>  #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
>  #define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
>  #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
>  #define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
> -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
> +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10	(30 * SZ_1K)
> +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
>  
>  /* MFCv10 variant defines */
>  #define MAX_FW_SIZE_V10		(SZ_1M)
> @@ -58,5 +80,9 @@
>  #define ENC_V100_VP8_ME_SIZE(x, y) \
>  	ENC_V100_BASE_SIZE(x, y)
>  
> +#define ENC_V100_HEVC_ME_SIZE(x, y)	\
> +	(((x + 3) * (y + 3) * 32)	\
> +	 + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> +
>  #endif /*_REGS_MFC_V10_H*/
>  
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> index 399c547..b3862d1 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> @@ -1554,6 +1554,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
>  	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
>  	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
>  	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> +	.hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
>  	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
>  };
>  
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> index 102b47e..7521fce 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
>  	case S5P_MFC_CODEC_VP8_ENC:
>  		codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_ENC:
> +		codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> +		break;
>  	default:
>  		codec_type = S5P_FIMV_CODEC_NONE_V6;
>  	}
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> index 4082079..ad06e45 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> @@ -68,7 +68,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
>  #define MFC_ENC_CAP_PLANE_COUNT	1
>  #define MFC_ENC_OUT_PLANE_COUNT	2
>  #define STUFF_BYTE		4
> -#define MFC_MAX_CTRLS		77
> +#define MFC_MAX_CTRLS		128
>  
>  #define S5P_MFC_CODEC_NONE		-1
>  #define S5P_MFC_CODEC_H264_DEC		0
> @@ -87,6 +87,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
>  #define S5P_MFC_CODEC_MPEG4_ENC		22
>  #define S5P_MFC_CODEC_H263_ENC		23
>  #define S5P_MFC_CODEC_VP8_ENC		24
> +#define S5P_MFC_CODEC_HEVC_ENC		26
>  
>  #define S5P_MFC_R2H_CMD_EMPTY			0
>  #define S5P_MFC_R2H_CMD_SYS_INIT_RET		1
> @@ -222,6 +223,7 @@ struct s5p_mfc_buf_size_v6 {
>  	unsigned int h264_dec_ctx;
>  	unsigned int other_dec_ctx;
>  	unsigned int h264_enc_ctx;
> +	unsigned int hevc_enc_ctx;
>  	unsigned int other_enc_ctx;
>  };
>  
> @@ -440,6 +442,58 @@ struct s5p_mfc_vp8_enc_params {
>  	u8 profile;
>  };
>  
> +struct s5p_mfc_hevc_enc_params {
> +	enum v4l2_mpeg_video_hevc_profile profile;
> +	u8 level;
> +	enum v4l2_mpeg_video_h264_level level_v4l2;
> +	u8 tier_flag;
> +	/* HEVC Only */

spare comment

> +	u32 rc_framerate;
> +	u8 rc_min_qp;
> +	u8 rc_max_qp;
> +	u8 rc_lcu_dark;
> +	u8 rc_lcu_smooth;
> +	u8 rc_lcu_static;
> +	u8 rc_lcu_activity;
> +	u8 rc_frame_qp;
> +	u8 rc_p_frame_qp;
> +	u8 rc_b_frame_qp;
> +	u8 max_partition_depth;
> +	u8 num_refs_for_p;
> +	u8 refreshtype;
> +	u16 refreshperiod;
> +	s32 lf_beta_offset_div2;
> +	s32 lf_tc_offset_div2;
> +	u8 loopfilter_disable;
> +	u8 loopfilter_across;
> +	u8 nal_control_length_filed;
> +	u8 nal_control_user_ref;
> +	u8 nal_control_store_ref;
> +	u8 const_intra_period_enable;
> +	u8 lossless_cu_enable;
> +	u8 wavefront_enable;
> +	u8 enable_ltr;
> +	u8 hier_qp_enable;
> +	enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> +	u8 hier_ref_type;
> +	u8 num_hier_layer;
> +	u8 hier_qp_layer[7];
> +	u32 hier_bit_layer[7];
> +	u8 sign_data_hiding;
> +	u8 general_pb_enable;
> +	u8 temporal_id_enable;
> +	u8 strong_intra_smooth;
> +	u8 intra_pu_split_disable;
> +	u8 tmv_prediction_disable;
> +	u8 max_num_merge_mv;
> +	u8 eco_mode_enable;
> +	u8 encoding_nostartcode_enable;
> +	u8 size_of_length_field;
> +	u8 use_ref;
> +	u8 store_ref;
> +	u8 prepend_sps_pps_to_idr;
> +};
> +
>  /**
>   * struct s5p_mfc_enc_params - general encoding parameters
>   */
> @@ -477,6 +531,7 @@ struct s5p_mfc_enc_params {
>  		struct s5p_mfc_h264_enc_params h264;
>  		struct s5p_mfc_mpeg4_enc_params mpeg4;
>  		struct s5p_mfc_vp8_enc_params vp8;
> +		struct s5p_mfc_hevc_enc_params hevc;
>  	} codec;
>  
>  };
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> index 57a40c0..f13e60b 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
>  		.num_planes	= 1,
>  		.versions	= MFC_V7PLUS_BITS,
>  	},
> +	{
> +		.name		= "HEVC Encoded Stream",
> +		.fourcc		= V4L2_PIX_FMT_HEVC,
> +		.codec_mode	= S5P_FIMV_CODEC_HEVC_ENC,
> +		.type		= MFC_FMT_ENC,
> +		.num_planes	= 1,
> +		.versions	= MFC_V10_BIT,
> +	},
>  };
>  
>  #define NUM_FORMATS ARRAY_SIZE(formats)
> @@ -693,6 +701,420 @@ static struct mfc_control controls[] = {
>  		.default_value = 0,
>  	},
>  	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC I Frame QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC P frame QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC B frame QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Minimum QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Maximum QP value",
> +		.minimum = 0,
> +		.maximum = 51,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC dark reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC smooth reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC static reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC activity reg adaptive rc",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC Profile",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC level",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC tier_flag",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,

I am not sure if I said it already explicitly but tier fits more to menu
control.
It is the same category as profile, level,... And there are two tiers:
Main and High.

> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Frame rate resolution",
> +		.minimum = 1,
> +		.maximum = (1 << 16) - 1,
> +		.step = 1,
> +		.default_value = 1,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Maximum coding unit depth",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Number of reference picture",
> +		.minimum = 1,
> +		.maximum = 2,
> +		.step = 1,
> +		.default_value = 1,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC Refresh type",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Constant intra prediction",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC lossless encoding",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Wavefront",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Loop Filter",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC LF across slice boundary",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC QP values",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC Hierarchical Coding Type",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Coding Layer",
> +		.minimum = 0,
> +		.maximum = 6,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Layer QP",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Lay 0 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Lay 1 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC Hierarchical Lay 2 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 3 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 4 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 5 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Lay 6 Bit Rate",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Hierarchical Coding Layer Change",
> +		.minimum = INT_MIN,
> +		.maximum = INT_MAX,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Sign data hiding",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC General PB",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Temporal id",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC Strong intra smoothing",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC intra pu split",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "HEVC tmv prediction",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "max number of candidate MVs",
> +		.minimum = 0,
> +		.maximum = 4,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> +		.name = "ENC without startcode",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC num of I frame b/w 2 IDR",
> +		.minimum = 0,
> +		.maximum = (1 << 16) - 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC loop filter beta offset",
> +		.minimum = -6,
> +		.maximum = 6,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "HEVC loop filter tc offset",
> +		.minimum = -6,
> +		.maximum = 6,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> +		.type = V4L2_CTRL_TYPE_MENU,
> +		.name = "HEVC size of length field",
> +		.minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> +		.maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> +		.step = 1,
> +		.default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> +	},
> +	{
> +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> +		.type = V4L2_CTRL_TYPE_INTEGER,
> +		.name = "Prepend SPS/PPS to IDR",
> +		.minimum = 0,
> +		.maximum = 1,
> +		.step = 1,
> +		.default_value = 0,
> +	},
> +	{
>  		.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
>  		.type = V4L2_CTRL_TYPE_INTEGER,
>  		.name = "Minimum number of output bufs",
> @@ -1359,6 +1781,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
>  	return t[lvl];
>  }
>  
> +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> +{
> +	static unsigned int t[V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 + 1] = {
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_1    */ 10,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2    */ 20,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1  */ 21,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3    */ 30,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1  */ 31,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4    */ 40,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1  */ 41,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5    */ 50,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1  */ 51,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2  */ 52,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6    */ 60,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1  */ 61,
> +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2  */ 62,

Don't provide array size - compiler knows it already, and use array
initializers - it will be safer:
 

static unsigned int t[] = {
	[V4L2_MPEG_VIDEO_HEVC_LEVEL_1] = 10,
	...
};


> +	};
> +	return t[lvl];
> +}
> +
>  static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
>  {
>  	static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> @@ -1635,6 +2077,159 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
>  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
>  		p->codec.vp8.profile = ctrl->val;
>  		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> +		p->codec.hevc.rc_frame_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> +		p->codec.hevc.rc_p_frame_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> +		p->codec.hevc.rc_b_frame_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> +		p->codec.hevc.rc_framerate = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> +		p->codec.hevc.rc_min_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> +		p->codec.hevc.rc_max_qp = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> +		p->codec.hevc.level_v4l2 = ctrl->val;
> +		p->codec.hevc.level = hevc_level(ctrl->val);
> +		if (p->codec.hevc.level < 0) {
> +			mfc_err("Level number is wrong\n");
> +			ret = p->codec.hevc.level;
> +		}

With proper control constrains (min,max) checking value is not necessary.

> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> +		switch (ctrl->val) {
> +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> +			ctrl->val = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> +			break;
> +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> +			ctrl->val =
> +			V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> +			break;
> +		default:
> +			ret = -EINVAL;
> +		}

What is this? I guess you wanted to write sth to p->codec.hevc.profile .


> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:
> +		p->codec.hevc.rc_lcu_dark = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:
> +		p->codec.hevc.rc_lcu_smooth = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:
> +		p->codec.hevc.rc_lcu_static = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:
> +		p->codec.hevc.rc_lcu_activity = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> +		p->codec.hevc.tier_flag = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> +		p->codec.hevc.max_partition_depth = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> +		p->codec.hevc.num_refs_for_p = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> +		p->codec.hevc.refreshtype = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> +		p->codec.hevc.const_intra_period_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> +		p->codec.hevc.lossless_cu_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> +		p->codec.hevc.wavefront_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> +		p->codec.hevc.loopfilter_disable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> +		p->codec.hevc.loopfilter_across = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:
> +		p->codec.hevc.hier_qp_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> +		p->codec.hevc.hier_qp_type =
> +			(enum v4l2_mpeg_video_hevc_hier_coding_type)(ctrl->val);

No need to cast.

> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:
> +		p->codec.hevc.num_hier_layer = ctrl->val & 0x7;

No need to "& 0x7";

> +		p->codec.hevc.hier_ref_type = 0;

hier_ref_type is always zero, what is the point of its existence?

Regards
Andrzej

> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:
> +		p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> +					= ctrl->val & 0xFF;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:
> +		p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:
> +		p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:
> +		p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:
> +		p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:
> +		p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:
> +		p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:
> +		p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:
> +		p->codec.hevc.sign_data_hiding = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> +		p->codec.hevc.general_pb_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> +		p->codec.hevc.temporal_id_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> +		p->codec.hevc.strong_intra_smooth = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> +		p->codec.hevc.intra_pu_split_disable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> +		p->codec.hevc.tmv_prediction_disable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> +		p->codec.hevc.max_num_merge_mv = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> +		p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> +		p->codec.hevc.refreshperiod = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> +		p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> +		p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> +		p->codec.hevc.size_of_length_field = ctrl->val;
> +		break;
> +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> +		p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> +		break;
>  	default:
>  		v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
>  							ctrl->id, ctrl->val);
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> index 565decf..7751272 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> @@ -272,6 +272,14 @@ struct s5p_mfc_regs {
>  	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
>  	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
>  	void __iomem *e_min_scratch_buffer_size; /* v10 */
> +	void __iomem *e_num_t_layer; /* v10 */
> +	void __iomem *e_hier_qp_layer0; /* v10 */
> +	void __iomem *e_hier_bit_rate_layer0; /* v10 */
> +	void __iomem *e_hevc_options; /* v10 */
> +	void __iomem *e_hevc_refresh_period; /* v10 */
> +	void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
> +	void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
> +	void __iomem *e_hevc_nal_control; /* v10 */
>  };
>  
>  struct s5p_mfc_hw_ops {
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> index ae5b871..dc62e0b 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> @@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>  			ctx->chroma_dpb_size + ctx->me_buffer_size));
>  		ctx->bank2.size = 0;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_ENC:
> +		mfc_debug(2, "Use min scratch buffer size\n");
> +		ctx->me_buffer_size =
> +			ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
> +		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
> +		ctx->bank1.size =
> +			ctx->scratch_buf_size + ctx->tmv_buffer_size +
> +			(ctx->pb_count * (ctx->luma_dpb_size +
> +			ctx->chroma_dpb_size + ctx->me_buffer_size));
> +		ctx->bank2.size = 0;
> +		break;
>  	default:
>  		break;
>  	}
> @@ -349,6 +360,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
>  	case S5P_MFC_CODEC_H264_ENC:
>  		ctx->ctx.size = buf_size->h264_enc_ctx;
>  		break;
> +	case S5P_MFC_CODEC_HEVC_ENC:
> +		ctx->ctx.size = buf_size->hevc_enc_ctx;
> +		break;
>  	case S5P_MFC_CODEC_MPEG4_ENC:
>  	case S5P_MFC_CODEC_H263_ENC:
>  	case S5P_MFC_CODEC_VP8_ENC:
> @@ -1429,6 +1443,174 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
>  	return 0;
>  }
>  
> +static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
> +{
> +	struct s5p_mfc_dev *dev = ctx->dev;
> +	const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
> +	struct s5p_mfc_enc_params *p = &ctx->enc_params;
> +	struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
> +	unsigned int reg = 0;
> +	int i;
> +
> +	mfc_debug_enter();
> +
> +	s5p_mfc_set_enc_params(ctx);
> +
> +	/* pictype : number of B */
> +	reg = readl(mfc_regs->e_gop_config);
> +	/* num_b_frame - 0 ~ 2 */
> +	reg &= ~(0x3 << 16);
> +	reg |= (p->num_b_frame << 16);
> +	writel(reg, mfc_regs->e_gop_config);
> +
> +	/* UHD encoding case */
> +	if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
> +		p_hevc->level = 51;
> +		p_hevc->tier_flag = 0;
> +	/* this tier_flag can be changed */
> +	}
> +
> +	/* tier_flag & level */
> +	reg = 0;
> +	/* profile */
> +	reg |= p_hevc->profile & 0x3;
> +	/* level */
> +	reg &= ~(0xFF << 8);
> +	reg |= (p_hevc->level << 8);
> +	/* tier_flag - 0 ~ 1 */
> +	reg |= (p_hevc->tier_flag << 16);
> +	writel(reg, mfc_regs->e_picture_profile);
> +
> +	/* max partition depth */
> +	reg = 0;
> +	reg |= (p_hevc->max_partition_depth & 0x1);
> +	reg |= (p_hevc->num_refs_for_p-1) << 2;
> +	reg |= (2 << 3); /* always set IDR encoding */
> +	reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
> +	reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
> +	reg |= (p_hevc->wavefront_enable & 0x1) << 7;
> +	reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
> +	reg |= (p_hevc->loopfilter_across & 0x1) << 9;
> +	reg |= (p_hevc->enable_ltr & 0x1) << 10;
> +	reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
> +	reg |= (p_hevc->sign_data_hiding & 0x1) << 12;
> +	reg |= (p_hevc->general_pb_enable & 0x1) << 13;
> +	reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
> +	reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
> +	reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
> +	reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
> +	reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
> +	reg |= (0 << 21); /* always eco mode disable */
> +	reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 22;
> +	reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
> +
> +	writel(reg, mfc_regs->e_hevc_options);
> +	/* refresh period */
> +	if (p_hevc->refreshtype) {
> +		reg = 0;
> +		reg |= (p_hevc->refreshperiod & 0xFFFF);
> +		writel(reg, mfc_regs->e_hevc_refresh_period);
> +	}
> +	/* loop filter setting */
> +	if (!p_hevc->loopfilter_disable) {
> +		reg = 0;
> +		reg |= (p_hevc->lf_beta_offset_div2);
> +		writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
> +		reg = 0;
> +		reg |= (p_hevc->lf_tc_offset_div2);
> +		writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
> +	}
> +	/* hier qp enable */
> +	if (p_hevc->num_hier_layer) {
> +		reg = 0;
> +		reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
> +		reg |= p_hevc->num_hier_layer & 0x7;
> +		if (p_hevc->hier_ref_type) {
> +			reg |= 0x1 << 7;
> +			reg |= 0x3 << 4;
> +		} else {
> +			reg |= 0x7 << 4;
> +		}
> +		writel(reg, mfc_regs->e_num_t_layer);
> +		/* QP value for each layer */
> +		if (p_hevc->hier_qp_enable) {
> +			for (i = 0; i < 7; i++)
> +				writel(p_hevc->hier_qp_layer[i],
> +					mfc_regs->e_hier_qp_layer0 + i * 4);
> +		}
> +		if (p->rc_frame) {
> +			for (i = 0; i < 7; i++)
> +				writel(p_hevc->hier_bit_layer[i],
> +						mfc_regs->e_hier_bit_rate_layer0
> +						+ i * 4);
> +		}
> +	}
> +
> +	/* rate control config. */
> +	reg = readl(mfc_regs->e_rc_config);
> +	/* macroblock level rate control */
> +	reg &= ~(0x1 << 8);
> +	reg |= (p->rc_mb << 8);
> +	writel(reg, mfc_regs->e_rc_config);
> +	/* frame QP */
> +	reg &= ~(0x3F);
> +	reg |= p_hevc->rc_frame_qp;
> +	writel(reg, mfc_regs->e_rc_config);
> +
> +	/* frame rate */
> +	if (p->rc_frame) {
> +		reg = 0;
> +		reg &= ~(0xffff << 16);
> +		reg |= ((p_hevc->rc_framerate * FRAME_DELTA_DEFAULT) << 16);
> +		reg &= ~(0xffff);
> +		reg |= FRAME_DELTA_DEFAULT;
> +		writel(reg, mfc_regs->e_rc_frame_rate);
> +	}
> +
> +	/* max & min value of QP */
> +	reg = 0;
> +	/* max QP */
> +	reg &= ~(0x3F << 8);
> +	reg |= (p_hevc->rc_max_qp << 8);
> +	/* min QP */
> +	reg &= ~(0x3F);
> +	reg |= p_hevc->rc_min_qp;
> +	writel(reg, mfc_regs->e_rc_qp_bound);
> +
> +	/* macroblock adaptive scaling features */
> +	writel(0x0, mfc_regs->e_mb_rc_config);
> +	if (p->rc_mb) {
> +		reg = 0;
> +		/* dark region */
> +		reg &= ~(0x1 << 3);
> +		reg |= (p_hevc->rc_lcu_dark << 3);
> +		/* smooth region */
> +		reg &= ~(0x1 << 2);
> +		reg |= (p_hevc->rc_lcu_smooth << 2);
> +		/* static region */
> +		reg &= ~(0x1 << 1);
> +		reg |= (p_hevc->rc_lcu_static << 1);
> +		/* high activity region */
> +		reg &= ~(0x1);
> +		reg |= p_hevc->rc_lcu_activity;
> +		writel(reg, mfc_regs->e_mb_rc_config);
> +	}
> +	writel(0x0, mfc_regs->e_fixed_picture_qp);
> +	if (!p->rc_frame && !p->rc_mb) {
> +		reg = 0;
> +		reg &= ~(0x3f << 16);
> +		reg |= (p_hevc->rc_b_frame_qp << 16);
> +		reg &= ~(0x3f << 8);
> +		reg |= (p_hevc->rc_p_frame_qp << 8);
> +		reg &= ~(0x3f);
> +		reg |= p_hevc->rc_frame_qp;
> +		writel(reg, mfc_regs->e_fixed_picture_qp);
> +	}
> +	mfc_debug_leave();
> +
> +	return 0;
> +}
> +
>  /* Initialize decoding */
>  static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
>  {
> @@ -1548,6 +1730,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
>  		s5p_mfc_set_enc_params_h263(ctx);
>  	else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
>  		s5p_mfc_set_enc_params_vp8(ctx);
> +	else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
> +		s5p_mfc_set_enc_params_hevc(ctx);
>  	else {
>  		mfc_err("Unknown codec for encoding (%x).\n",
>  			ctx->codec_mode);
> @@ -2301,6 +2485,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
>  	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
>  	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
>  
> +	/* encoder registers */
> +	R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
> +	R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
> +	R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
> +	R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
> +	R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
> +	R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
> +	R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
> +	R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
> +
>  done:
>  	return &mfc_regs;
>  #undef S5P_MFC_REG_ADDR
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> index 2290f7e..8a7d053 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> @@ -46,6 +46,14 @@
>  #define ENC_MPEG4_VOP_TIME_RES_MAX	((1 << 16) - 1)
>  #define FRAME_DELTA_H264_H263		1
>  #define TIGHT_CBR_MAX			10
> +#define ENC_HEVC_RC_FRAME_RATE_MAX	((1 << 16) - 1)
> +#define ENC_HEVC_QP_INDEX_MIN		-12
> +#define ENC_HEVC_QP_INDEX_MAX		12
> +#define ENC_HEVC_LOOP_FILTER_MIN	-12
> +#define ENC_HEVC_LOOP_FILTER_MAX	12
> +#define ENC_HEVC_LEVEL_MAX		62
> +
> +#define FRAME_DELTA_DEFAULT		1
>  
>  struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
>  const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);

Re: [Patch v3 10/11] [media] s5p-mfc: Add support for HEVC encoder

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:59 +0200, Andrzej Hajda wrote:
> On 31.03.2017 11:06, Smitha T Murthy wrote:
> > Add HEVC encoder support and necessary registers, V4L2 CIDs,
> > and hevc encoder parameters
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> >  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
> >  drivers/media/platform/s5p-mfc/s5p_mfc.c        |   1 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  57 ++-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    | 595 ++++++++++++++++++++++++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |   8 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 194 ++++++++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
> >  8 files changed, 892 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 6754477..7065b9d 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -20,13 +20,35 @@
> >  #define S5P_FIMV_MFC_STATE_V10				0x7124
> >  #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
> >  #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
> > +#define S5P_FIMV_E_NUM_T_LAYER_V10			0xFBAC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10		0xFBB0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10		0xFBB4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10		0xFBB8
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10		0xFBBC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10		0xFBC0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10		0xFBC4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10		0xFBC8
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10	0xFD18
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10	0xFD1C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10	0xFD20
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10	0xFD24
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10	0xFD28
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10	0xFD2C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10	0xFD30
> > +#define S5P_FIMV_E_HEVC_OPTIONS_V10			0xFDD4
> > +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10		0xFDD8
> > +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10		0xFDDC
> > +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10		0xFDE0
> > +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10		0xFDE4
> > +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10			0xFDE8
> >  
> >  /* MFCv10 Context buffer sizes */
> >  #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
> >  #define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
> >  #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
> >  #define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
> > -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
> > +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10	(30 * SZ_1K)
> > +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
> >  
> >  /* MFCv10 variant defines */
> >  #define MAX_FW_SIZE_V10		(SZ_1M)
> > @@ -58,5 +80,9 @@
> >  #define ENC_V100_VP8_ME_SIZE(x, y) \
> >  	ENC_V100_BASE_SIZE(x, y)
> >  
> > +#define ENC_V100_HEVC_ME_SIZE(x, y)	\
> > +	(((x + 3) * (y + 3) * 32)	\
> > +	 + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> > +
> >  #endif /*_REGS_MFC_V10_H*/
> >  
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > index 399c547..b3862d1 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > @@ -1554,6 +1554,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
> >  	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
> >  	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
> >  	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> > +	.hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
> >  	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
> >  };
> >  
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > index 102b47e..7521fce 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> >  	case S5P_MFC_CODEC_VP8_ENC:
> >  		codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_ENC:
> > +		codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> > +		break;
> >  	default:
> >  		codec_type = S5P_FIMV_CODEC_NONE_V6;
> >  	}
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > index 4082079..ad06e45 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > @@ -68,7 +68,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
> >  #define MFC_ENC_CAP_PLANE_COUNT	1
> >  #define MFC_ENC_OUT_PLANE_COUNT	2
> >  #define STUFF_BYTE		4
> > -#define MFC_MAX_CTRLS		77
> > +#define MFC_MAX_CTRLS		128
> >  
> >  #define S5P_MFC_CODEC_NONE		-1
> >  #define S5P_MFC_CODEC_H264_DEC		0
> > @@ -87,6 +87,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
> >  #define S5P_MFC_CODEC_MPEG4_ENC		22
> >  #define S5P_MFC_CODEC_H263_ENC		23
> >  #define S5P_MFC_CODEC_VP8_ENC		24
> > +#define S5P_MFC_CODEC_HEVC_ENC		26
> >  
> >  #define S5P_MFC_R2H_CMD_EMPTY			0
> >  #define S5P_MFC_R2H_CMD_SYS_INIT_RET		1
> > @@ -222,6 +223,7 @@ struct s5p_mfc_buf_size_v6 {
> >  	unsigned int h264_dec_ctx;
> >  	unsigned int other_dec_ctx;
> >  	unsigned int h264_enc_ctx;
> > +	unsigned int hevc_enc_ctx;
> >  	unsigned int other_enc_ctx;
> >  };
> >  
> > @@ -440,6 +442,58 @@ struct s5p_mfc_vp8_enc_params {
> >  	u8 profile;
> >  };
> >  
> > +struct s5p_mfc_hevc_enc_params {
> > +	enum v4l2_mpeg_video_hevc_profile profile;
> > +	u8 level;
> > +	enum v4l2_mpeg_video_h264_level level_v4l2;
> > +	u8 tier_flag;
> > +	/* HEVC Only */
> 
> spare comment
> 
Ok I will remove it.

> > +	u32 rc_framerate;
> > +	u8 rc_min_qp;
> > +	u8 rc_max_qp;
> > +	u8 rc_lcu_dark;
> > +	u8 rc_lcu_smooth;
> > +	u8 rc_lcu_static;
> > +	u8 rc_lcu_activity;
> > +	u8 rc_frame_qp;
> > +	u8 rc_p_frame_qp;
> > +	u8 rc_b_frame_qp;
> > +	u8 max_partition_depth;
> > +	u8 num_refs_for_p;
> > +	u8 refreshtype;
> > +	u16 refreshperiod;
> > +	s32 lf_beta_offset_div2;
> > +	s32 lf_tc_offset_div2;
> > +	u8 loopfilter_disable;
> > +	u8 loopfilter_across;
> > +	u8 nal_control_length_filed;
> > +	u8 nal_control_user_ref;
> > +	u8 nal_control_store_ref;
> > +	u8 const_intra_period_enable;
> > +	u8 lossless_cu_enable;
> > +	u8 wavefront_enable;
> > +	u8 enable_ltr;
> > +	u8 hier_qp_enable;
> > +	enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> > +	u8 hier_ref_type;
> > +	u8 num_hier_layer;
> > +	u8 hier_qp_layer[7];
> > +	u32 hier_bit_layer[7];
> > +	u8 sign_data_hiding;
> > +	u8 general_pb_enable;
> > +	u8 temporal_id_enable;
> > +	u8 strong_intra_smooth;
> > +	u8 intra_pu_split_disable;
> > +	u8 tmv_prediction_disable;
> > +	u8 max_num_merge_mv;
> > +	u8 eco_mode_enable;
> > +	u8 encoding_nostartcode_enable;
> > +	u8 size_of_length_field;
> > +	u8 use_ref;
> > +	u8 store_ref;
> > +	u8 prepend_sps_pps_to_idr;
> > +};
> > +
> >  /**
> >   * struct s5p_mfc_enc_params - general encoding parameters
> >   */
> > @@ -477,6 +531,7 @@ struct s5p_mfc_enc_params {
> >  		struct s5p_mfc_h264_enc_params h264;
> >  		struct s5p_mfc_mpeg4_enc_params mpeg4;
> >  		struct s5p_mfc_vp8_enc_params vp8;
> > +		struct s5p_mfc_hevc_enc_params hevc;
> >  	} codec;
> >  
> >  };
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > index 57a40c0..f13e60b 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
> >  		.num_planes	= 1,
> >  		.versions	= MFC_V7PLUS_BITS,
> >  	},
> > +	{
> > +		.name		= "HEVC Encoded Stream",
> > +		.fourcc		= V4L2_PIX_FMT_HEVC,
> > +		.codec_mode	= S5P_FIMV_CODEC_HEVC_ENC,
> > +		.type		= MFC_FMT_ENC,
> > +		.num_planes	= 1,
> > +		.versions	= MFC_V10_BIT,
> > +	},
> >  };
> >  
> >  #define NUM_FORMATS ARRAY_SIZE(formats)
> > @@ -693,6 +701,420 @@ static struct mfc_control controls[] = {
> >  		.default_value = 0,
> >  	},
> >  	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC I Frame QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC P frame QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC B frame QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Minimum QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Maximum QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC dark reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC smooth reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC static reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC activity reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC Profile",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC level",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC tier_flag",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> 
> I am not sure if I said it already explicitly but tier fits more to menu
> control.
> It is the same category as profile, level,... And there are two tiers:
> Main and High.
> 
Sorry I missed this. I will add the menu control for this in the next
version of patches.

> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Frame rate resolution",
> > +		.minimum = 1,
> > +		.maximum = (1 << 16) - 1,
> > +		.step = 1,
> > +		.default_value = 1,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Maximum coding unit depth",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Number of reference picture",
> > +		.minimum = 1,
> > +		.maximum = 2,
> > +		.step = 1,
> > +		.default_value = 1,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC Refresh type",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Constant intra prediction",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC lossless encoding",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Wavefront",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Loop Filter",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC LF across slice boundary",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC QP values",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC Hierarchical Coding Type",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Coding Layer",
> > +		.minimum = 0,
> > +		.maximum = 6,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Layer QP",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Lay 0 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Lay 1 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Lay 2 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 3 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 4 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 5 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 6 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Coding Layer Change",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Sign data hiding",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC General PB",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Temporal id",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Strong intra smoothing",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC intra pu split",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC tmv prediction",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "max number of candidate MVs",
> > +		.minimum = 0,
> > +		.maximum = 4,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "ENC without startcode",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC num of I frame b/w 2 IDR",
> > +		.minimum = 0,
> > +		.maximum = (1 << 16) - 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC loop filter beta offset",
> > +		.minimum = -6,
> > +		.maximum = 6,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC loop filter tc offset",
> > +		.minimum = -6,
> > +		.maximum = 6,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC size of length field",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Prepend SPS/PPS to IDR",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> >  		.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
> >  		.type = V4L2_CTRL_TYPE_INTEGER,
> >  		.name = "Minimum number of output bufs",
> > @@ -1359,6 +1781,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
> >  	return t[lvl];
> >  }
> >  
> > +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> > +{
> > +	static unsigned int t[V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 + 1] = {
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_1    */ 10,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2    */ 20,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1  */ 21,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3    */ 30,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1  */ 31,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4    */ 40,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1  */ 41,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5    */ 50,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1  */ 51,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2  */ 52,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6    */ 60,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1  */ 61,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2  */ 62,
> 
> Don't provide array size - compiler knows it already, and use array
> initializers - it will be safer:
>  
> 
> static unsigned int t[] = {
> 	[V4L2_MPEG_VIDEO_HEVC_LEVEL_1] = 10,
> 	...
> };
> 
> 
Ok I will correct this.

> > +	};
> > +	return t[lvl];
> > +}
> > +
> >  static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
> >  {
> >  	static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> > @@ -1635,6 +2077,159 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
> >  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
> >  		p->codec.vp8.profile = ctrl->val;
> >  		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> > +		p->codec.hevc.rc_frame_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> > +		p->codec.hevc.rc_p_frame_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> > +		p->codec.hevc.rc_b_frame_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> > +		p->codec.hevc.rc_framerate = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> > +		p->codec.hevc.rc_min_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> > +		p->codec.hevc.rc_max_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > +		p->codec.hevc.level_v4l2 = ctrl->val;
> > +		p->codec.hevc.level = hevc_level(ctrl->val);
> > +		if (p->codec.hevc.level < 0) {
> > +			mfc_err("Level number is wrong\n");
> > +			ret = p->codec.hevc.level;
> > +		}
> 
> With proper control constrains (min,max) checking value is not necessary.
> 
Ok I will remove this.

> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > +		switch (ctrl->val) {
> > +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> > +			ctrl->val = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> > +			break;
> > +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> > +			ctrl->val =
> > +			V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> > +			break;
> > +		default:
> > +			ret = -EINVAL;
> > +		}
> 
> What is this? I guess you wanted to write sth to p->codec.hevc.profile .
> 
> 
Sorry yes I meant to write p->codec.hevc.profile. I will correct this.

> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:
> > +		p->codec.hevc.rc_lcu_dark = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:
> > +		p->codec.hevc.rc_lcu_smooth = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:
> > +		p->codec.hevc.rc_lcu_static = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:
> > +		p->codec.hevc.rc_lcu_activity = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > +		p->codec.hevc.tier_flag = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> > +		p->codec.hevc.max_partition_depth = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> > +		p->codec.hevc.num_refs_for_p = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > +		p->codec.hevc.refreshtype = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> > +		p->codec.hevc.const_intra_period_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> > +		p->codec.hevc.lossless_cu_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> > +		p->codec.hevc.wavefront_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> > +		p->codec.hevc.loopfilter_disable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> > +		p->codec.hevc.loopfilter_across = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:
> > +		p->codec.hevc.hier_qp_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> > +		p->codec.hevc.hier_qp_type =
> > +			(enum v4l2_mpeg_video_hevc_hier_coding_type)(ctrl->val);
> 
> No need to cast.
> 
Ok I will remove this.
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:
> > +		p->codec.hevc.num_hier_layer = ctrl->val & 0x7;
> 
> No need to "& 0x7";
> 
Ok I will remove this.
> > +		p->codec.hevc.hier_ref_type = 0;
> 
> hier_ref_type is always zero, what is the point of its existence?
> 
> Regards
> Andrzej
> 
I will this also.

Thank you for the review.
Regards,
Smitha
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:
> > +		p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> > +					= ctrl->val & 0xFF;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:
> > +		p->codec.hevc.sign_data_hiding = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> > +		p->codec.hevc.general_pb_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> > +		p->codec.hevc.temporal_id_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> > +		p->codec.hevc.strong_intra_smooth = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> > +		p->codec.hevc.intra_pu_split_disable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> > +		p->codec.hevc.tmv_prediction_disable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> > +		p->codec.hevc.max_num_merge_mv = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> > +		p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> > +		p->codec.hevc.refreshperiod = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> > +		p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> > +		p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > +		p->codec.hevc.size_of_length_field = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> > +		p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> > +		break;
> >  	default:
> >  		v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
> >  							ctrl->id, ctrl->val);
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> > index 565decf..7751272 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> > @@ -272,6 +272,14 @@ struct s5p_mfc_regs {
> >  	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
> >  	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
> >  	void __iomem *e_min_scratch_buffer_size; /* v10 */
> > +	void __iomem *e_num_t_layer; /* v10 */
> > +	void __iomem *e_hier_qp_layer0; /* v10 */
> > +	void __iomem *e_hier_bit_rate_layer0; /* v10 */
> > +	void __iomem *e_hevc_options; /* v10 */
> > +	void __iomem *e_hevc_refresh_period; /* v10 */
> > +	void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
> > +	void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
> > +	void __iomem *e_hevc_nal_control; /* v10 */
> >  };
> >  
> >  struct s5p_mfc_hw_ops {
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > index ae5b871..dc62e0b 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > @@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> >  			ctx->chroma_dpb_size + ctx->me_buffer_size));
> >  		ctx->bank2.size = 0;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_ENC:
> > +		mfc_debug(2, "Use min scratch buffer size\n");
> > +		ctx->me_buffer_size =
> > +			ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
> > +		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
> > +		ctx->bank1.size =
> > +			ctx->scratch_buf_size + ctx->tmv_buffer_size +
> > +			(ctx->pb_count * (ctx->luma_dpb_size +
> > +			ctx->chroma_dpb_size + ctx->me_buffer_size));
> > +		ctx->bank2.size = 0;
> > +		break;
> >  	default:
> >  		break;
> >  	}
> > @@ -349,6 +360,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
> >  	case S5P_MFC_CODEC_H264_ENC:
> >  		ctx->ctx.size = buf_size->h264_enc_ctx;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_ENC:
> > +		ctx->ctx.size = buf_size->hevc_enc_ctx;
> > +		break;
> >  	case S5P_MFC_CODEC_MPEG4_ENC:
> >  	case S5P_MFC_CODEC_H263_ENC:
> >  	case S5P_MFC_CODEC_VP8_ENC:
> > @@ -1429,6 +1443,174 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
> >  	return 0;
> >  }
> >  
> > +static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
> > +{
> > +	struct s5p_mfc_dev *dev = ctx->dev;
> > +	const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
> > +	struct s5p_mfc_enc_params *p = &ctx->enc_params;
> > +	struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
> > +	unsigned int reg = 0;
> > +	int i;
> > +
> > +	mfc_debug_enter();
> > +
> > +	s5p_mfc_set_enc_params(ctx);
> > +
> > +	/* pictype : number of B */
> > +	reg = readl(mfc_regs->e_gop_config);
> > +	/* num_b_frame - 0 ~ 2 */
> > +	reg &= ~(0x3 << 16);
> > +	reg |= (p->num_b_frame << 16);
> > +	writel(reg, mfc_regs->e_gop_config);
> > +
> > +	/* UHD encoding case */
> > +	if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
> > +		p_hevc->level = 51;
> > +		p_hevc->tier_flag = 0;
> > +	/* this tier_flag can be changed */
> > +	}
> > +
> > +	/* tier_flag & level */
> > +	reg = 0;
> > +	/* profile */
> > +	reg |= p_hevc->profile & 0x3;
> > +	/* level */
> > +	reg &= ~(0xFF << 8);
> > +	reg |= (p_hevc->level << 8);
> > +	/* tier_flag - 0 ~ 1 */
> > +	reg |= (p_hevc->tier_flag << 16);
> > +	writel(reg, mfc_regs->e_picture_profile);
> > +
> > +	/* max partition depth */
> > +	reg = 0;
> > +	reg |= (p_hevc->max_partition_depth & 0x1);
> > +	reg |= (p_hevc->num_refs_for_p-1) << 2;
> > +	reg |= (2 << 3); /* always set IDR encoding */
> > +	reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
> > +	reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
> > +	reg |= (p_hevc->wavefront_enable & 0x1) << 7;
> > +	reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
> > +	reg |= (p_hevc->loopfilter_across & 0x1) << 9;
> > +	reg |= (p_hevc->enable_ltr & 0x1) << 10;
> > +	reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
> > +	reg |= (p_hevc->sign_data_hiding & 0x1) << 12;
> > +	reg |= (p_hevc->general_pb_enable & 0x1) << 13;
> > +	reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
> > +	reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
> > +	reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
> > +	reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
> > +	reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
> > +	reg |= (0 << 21); /* always eco mode disable */
> > +	reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 22;
> > +	reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
> > +
> > +	writel(reg, mfc_regs->e_hevc_options);
> > +	/* refresh period */
> > +	if (p_hevc->refreshtype) {
> > +		reg = 0;
> > +		reg |= (p_hevc->refreshperiod & 0xFFFF);
> > +		writel(reg, mfc_regs->e_hevc_refresh_period);
> > +	}
> > +	/* loop filter setting */
> > +	if (!p_hevc->loopfilter_disable) {
> > +		reg = 0;
> > +		reg |= (p_hevc->lf_beta_offset_div2);
> > +		writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
> > +		reg = 0;
> > +		reg |= (p_hevc->lf_tc_offset_div2);
> > +		writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
> > +	}
> > +	/* hier qp enable */
> > +	if (p_hevc->num_hier_layer) {
> > +		reg = 0;
> > +		reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
> > +		reg |= p_hevc->num_hier_layer & 0x7;
> > +		if (p_hevc->hier_ref_type) {
> > +			reg |= 0x1 << 7;
> > +			reg |= 0x3 << 4;
> > +		} else {
> > +			reg |= 0x7 << 4;
> > +		}
> > +		writel(reg, mfc_regs->e_num_t_layer);
> > +		/* QP value for each layer */
> > +		if (p_hevc->hier_qp_enable) {
> > +			for (i = 0; i < 7; i++)
> > +				writel(p_hevc->hier_qp_layer[i],
> > +					mfc_regs->e_hier_qp_layer0 + i * 4);
> > +		}
> > +		if (p->rc_frame) {
> > +			for (i = 0; i < 7; i++)
> > +				writel(p_hevc->hier_bit_layer[i],
> > +						mfc_regs->e_hier_bit_rate_layer0
> > +						+ i * 4);
> > +		}
> > +	}
> > +
> > +	/* rate control config. */
> > +	reg = readl(mfc_regs->e_rc_config);
> > +	/* macroblock level rate control */
> > +	reg &= ~(0x1 << 8);
> > +	reg |= (p->rc_mb << 8);
> > +	writel(reg, mfc_regs->e_rc_config);
> > +	/* frame QP */
> > +	reg &= ~(0x3F);
> > +	reg |= p_hevc->rc_frame_qp;
> > +	writel(reg, mfc_regs->e_rc_config);
> > +
> > +	/* frame rate */
> > +	if (p->rc_frame) {
> > +		reg = 0;
> > +		reg &= ~(0xffff << 16);
> > +		reg |= ((p_hevc->rc_framerate * FRAME_DELTA_DEFAULT) << 16);
> > +		reg &= ~(0xffff);
> > +		reg |= FRAME_DELTA_DEFAULT;
> > +		writel(reg, mfc_regs->e_rc_frame_rate);
> > +	}
> > +
> > +	/* max & min value of QP */
> > +	reg = 0;
> > +	/* max QP */
> > +	reg &= ~(0x3F << 8);
> > +	reg |= (p_hevc->rc_max_qp << 8);
> > +	/* min QP */
> > +	reg &= ~(0x3F);
> > +	reg |= p_hevc->rc_min_qp;
> > +	writel(reg, mfc_regs->e_rc_qp_bound);
> > +
> > +	/* macroblock adaptive scaling features */
> > +	writel(0x0, mfc_regs->e_mb_rc_config);
> > +	if (p->rc_mb) {
> > +		reg = 0;
> > +		/* dark region */
> > +		reg &= ~(0x1 << 3);
> > +		reg |= (p_hevc->rc_lcu_dark << 3);
> > +		/* smooth region */
> > +		reg &= ~(0x1 << 2);
> > +		reg |= (p_hevc->rc_lcu_smooth << 2);
> > +		/* static region */
> > +		reg &= ~(0x1 << 1);
> > +		reg |= (p_hevc->rc_lcu_static << 1);
> > +		/* high activity region */
> > +		reg &= ~(0x1);
> > +		reg |= p_hevc->rc_lcu_activity;
> > +		writel(reg, mfc_regs->e_mb_rc_config);
> > +	}
> > +	writel(0x0, mfc_regs->e_fixed_picture_qp);
> > +	if (!p->rc_frame && !p->rc_mb) {
> > +		reg = 0;
> > +		reg &= ~(0x3f << 16);
> > +		reg |= (p_hevc->rc_b_frame_qp << 16);
> > +		reg &= ~(0x3f << 8);
> > +		reg |= (p_hevc->rc_p_frame_qp << 8);
> > +		reg &= ~(0x3f);
> > +		reg |= p_hevc->rc_frame_qp;
> > +		writel(reg, mfc_regs->e_fixed_picture_qp);
> > +	}
> > +	mfc_debug_leave();
> > +
> > +	return 0;
> > +}
> > +
> >  /* Initialize decoding */
> >  static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
> >  {
> > @@ -1548,6 +1730,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
> >  		s5p_mfc_set_enc_params_h263(ctx);
> >  	else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
> >  		s5p_mfc_set_enc_params_vp8(ctx);
> > +	else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
> > +		s5p_mfc_set_enc_params_hevc(ctx);
> >  	else {
> >  		mfc_err("Unknown codec for encoding (%x).\n",
> >  			ctx->codec_mode);
> > @@ -2301,6 +2485,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
> >  	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
> >  	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
> >  
> > +	/* encoder registers */
> > +	R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
> > +	R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
> > +	R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
> > +	R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
> > +	R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
> > +	R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
> > +	R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
> > +	R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
> > +
> >  done:
> >  	return &mfc_regs;
> >  #undef S5P_MFC_REG_ADDR
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > index 2290f7e..8a7d053 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > @@ -46,6 +46,14 @@
> >  #define ENC_MPEG4_VOP_TIME_RES_MAX	((1 << 16) - 1)
> >  #define FRAME_DELTA_H264_H263		1
> >  #define TIGHT_CBR_MAX			10
> > +#define ENC_HEVC_RC_FRAME_RATE_MAX	((1 << 16) - 1)
> > +#define ENC_HEVC_QP_INDEX_MIN		-12
> > +#define ENC_HEVC_QP_INDEX_MAX		12
> > +#define ENC_HEVC_LOOP_FILTER_MIN	-12
> > +#define ENC_HEVC_LOOP_FILTER_MAX	12
> > +#define ENC_HEVC_LEVEL_MAX		62
> > +
> > +#define FRAME_DELTA_DEFAULT		1
> >  
> >  struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
> >  const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);
> 
> 
> 

[Patch v3 10/11] [media] s5p-mfc: Add support for HEVC encoder

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:59 +0200, Andrzej Hajda wrote:
> On 31.03.2017 11:06, Smitha T Murthy wrote:
> > Add HEVC encoder support and necessary registers, V4L2 CIDs,
> > and hevc encoder parameters
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> >  drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
> >  drivers/media/platform/s5p-mfc/s5p_mfc.c        |   1 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  57 ++-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c    | 595 ++++++++++++++++++++++++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h    |   8 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 194 ++++++++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
> >  8 files changed, 892 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 6754477..7065b9d 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -20,13 +20,35 @@
> >  #define S5P_FIMV_MFC_STATE_V10				0x7124
> >  #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10		0xF570
> >  #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10		0xF574
> > +#define S5P_FIMV_E_NUM_T_LAYER_V10			0xFBAC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10		0xFBB0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10		0xFBB4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10		0xFBB8
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10		0xFBBC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10		0xFBC0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10		0xFBC4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10		0xFBC8
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10	0xFD18
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10	0xFD1C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10	0xFD20
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10	0xFD24
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10	0xFD28
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10	0xFD2C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10	0xFD30
> > +#define S5P_FIMV_E_HEVC_OPTIONS_V10			0xFDD4
> > +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10		0xFDD8
> > +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10		0xFDDC
> > +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10		0xFDE0
> > +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10		0xFDE4
> > +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10			0xFDE8
> >  
> >  /* MFCv10 Context buffer sizes */
> >  #define MFC_CTX_BUF_SIZE_V10		(30 * SZ_1K)
> >  #define MFC_H264_DEC_CTX_BUF_SIZE_V10	(2 * SZ_1M)
> >  #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10	(20 * SZ_1K)
> >  #define MFC_H264_ENC_CTX_BUF_SIZE_V10	(100 * SZ_1K)
> > -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10	(15 * SZ_1K)
> > +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10	(30 * SZ_1K)
> > +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
> >  
> >  /* MFCv10 variant defines */
> >  #define MAX_FW_SIZE_V10		(SZ_1M)
> > @@ -58,5 +80,9 @@
> >  #define ENC_V100_VP8_ME_SIZE(x, y) \
> >  	ENC_V100_BASE_SIZE(x, y)
> >  
> > +#define ENC_V100_HEVC_ME_SIZE(x, y)	\
> > +	(((x + 3) * (y + 3) * 32)	\
> > +	 + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> > +
> >  #endif /*_REGS_MFC_V10_H*/
> >  
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > index 399c547..b3862d1 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > @@ -1554,6 +1554,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
> >  	.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
> >  	.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
> >  	.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> > +	.hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
> >  	.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
> >  };
> >  
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > index 102b47e..7521fce 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> >  	case S5P_MFC_CODEC_VP8_ENC:
> >  		codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_ENC:
> > +		codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> > +		break;
> >  	default:
> >  		codec_type = S5P_FIMV_CODEC_NONE_V6;
> >  	}
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > index 4082079..ad06e45 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > @@ -68,7 +68,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
> >  #define MFC_ENC_CAP_PLANE_COUNT	1
> >  #define MFC_ENC_OUT_PLANE_COUNT	2
> >  #define STUFF_BYTE		4
> > -#define MFC_MAX_CTRLS		77
> > +#define MFC_MAX_CTRLS		128
> >  
> >  #define S5P_MFC_CODEC_NONE		-1
> >  #define S5P_MFC_CODEC_H264_DEC		0
> > @@ -87,6 +87,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
> >  #define S5P_MFC_CODEC_MPEG4_ENC		22
> >  #define S5P_MFC_CODEC_H263_ENC		23
> >  #define S5P_MFC_CODEC_VP8_ENC		24
> > +#define S5P_MFC_CODEC_HEVC_ENC		26
> >  
> >  #define S5P_MFC_R2H_CMD_EMPTY			0
> >  #define S5P_MFC_R2H_CMD_SYS_INIT_RET		1
> > @@ -222,6 +223,7 @@ struct s5p_mfc_buf_size_v6 {
> >  	unsigned int h264_dec_ctx;
> >  	unsigned int other_dec_ctx;
> >  	unsigned int h264_enc_ctx;
> > +	unsigned int hevc_enc_ctx;
> >  	unsigned int other_enc_ctx;
> >  };
> >  
> > @@ -440,6 +442,58 @@ struct s5p_mfc_vp8_enc_params {
> >  	u8 profile;
> >  };
> >  
> > +struct s5p_mfc_hevc_enc_params {
> > +	enum v4l2_mpeg_video_hevc_profile profile;
> > +	u8 level;
> > +	enum v4l2_mpeg_video_h264_level level_v4l2;
> > +	u8 tier_flag;
> > +	/* HEVC Only */
> 
> spare comment
> 
Ok I will remove it.

> > +	u32 rc_framerate;
> > +	u8 rc_min_qp;
> > +	u8 rc_max_qp;
> > +	u8 rc_lcu_dark;
> > +	u8 rc_lcu_smooth;
> > +	u8 rc_lcu_static;
> > +	u8 rc_lcu_activity;
> > +	u8 rc_frame_qp;
> > +	u8 rc_p_frame_qp;
> > +	u8 rc_b_frame_qp;
> > +	u8 max_partition_depth;
> > +	u8 num_refs_for_p;
> > +	u8 refreshtype;
> > +	u16 refreshperiod;
> > +	s32 lf_beta_offset_div2;
> > +	s32 lf_tc_offset_div2;
> > +	u8 loopfilter_disable;
> > +	u8 loopfilter_across;
> > +	u8 nal_control_length_filed;
> > +	u8 nal_control_user_ref;
> > +	u8 nal_control_store_ref;
> > +	u8 const_intra_period_enable;
> > +	u8 lossless_cu_enable;
> > +	u8 wavefront_enable;
> > +	u8 enable_ltr;
> > +	u8 hier_qp_enable;
> > +	enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> > +	u8 hier_ref_type;
> > +	u8 num_hier_layer;
> > +	u8 hier_qp_layer[7];
> > +	u32 hier_bit_layer[7];
> > +	u8 sign_data_hiding;
> > +	u8 general_pb_enable;
> > +	u8 temporal_id_enable;
> > +	u8 strong_intra_smooth;
> > +	u8 intra_pu_split_disable;
> > +	u8 tmv_prediction_disable;
> > +	u8 max_num_merge_mv;
> > +	u8 eco_mode_enable;
> > +	u8 encoding_nostartcode_enable;
> > +	u8 size_of_length_field;
> > +	u8 use_ref;
> > +	u8 store_ref;
> > +	u8 prepend_sps_pps_to_idr;
> > +};
> > +
> >  /**
> >   * struct s5p_mfc_enc_params - general encoding parameters
> >   */
> > @@ -477,6 +531,7 @@ struct s5p_mfc_enc_params {
> >  		struct s5p_mfc_h264_enc_params h264;
> >  		struct s5p_mfc_mpeg4_enc_params mpeg4;
> >  		struct s5p_mfc_vp8_enc_params vp8;
> > +		struct s5p_mfc_hevc_enc_params hevc;
> >  	} codec;
> >  
> >  };
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > index 57a40c0..f13e60b 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
> >  		.num_planes	= 1,
> >  		.versions	= MFC_V7PLUS_BITS,
> >  	},
> > +	{
> > +		.name		= "HEVC Encoded Stream",
> > +		.fourcc		= V4L2_PIX_FMT_HEVC,
> > +		.codec_mode	= S5P_FIMV_CODEC_HEVC_ENC,
> > +		.type		= MFC_FMT_ENC,
> > +		.num_planes	= 1,
> > +		.versions	= MFC_V10_BIT,
> > +	},
> >  };
> >  
> >  #define NUM_FORMATS ARRAY_SIZE(formats)
> > @@ -693,6 +701,420 @@ static struct mfc_control controls[] = {
> >  		.default_value = 0,
> >  	},
> >  	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC I Frame QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC P frame QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC B frame QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Minimum QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Maximum QP value",
> > +		.minimum = 0,
> > +		.maximum = 51,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC dark reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC smooth reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC static reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC activity reg adaptive rc",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC Profile",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC level",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC tier_flag",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> 
> I am not sure if I said it already explicitly but tier fits more to menu
> control.
> It is the same category as profile, level,... And there are two tiers:
> Main and High.
> 
Sorry I missed this. I will add the menu control for this in the next
version of patches.

> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Frame rate resolution",
> > +		.minimum = 1,
> > +		.maximum = (1 << 16) - 1,
> > +		.step = 1,
> > +		.default_value = 1,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Maximum coding unit depth",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Number of reference picture",
> > +		.minimum = 1,
> > +		.maximum = 2,
> > +		.step = 1,
> > +		.default_value = 1,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC Refresh type",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Constant intra prediction",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC lossless encoding",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Wavefront",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Loop Filter",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC LF across slice boundary",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC QP values",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC Hierarchical Coding Type",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Coding Layer",
> > +		.minimum = 0,
> > +		.maximum = 6,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Layer QP",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Lay 0 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Lay 1 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC Hierarchical Lay 2 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 3 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 4 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 5 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Lay 6 Bit Rate",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Hierarchical Coding Layer Change",
> > +		.minimum = INT_MIN,
> > +		.maximum = INT_MAX,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Sign data hiding",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC General PB",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Temporal id",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC Strong intra smoothing",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC intra pu split",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "HEVC tmv prediction",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "max number of candidate MVs",
> > +		.minimum = 0,
> > +		.maximum = 4,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> > +		.type = V4L2_CTRL_TYPE_BOOLEAN,
> > +		.name = "ENC without startcode",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC num of I frame b/w 2 IDR",
> > +		.minimum = 0,
> > +		.maximum = (1 << 16) - 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC loop filter beta offset",
> > +		.minimum = -6,
> > +		.maximum = 6,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "HEVC loop filter tc offset",
> > +		.minimum = -6,
> > +		.maximum = 6,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> > +		.type = V4L2_CTRL_TYPE_MENU,
> > +		.name = "HEVC size of length field",
> > +		.minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > +		.maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> > +		.step = 1,
> > +		.default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > +	},
> > +	{
> > +		.id = V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> > +		.type = V4L2_CTRL_TYPE_INTEGER,
> > +		.name = "Prepend SPS/PPS to IDR",
> > +		.minimum = 0,
> > +		.maximum = 1,
> > +		.step = 1,
> > +		.default_value = 0,
> > +	},
> > +	{
> >  		.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
> >  		.type = V4L2_CTRL_TYPE_INTEGER,
> >  		.name = "Minimum number of output bufs",
> > @@ -1359,6 +1781,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
> >  	return t[lvl];
> >  }
> >  
> > +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> > +{
> > +	static unsigned int t[V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 + 1] = {
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_1    */ 10,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2    */ 20,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1  */ 21,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3    */ 30,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1  */ 31,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4    */ 40,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1  */ 41,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5    */ 50,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1  */ 51,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2  */ 52,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6    */ 60,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1  */ 61,
> > +		/* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2  */ 62,
> 
> Don't provide array size - compiler knows it already, and use array
> initializers - it will be safer:
>  
> 
> static unsigned int t[] = {
> 	[V4L2_MPEG_VIDEO_HEVC_LEVEL_1] = 10,
> 	...
> };
> 
> 
Ok I will correct this.

> > +	};
> > +	return t[lvl];
> > +}
> > +
> >  static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
> >  {
> >  	static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> > @@ -1635,6 +2077,159 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
> >  	case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
> >  		p->codec.vp8.profile = ctrl->val;
> >  		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> > +		p->codec.hevc.rc_frame_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> > +		p->codec.hevc.rc_p_frame_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> > +		p->codec.hevc.rc_b_frame_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> > +		p->codec.hevc.rc_framerate = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> > +		p->codec.hevc.rc_min_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> > +		p->codec.hevc.rc_max_qp = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > +		p->codec.hevc.level_v4l2 = ctrl->val;
> > +		p->codec.hevc.level = hevc_level(ctrl->val);
> > +		if (p->codec.hevc.level < 0) {
> > +			mfc_err("Level number is wrong\n");
> > +			ret = p->codec.hevc.level;
> > +		}
> 
> With proper control constrains (min,max) checking value is not necessary.
> 
Ok I will remove this.

> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > +		switch (ctrl->val) {
> > +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> > +			ctrl->val = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> > +			break;
> > +		case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> > +			ctrl->val =
> > +			V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> > +			break;
> > +		default:
> > +			ret = -EINVAL;
> > +		}
> 
> What is this? I guess you wanted to write sth to p->codec.hevc.profile .
> 
> 
Sorry yes I meant to write p->codec.hevc.profile. I will correct this.

> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK:
> > +		p->codec.hevc.rc_lcu_dark = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH:
> > +		p->codec.hevc.rc_lcu_smooth = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC:
> > +		p->codec.hevc.rc_lcu_static = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY:
> > +		p->codec.hevc.rc_lcu_activity = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > +		p->codec.hevc.tier_flag = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> > +		p->codec.hevc.max_partition_depth = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> > +		p->codec.hevc.num_refs_for_p = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > +		p->codec.hevc.refreshtype = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> > +		p->codec.hevc.const_intra_period_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> > +		p->codec.hevc.lossless_cu_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> > +		p->codec.hevc.wavefront_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> > +		p->codec.hevc.loopfilter_disable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> > +		p->codec.hevc.loopfilter_across = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP:
> > +		p->codec.hevc.hier_qp_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE:
> > +		p->codec.hevc.hier_qp_type =
> > +			(enum v4l2_mpeg_video_hevc_hier_coding_type)(ctrl->val);
> 
> No need to cast.
> 
Ok I will remove this.
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:
> > +		p->codec.hevc.num_hier_layer = ctrl->val & 0x7;
> 
> No need to "& 0x7";
> 
Ok I will remove this.
> > +		p->codec.hevc.hier_ref_type = 0;
> 
> hier_ref_type is always zero, what is the point of its existence?
> 
> Regards
> Andrzej
> 
I will this also.

Thank you for the review.
Regards,
Smitha
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:
> > +		p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> > +					= ctrl->val & 0xFF;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE:
> > +		p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING:
> > +		p->codec.hevc.sign_data_hiding = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> > +		p->codec.hevc.general_pb_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> > +		p->codec.hevc.temporal_id_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> > +		p->codec.hevc.strong_intra_smooth = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> > +		p->codec.hevc.intra_pu_split_disable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> > +		p->codec.hevc.tmv_prediction_disable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> > +		p->codec.hevc.max_num_merge_mv = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> > +		p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> > +		p->codec.hevc.refreshperiod = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> > +		p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> > +		p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > +		p->codec.hevc.size_of_length_field = ctrl->val;
> > +		break;
> > +	case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> > +		p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> > +		break;
> >  	default:
> >  		v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
> >  							ctrl->id, ctrl->val);
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> > index 565decf..7751272 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
> > @@ -272,6 +272,14 @@ struct s5p_mfc_regs {
> >  	void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
> >  	void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
> >  	void __iomem *e_min_scratch_buffer_size; /* v10 */
> > +	void __iomem *e_num_t_layer; /* v10 */
> > +	void __iomem *e_hier_qp_layer0; /* v10 */
> > +	void __iomem *e_hier_bit_rate_layer0; /* v10 */
> > +	void __iomem *e_hevc_options; /* v10 */
> > +	void __iomem *e_hevc_refresh_period; /* v10 */
> > +	void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
> > +	void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
> > +	void __iomem *e_hevc_nal_control; /* v10 */
> >  };
> >  
> >  struct s5p_mfc_hw_ops {
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > index ae5b871..dc62e0b 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > @@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> >  			ctx->chroma_dpb_size + ctx->me_buffer_size));
> >  		ctx->bank2.size = 0;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_ENC:
> > +		mfc_debug(2, "Use min scratch buffer size\n");
> > +		ctx->me_buffer_size =
> > +			ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
> > +		ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
> > +		ctx->bank1.size =
> > +			ctx->scratch_buf_size + ctx->tmv_buffer_size +
> > +			(ctx->pb_count * (ctx->luma_dpb_size +
> > +			ctx->chroma_dpb_size + ctx->me_buffer_size));
> > +		ctx->bank2.size = 0;
> > +		break;
> >  	default:
> >  		break;
> >  	}
> > @@ -349,6 +360,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
> >  	case S5P_MFC_CODEC_H264_ENC:
> >  		ctx->ctx.size = buf_size->h264_enc_ctx;
> >  		break;
> > +	case S5P_MFC_CODEC_HEVC_ENC:
> > +		ctx->ctx.size = buf_size->hevc_enc_ctx;
> > +		break;
> >  	case S5P_MFC_CODEC_MPEG4_ENC:
> >  	case S5P_MFC_CODEC_H263_ENC:
> >  	case S5P_MFC_CODEC_VP8_ENC:
> > @@ -1429,6 +1443,174 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
> >  	return 0;
> >  }
> >  
> > +static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
> > +{
> > +	struct s5p_mfc_dev *dev = ctx->dev;
> > +	const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
> > +	struct s5p_mfc_enc_params *p = &ctx->enc_params;
> > +	struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
> > +	unsigned int reg = 0;
> > +	int i;
> > +
> > +	mfc_debug_enter();
> > +
> > +	s5p_mfc_set_enc_params(ctx);
> > +
> > +	/* pictype : number of B */
> > +	reg = readl(mfc_regs->e_gop_config);
> > +	/* num_b_frame - 0 ~ 2 */
> > +	reg &= ~(0x3 << 16);
> > +	reg |= (p->num_b_frame << 16);
> > +	writel(reg, mfc_regs->e_gop_config);
> > +
> > +	/* UHD encoding case */
> > +	if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
> > +		p_hevc->level = 51;
> > +		p_hevc->tier_flag = 0;
> > +	/* this tier_flag can be changed */
> > +	}
> > +
> > +	/* tier_flag & level */
> > +	reg = 0;
> > +	/* profile */
> > +	reg |= p_hevc->profile & 0x3;
> > +	/* level */
> > +	reg &= ~(0xFF << 8);
> > +	reg |= (p_hevc->level << 8);
> > +	/* tier_flag - 0 ~ 1 */
> > +	reg |= (p_hevc->tier_flag << 16);
> > +	writel(reg, mfc_regs->e_picture_profile);
> > +
> > +	/* max partition depth */
> > +	reg = 0;
> > +	reg |= (p_hevc->max_partition_depth & 0x1);
> > +	reg |= (p_hevc->num_refs_for_p-1) << 2;
> > +	reg |= (2 << 3); /* always set IDR encoding */
> > +	reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
> > +	reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
> > +	reg |= (p_hevc->wavefront_enable & 0x1) << 7;
> > +	reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
> > +	reg |= (p_hevc->loopfilter_across & 0x1) << 9;
> > +	reg |= (p_hevc->enable_ltr & 0x1) << 10;
> > +	reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
> > +	reg |= (p_hevc->sign_data_hiding & 0x1) << 12;
> > +	reg |= (p_hevc->general_pb_enable & 0x1) << 13;
> > +	reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
> > +	reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
> > +	reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
> > +	reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
> > +	reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
> > +	reg |= (0 << 21); /* always eco mode disable */
> > +	reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 22;
> > +	reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
> > +
> > +	writel(reg, mfc_regs->e_hevc_options);
> > +	/* refresh period */
> > +	if (p_hevc->refreshtype) {
> > +		reg = 0;
> > +		reg |= (p_hevc->refreshperiod & 0xFFFF);
> > +		writel(reg, mfc_regs->e_hevc_refresh_period);
> > +	}
> > +	/* loop filter setting */
> > +	if (!p_hevc->loopfilter_disable) {
> > +		reg = 0;
> > +		reg |= (p_hevc->lf_beta_offset_div2);
> > +		writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
> > +		reg = 0;
> > +		reg |= (p_hevc->lf_tc_offset_div2);
> > +		writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
> > +	}
> > +	/* hier qp enable */
> > +	if (p_hevc->num_hier_layer) {
> > +		reg = 0;
> > +		reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
> > +		reg |= p_hevc->num_hier_layer & 0x7;
> > +		if (p_hevc->hier_ref_type) {
> > +			reg |= 0x1 << 7;
> > +			reg |= 0x3 << 4;
> > +		} else {
> > +			reg |= 0x7 << 4;
> > +		}
> > +		writel(reg, mfc_regs->e_num_t_layer);
> > +		/* QP value for each layer */
> > +		if (p_hevc->hier_qp_enable) {
> > +			for (i = 0; i < 7; i++)
> > +				writel(p_hevc->hier_qp_layer[i],
> > +					mfc_regs->e_hier_qp_layer0 + i * 4);
> > +		}
> > +		if (p->rc_frame) {
> > +			for (i = 0; i < 7; i++)
> > +				writel(p_hevc->hier_bit_layer[i],
> > +						mfc_regs->e_hier_bit_rate_layer0
> > +						+ i * 4);
> > +		}
> > +	}
> > +
> > +	/* rate control config. */
> > +	reg = readl(mfc_regs->e_rc_config);
> > +	/* macroblock level rate control */
> > +	reg &= ~(0x1 << 8);
> > +	reg |= (p->rc_mb << 8);
> > +	writel(reg, mfc_regs->e_rc_config);
> > +	/* frame QP */
> > +	reg &= ~(0x3F);
> > +	reg |= p_hevc->rc_frame_qp;
> > +	writel(reg, mfc_regs->e_rc_config);
> > +
> > +	/* frame rate */
> > +	if (p->rc_frame) {
> > +		reg = 0;
> > +		reg &= ~(0xffff << 16);
> > +		reg |= ((p_hevc->rc_framerate * FRAME_DELTA_DEFAULT) << 16);
> > +		reg &= ~(0xffff);
> > +		reg |= FRAME_DELTA_DEFAULT;
> > +		writel(reg, mfc_regs->e_rc_frame_rate);
> > +	}
> > +
> > +	/* max & min value of QP */
> > +	reg = 0;
> > +	/* max QP */
> > +	reg &= ~(0x3F << 8);
> > +	reg |= (p_hevc->rc_max_qp << 8);
> > +	/* min QP */
> > +	reg &= ~(0x3F);
> > +	reg |= p_hevc->rc_min_qp;
> > +	writel(reg, mfc_regs->e_rc_qp_bound);
> > +
> > +	/* macroblock adaptive scaling features */
> > +	writel(0x0, mfc_regs->e_mb_rc_config);
> > +	if (p->rc_mb) {
> > +		reg = 0;
> > +		/* dark region */
> > +		reg &= ~(0x1 << 3);
> > +		reg |= (p_hevc->rc_lcu_dark << 3);
> > +		/* smooth region */
> > +		reg &= ~(0x1 << 2);
> > +		reg |= (p_hevc->rc_lcu_smooth << 2);
> > +		/* static region */
> > +		reg &= ~(0x1 << 1);
> > +		reg |= (p_hevc->rc_lcu_static << 1);
> > +		/* high activity region */
> > +		reg &= ~(0x1);
> > +		reg |= p_hevc->rc_lcu_activity;
> > +		writel(reg, mfc_regs->e_mb_rc_config);
> > +	}
> > +	writel(0x0, mfc_regs->e_fixed_picture_qp);
> > +	if (!p->rc_frame && !p->rc_mb) {
> > +		reg = 0;
> > +		reg &= ~(0x3f << 16);
> > +		reg |= (p_hevc->rc_b_frame_qp << 16);
> > +		reg &= ~(0x3f << 8);
> > +		reg |= (p_hevc->rc_p_frame_qp << 8);
> > +		reg &= ~(0x3f);
> > +		reg |= p_hevc->rc_frame_qp;
> > +		writel(reg, mfc_regs->e_fixed_picture_qp);
> > +	}
> > +	mfc_debug_leave();
> > +
> > +	return 0;
> > +}
> > +
> >  /* Initialize decoding */
> >  static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
> >  {
> > @@ -1548,6 +1730,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
> >  		s5p_mfc_set_enc_params_h263(ctx);
> >  	else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
> >  		s5p_mfc_set_enc_params_vp8(ctx);
> > +	else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
> > +		s5p_mfc_set_enc_params_hevc(ctx);
> >  	else {
> >  		mfc_err("Unknown codec for encoding (%x).\n",
> >  			ctx->codec_mode);
> > @@ -2301,6 +2485,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
> >  	R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
> >  	R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
> >  
> > +	/* encoder registers */
> > +	R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
> > +	R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
> > +	R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
> > +	R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
> > +	R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
> > +	R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
> > +	R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
> > +	R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
> > +
> >  done:
> >  	return &mfc_regs;
> >  #undef S5P_MFC_REG_ADDR
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > index 2290f7e..8a7d053 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > @@ -46,6 +46,14 @@
> >  #define ENC_MPEG4_VOP_TIME_RES_MAX	((1 << 16) - 1)
> >  #define FRAME_DELTA_H264_H263		1
> >  #define TIGHT_CBR_MAX			10
> > +#define ENC_HEVC_RC_FRAME_RATE_MAX	((1 << 16) - 1)
> > +#define ENC_HEVC_QP_INDEX_MIN		-12
> > +#define ENC_HEVC_QP_INDEX_MAX		12
> > +#define ENC_HEVC_LOOP_FILTER_MIN	-12
> > +#define ENC_HEVC_LOOP_FILTER_MAX	12
> > +#define ENC_HEVC_LEVEL_MAX		62
> > +
> > +#define FRAME_DELTA_DEFAULT		1
> >  
> >  struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
> >  const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);
> 
> 
> 

[Patch v3 11/11] Documention: v4l: Documentation for HEVC CIDs

[Smitha T Murthy]

Added V4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
 Documentation/media/uapi/v4l/extended-controls.rst | 355 +++++++++++++++++++++
 1 file changed, 355 insertions(+)

diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
index abb1057..c2f3c5e 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -1960,6 +1960,361 @@ enum v4l2_vp8_golden_frame_sel -
     1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
 
 
+HEVC Control Reference
+---------------------
+
+The HEVC controls include controls for encoding parameters of HEVC video
+codec.
+
+
+.. _hevc-control-id:
+
+HEVC Control IDs
+^^^^^^^^^^^^^^^
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP``
+    Minimum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP``
+    Maximum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP``
+    Quantization parameter for an I frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP``
+    Quantization parameter for a P frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP``
+    Quantization parameter for a B frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP``
+    HIERARCHICAL_QP allows host to specify the quantization parameter values
+    for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
+    if HIERARCHICAL_CODING_LAYER is greater than 1.
+
+.. _v4l2-hevc-hierarchical-coding-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_hier_coding_type -
+    Selects the hierarchical coding type for encoding. Possible values are:
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+    :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
+      - Use the B frame for hierarchical coding.
+    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
+      - Use the P frame for hierarchical coding.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER``
+    Selects the hierarchical coding layer. In normal encoding
+    (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
+    0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
+    LAYER 1 and so on.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP``
+    Indicates the hierarchical coding layer quantization parameter.
+    For HEVC it can have a value of 0-51. Hence in the control value passed
+    the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
+    will pass the layer(0-6) it is meant for.
+
+.. _v4l2-hevc-profile:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_profile -
+    Select the desired profile for HEVC encoder.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+    :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
+      - Main profile.
+    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
+      - Main still picture profile.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+.. _v4l2-hevc-level:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_level -
+    Select the desired level for HEVC encoder.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+       :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
+      - Level 1.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
+      - Level 2.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
+      - Level 2.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
+      - Level 3.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
+      - Level 3.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
+      - Level 4.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
+      - Level 4.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
+      - Level 5.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
+      - Level 5.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
+      - Level 5.2
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
+      - Level 6.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
+      - Level 6.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
+      - Level 6.2
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION``
+    Indicates the number of evenly spaced subintervals, called ticks, within
+    one modulo time. One modulo time represents the fixed interval of one
+    second. This is a 16bit unsigned integer and has a maximum value upto
+    0xffff.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
+    TIER_FLAG specifies tier information of the HEVC encoded picture. Tier were
+    made to deal with applications that differ in terms of maximum bit rate.
+    Setting the flag to 0 selects HEVC tier_flag as Main tier and setting this
+    flag to 1 indicates High tier. High tier is for very demanding applications
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH``
+    Selects HEVC maximum coding unit depth.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES``
+    Selects number of P reference picture required for HEVC encoder.
+    P-Frame can use 1 or 2 frames for reference.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF``
+    Indicates loop filtering. Control ID 0 indicates loop filtering
+    is enabled and when set to 1 indicates no filter.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY``
+    Selects whether to apply the loop filter across the slice boundary or not.
+    If the value is 0, loop filter will not be applied across the slice boundary.
+    If the value is 1, loop filter will be applied across the slice boundary.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2``
+    Selects HEVC loop filter beta offset. The valid range is [-6, +6].
+    This could be a negative value in the 2's complement expression.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2``
+    Selects HEVC loop filter tc offset. The valid range is [-6, +6].
+    This could be a negative value in the 2's complement expression.
+
+.. _v4l2-hevc-refresh-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_hier_refresh_type -
+    Selects refresh type for HEVC encoder.
+    Host has to specify the period into
+    HEVC_REFRESH_PERIOD.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+    :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
+      - Use the B frame for hierarchical coding.
+    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
+      - Use CRA(Clean Random Access Unit) picture encoding.
+    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
+      - Use IDR picture encoding.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD``
+    Selects the refresh period for HEVC encoder.
+    This specifies the number of I picture between two CRA/IDR pictures.
+    This is valid only if REFRESH_TYPE is not 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU``
+    Indicates HEVC lossless encoding. Setting it to 0 disables lossless
+    encoding. Setting it to 1 enables lossless encoding.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED``
+    Indicates constant intra prediction for HEVC encoder. Specifies the
+    constrained intra prediction in which intra largest coding unit(LCU)
+    prediction is performed by using residual data and decoded samples of
+    neighboring intra LCU only. Setting it to 1 enables this control ID and
+    setting it to 0 disables the control ID.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT``
+    Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
+    disables the control ID and setting it to 1 enables the wavefront parallel
+    processing.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING``
+    Setting it to 1 indicates sign data hiding for HEVC encoder. Setting it to
+    0 disables the control ID.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB``
+    Setting the control ID to 1 enables general picture buffers for HEVC
+    encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID``
+    Indicates temporal identifier specified as temporal_id in
+    nal_unit_header_svc_extension() for HEVC encoder which is enabled by
+    setting the control ID to 1.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING``
+    Indicates bi-linear interpolation is conditionally used in the intra
+    prediction filtering process in the CVS when set to 1. Indicates bi-linear
+    interpolation is not used in the CVS when set to 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1``
+    Indicates max number of merge candidate motion vectors.
+    Values are from zero to four.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK``
+    Indicates HEVC dark region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH``
+    Indicates HEVC smooth region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC``
+    Indicates HEVC static region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY``
+    Indicates HEVC activity region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT``
+    Indicates intra prediction unit split for HEVC Encoder. Setting it to 1
+    disables the feature. Setting it to 1 enables the feature.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION``
+    Indicates temporal motion vector prediction for HEVC encoder. Setting it to
+    0 enables the prediction. Setting it to 1 disables the prediction.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE``
+    Specifies if HEVC generates a stream with a size of length field instead of
+    start code pattern. The size of the length field is configurable among 1,2
+    or 4 thorugh the SIZE_OF_LENGTH_FIELD. It is not applied at SEQ_START.
+    Setting it to 0 disables the control ID. Setting it to 1 will enables
+    the control ID.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR``
+    Indicates the quantization parameter CR index.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB``
+    Indicates the quantization parameter CB index.
+
+.. _v4l2-hevc-size-of-length-field:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
+(enum)
+
+enum v4l2_mpeg_video_hevc_size_of_length_field -
+    Indicates the size of length field.
+    This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+       :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
+      - Generate start code pattern (Normal).
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
+      - Generate size of length field instead of start code pattern and length is 1.
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
+      - Generate size of length field instead of start code pattern and length is 2.
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
+      - Generate size of length field instead of start code pattern and length is 4.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR``
+    Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
+    disables it and setting it to one enables the feature.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH``
+    Indicates hierarchical coding layer change for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE``
+    Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE``
+    Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE``
+    Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE``
+    Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE``
+    Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE``
+    Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE``
+    Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
+
+
 .. _camera-controls:
 
 Camera Control Reference
-- 
2.7.4

[Patch v3 11/11] Documention: v4l: Documentation for HEVC CIDs

[Smitha T Murthy]

Added V4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
 Documentation/media/uapi/v4l/extended-controls.rst | 355 +++++++++++++++++++++
 1 file changed, 355 insertions(+)

diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
index abb1057..c2f3c5e 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -1960,6 +1960,361 @@ enum v4l2_vp8_golden_frame_sel -
     1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
 
 
+HEVC Control Reference
+---------------------
+
+The HEVC controls include controls for encoding parameters of HEVC video
+codec.
+
+
+.. _hevc-control-id:
+
+HEVC Control IDs
+^^^^^^^^^^^^^^^
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP``
+    Minimum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP``
+    Maximum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP``
+    Quantization parameter for an I frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP``
+    Quantization parameter for a P frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP``
+    Quantization parameter for a B frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP``
+    HIERARCHICAL_QP allows host to specify the quantization parameter values
+    for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
+    if HIERARCHICAL_CODING_LAYER is greater than 1.
+
+.. _v4l2-hevc-hierarchical-coding-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_hier_coding_type -
+    Selects the hierarchical coding type for encoding. Possible values are:
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+    :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
+      - Use the B frame for hierarchical coding.
+    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
+      - Use the P frame for hierarchical coding.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER``
+    Selects the hierarchical coding layer. In normal encoding
+    (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
+    0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
+    LAYER 1 and so on.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP``
+    Indicates the hierarchical coding layer quantization parameter.
+    For HEVC it can have a value of 0-51. Hence in the control value passed
+    the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
+    will pass the layer(0-6) it is meant for.
+
+.. _v4l2-hevc-profile:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_profile -
+    Select the desired profile for HEVC encoder.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+    :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
+      - Main profile.
+    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
+      - Main still picture profile.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+.. _v4l2-hevc-level:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_level -
+    Select the desired level for HEVC encoder.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+       :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
+      - Level 1.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
+      - Level 2.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
+      - Level 2.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
+      - Level 3.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
+      - Level 3.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
+      - Level 4.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
+      - Level 4.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
+      - Level 5.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
+      - Level 5.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
+      - Level 5.2
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
+      - Level 6.0
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
+      - Level 6.1
+    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
+      - Level 6.2
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION``
+    Indicates the number of evenly spaced subintervals, called ticks, within
+    one modulo time. One modulo time represents the fixed interval of one
+    second. This is a 16bit unsigned integer and has a maximum value upto
+    0xffff.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
+    TIER_FLAG specifies tier information of the HEVC encoded picture. Tier were
+    made to deal with applications that differ in terms of maximum bit rate.
+    Setting the flag to 0 selects HEVC tier_flag as Main tier and setting this
+    flag to 1 indicates High tier. High tier is for very demanding applications
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH``
+    Selects HEVC maximum coding unit depth.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES``
+    Selects number of P reference picture required for HEVC encoder.
+    P-Frame can use 1 or 2 frames for reference.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF``
+    Indicates loop filtering. Control ID 0 indicates loop filtering
+    is enabled and when set to 1 indicates no filter.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY``
+    Selects whether to apply the loop filter across the slice boundary or not.
+    If the value is 0, loop filter will not be applied across the slice boundary.
+    If the value is 1, loop filter will be applied across the slice boundary.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2``
+    Selects HEVC loop filter beta offset. The valid range is [-6, +6].
+    This could be a negative value in the 2's complement expression.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2``
+    Selects HEVC loop filter tc offset. The valid range is [-6, +6].
+    This could be a negative value in the 2's complement expression.
+
+.. _v4l2-hevc-refresh-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
+    (enum)
+
+enum v4l2_mpeg_video_hevc_hier_refresh_type -
+    Selects refresh type for HEVC encoder.
+    Host has to specify the period into
+    HEVC_REFRESH_PERIOD.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+    :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
+      - Use the B frame for hierarchical coding.
+    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
+      - Use CRA(Clean Random Access Unit) picture encoding.
+    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
+      - Use IDR picture encoding.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD``
+    Selects the refresh period for HEVC encoder.
+    This specifies the number of I picture between two CRA/IDR pictures.
+    This is valid only if REFRESH_TYPE is not 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU``
+    Indicates HEVC lossless encoding. Setting it to 0 disables lossless
+    encoding. Setting it to 1 enables lossless encoding.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED``
+    Indicates constant intra prediction for HEVC encoder. Specifies the
+    constrained intra prediction in which intra largest coding unit(LCU)
+    prediction is performed by using residual data and decoded samples of
+    neighboring intra LCU only. Setting it to 1 enables this control ID and
+    setting it to 0 disables the control ID.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT``
+    Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
+    disables the control ID and setting it to 1 enables the wavefront parallel
+    processing.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING``
+    Setting it to 1 indicates sign data hiding for HEVC encoder. Setting it to
+    0 disables the control ID.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB``
+    Setting the control ID to 1 enables general picture buffers for HEVC
+    encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID``
+    Indicates temporal identifier specified as temporal_id in
+    nal_unit_header_svc_extension() for HEVC encoder which is enabled by
+    setting the control ID to 1.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING``
+    Indicates bi-linear interpolation is conditionally used in the intra
+    prediction filtering process in the CVS when set to 1. Indicates bi-linear
+    interpolation is not used in the CVS when set to 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1``
+    Indicates max number of merge candidate motion vectors.
+    Values are from zero to four.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK``
+    Indicates HEVC dark region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH``
+    Indicates HEVC smooth region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC``
+    Indicates HEVC static region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY``
+    Indicates HEVC activity region adaptive rate control.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT``
+    Indicates intra prediction unit split for HEVC Encoder. Setting it to 1
+    disables the feature. Setting it to 1 enables the feature.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION``
+    Indicates temporal motion vector prediction for HEVC encoder. Setting it to
+    0 enables the prediction. Setting it to 1 disables the prediction.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE``
+    Specifies if HEVC generates a stream with a size of length field instead of
+    start code pattern. The size of the length field is configurable among 1,2
+    or 4 thorugh the SIZE_OF_LENGTH_FIELD. It is not applied at SEQ_START.
+    Setting it to 0 disables the control ID. Setting it to 1 will enables
+    the control ID.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR``
+    Indicates the quantization parameter CR index.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB``
+    Indicates the quantization parameter CB index.
+
+.. _v4l2-hevc-size-of-length-field:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
+(enum)
+
+enum v4l2_mpeg_video_hevc_size_of_length_field -
+    Indicates the size of length field.
+    This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
+
+.. raw:: latex
+
+    \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+       :header-rows:  0
+    :stub-columns: 0
+
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
+      - Generate start code pattern (Normal).
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
+      - Generate size of length field instead of start code pattern and length is 1.
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
+      - Generate size of length field instead of start code pattern and length is 2.
+    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
+      - Generate size of length field instead of start code pattern and length is 4.
+
+.. raw:: latex
+
+    \end{adjustbox}
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR``
+    Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
+    disables it and setting it to one enables the feature.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH``
+    Indicates hierarchical coding layer change for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE``
+    Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE``
+    Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE``
+    Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE``
+    Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE``
+    Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE``
+    Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE``
+    Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
+
+
 .. _camera-controls:
 
 Camera Control Reference
-- 
2.7.4

Re: [Patch v3 11/11] Documention: v4l: Documentation for HEVC CIDs

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
>  Documentation/media/uapi/v4l/extended-controls.rst | 355 +++++++++++++++++++++
>  1 file changed, 355 insertions(+)
> 
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..c2f3c5e 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,361 @@ enum v4l2_vp8_golden_frame_sel -
>      1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>  
>  
> +HEVC Control Reference
> +---------------------
> +
> +The HEVC controls include controls for encoding parameters of HEVC video
> +codec.

A general question: are all these controls directly related to the HEVC specification,
or are there controls that are specific to the exynos HW implementation?

Any exynos specific controls should be split off from the standard controls.

Regards,

	Hans

> +
> +
> +.. _hevc-control-id:
> +
> +HEVC Control IDs
> +^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP``
> +    Minimum quantization parameter for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP``
> +    Maximum quantization parameter for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP``
> +    Quantization parameter for an I frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP``
> +    Quantization parameter for a P frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP``
> +    Quantization parameter for a B frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP``
> +    HIERARCHICAL_QP allows host to specify the quantization parameter values
> +    for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> +    if HIERARCHICAL_CODING_LAYER is greater than 1.
> +
> +.. _v4l2-hevc-hierarchical-coding-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_coding_type -
> +    Selects the hierarchical coding type for encoding. Possible values are:
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +    :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> +      - Use the B frame for hierarchical coding.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> +      - Use the P frame for hierarchical coding.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER``
> +    Selects the hierarchical coding layer. In normal encoding
> +    (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> +    0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> +    LAYER 1 and so on.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP``
> +    Indicates the hierarchical coding layer quantization parameter.
> +    For HEVC it can have a value of 0-51. Hence in the control value passed
> +    the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> +    will pass the layer(0-6) it is meant for.
> +
> +.. _v4l2-hevc-profile:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_profile -
> +    Select the desired profile for HEVC encoder.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +    :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> +      - Main profile.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> +      - Main still picture profile.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +.. _v4l2-hevc-level:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_level -
> +    Select the desired level for HEVC encoder.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +       :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> +      - Level 1.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> +      - Level 2.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> +      - Level 2.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> +      - Level 3.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> +      - Level 3.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> +      - Level 4.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> +      - Level 4.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> +      - Level 5.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> +      - Level 5.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> +      - Level 5.2
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> +      - Level 6.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> +      - Level 6.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> +      - Level 6.2
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION``
> +    Indicates the number of evenly spaced subintervals, called ticks, within
> +    one modulo time. One modulo time represents the fixed interval of one
> +    second. This is a 16bit unsigned integer and has a maximum value upto
> +    0xffff.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> +    TIER_FLAG specifies tier information of the HEVC encoded picture. Tier were
> +    made to deal with applications that differ in terms of maximum bit rate.
> +    Setting the flag to 0 selects HEVC tier_flag as Main tier and setting this
> +    flag to 1 indicates High tier. High tier is for very demanding applications
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH``
> +    Selects HEVC maximum coding unit depth.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES``
> +    Selects number of P reference picture required for HEVC encoder.
> +    P-Frame can use 1 or 2 frames for reference.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF``
> +    Indicates loop filtering. Control ID 0 indicates loop filtering
> +    is enabled and when set to 1 indicates no filter.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY``
> +    Selects whether to apply the loop filter across the slice boundary or not.
> +    If the value is 0, loop filter will not be applied across the slice boundary.
> +    If the value is 1, loop filter will be applied across the slice boundary.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2``
> +    Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> +    This could be a negative value in the 2's complement expression.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2``
> +    Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> +    This could be a negative value in the 2's complement expression.
> +
> +.. _v4l2-hevc-refresh-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> +    Selects refresh type for HEVC encoder.
> +    Host has to specify the period into
> +    HEVC_REFRESH_PERIOD.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +    :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> +      - Use the B frame for hierarchical coding.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> +      - Use CRA(Clean Random Access Unit) picture encoding.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> +      - Use IDR picture encoding.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD``
> +    Selects the refresh period for HEVC encoder.
> +    This specifies the number of I picture between two CRA/IDR pictures.
> +    This is valid only if REFRESH_TYPE is not 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU``
> +    Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> +    encoding. Setting it to 1 enables lossless encoding.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED``
> +    Indicates constant intra prediction for HEVC encoder. Specifies the
> +    constrained intra prediction in which intra largest coding unit(LCU)
> +    prediction is performed by using residual data and decoded samples of
> +    neighboring intra LCU only. Setting it to 1 enables this control ID and
> +    setting it to 0 disables the control ID.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT``
> +    Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> +    disables the control ID and setting it to 1 enables the wavefront parallel
> +    processing.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING``
> +    Setting it to 1 indicates sign data hiding for HEVC encoder. Setting it to
> +    0 disables the control ID.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB``
> +    Setting the control ID to 1 enables general picture buffers for HEVC
> +    encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID``
> +    Indicates temporal identifier specified as temporal_id in
> +    nal_unit_header_svc_extension() for HEVC encoder which is enabled by
> +    setting the control ID to 1.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING``
> +    Indicates bi-linear interpolation is conditionally used in the intra
> +    prediction filtering process in the CVS when set to 1. Indicates bi-linear
> +    interpolation is not used in the CVS when set to 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1``
> +    Indicates max number of merge candidate motion vectors.
> +    Values are from zero to four.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK``
> +    Indicates HEVC dark region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH``
> +    Indicates HEVC smooth region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC``
> +    Indicates HEVC static region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY``
> +    Indicates HEVC activity region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT``
> +    Indicates intra prediction unit split for HEVC Encoder. Setting it to 1
> +    disables the feature. Setting it to 1 enables the feature.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION``
> +    Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> +    0 enables the prediction. Setting it to 1 disables the prediction.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE``
> +    Specifies if HEVC generates a stream with a size of length field instead of
> +    start code pattern. The size of the length field is configurable among 1,2
> +    or 4 thorugh the SIZE_OF_LENGTH_FIELD. It is not applied at SEQ_START.
> +    Setting it to 0 disables the control ID. Setting it to 1 will enables
> +    the control ID.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR``
> +    Indicates the quantization parameter CR index.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB``
> +    Indicates the quantization parameter CB index.
> +
> +.. _v4l2-hevc-size-of-length-field:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> +(enum)
> +
> +enum v4l2_mpeg_video_hevc_size_of_length_field -
> +    Indicates the size of length field.
> +    This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +       :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> +      - Generate start code pattern (Normal).
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> +      - Generate size of length field instead of start code pattern and length is 1.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> +      - Generate size of length field instead of start code pattern and length is 2.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> +      - Generate size of length field instead of start code pattern and length is 4.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR``
> +    Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> +    disables it and setting it to one enables the feature.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH``
> +    Indicates hierarchical coding layer change for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> +
> +
>  .. _camera-controls:
>  
>  Camera Control Reference
> 

[Patch v3 11/11] Documention: v4l: Documentation for HEVC CIDs

[Hans Verkuil]

On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
> 
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
>  Documentation/media/uapi/v4l/extended-controls.rst | 355 +++++++++++++++++++++
>  1 file changed, 355 insertions(+)
> 
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..c2f3c5e 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,361 @@ enum v4l2_vp8_golden_frame_sel -
>      1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>  
>  
> +HEVC Control Reference
> +---------------------
> +
> +The HEVC controls include controls for encoding parameters of HEVC video
> +codec.

A general question: are all these controls directly related to the HEVC specification,
or are there controls that are specific to the exynos HW implementation?

Any exynos specific controls should be split off from the standard controls.

Regards,

	Hans

> +
> +
> +.. _hevc-control-id:
> +
> +HEVC Control IDs
> +^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP``
> +    Minimum quantization parameter for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP``
> +    Maximum quantization parameter for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP``
> +    Quantization parameter for an I frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP``
> +    Quantization parameter for a P frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP``
> +    Quantization parameter for a B frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP``
> +    HIERARCHICAL_QP allows host to specify the quantization parameter values
> +    for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> +    if HIERARCHICAL_CODING_LAYER is greater than 1.
> +
> +.. _v4l2-hevc-hierarchical-coding-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_coding_type -
> +    Selects the hierarchical coding type for encoding. Possible values are:
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +    :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> +      - Use the B frame for hierarchical coding.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> +      - Use the P frame for hierarchical coding.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER``
> +    Selects the hierarchical coding layer. In normal encoding
> +    (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> +    0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> +    LAYER 1 and so on.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP``
> +    Indicates the hierarchical coding layer quantization parameter.
> +    For HEVC it can have a value of 0-51. Hence in the control value passed
> +    the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> +    will pass the layer(0-6) it is meant for.
> +
> +.. _v4l2-hevc-profile:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_profile -
> +    Select the desired profile for HEVC encoder.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +    :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> +      - Main profile.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> +      - Main still picture profile.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +.. _v4l2-hevc-level:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_level -
> +    Select the desired level for HEVC encoder.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +       :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> +      - Level 1.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> +      - Level 2.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> +      - Level 2.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> +      - Level 3.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> +      - Level 3.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> +      - Level 4.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> +      - Level 4.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> +      - Level 5.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> +      - Level 5.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> +      - Level 5.2
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> +      - Level 6.0
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> +      - Level 6.1
> +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> +      - Level 6.2
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION``
> +    Indicates the number of evenly spaced subintervals, called ticks, within
> +    one modulo time. One modulo time represents the fixed interval of one
> +    second. This is a 16bit unsigned integer and has a maximum value upto
> +    0xffff.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> +    TIER_FLAG specifies tier information of the HEVC encoded picture. Tier were
> +    made to deal with applications that differ in terms of maximum bit rate.
> +    Setting the flag to 0 selects HEVC tier_flag as Main tier and setting this
> +    flag to 1 indicates High tier. High tier is for very demanding applications
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH``
> +    Selects HEVC maximum coding unit depth.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES``
> +    Selects number of P reference picture required for HEVC encoder.
> +    P-Frame can use 1 or 2 frames for reference.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF``
> +    Indicates loop filtering. Control ID 0 indicates loop filtering
> +    is enabled and when set to 1 indicates no filter.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY``
> +    Selects whether to apply the loop filter across the slice boundary or not.
> +    If the value is 0, loop filter will not be applied across the slice boundary.
> +    If the value is 1, loop filter will be applied across the slice boundary.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2``
> +    Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> +    This could be a negative value in the 2's complement expression.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2``
> +    Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> +    This could be a negative value in the 2's complement expression.
> +
> +.. _v4l2-hevc-refresh-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> +    (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> +    Selects refresh type for HEVC encoder.
> +    Host has to specify the period into
> +    HEVC_REFRESH_PERIOD.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +    :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> +      - Use the B frame for hierarchical coding.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> +      - Use CRA(Clean Random Access Unit) picture encoding.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> +      - Use IDR picture encoding.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD``
> +    Selects the refresh period for HEVC encoder.
> +    This specifies the number of I picture between two CRA/IDR pictures.
> +    This is valid only if REFRESH_TYPE is not 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU``
> +    Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> +    encoding. Setting it to 1 enables lossless encoding.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED``
> +    Indicates constant intra prediction for HEVC encoder. Specifies the
> +    constrained intra prediction in which intra largest coding unit(LCU)
> +    prediction is performed by using residual data and decoded samples of
> +    neighboring intra LCU only. Setting it to 1 enables this control ID and
> +    setting it to 0 disables the control ID.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT``
> +    Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> +    disables the control ID and setting it to 1 enables the wavefront parallel
> +    processing.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING``
> +    Setting it to 1 indicates sign data hiding for HEVC encoder. Setting it to
> +    0 disables the control ID.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB``
> +    Setting the control ID to 1 enables general picture buffers for HEVC
> +    encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID``
> +    Indicates temporal identifier specified as temporal_id in
> +    nal_unit_header_svc_extension() for HEVC encoder which is enabled by
> +    setting the control ID to 1.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING``
> +    Indicates bi-linear interpolation is conditionally used in the intra
> +    prediction filtering process in the CVS when set to 1. Indicates bi-linear
> +    interpolation is not used in the CVS when set to 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1``
> +    Indicates max number of merge candidate motion vectors.
> +    Values are from zero to four.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK``
> +    Indicates HEVC dark region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH``
> +    Indicates HEVC smooth region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC``
> +    Indicates HEVC static region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY``
> +    Indicates HEVC activity region adaptive rate control.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT``
> +    Indicates intra prediction unit split for HEVC Encoder. Setting it to 1
> +    disables the feature. Setting it to 1 enables the feature.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION``
> +    Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> +    0 enables the prediction. Setting it to 1 disables the prediction.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE``
> +    Specifies if HEVC generates a stream with a size of length field instead of
> +    start code pattern. The size of the length field is configurable among 1,2
> +    or 4 thorugh the SIZE_OF_LENGTH_FIELD. It is not applied at SEQ_START.
> +    Setting it to 0 disables the control ID. Setting it to 1 will enables
> +    the control ID.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR``
> +    Indicates the quantization parameter CR index.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB``
> +    Indicates the quantization parameter CB index.
> +
> +.. _v4l2-hevc-size-of-length-field:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> +(enum)
> +
> +enum v4l2_mpeg_video_hevc_size_of_length_field -
> +    Indicates the size of length field.
> +    This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> +
> +.. raw:: latex
> +
> +    \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> +       :header-rows:  0
> +    :stub-columns: 0
> +
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> +      - Generate start code pattern (Normal).
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> +      - Generate size of length field instead of start code pattern and length is 1.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> +      - Generate size of length field instead of start code pattern and length is 2.
> +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> +      - Generate size of length field instead of start code pattern and length is 4.
> +
> +.. raw:: latex
> +
> +    \end{adjustbox}
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR``
> +    Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> +    disables it and setting it to one enables the feature.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH``
> +    Indicates hierarchical coding layer change for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE``
> +    Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> +
> +
>  .. _camera-controls:
>  
>  Camera Control Reference
> 

Re: [Patch v3 11/11] Documention: v4l: Documentation for HEVC CIDs

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:28 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Added V4l2 controls for HEVC encoder
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> >  Documentation/media/uapi/v4l/extended-controls.rst | 355 +++++++++++++++++++++
> >  1 file changed, 355 insertions(+)
> > 
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..c2f3c5e 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,361 @@ enum v4l2_vp8_golden_frame_sel -
> >      1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >  
> >  
> > +HEVC Control Reference
> > +---------------------
> > +
> > +The HEVC controls include controls for encoding parameters of HEVC video
> > +codec.
> 
> A general question: are all these controls directly related to the HEVC specification,
> or are there controls that are specific to the exynos HW implementation?
> 
> Any exynos specific controls should be split off from the standard controls.
> 
> Regards,
> 
> 	Hans
> 
Few of these controls are directly related to HEVC specification. But
few are exynos related. I will split exynos related controls in next
patch series.

Regards,
Smitha
> > +
> > +
> > +.. _hevc-control-id:
> > +
> > +HEVC Control IDs
> > +^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP``
> > +    Minimum quantization parameter for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP``
> > +    Maximum quantization parameter for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP``
> > +    Quantization parameter for an I frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP``
> > +    Quantization parameter for a P frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP``
> > +    Quantization parameter for a B frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP``
> > +    HIERARCHICAL_QP allows host to specify the quantization parameter values
> > +    for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> > +    if HIERARCHICAL_CODING_LAYER is greater than 1.
> > +
> > +.. _v4l2-hevc-hierarchical-coding-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_coding_type -
> > +    Selects the hierarchical coding type for encoding. Possible values are:
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +    :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> > +      - Use the B frame for hierarchical coding.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> > +      - Use the P frame for hierarchical coding.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER``
> > +    Selects the hierarchical coding layer. In normal encoding
> > +    (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> > +    0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> > +    LAYER 1 and so on.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP``
> > +    Indicates the hierarchical coding layer quantization parameter.
> > +    For HEVC it can have a value of 0-51. Hence in the control value passed
> > +    the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> > +    will pass the layer(0-6) it is meant for.
> > +
> > +.. _v4l2-hevc-profile:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_profile -
> > +    Select the desired profile for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +    :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> > +      - Main profile.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> > +      - Main still picture profile.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +.. _v4l2-hevc-level:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_level -
> > +    Select the desired level for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +       :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> > +      - Level 1.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> > +      - Level 2.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> > +      - Level 2.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> > +      - Level 3.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> > +      - Level 3.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> > +      - Level 4.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> > +      - Level 4.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> > +      - Level 5.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> > +      - Level 5.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> > +      - Level 5.2
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> > +      - Level 6.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> > +      - Level 6.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> > +      - Level 6.2
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION``
> > +    Indicates the number of evenly spaced subintervals, called ticks, within
> > +    one modulo time. One modulo time represents the fixed interval of one
> > +    second. This is a 16bit unsigned integer and has a maximum value upto
> > +    0xffff.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> > +    TIER_FLAG specifies tier information of the HEVC encoded picture. Tier were
> > +    made to deal with applications that differ in terms of maximum bit rate.
> > +    Setting the flag to 0 selects HEVC tier_flag as Main tier and setting this
> > +    flag to 1 indicates High tier. High tier is for very demanding applications
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH``
> > +    Selects HEVC maximum coding unit depth.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES``
> > +    Selects number of P reference picture required for HEVC encoder.
> > +    P-Frame can use 1 or 2 frames for reference.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF``
> > +    Indicates loop filtering. Control ID 0 indicates loop filtering
> > +    is enabled and when set to 1 indicates no filter.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY``
> > +    Selects whether to apply the loop filter across the slice boundary or not.
> > +    If the value is 0, loop filter will not be applied across the slice boundary.
> > +    If the value is 1, loop filter will be applied across the slice boundary.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2``
> > +    Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> > +    This could be a negative value in the 2's complement expression.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2``
> > +    Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> > +    This could be a negative value in the 2's complement expression.
> > +
> > +.. _v4l2-hevc-refresh-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> > +    Selects refresh type for HEVC encoder.
> > +    Host has to specify the period into
> > +    HEVC_REFRESH_PERIOD.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +    :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> > +      - Use the B frame for hierarchical coding.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> > +      - Use CRA(Clean Random Access Unit) picture encoding.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> > +      - Use IDR picture encoding.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD``
> > +    Selects the refresh period for HEVC encoder.
> > +    This specifies the number of I picture between two CRA/IDR pictures.
> > +    This is valid only if REFRESH_TYPE is not 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU``
> > +    Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> > +    encoding. Setting it to 1 enables lossless encoding.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED``
> > +    Indicates constant intra prediction for HEVC encoder. Specifies the
> > +    constrained intra prediction in which intra largest coding unit(LCU)
> > +    prediction is performed by using residual data and decoded samples of
> > +    neighboring intra LCU only. Setting it to 1 enables this control ID and
> > +    setting it to 0 disables the control ID.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT``
> > +    Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> > +    disables the control ID and setting it to 1 enables the wavefront parallel
> > +    processing.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING``
> > +    Setting it to 1 indicates sign data hiding for HEVC encoder. Setting it to
> > +    0 disables the control ID.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB``
> > +    Setting the control ID to 1 enables general picture buffers for HEVC
> > +    encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID``
> > +    Indicates temporal identifier specified as temporal_id in
> > +    nal_unit_header_svc_extension() for HEVC encoder which is enabled by
> > +    setting the control ID to 1.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING``
> > +    Indicates bi-linear interpolation is conditionally used in the intra
> > +    prediction filtering process in the CVS when set to 1. Indicates bi-linear
> > +    interpolation is not used in the CVS when set to 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1``
> > +    Indicates max number of merge candidate motion vectors.
> > +    Values are from zero to four.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK``
> > +    Indicates HEVC dark region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH``
> > +    Indicates HEVC smooth region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC``
> > +    Indicates HEVC static region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY``
> > +    Indicates HEVC activity region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT``
> > +    Indicates intra prediction unit split for HEVC Encoder. Setting it to 1
> > +    disables the feature. Setting it to 1 enables the feature.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION``
> > +    Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> > +    0 enables the prediction. Setting it to 1 disables the prediction.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE``
> > +    Specifies if HEVC generates a stream with a size of length field instead of
> > +    start code pattern. The size of the length field is configurable among 1,2
> > +    or 4 thorugh the SIZE_OF_LENGTH_FIELD. It is not applied at SEQ_START.
> > +    Setting it to 0 disables the control ID. Setting it to 1 will enables
> > +    the control ID.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR``
> > +    Indicates the quantization parameter CR index.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB``
> > +    Indicates the quantization parameter CB index.
> > +
> > +.. _v4l2-hevc-size-of-length-field:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> > +(enum)
> > +
> > +enum v4l2_mpeg_video_hevc_size_of_length_field -
> > +    Indicates the size of length field.
> > +    This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +       :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> > +      - Generate start code pattern (Normal).
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> > +      - Generate size of length field instead of start code pattern and length is 1.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> > +      - Generate size of length field instead of start code pattern and length is 2.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> > +      - Generate size of length field instead of start code pattern and length is 4.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR``
> > +    Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> > +    disables it and setting it to one enables the feature.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH``
> > +    Indicates hierarchical coding layer change for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> > +
> > +
> >  .. _camera-controls:
> >  
> >  Camera Control Reference
> > 
> 
> 
> 

[Patch v3 11/11] Documention: v4l: Documentation for HEVC CIDs

[Smitha T Murthy]

On Mon, 2017-04-03 at 10:28 +0200, Hans Verkuil wrote:
> On 03/31/2017 11:06 AM, Smitha T Murthy wrote:
> > Added V4l2 controls for HEVC encoder
> > 
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> >  Documentation/media/uapi/v4l/extended-controls.rst | 355 +++++++++++++++++++++
> >  1 file changed, 355 insertions(+)
> > 
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..c2f3c5e 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,361 @@ enum v4l2_vp8_golden_frame_sel -
> >      1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >  
> >  
> > +HEVC Control Reference
> > +---------------------
> > +
> > +The HEVC controls include controls for encoding parameters of HEVC video
> > +codec.
> 
> A general question: are all these controls directly related to the HEVC specification,
> or are there controls that are specific to the exynos HW implementation?
> 
> Any exynos specific controls should be split off from the standard controls.
> 
> Regards,
> 
> 	Hans
> 
Few of these controls are directly related to HEVC specification. But
few are exynos related. I will split exynos related controls in next
patch series.

Regards,
Smitha
> > +
> > +
> > +.. _hevc-control-id:
> > +
> > +HEVC Control IDs
> > +^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP``
> > +    Minimum quantization parameter for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP``
> > +    Maximum quantization parameter for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP``
> > +    Quantization parameter for an I frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP``
> > +    Quantization parameter for a P frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP``
> > +    Quantization parameter for a B frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP``
> > +    HIERARCHICAL_QP allows host to specify the quantization parameter values
> > +    for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> > +    if HIERARCHICAL_CODING_LAYER is greater than 1.
> > +
> > +.. _v4l2-hevc-hierarchical-coding-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_coding_type -
> > +    Selects the hierarchical coding type for encoding. Possible values are:
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +    :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> > +      - Use the B frame for hierarchical coding.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> > +      - Use the P frame for hierarchical coding.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER``
> > +    Selects the hierarchical coding layer. In normal encoding
> > +    (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> > +    0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> > +    LAYER 1 and so on.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP``
> > +    Indicates the hierarchical coding layer quantization parameter.
> > +    For HEVC it can have a value of 0-51. Hence in the control value passed
> > +    the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> > +    will pass the layer(0-6) it is meant for.
> > +
> > +.. _v4l2-hevc-profile:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_profile -
> > +    Select the desired profile for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +    :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> > +      - Main profile.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> > +      - Main still picture profile.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +.. _v4l2-hevc-level:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_level -
> > +    Select the desired level for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +       :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> > +      - Level 1.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> > +      - Level 2.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> > +      - Level 2.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> > +      - Level 3.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> > +      - Level 3.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> > +      - Level 4.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> > +      - Level 4.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> > +      - Level 5.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> > +      - Level 5.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> > +      - Level 5.2
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> > +      - Level 6.0
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> > +      - Level 6.1
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> > +      - Level 6.2
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION``
> > +    Indicates the number of evenly spaced subintervals, called ticks, within
> > +    one modulo time. One modulo time represents the fixed interval of one
> > +    second. This is a 16bit unsigned integer and has a maximum value upto
> > +    0xffff.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> > +    TIER_FLAG specifies tier information of the HEVC encoded picture. Tier were
> > +    made to deal with applications that differ in terms of maximum bit rate.
> > +    Setting the flag to 0 selects HEVC tier_flag as Main tier and setting this
> > +    flag to 1 indicates High tier. High tier is for very demanding applications
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH``
> > +    Selects HEVC maximum coding unit depth.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES``
> > +    Selects number of P reference picture required for HEVC encoder.
> > +    P-Frame can use 1 or 2 frames for reference.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF``
> > +    Indicates loop filtering. Control ID 0 indicates loop filtering
> > +    is enabled and when set to 1 indicates no filter.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY``
> > +    Selects whether to apply the loop filter across the slice boundary or not.
> > +    If the value is 0, loop filter will not be applied across the slice boundary.
> > +    If the value is 1, loop filter will be applied across the slice boundary.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2``
> > +    Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> > +    This could be a negative value in the 2's complement expression.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2``
> > +    Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> > +    This could be a negative value in the 2's complement expression.
> > +
> > +.. _v4l2-hevc-refresh-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> > +    (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> > +    Selects refresh type for HEVC encoder.
> > +    Host has to specify the period into
> > +    HEVC_REFRESH_PERIOD.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +    :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> > +      - Use the B frame for hierarchical coding.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> > +      - Use CRA(Clean Random Access Unit) picture encoding.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> > +      - Use IDR picture encoding.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD``
> > +    Selects the refresh period for HEVC encoder.
> > +    This specifies the number of I picture between two CRA/IDR pictures.
> > +    This is valid only if REFRESH_TYPE is not 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU``
> > +    Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> > +    encoding. Setting it to 1 enables lossless encoding.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED``
> > +    Indicates constant intra prediction for HEVC encoder. Specifies the
> > +    constrained intra prediction in which intra largest coding unit(LCU)
> > +    prediction is performed by using residual data and decoded samples of
> > +    neighboring intra LCU only. Setting it to 1 enables this control ID and
> > +    setting it to 0 disables the control ID.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT``
> > +    Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> > +    disables the control ID and setting it to 1 enables the wavefront parallel
> > +    processing.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING``
> > +    Setting it to 1 indicates sign data hiding for HEVC encoder. Setting it to
> > +    0 disables the control ID.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB``
> > +    Setting the control ID to 1 enables general picture buffers for HEVC
> > +    encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID``
> > +    Indicates temporal identifier specified as temporal_id in
> > +    nal_unit_header_svc_extension() for HEVC encoder which is enabled by
> > +    setting the control ID to 1.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING``
> > +    Indicates bi-linear interpolation is conditionally used in the intra
> > +    prediction filtering process in the CVS when set to 1. Indicates bi-linear
> > +    interpolation is not used in the CVS when set to 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1``
> > +    Indicates max number of merge candidate motion vectors.
> > +    Values are from zero to four.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK``
> > +    Indicates HEVC dark region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH``
> > +    Indicates HEVC smooth region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC``
> > +    Indicates HEVC static region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY``
> > +    Indicates HEVC activity region adaptive rate control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT``
> > +    Indicates intra prediction unit split for HEVC Encoder. Setting it to 1
> > +    disables the feature. Setting it to 1 enables the feature.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION``
> > +    Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> > +    0 enables the prediction. Setting it to 1 disables the prediction.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE``
> > +    Specifies if HEVC generates a stream with a size of length field instead of
> > +    start code pattern. The size of the length field is configurable among 1,2
> > +    or 4 thorugh the SIZE_OF_LENGTH_FIELD. It is not applied at SEQ_START.
> > +    Setting it to 0 disables the control ID. Setting it to 1 will enables
> > +    the control ID.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR``
> > +    Indicates the quantization parameter CR index.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB``
> > +    Indicates the quantization parameter CB index.
> > +
> > +.. _v4l2-hevc-size-of-length-field:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> > +(enum)
> > +
> > +enum v4l2_mpeg_video_hevc_size_of_length_field -
> > +    Indicates the size of length field.
> > +    This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> > +
> > +.. raw:: latex
> > +
> > +    \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > +       :header-rows:  0
> > +    :stub-columns: 0
> > +
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> > +      - Generate start code pattern (Normal).
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> > +      - Generate size of length field instead of start code pattern and length is 1.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> > +      - Generate size of length field instead of start code pattern and length is 2.
> > +    * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> > +      - Generate size of length field instead of start code pattern and length is 4.
> > +
> > +.. raw:: latex
> > +
> > +    \end{adjustbox}
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR``
> > +    Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> > +    disables it and setting it to one enables the feature.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH``
> > +    Indicates hierarchical coding layer change for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER0_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER1_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER2_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER3_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER4_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER5_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER6_BITRATE``
> > +    Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> > +
> > +
> >  .. _camera-controls:
> >  
> >  Camera Control Reference
> > 
> 
> 
> 

Re: [Patch v3 00/11] Add MFC v10.10 support

[Andrzej Hajda]

Hi Smitha,

On 31.03.2017 11:06, Smitha T Murthy wrote:
> This patch series adds MFC v10.10 support. MFC v10.10 is used in some
> of Exynos7 variants.

Patch does not apply, please rebase on top of:
   

git://linuxtv.org/snawrocki/samsung.git for-v4.12/media/next


Additionally quick test shows you do not handle V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH in s5p_mfc_enc_s_ctrl.

Regards
Andrzej

>
> This adds support for following:
>
> * Add support for HEVC encoder and decoder
> * Add support for VP9 decoder
> * Update Documentation for control id definitions
> * Update computation of min scratch buffer size requirement for V8 onwards
>
> Changes since v2:
>  - Addressed review comments by Andrzej Hajda.
>  - Rebased on latest krzk/for-next tree.
>  - This patches are tested on top of Marek's patch v2 [1]
>  - Applied acked-by and r-o-b from Andrzej on respective patches.
>  - Applied acked-by from Rob Herring on respective patch.
>
> [1]: http://www.mail-archive.com/linux-media@vger.kernel.org/msg108520.html
>
> Smitha T Murthy (11):
>   [media] s5p-mfc: Rename IS_MFCV8 macro
>   [media] s5p-mfc: Adding initial support for MFC v10.10
>   [media] s5p-mfc: Use min scratch buffer size as provided by F/W
>   [media] s5p-mfc: Support MFCv10.10 buffer requirements
>   [media] videodev2.h: Add v4l2 definition for HEVC
>   [media] s5p-mfc: Add support for HEVC decoder
>   Documentation: v4l: Documentation for HEVC v4l2 definition
>   [media] s5p-mfc: Add VP9 decoder support
>   [media] v4l2: Add v4l2 control IDs for HEVC encoder
>   [media] s5p-mfc: Add support for HEVC encoder
>   Documention: v4l: Documentation for HEVC CIDs
>
>  .../devicetree/bindings/media/s5p-mfc.txt          |   1 +
>  Documentation/media/uapi/v4l/extended-controls.rst | 355 ++++++++++++
>  Documentation/media/uapi/v4l/pixfmt-013.rst        |   5 +
>  drivers/media/platform/s5p-mfc/regs-mfc-v10.h      |  88 +++
>  drivers/media/platform/s5p-mfc/regs-mfc-v8.h       |   2 +
>  drivers/media/platform/s5p-mfc/s5p_mfc.c           |  33 ++
>  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c    |   9 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  71 ++-
>  drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |   6 +-
>  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       |  50 +-
>  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 616 ++++++++++++++++++++-
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h       |  14 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    | 410 ++++++++++++--
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  15 +
>  drivers/media/v4l2-core/v4l2-ctrls.c               | 103 ++++
>  include/uapi/linux/v4l2-controls.h                 | 133 +++++
>  include/uapi/linux/videodev2.h                     |   1 +
>  17 files changed, 1835 insertions(+), 77 deletions(-)
>  create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
>

[Patch v3 00/11] Add MFC v10.10 support

[Andrzej Hajda]

Hi Smitha,

On 31.03.2017 11:06, Smitha T Murthy wrote:
> This patch series adds MFC v10.10 support. MFC v10.10 is used in some
> of Exynos7 variants.

Patch does not apply, please rebase on top of:
   

git://linuxtv.org/snawrocki/samsung.git for-v4.12/media/next


Additionally quick test shows you do not handle V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH in s5p_mfc_enc_s_ctrl.

Regards
Andrzej

>
> This adds support for following:
>
> * Add support for HEVC encoder and decoder
> * Add support for VP9 decoder
> * Update Documentation for control id definitions
> * Update computation of min scratch buffer size requirement for V8 onwards
>
> Changes since v2:
>  - Addressed review comments by Andrzej Hajda.
>  - Rebased on latest krzk/for-next tree.
>  - This patches are tested on top of Marek's patch v2 [1]
>  - Applied acked-by and r-o-b from Andrzej on respective patches.
>  - Applied acked-by from Rob Herring on respective patch.
>
> [1]: http://www.mail-archive.com/linux-media at vger.kernel.org/msg108520.html
>
> Smitha T Murthy (11):
>   [media] s5p-mfc: Rename IS_MFCV8 macro
>   [media] s5p-mfc: Adding initial support for MFC v10.10
>   [media] s5p-mfc: Use min scratch buffer size as provided by F/W
>   [media] s5p-mfc: Support MFCv10.10 buffer requirements
>   [media] videodev2.h: Add v4l2 definition for HEVC
>   [media] s5p-mfc: Add support for HEVC decoder
>   Documentation: v4l: Documentation for HEVC v4l2 definition
>   [media] s5p-mfc: Add VP9 decoder support
>   [media] v4l2: Add v4l2 control IDs for HEVC encoder
>   [media] s5p-mfc: Add support for HEVC encoder
>   Documention: v4l: Documentation for HEVC CIDs
>
>  .../devicetree/bindings/media/s5p-mfc.txt          |   1 +
>  Documentation/media/uapi/v4l/extended-controls.rst | 355 ++++++++++++
>  Documentation/media/uapi/v4l/pixfmt-013.rst        |   5 +
>  drivers/media/platform/s5p-mfc/regs-mfc-v10.h      |  88 +++
>  drivers/media/platform/s5p-mfc/regs-mfc-v8.h       |   2 +
>  drivers/media/platform/s5p-mfc/s5p_mfc.c           |  33 ++
>  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c    |   9 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  71 ++-
>  drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |   6 +-
>  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       |  50 +-
>  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 616 ++++++++++++++++++++-
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h       |  14 +
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    | 410 ++++++++++++--
>  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  15 +
>  drivers/media/v4l2-core/v4l2-ctrls.c               | 103 ++++
>  include/uapi/linux/v4l2-controls.h                 | 133 +++++
>  include/uapi/linux/videodev2.h                     |   1 +
>  17 files changed, 1835 insertions(+), 77 deletions(-)
>  create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
>

Re: [Patch v3 00/11] Add MFC v10.10 support

[Smitha T Murthy]

On Fri, 2017-03-31 at 15:29 +0200, Andrzej Hajda wrote:
> Hi Smitha,
> 
> On 31.03.2017 11:06, Smitha T Murthy wrote:
> > This patch series adds MFC v10.10 support. MFC v10.10 is used in some
> > of Exynos7 variants.
> 
> Patch does not apply, please rebase on top of:
>    
> 
> git://linuxtv.org/snawrocki/samsung.git for-v4.12/media/next
> 
> 
I had not checked on this git. Thank you for pointing it out. I am
downloading the code from github, will rebase on top of it and check the
patches and push the next version correspondingly.

> Additionally quick test shows you do not handle V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH in s5p_mfc_enc_s_ctrl.
> Regards
> Andrzej
> 

I could not sufficient details on
V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH in the User Manual
to implement this CID. Hence I wanted to remove it in v3 itself, I will
take care of this in next version.

Regards,
Smitha T Murthy
> >
> > This adds support for following:
> >
> > * Add support for HEVC encoder and decoder
> > * Add support for VP9 decoder
> > * Update Documentation for control id definitions
> > * Update computation of min scratch buffer size requirement for V8 onwards
> >
> > Changes since v2:
> >  - Addressed review comments by Andrzej Hajda.
> >  - Rebased on latest krzk/for-next tree.
> >  - This patches are tested on top of Marek's patch v2 [1]
> >  - Applied acked-by and r-o-b from Andrzej on respective patches.
> >  - Applied acked-by from Rob Herring on respective patch.
> >
> > [1]: http://www.mail-archive.com/linux-media@vger.kernel.org/msg108520.html
> >
> > Smitha T Murthy (11):
> >   [media] s5p-mfc: Rename IS_MFCV8 macro
> >   [media] s5p-mfc: Adding initial support for MFC v10.10
> >   [media] s5p-mfc: Use min scratch buffer size as provided by F/W
> >   [media] s5p-mfc: Support MFCv10.10 buffer requirements
> >   [media] videodev2.h: Add v4l2 definition for HEVC
> >   [media] s5p-mfc: Add support for HEVC decoder
> >   Documentation: v4l: Documentation for HEVC v4l2 definition
> >   [media] s5p-mfc: Add VP9 decoder support
> >   [media] v4l2: Add v4l2 control IDs for HEVC encoder
> >   [media] s5p-mfc: Add support for HEVC encoder
> >   Documention: v4l: Documentation for HEVC CIDs
> >
> >  .../devicetree/bindings/media/s5p-mfc.txt          |   1 +
> >  Documentation/media/uapi/v4l/extended-controls.rst | 355 ++++++++++++
> >  Documentation/media/uapi/v4l/pixfmt-013.rst        |   5 +
> >  drivers/media/platform/s5p-mfc/regs-mfc-v10.h      |  88 +++
> >  drivers/media/platform/s5p-mfc/regs-mfc-v8.h       |   2 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc.c           |  33 ++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c    |   9 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  71 ++-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |   6 +-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       |  50 +-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 616 ++++++++++++++++++++-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h       |  14 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    | 410 ++++++++++++--
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  15 +
> >  drivers/media/v4l2-core/v4l2-ctrls.c               | 103 ++++
> >  include/uapi/linux/v4l2-controls.h                 | 133 +++++
> >  include/uapi/linux/videodev2.h                     |   1 +
> >  17 files changed, 1835 insertions(+), 77 deletions(-)
> >  create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> >
> 
> 

[Patch v3 00/11] Add MFC v10.10 support

[Smitha T Murthy]

On Fri, 2017-03-31 at 15:29 +0200, Andrzej Hajda wrote:
> Hi Smitha,
> 
> On 31.03.2017 11:06, Smitha T Murthy wrote:
> > This patch series adds MFC v10.10 support. MFC v10.10 is used in some
> > of Exynos7 variants.
> 
> Patch does not apply, please rebase on top of:
>    
> 
> git://linuxtv.org/snawrocki/samsung.git for-v4.12/media/next
> 
> 
I had not checked on this git. Thank you for pointing it out. I am
downloading the code from github, will rebase on top of it and check the
patches and push the next version correspondingly.

> Additionally quick test shows you do not handle V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH in s5p_mfc_enc_s_ctrl.
> Regards
> Andrzej
> 

I could not sufficient details on
V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH in the User Manual
to implement this CID. Hence I wanted to remove it in v3 itself, I will
take care of this in next version.

Regards,
Smitha T Murthy
> >
> > This adds support for following:
> >
> > * Add support for HEVC encoder and decoder
> > * Add support for VP9 decoder
> > * Update Documentation for control id definitions
> > * Update computation of min scratch buffer size requirement for V8 onwards
> >
> > Changes since v2:
> >  - Addressed review comments by Andrzej Hajda.
> >  - Rebased on latest krzk/for-next tree.
> >  - This patches are tested on top of Marek's patch v2 [1]
> >  - Applied acked-by and r-o-b from Andrzej on respective patches.
> >  - Applied acked-by from Rob Herring on respective patch.
> >
> > [1]: http://www.mail-archive.com/linux-media at vger.kernel.org/msg108520.html
> >
> > Smitha T Murthy (11):
> >   [media] s5p-mfc: Rename IS_MFCV8 macro
> >   [media] s5p-mfc: Adding initial support for MFC v10.10
> >   [media] s5p-mfc: Use min scratch buffer size as provided by F/W
> >   [media] s5p-mfc: Support MFCv10.10 buffer requirements
> >   [media] videodev2.h: Add v4l2 definition for HEVC
> >   [media] s5p-mfc: Add support for HEVC decoder
> >   Documentation: v4l: Documentation for HEVC v4l2 definition
> >   [media] s5p-mfc: Add VP9 decoder support
> >   [media] v4l2: Add v4l2 control IDs for HEVC encoder
> >   [media] s5p-mfc: Add support for HEVC encoder
> >   Documention: v4l: Documentation for HEVC CIDs
> >
> >  .../devicetree/bindings/media/s5p-mfc.txt          |   1 +
> >  Documentation/media/uapi/v4l/extended-controls.rst | 355 ++++++++++++
> >  Documentation/media/uapi/v4l/pixfmt-013.rst        |   5 +
> >  drivers/media/platform/s5p-mfc/regs-mfc-v10.h      |  88 +++
> >  drivers/media/platform/s5p-mfc/regs-mfc-v8.h       |   2 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc.c           |  33 ++
> >  drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c    |   9 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_common.h    |  71 ++-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c      |   6 +-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_dec.c       |  50 +-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c       | 616 ++++++++++++++++++++-
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr.h       |  14 +
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c    | 410 ++++++++++++--
> >  drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h    |  15 +
> >  drivers/media/v4l2-core/v4l2-ctrls.c               | 103 ++++
> >  include/uapi/linux/v4l2-controls.h                 | 133 +++++
> >  include/uapi/linux/videodev2.h                     |   1 +
> >  17 files changed, 1835 insertions(+), 77 deletions(-)
> >  create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> >
> 
>