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From: Anurup M <anurupvasu@gmail.com>
To: mark.rutland@arm.com, will.deacon@arm.com
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, anurup.m@huawei.com,
	zhangshaokun@hisilicon.com, tanxiaojun@huawei.com,
	xuwei5@hisilicon.com, sanil.kumar@hisilicon.com,
	john.garry@huawei.com, gabriele.paoloni@huawei.com,
	shiju.jose@huawei.com, huangdaode@hisilicon.com,
	linuxarm@huawei.com, dikshit.n@huawei.com, shyju.pv@huawei.com,
	anurupvasu@gmail.com
Subject: [PATCH v7 5/9] drivers: perf: hisi: Update Kconfig for Hisilicon PMU support
Date: Tue,  4 Apr 2017 06:55:57 -0400	[thread overview]
Message-ID: <1491303357-140425-1-git-send-email-anurup.m@huawei.com> (raw)

Update Kconfig for HiP05/06/07 PMU support.

Signed-off-by: Anurup M <anurup.m@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
---
 drivers/perf/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
index 9365190..248d730 100644
--- a/drivers/perf/Kconfig
+++ b/drivers/perf/Kconfig
@@ -12,6 +12,14 @@ config ARM_PMU
 	  Say y if you want to use CPU performance monitors on ARM-based
 	  systems.
 
+config HISI_PMU
+	bool "HiSilicon SoC PMU"
+	depends on PERF_EVENTS && ARM64
+	help
+	  Enable hardware event counter support for hardware event counters
+	  in Hisilicon HiP05/06/07 SoC. The hardware modules like L3 Cache
+	  and MN have hardware events and counters.
+
 config QCOM_L2_PMU
 	bool "Qualcomm Technologies L2-cache PMU"
 	depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI
-- 
2.1.4

WARNING: multiple messages have this Message-ID (diff)
From: anurupvasu@gmail.com (Anurup M)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 5/9] drivers: perf: hisi: Update Kconfig for Hisilicon PMU support
Date: Tue,  4 Apr 2017 06:55:57 -0400	[thread overview]
Message-ID: <1491303357-140425-1-git-send-email-anurup.m@huawei.com> (raw)

Update Kconfig for HiP05/06/07 PMU support.

Signed-off-by: Anurup M <anurup.m@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
---
 drivers/perf/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
index 9365190..248d730 100644
--- a/drivers/perf/Kconfig
+++ b/drivers/perf/Kconfig
@@ -12,6 +12,14 @@ config ARM_PMU
 	  Say y if you want to use CPU performance monitors on ARM-based
 	  systems.
 
+config HISI_PMU
+	bool "HiSilicon SoC PMU"
+	depends on PERF_EVENTS && ARM64
+	help
+	  Enable hardware event counter support for hardware event counters
+	  in Hisilicon HiP05/06/07 SoC. The hardware modules like L3 Cache
+	  and MN have hardware events and counters.
+
 config QCOM_L2_PMU
 	bool "Qualcomm Technologies L2-cache PMU"
 	depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI
-- 
2.1.4

             reply	other threads:[~2017-04-04 10:56 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-04 10:55 Anurup M [this message]
2017-04-04 10:55 ` [PATCH v7 5/9] drivers: perf: hisi: Update Kconfig for Hisilicon PMU support Anurup M

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