From: Daniel Lezcano <daniel.lezcano@linaro.org> To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Marc Zyngier <marc.zyngier@arm.com>, Mark Rutland <mark.rutland@arm.com>, linux-arm-kernel@lists.infradead.org (moderated list:ARM ARCHITECTED TIMER DRIVER) Subject: [PATCH 15/29] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Date: Sun, 16 Apr 2017 22:27:05 +0200 [thread overview] Message-ID: <1492374441-23336-15-git-send-email-daniel.lezcano@linaro.org> (raw) In-Reply-To: <1492374441-23336-1-git-send-email-daniel.lezcano@linaro.org> From: Marc Zyngier <marc.zyngier@arm.com> Userspace being allowed to use read CNTVCT_EL0 anytime (and not only in the VDSO), we need to enable trapping whenever a cntvct workaround is enabled on a given CPU. Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- drivers/clocksource/arm_arch_timer.c | 45 +++++++++++++++++++++++++----------- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 5c114da..f8adea2 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -83,6 +83,7 @@ static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual; static bool arch_counter_suspend_stop; +static bool vdso_default = true; static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM); @@ -383,6 +384,17 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa } static_branch_enable(&arch_timer_read_ool_enabled); + + /* + * Don't use the vdso fastpath if errata require using the + * out-of-line counter accessor. We may change our mind pretty + * late in the game (with a per-CPU erratum, for example), so + * change both the default value and the vdso itself. + */ + if (wa->read_cntvct_el0) { + clocksource_counter.archdata.vdso_direct = false; + vdso_default = false; + } } static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type type, @@ -443,11 +455,19 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t __val; \ }) +static bool arch_timer_this_cpu_has_cntvct_wa(void) +{ + const struct arch_timer_erratum_workaround *wa; + + wa = __this_cpu_read(timer_unstable_counter_workaround); + return wa && wa->read_cntvct_el0; +} #else #define arch_timer_check_ool_workaround(t,a) do { } while(0) #define erratum_set_next_event_tval_virt(...) ({BUG(); 0;}) #define erratum_set_next_event_tval_phys(...) ({BUG(); 0;}) #define erratum_handler(fn, r, ...) ({false;}) +#define arch_timer_this_cpu_has_cntvct_wa() ({false;}) #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */ static __always_inline irqreturn_t timer_handler(const int access, @@ -660,15 +680,23 @@ static void arch_counter_set_user_access(void) { u32 cntkctl = arch_timer_get_cntkctl(); - /* Disable user access to the timers and the physical counter */ + /* Disable user access to the timers and both counters */ /* Also disable virtual event stream */ cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN | ARCH_TIMER_USR_VT_ACCESS_EN + | ARCH_TIMER_USR_VCT_ACCESS_EN | ARCH_TIMER_VIRT_EVT_EN | ARCH_TIMER_USR_PCT_ACCESS_EN); - /* Enable user access to the virtual counter */ - cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; + /* + * Enable user access to the virtual counter if it doesn't + * need to be workaround. The vdso may have been already + * disabled though. + */ + if (arch_timer_this_cpu_has_cntvct_wa()) + pr_info("CPU%d: Trapping CNTVCT access\n", smp_processor_id()); + else + cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; arch_timer_set_cntkctl(cntkctl); } @@ -791,16 +819,7 @@ static void __init arch_counter_register(unsigned type) else arch_timer_read_counter = arch_counter_get_cntpct; - clocksource_counter.archdata.vdso_direct = true; - -#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND - /* - * Don't use the vdso fastpath if errata require using - * the out-of-line counter accessor. - */ - if (static_branch_unlikely(&arch_timer_read_ool_enabled)) - clocksource_counter.archdata.vdso_direct = false; -#endif + clocksource_counter.archdata.vdso_direct = vdso_default; } else { arch_timer_read_counter = arch_counter_get_cntvct_mem; } -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: daniel.lezcano@linaro.org (Daniel Lezcano) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 15/29] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Date: Sun, 16 Apr 2017 22:27:05 +0200 [thread overview] Message-ID: <1492374441-23336-15-git-send-email-daniel.lezcano@linaro.org> (raw) In-Reply-To: <1492374441-23336-1-git-send-email-daniel.lezcano@linaro.org> From: Marc Zyngier <marc.zyngier@arm.com> Userspace being allowed to use read CNTVCT_EL0 anytime (and not only in the VDSO), we need to enable trapping whenever a cntvct workaround is enabled on a given CPU. Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- drivers/clocksource/arm_arch_timer.c | 45 +++++++++++++++++++++++++----------- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 5c114da..f8adea2 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -83,6 +83,7 @@ static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual; static bool arch_counter_suspend_stop; +static bool vdso_default = true; static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM); @@ -383,6 +384,17 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa } static_branch_enable(&arch_timer_read_ool_enabled); + + /* + * Don't use the vdso fastpath if errata require using the + * out-of-line counter accessor. We may change our mind pretty + * late in the game (with a per-CPU erratum, for example), so + * change both the default value and the vdso itself. + */ + if (wa->read_cntvct_el0) { + clocksource_counter.archdata.vdso_direct = false; + vdso_default = false; + } } static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type type, @@ -443,11 +455,19 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t __val; \ }) +static bool arch_timer_this_cpu_has_cntvct_wa(void) +{ + const struct arch_timer_erratum_workaround *wa; + + wa = __this_cpu_read(timer_unstable_counter_workaround); + return wa && wa->read_cntvct_el0; +} #else #define arch_timer_check_ool_workaround(t,a) do { } while(0) #define erratum_set_next_event_tval_virt(...) ({BUG(); 0;}) #define erratum_set_next_event_tval_phys(...) ({BUG(); 0;}) #define erratum_handler(fn, r, ...) ({false;}) +#define arch_timer_this_cpu_has_cntvct_wa() ({false;}) #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */ static __always_inline irqreturn_t timer_handler(const int access, @@ -660,15 +680,23 @@ static void arch_counter_set_user_access(void) { u32 cntkctl = arch_timer_get_cntkctl(); - /* Disable user access to the timers and the physical counter */ + /* Disable user access to the timers and both counters */ /* Also disable virtual event stream */ cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN | ARCH_TIMER_USR_VT_ACCESS_EN + | ARCH_TIMER_USR_VCT_ACCESS_EN | ARCH_TIMER_VIRT_EVT_EN | ARCH_TIMER_USR_PCT_ACCESS_EN); - /* Enable user access to the virtual counter */ - cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; + /* + * Enable user access to the virtual counter if it doesn't + * need to be workaround. The vdso may have been already + * disabled though. + */ + if (arch_timer_this_cpu_has_cntvct_wa()) + pr_info("CPU%d: Trapping CNTVCT access\n", smp_processor_id()); + else + cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; arch_timer_set_cntkctl(cntkctl); } @@ -791,16 +819,7 @@ static void __init arch_counter_register(unsigned type) else arch_timer_read_counter = arch_counter_get_cntpct; - clocksource_counter.archdata.vdso_direct = true; - -#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND - /* - * Don't use the vdso fastpath if errata require using - * the out-of-line counter accessor. - */ - if (static_branch_unlikely(&arch_timer_read_ool_enabled)) - clocksource_counter.archdata.vdso_direct = false; -#endif + clocksource_counter.archdata.vdso_direct = vdso_default; } else { arch_timer_read_counter = arch_counter_get_cntvct_mem; } -- 2.7.4
next prev parent reply other threads:[~2017-04-16 20:31 UTC|newest] Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-16 20:25 [GIT PULL] timers changes for 4.12 Daniel Lezcano 2017-04-16 20:26 ` [PATCH 01/29] arm64: Allow checking of a CPU-local erratum Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 02/29] arm64: Add CNTVCT_EL0 trap handler Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 03/29] arm64: Define Cortex-A73 MIDR Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 04/29] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 05/29] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 06/29] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 07/29] arm64: arch_timer: Add erratum handler for CPU-specific capability Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 08/29] arm64: arch_timer: Move arch_timer_reg_read/write around Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:26 ` [PATCH 09/29] arm64: arch_timer: Get rid of erratum_workaround_set_sne Daniel Lezcano 2017-04-16 20:26 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 11/29] arm64: arch_timer: Make workaround methods optional Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 12/29] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 13/29] arm64: arch_timer: Move clocksource_counter and co around Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 14/29] arm64: arch_timer: Save cntkctl_el1 as a per-cpu variable Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano [this message] 2017-04-16 20:27 ` [PATCH 15/29] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Daniel Lezcano 2017-04-16 20:27 ` [PATCH 16/29] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 17/29] arm64: arch_timer: Allow erratum matching with ACPI OEM information Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 18/29] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 19/29] clocksource/drivers/orion: Read clock rate once Daniel Lezcano 2017-04-16 20:27 ` [PATCH 20/29] clocksource/drivers/orion: Add delay_timer implementation Daniel Lezcano 2017-04-16 20:27 ` [PATCH 21/29] clocksource: Add missing line break to error messages Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano [not found] ` <1492374441-23336-21-git-send-email-daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2017-04-24 7:45 ` Uwe Kleine-König 2017-04-24 7:45 ` Uwe Kleine-König 2017-04-24 7:45 ` Uwe Kleine-König 2017-04-24 7:45 ` Uwe Kleine-König 2017-04-24 7:45 ` Uwe Kleine-König 2017-04-16 20:27 ` [PATCH 22/29] dt-bindings: Clarify compatible property for rockchip timers Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-20 14:12 ` Rob Herring 2017-04-20 14:12 ` Rob Herring 2017-04-20 14:12 ` Rob Herring 2017-04-16 20:27 ` [PATCH 23/29] ARM: dts: rockchip: Update compatible property for rk322x timer Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 24/29] clocksource/drivers/rockchip_timer: Implement clocksource timer Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 25/29] ARM: dts: rockchip: Add timer entries to rk3188 SoC Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 26/29] ARM: dts: rockchip: disable arm-global-timer for rk3188 Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 27/29] clocksource: Augment bindings for Faraday timer Daniel Lezcano 2017-04-16 20:27 ` Daniel Lezcano 2017-04-16 20:27 ` [PATCH 28/29] clocksource/drivers/gemini: Rename Gemini timer to Faraday Daniel Lezcano 2017-04-16 20:27 ` [PATCH 29/29] clocksource/drivers/fttmr010: Refactor to handle clock Daniel Lezcano
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