[PATCH 1/2] clk: hi6220: add acpu clock

[PATCH 1/2] clk: hi6220: add acpu clock

[Zhangfei Gao]

Add acpu clock, including sft clock controlling hi6220 coresight module

Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
---
 .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +
 drivers/clk/hisilicon/clk-hi6220.c                 | 23 ++++++++++++++++++++++
 include/dt-bindings/clock/hi6220-clock.h           |  4 ++++
 3 files changed, 28 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/hi6220-clock.txt b/Documentation/devicetree/bindings/clock/hi6220-clock.txt
index e4d5fea..ef3deb7 100644
--- a/Documentation/devicetree/bindings/clock/hi6220-clock.txt
+++ b/Documentation/devicetree/bindings/clock/hi6220-clock.txt
@@ -11,6 +11,7 @@ Required Properties:
 - compatible: the compatible should be one of the following strings to
 	indicate the clock controller functionality.
 
+	- "hisilicon,hi6220-acpu-sctrl"
 	- "hisilicon,hi6220-aoctrl"
 	- "hisilicon,hi6220-sysctrl"
 	- "hisilicon,hi6220-mediactrl"
diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c
index 2ae151c..fc8813f 100644
--- a/drivers/clk/hisilicon/clk-hi6220.c
+++ b/drivers/clk/hisilicon/clk-hi6220.c
@@ -285,3 +285,26 @@ static void __init hi6220_clk_power_init(struct device_node *np)
 				ARRAY_SIZE(hi6220_div_clks_power), clk_data);
 }
 CLK_OF_DECLARE(hi6220_clk_power, "hisilicon,hi6220-pmctrl", hi6220_clk_power_init);
+
+
+/* clocks in acpu */
+static const struct hisi_gate_clock hi6220_acpu_sc_gate_sep_clks[] = {
+	{ HI6220_ACPU_SFT_AT_S, "sft_at_s", "cs_atb",
+	  CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xc, 11, 0, },
+};
+
+static void __init hi6220_clk_acpu_init(struct device_node *np)
+{
+	struct hisi_clock_data *clk_data;
+	int nr = ARRAY_SIZE(hi6220_acpu_sc_gate_sep_clks);
+
+	clk_data = hisi_clk_init(np, nr);
+	if (!clk_data)
+		return;
+
+	hisi_clk_register_gate_sep(hi6220_acpu_sc_gate_sep_clks,
+				   ARRAY_SIZE(hi6220_acpu_sc_gate_sep_clks),
+				   clk_data);
+}
+
+CLK_OF_DECLARE(hi6220_clk_acpu, "hisilicon,hi6220-acpu-sctrl", hi6220_clk_acpu_init);
diff --git a/include/dt-bindings/clock/hi6220-clock.h b/include/dt-bindings/clock/hi6220-clock.h
index b8ba665..409cc02 100644
--- a/include/dt-bindings/clock/hi6220-clock.h
+++ b/include/dt-bindings/clock/hi6220-clock.h
@@ -174,4 +174,8 @@
 #define HI6220_DDRC_AXI1	7
 
 #define HI6220_POWER_NR_CLKS	8
+
+/* clk in Hi6220 acpu sctrl */
+#define HI6220_ACPU_SFT_AT_S		0
+
 #endif
-- 
2.7.4

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[PATCH 1/2] clk: hi6220: add acpu clock

[Zhangfei Gao]

Add acpu clock, including sft clock controlling hi6220 coresight module

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
---
 .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +
 drivers/clk/hisilicon/clk-hi6220.c                 | 23 ++++++++++++++++++++++
 include/dt-bindings/clock/hi6220-clock.h           |  4 ++++
 3 files changed, 28 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/hi6220-clock.txt b/Documentation/devicetree/bindings/clock/hi6220-clock.txt
index e4d5fea..ef3deb7 100644
--- a/Documentation/devicetree/bindings/clock/hi6220-clock.txt
+++ b/Documentation/devicetree/bindings/clock/hi6220-clock.txt
@@ -11,6 +11,7 @@ Required Properties:
 - compatible: the compatible should be one of the following strings to
 	indicate the clock controller functionality.
 
+	- "hisilicon,hi6220-acpu-sctrl"
 	- "hisilicon,hi6220-aoctrl"
 	- "hisilicon,hi6220-sysctrl"
 	- "hisilicon,hi6220-mediactrl"
diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c
index 2ae151c..fc8813f 100644
--- a/drivers/clk/hisilicon/clk-hi6220.c
+++ b/drivers/clk/hisilicon/clk-hi6220.c
@@ -285,3 +285,26 @@ static void __init hi6220_clk_power_init(struct device_node *np)
 				ARRAY_SIZE(hi6220_div_clks_power), clk_data);
 }
 CLK_OF_DECLARE(hi6220_clk_power, "hisilicon,hi6220-pmctrl", hi6220_clk_power_init);
+
+
+/* clocks in acpu */
+static const struct hisi_gate_clock hi6220_acpu_sc_gate_sep_clks[] = {
+	{ HI6220_ACPU_SFT_AT_S, "sft_at_s", "cs_atb",
+	  CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xc, 11, 0, },
+};
+
+static void __init hi6220_clk_acpu_init(struct device_node *np)
+{
+	struct hisi_clock_data *clk_data;
+	int nr = ARRAY_SIZE(hi6220_acpu_sc_gate_sep_clks);
+
+	clk_data = hisi_clk_init(np, nr);
+	if (!clk_data)
+		return;
+
+	hisi_clk_register_gate_sep(hi6220_acpu_sc_gate_sep_clks,
+				   ARRAY_SIZE(hi6220_acpu_sc_gate_sep_clks),
+				   clk_data);
+}
+
+CLK_OF_DECLARE(hi6220_clk_acpu, "hisilicon,hi6220-acpu-sctrl", hi6220_clk_acpu_init);
diff --git a/include/dt-bindings/clock/hi6220-clock.h b/include/dt-bindings/clock/hi6220-clock.h
index b8ba665..409cc02 100644
--- a/include/dt-bindings/clock/hi6220-clock.h
+++ b/include/dt-bindings/clock/hi6220-clock.h
@@ -174,4 +174,8 @@
 #define HI6220_DDRC_AXI1	7
 
 #define HI6220_POWER_NR_CLKS	8
+
+/* clk in Hi6220 acpu sctrl */
+#define HI6220_ACPU_SFT_AT_S		0
+
 #endif
-- 
2.7.4

[PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Zhangfei Gao]

Add acpu_sctrl clock node

Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 470461d..710cc34 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -262,6 +262,12 @@
 			#clock-cells = <1>;
 		};
 
+		acpu_sctrl: acpu_sctrl@f7032000 {
+			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
+			reg = <0x0 0xf6504000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
 		medianoc_ade: medianoc_ade@f4520000 {
 			compatible = "syscon";
 			reg = <0x0 0xf4520000 0x0 0x4000>;
-- 
2.7.4

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[PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Zhangfei Gao]

Add acpu_sctrl clock node

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 470461d..710cc34 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -262,6 +262,12 @@
 			#clock-cells = <1>;
 		};
 
+		acpu_sctrl: acpu_sctrl at f7032000 {
+			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
+			reg = <0x0 0xf6504000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
 		medianoc_ade: medianoc_ade at f4520000 {
 			compatible = "syscon";
 			reg = <0x0 0xf4520000 0x0 0x4000>;
-- 
2.7.4

Re: [PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Wei Xu]

Hi Zhangfei,

On 2017/4/18 2:17, Zhangfei Gao wrote:
> Add acpu_sctrl clock node
> 
> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>

Fine to me. Thanks!
Acked-by: Wei Xu <xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>

BR,
Wei

> ---
>  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 470461d..710cc34 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -262,6 +262,12 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		acpu_sctrl: acpu_sctrl@f7032000 {
> +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> +			reg = <0x0 0xf6504000 0x0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
>  		medianoc_ade: medianoc_ade@f4520000 {
>  			compatible = "syscon";
>  			reg = <0x0 0xf4520000 0x0 0x4000>;
> 

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[PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Wei Xu]

Hi Zhangfei,

On 2017/4/18 2:17, Zhangfei Gao wrote:
> Add acpu_sctrl clock node
> 
> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>

Fine to me. Thanks!
Acked-by: Wei Xu <xuwei5@hisilicon.com>

BR,
Wei

> ---
>  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 470461d..710cc34 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -262,6 +262,12 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		acpu_sctrl: acpu_sctrl at f7032000 {
> +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> +			reg = <0x0 0xf6504000 0x0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
>  		medianoc_ade: medianoc_ade at f4520000 {
>  			compatible = "syscon";
>  			reg = <0x0 0xf4520000 0x0 0x4000>;
> 

Re: [PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Wei Xu]

Hi Zhangfei,

On 2017/4/18 2:17, Zhangfei Gao wrote:
> Add acpu_sctrl clock node
> 
> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
> ---
>  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 470461d..710cc34 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -262,6 +262,12 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		acpu_sctrl: acpu_sctrl@f7032000 {
> +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> +			reg = <0x0 0xf6504000 0x0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
>  		medianoc_ade: medianoc_ade@f4520000 {
>  			compatible = "syscon";
>  			reg = <0x0 0xf4520000 0x0 0x4000>;
> 

Thanks!
Applied to the hisilicon dt tree since the driver part is in the mainline now.

Best Regards,
Wei

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[PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Wei Xu]

Hi Zhangfei,

On 2017/4/18 2:17, Zhangfei Gao wrote:
> Add acpu_sctrl clock node
> 
> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
> ---
>  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 470461d..710cc34 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -262,6 +262,12 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		acpu_sctrl: acpu_sctrl at f7032000 {
> +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> +			reg = <0x0 0xf6504000 0x0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
>  		medianoc_ade: medianoc_ade at f4520000 {
>  			compatible = "syscon";
>  			reg = <0x0 0xf4520000 0x0 0x4000>;
> 

Thanks!
Applied to the hisilicon dt tree since the driver part is in the mainline now.

Best Regards,
Wei

Re: [PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Clément Bœsch]

[-- Attachment #1.1: Type: text/plain, Size: 1930 bytes --]

On Tue, Aug 15, 2017 at 02:32:43PM +0100, Wei Xu wrote:
> Hi Zhangfei,
> 
> On 2017/4/18 2:17, Zhangfei Gao wrote:
> > Add acpu_sctrl clock node
> > 
> > Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> > Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
> > ---
> >  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> > index 470461d..710cc34 100644
> > --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> > +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> > @@ -262,6 +262,12 @@
> >  			#clock-cells = <1>;
> >  		};
> >  
> > +		acpu_sctrl: acpu_sctrl@f7032000 {

I think the unit address is incorrect here (this value has been copied
from the pm controller while it should match the 1st one the reg).

> > +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> > +			reg = <0x0 0xf6504000 0x0 0x1000>;
> > +			#clock-cells = <1>;
> > +		};
> > +
> >  		medianoc_ade: medianoc_ade@f4520000 {
> >  			compatible = "syscon";
> >  			reg = <0x0 0xf4520000 0x0 0x4000>;
> > 

Also I'm sorry I'm going to ask stupid questions:

- why 's' in "sctrl" while all the other node controllers declared around
  seems to use "ctrl"?

- is it possible to have access to the specs where those addresses can be
  found? The only public doc I could find is the "Hi6220V100 Multi-Mode
  Application Processor" one where this information doesn't seem present.

- is there any work pending adding the pmu counters node (interrupt
  GCI_SPI 99) ? AFAIK the ACPU controller added here can be used to enable
  the counters.

> 
> Thanks!
> Applied to the hisilicon dt tree since the driver part is in the mainline now.
> 

Is this refering to https://github.com/hisilicon/linux-hisi/commits/next/dt64 ?

[...]

-- 
Clément B.

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[PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Clément Bœsch]

On Tue, Aug 15, 2017 at 02:32:43PM +0100, Wei Xu wrote:
> Hi Zhangfei,
> 
> On 2017/4/18 2:17, Zhangfei Gao wrote:
> > Add acpu_sctrl clock node
> > 
> > Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> > Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
> > ---
> >  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> > index 470461d..710cc34 100644
> > --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> > +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> > @@ -262,6 +262,12 @@
> >  			#clock-cells = <1>;
> >  		};
> >  
> > +		acpu_sctrl: acpu_sctrl at f7032000 {

I think the unit address is incorrect here (this value has been copied
from the pm controller while it should match the 1st one the reg).

> > +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> > +			reg = <0x0 0xf6504000 0x0 0x1000>;
> > +			#clock-cells = <1>;
> > +		};
> > +
> >  		medianoc_ade: medianoc_ade at f4520000 {
> >  			compatible = "syscon";
> >  			reg = <0x0 0xf4520000 0x0 0x4000>;
> > 

Also I'm sorry I'm going to ask stupid questions:

- why 's' in "sctrl" while all the other node controllers declared around
  seems to use "ctrl"?

- is it possible to have access to the specs where those addresses can be
  found? The only public doc I could find is the "Hi6220V100 Multi-Mode
  Application Processor" one where this information doesn't seem present.

- is there any work pending adding the pmu counters node (interrupt
  GCI_SPI 99) ? AFAIK the ACPU controller added here can be used to enable
  the counters.

> 
> Thanks!
> Applied to the hisilicon dt tree since the driver part is in the mainline now.
> 

Is this refering to https://github.com/hisilicon/linux-hisi/commits/next/dt64 ?

[...]

-- 
Cl?ment B.
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Re: [PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Guodong Xu]

On Tue, Aug 15, 2017 at 11:01 PM, Clément Bœsch <u@pkh.me> wrote:
> On Tue, Aug 15, 2017 at 02:32:43PM +0100, Wei Xu wrote:
>> Hi Zhangfei,
>>
>> On 2017/4/18 2:17, Zhangfei Gao wrote:
>> > Add acpu_sctrl clock node
>> >
>> > Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> > Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> > ---
>> >  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>> >  1 file changed, 6 insertions(+)
>> >
>> > diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> > index 470461d..710cc34 100644
>> > --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> > +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> > @@ -262,6 +262,12 @@
>> >                     #clock-cells = <1>;
>> >             };
>> >
>> > +           acpu_sctrl: acpu_sctrl@f7032000 {
>
> I think the unit address is incorrect here (this value has been copied
> from the pm controller while it should match the 1st one the reg).
>
>> > +                   compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
>> > +                   reg = <0x0 0xf6504000 0x0 0x1000>;
>> > +                   #clock-cells = <1>;
>> > +           };
>> > +
>> >             medianoc_ade: medianoc_ade@f4520000 {
>> >                     compatible = "syscon";
>> >                     reg = <0x0 0xf4520000 0x0 0x4000>;
>> >
>
> Also I'm sorry I'm going to ask stupid questions:
>
> - why 's' in "sctrl" while all the other node controllers declared around
>   seems to use "ctrl"?
>
> - is it possible to have access to the specs where those addresses can be
>   found? The only public doc I could find is the "Hi6220V100 Multi-Mode
>   Application Processor" one where this information doesn't seem present.
>

That's the only public doc. But if you need, welcome to discuss with
me off-line about referencing kernels for hikey.

> - is there any work pending adding the pmu counters node (interrupt
>   GCI_SPI 99) ? AFAIK the ACPU controller added here can be used to enable
>   the counters.
>

For hikey PMU, please have a look of this patchset:
 - https://github.com/96boards/linux/pull/86/commits
Discussion is here:
 - https://discuss.96boards.org/t/performance-monitoring-unit-pmu/293/4

Due to its implementation is not compatible with upstream, this
patchset was not upstreamed. If you are interested, welcome to adding
them LKML.

Appreciate your effort.

-Guodong

>>
>> Thanks!
>> Applied to the hisilicon dt tree since the driver part is in the mainline now.
>>
>
> Is this refering to https://github.com/hisilicon/linux-hisi/commits/next/dt64 ?
>
> [...]
>
> --
> Clément B.
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[PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[Guodong Xu]

On Tue, Aug 15, 2017 at 11:01 PM, Cl?ment B?sch <u@pkh.me> wrote:
> On Tue, Aug 15, 2017 at 02:32:43PM +0100, Wei Xu wrote:
>> Hi Zhangfei,
>>
>> On 2017/4/18 2:17, Zhangfei Gao wrote:
>> > Add acpu_sctrl clock node
>> >
>> > Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
>> > Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
>> > ---
>> >  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>> >  1 file changed, 6 insertions(+)
>> >
>> > diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> > index 470461d..710cc34 100644
>> > --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> > +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> > @@ -262,6 +262,12 @@
>> >                     #clock-cells = <1>;
>> >             };
>> >
>> > +           acpu_sctrl: acpu_sctrl at f7032000 {
>
> I think the unit address is incorrect here (this value has been copied
> from the pm controller while it should match the 1st one the reg).
>
>> > +                   compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
>> > +                   reg = <0x0 0xf6504000 0x0 0x1000>;
>> > +                   #clock-cells = <1>;
>> > +           };
>> > +
>> >             medianoc_ade: medianoc_ade at f4520000 {
>> >                     compatible = "syscon";
>> >                     reg = <0x0 0xf4520000 0x0 0x4000>;
>> >
>
> Also I'm sorry I'm going to ask stupid questions:
>
> - why 's' in "sctrl" while all the other node controllers declared around
>   seems to use "ctrl"?
>
> - is it possible to have access to the specs where those addresses can be
>   found? The only public doc I could find is the "Hi6220V100 Multi-Mode
>   Application Processor" one where this information doesn't seem present.
>

That's the only public doc. But if you need, welcome to discuss with
me off-line about referencing kernels for hikey.

> - is there any work pending adding the pmu counters node (interrupt
>   GCI_SPI 99) ? AFAIK the ACPU controller added here can be used to enable
>   the counters.
>

For hikey PMU, please have a look of this patchset:
 - https://github.com/96boards/linux/pull/86/commits
Discussion is here:
 - https://discuss.96boards.org/t/performance-monitoring-unit-pmu/293/4

Due to its implementation is not compatible with upstream, this
patchset was not upstreamed. If you are interested, welcome to adding
them LKML.

Appreciate your effort.

-Guodong

>>
>> Thanks!
>> Applied to the hisilicon dt tree since the driver part is in the mainline now.
>>
>
> Is this refering to https://github.com/hisilicon/linux-hisi/commits/next/dt64 ?
>
> [...]
>
> --
> Cl?ment B.

Re: [PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[zhangfei]

On 2017年08月15日 23:01, Clément Bœsch wrote:
> On Tue, Aug 15, 2017 at 02:32:43PM +0100, Wei Xu wrote:
>> Hi Zhangfei,
>>
>> On 2017/4/18 2:17, Zhangfei Gao wrote:
>>> Add acpu_sctrl clock node
>>>
>>> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>>> Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>>> ---
>>>   arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>>>   1 file changed, 6 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>>> index 470461d..710cc34 100644
>>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>>> @@ -262,6 +262,12 @@
>>>   			#clock-cells = <1>;
>>>   		};
>>>   
>>> +		acpu_sctrl: acpu_sctrl@f7032000 {
> I think the unit address is incorrect here (this value has been copied
> from the pm controller while it should match the 1st one the reg).
oops,
Yes, you are right, will update.
>>> +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
>>> +			reg = <0x0 0xf6504000 0x0 0x1000>;
>>> +			#clock-cells = <1>;
>>> +		};
>>> +
>>>   		medianoc_ade: medianoc_ade@f4520000 {
>>>   			compatible = "syscon";
>>>   			reg = <0x0 0xf4520000 0x0 0x4000>;
>>>
> Also I'm sorry I'm going to ask stupid questions:
>
> - why 's' in "sctrl" while all the other node controllers declared around
>    seems to use "ctrl"?
Just from hisilicon convention, sctrl means system control.
acpu_ctrl seems better, more match spec.
However clk part using this name already been merged, so will keep use this.
>
> - is it possible to have access to the specs where those addresses can be
>    found? The only public doc I could find is the "Hi6220V100 Multi-Mode
>    Application Processor" one where this information doesn't seem present.
https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey/HardwareDocs
Looks only this part.
>
> - is there any work pending adding the pmu counters node (interrupt
>    GCI_SPI 99) ? AFAIK the ACPU controller added here can be used to enable
>    the counters.
This patch is part of enabling core-sight, not touching pmu.
>> Thanks!
>> Applied to the hisilicon dt tree since the driver part is in the mainline now.
>>
> Is this refering to https://github.com/hisilicon/linux-hisi/commits/next/dt64 ?
Yes.
>
> [...]
>

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[PATCH 2/2] arm64: dts: hi6220: add acpu_sctrl

[zhangfei]

On 2017?08?15? 23:01, Cl?ment B?sch wrote:
> On Tue, Aug 15, 2017 at 02:32:43PM +0100, Wei Xu wrote:
>> Hi Zhangfei,
>>
>> On 2017/4/18 2:17, Zhangfei Gao wrote:
>>> Add acpu_sctrl clock node
>>>
>>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
>>> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
>>> ---
>>>   arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
>>>   1 file changed, 6 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>>> index 470461d..710cc34 100644
>>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>>> @@ -262,6 +262,12 @@
>>>   			#clock-cells = <1>;
>>>   		};
>>>   
>>> +		acpu_sctrl: acpu_sctrl at f7032000 {
> I think the unit address is incorrect here (this value has been copied
> from the pm controller while it should match the 1st one the reg).
oops,
Yes, you are right, will update.
>>> +			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
>>> +			reg = <0x0 0xf6504000 0x0 0x1000>;
>>> +			#clock-cells = <1>;
>>> +		};
>>> +
>>>   		medianoc_ade: medianoc_ade at f4520000 {
>>>   			compatible = "syscon";
>>>   			reg = <0x0 0xf4520000 0x0 0x4000>;
>>>
> Also I'm sorry I'm going to ask stupid questions:
>
> - why 's' in "sctrl" while all the other node controllers declared around
>    seems to use "ctrl"?
Just from hisilicon convention, sctrl means system control.
acpu_ctrl seems better, more match spec.
However clk part using this name already been merged, so will keep use this.
>
> - is it possible to have access to the specs where those addresses can be
>    found? The only public doc I could find is the "Hi6220V100 Multi-Mode
>    Application Processor" one where this information doesn't seem present.
https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey/HardwareDocs
Looks only this part.
>
> - is there any work pending adding the pmu counters node (interrupt
>    GCI_SPI 99) ? AFAIK the ACPU controller added here can be used to enable
>    the counters.
This patch is part of enabling core-sight, not touching pmu.
>> Thanks!
>> Applied to the hisilicon dt tree since the driver part is in the mainline now.
>>
> Is this refering to https://github.com/hisilicon/linux-hisi/commits/next/dt64 ?
Yes.
>
> [...]
>

Re: [PATCH 1/2] clk: hi6220: add acpu clock

[Rob Herring]

On Tue, Apr 18, 2017 at 09:17:21AM +0800, Zhangfei Gao wrote:
> Add acpu clock, including sft clock controlling hi6220 coresight module
> 
> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
> ---
>  .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

>  drivers/clk/hisilicon/clk-hi6220.c                 | 23 ++++++++++++++++++++++
>  include/dt-bindings/clock/hi6220-clock.h           |  4 ++++
>  3 files changed, 28 insertions(+)
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[PATCH 1/2] clk: hi6220: add acpu clock

[Rob Herring]

On Tue, Apr 18, 2017 at 09:17:21AM +0800, Zhangfei Gao wrote:
> Add acpu clock, including sft clock controlling hi6220 coresight module
> 
> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
> ---
>  .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +

Acked-by: Rob Herring <robh@kernel.org>

>  drivers/clk/hisilicon/clk-hi6220.c                 | 23 ++++++++++++++++++++++
>  include/dt-bindings/clock/hi6220-clock.h           |  4 ++++
>  3 files changed, 28 insertions(+)

Re: [PATCH 1/2] clk: hi6220: add acpu clock

[zhangfei]

On 2017年04月20日 23:57, Rob Herring wrote:
> On Tue, Apr 18, 2017 at 09:17:21AM +0800, Zhangfei Gao wrote:
>> Add acpu clock, including sft clock controlling hi6220 coresight module
>>
>> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> ---
>>   .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Thanks Rob

Btw, have tested on 4.12-rc1, the patches can be applied directly.
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[PATCH 1/2] clk: hi6220: add acpu clock

[zhangfei]

On 2017?04?20? 23:57, Rob Herring wrote:
> On Tue, Apr 18, 2017 at 09:17:21AM +0800, Zhangfei Gao wrote:
>> Add acpu clock, including sft clock controlling hi6220 coresight module
>>
>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
>> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
>> ---
>>   .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +
> Acked-by: Rob Herring <robh@kernel.org>

Thanks Rob

Btw, have tested on 4.12-rc1, the patches can be applied directly.

Re: [PATCH 1/2] clk: hi6220: add acpu clock

[zhangfei]

Hi, Stephen


Would you mind taking this patch, it's better go through 4.12.


On 2017年05月17日 09:31, zhangfei wrote:
>
>
> On 2017年04月20日 23:57, Rob Herring wrote:
>> On Tue, Apr 18, 2017 at 09:17:21AM +0800, Zhangfei Gao wrote:
>>> Add acpu clock, including sft clock controlling hi6220 coresight module
>>>
>>> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>>> Signed-off-by: Li Pengcheng <lipengcheng8-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>>> ---
>>>   .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +
>> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>
> Thanks Rob
>
> Btw, have tested on 4.12-rc1, the patches can be applied directly.

Thanks
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[PATCH 1/2] clk: hi6220: add acpu clock

[zhangfei]

Hi, Stephen


Would you mind taking this patch, it's better go through 4.12.


On 2017?05?17? 09:31, zhangfei wrote:
>
>
> On 2017?04?20? 23:57, Rob Herring wrote:
>> On Tue, Apr 18, 2017 at 09:17:21AM +0800, Zhangfei Gao wrote:
>>> Add acpu clock, including sft clock controlling hi6220 coresight module
>>>
>>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
>>> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
>>> ---
>>>   .../devicetree/bindings/clock/hi6220-clock.txt     |  1 +
>> Acked-by: Rob Herring <robh@kernel.org>
>
> Thanks Rob
>
> Btw, have tested on 4.12-rc1, the patches can be applied directly.

Thanks