From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Zhi Wang <zhi.a.wang@intel.com>,
Intel graphics driver community testing & development
<intel-gfx@lists.freedesktop.org>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
intel-gvt-dev@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: Pre-calculate engine context size
Date: Wed, 26 Apr 2017 12:52:25 +0300 [thread overview]
Message-ID: <1493200345.4179.7.camel@linux.intel.com> (raw)
In-Reply-To: <59006402.2000804@intel.com>
On ke, 2017-04-26 at 17:10 +0800, Zhi Wang wrote:
> Hi Joonas:
> Can you change GEN8_LR_CONTEXT_RENDER_SIZE = (19 * PAGE_SIZE)?
> Then we don't need the hack in GVT-g. :P Actually it's 19 pages not
> 20 pages on BDW.
The exception is only made for BDW, not Gen8 overall. Has the change
been verified for CHV too?
Why hasn't a patch to fix above been sent for i915 in the past? Just
like in the stolen memory disabling case, bugs should be root caused
and then fixed, not just worked around quickly.
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2017-04-26 9:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-26 9:11 [PATCH 1/2] drm/i915: Pre-calculate engine context size Joonas Lahtinen
2017-04-26 9:10 ` Zhi Wang
2017-04-26 9:52 ` Joonas Lahtinen [this message]
2017-04-26 9:47 ` About the context image size on GEN8+ Zhi Wang
2017-04-26 9:57 ` [PATCH 1/2] drm/i915: Pre-calculate engine context size Zhi Wang
2017-04-26 16:20 ` Daniele Ceraolo Spurio
2017-04-27 2:11 ` Zhi Wang
2017-04-26 9:11 ` [PATCH 2/2] drm/i915: Sanitize hardware context computation Joonas Lahtinen
2017-04-26 9:36 ` [PATCH 1/2] drm/i915: Pre-calculate engine context size Chris Wilson
2017-04-26 9:43 ` ✗ Fi.CI.BAT: warning for series starting with [1/2] " Patchwork
2017-04-26 10:43 ` Saarinen, Jani
2017-04-26 12:36 ` Joonas Lahtinen
2017-04-26 12:43 ` Saarinen, Jani
2017-04-26 13:04 ` Chris Wilson
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