[U-Boot] [PATCH 1/2][v5] armv8: ls2080a: Reorganise NAND_BOOT code in config flag

[U-Boot] [PATCH 1/2][v5] armv8: ls2080a: Reorganise NAND_BOOT code in config flag

[Santan Kumar]

Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
---
Changes in v5:
 Rebase in latest code base

 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
 configs/ls2080aqds_nand_defconfig       | 1 +
 include/configs/ls2080a_common.h        | 2 ++
 include/configs/ls2080aqds.h            | 4 +++-
 4 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 9e3cdd7..76e3af0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -134,7 +134,7 @@ void erratum_a009635(void)
 
 static void erratum_rcw_src(void)
 {
-#if defined(CONFIG_SPL)
+#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
 	u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
 	u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
 	u32 val;
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index aa4f134..2797e43 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -10,6 +10,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
 CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 427f623..12078c3 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -222,8 +222,10 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
 #define CONFIG_SPL_TEXT_BASE		0x1800a000
 
+#ifdef CONFIG_NAND_BOOT
 #define CONFIG_SYS_NAND_U_BOOT_DST	0x80400000
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
+#endif
 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00100000
 #define CONFIG_SYS_SPL_MALLOC_START	0x80200000
 #define CONFIG_SYS_MONITOR_LEN		(640 * 1024)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index beacb99..4c48562 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -197,7 +197,8 @@ unsigned long get_board_ddr_clk(void);
 					FTIM2_GPCM_TWP(0x3E))
 #define CONFIG_SYS_CS3_FTIM3		0x0
 
-#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
+#if defined(CONFIG_SPL)
+#if defined(CONFIG_NAND_BOOT)
 #define CONFIG_SYS_CSPR1_EXT		CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1		CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR1_FINAL		CONFIG_SYS_NOR0_CSPR
@@ -233,6 +234,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SPL_PAD_TO		0x20000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 * 1024)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(640 * 1024)
+#endif
 #else
 #define CONFIG_SYS_CSPR0_EXT		CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0		CONFIG_SYS_NOR0_CSPR_EARLY
-- 
1.9.1

[U-Boot] [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot

[Santan Kumar]

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
---
Changes in v5:
 1. Update MAINTAINERS file
 2. Updated the memory layout

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c            |  6 +--
 .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c    |  6 +--
 board/freescale/ls2080a/ls2080a.c                  |  6 +--
 board/freescale/ls2080aqds/MAINTAINERS             |  1 +
 board/freescale/ls2080aqds/README                  | 13 +++++
 board/freescale/ls2080aqds/eth.c                   |  8 +---
 board/freescale/ls2080aqds/ls2080aqds.c            |  4 +-
 configs/ls2080aqds_sdcard_defconfig                | 55 ++++++++++++++++++++++
 include/configs/ls2080a_common.h                   |  9 +++-
 include/configs/ls2080aqds.h                       | 27 ++++++++++-
 10 files changed, 116 insertions(+), 19 deletions(-)
 create mode 100644 configs/ls2080aqds_sdcard_defconfig

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index bb02960..e5da7a2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -462,7 +462,7 @@ int cpu_eth_init(bd_t *bis)
 {
 	int error = 0;
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	error = fsl_mc_ldpaa_init(bis);
 #endif
 #ifdef CONFIG_FMAN_ENET
@@ -606,7 +606,7 @@ phys_size_t board_reserve_ram_top(phys_size_t ram_size)
 {
 	phys_size_t ram_top = ram_size;
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	/* The start address of MC reserved memory needs to be aligned. */
 	ram_top -= mc_get_dram_block_size();
 	ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1);
@@ -721,7 +721,7 @@ int dram_init_banksize(void)
 	}
 #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	/* Assign memory for MC */
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
 	if (gd->bd->bi_dram[2].size >=
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 955e0b7..ef97556 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -18,7 +18,7 @@ static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
 static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
 #endif
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 int xfi_dpmac[XFI8 + 1];
 int sgmii_dpmac[SGMII16 + 1];
 #endif
@@ -110,7 +110,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask,
 			debug("Unknown SerDes lane protocol %d\n", lane_prtcl);
 		else {
 			serdes_prtcl_map[lane_prtcl] = 1;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 			switch (lane_prtcl) {
 			case QSGMII_A:
 			case QSGMII_B:
@@ -141,7 +141,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask,
 
 void fsl_serdes_init(void)
 {
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	int i , j;
 
 	for (i = XFI1, j = 1; i <= XFI8; i++, j++)
diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c
index 9e7701d..b357eaa 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -64,13 +64,13 @@ int board_eth_init(bd_t *bis)
 	error = smc91111_initialize(0, CONFIG_SMC91111_BASE);
 #endif
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	error = cpu_eth_init(bis);
 #endif
 	return error;
 }
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 void fdt_fixup_board_enet(void *fdt)
 {
 	int offset;
@@ -128,7 +128,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 	fdt_fixup_memory_banks(blob, base, size, 2);
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	fdt_fixup_board_enet(blob);
 #endif
 
diff --git a/board/freescale/ls2080aqds/MAINTAINERS b/board/freescale/ls2080aqds/MAINTAINERS
index 79877d7..62c8fac 100644
--- a/board/freescale/ls2080aqds/MAINTAINERS
+++ b/board/freescale/ls2080aqds/MAINTAINERS
@@ -7,6 +7,7 @@ F:	include/configs/ls2080aqds.h
 F:	configs/ls2080aqds_defconfig
 F:	configs/ls2080aqds_nand_defconfig
 F:	configs/ls2080aqds_qspi_defconfig
+F:	configs/ls2080aqds_sdcard_defconfig
 
 LS2080A_SECURE_BOOT BOARD
 M:	Saksham Jain <saksham.jain@nxp.freescale.com>
diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README
index 2808bd5..d46b394 100644
--- a/board/freescale/ls2080aqds/README
+++ b/board/freescale/ls2080aqds/README
@@ -89,6 +89,19 @@ c) NAND boot
 d) SD boot
 e) QSPI boot
 
+Memory map for SD boot
+-------------------------
+Image				Flash Offset	SD Card
+						Start Block No.
+RCW+PBI				0x00000000	0x00008
+Boot firmware (U-Boot)		0x00100000	0x00800
+Boot firmware Environment	0x00300000	0x01800
+PPA firmware			0x00400000	0x02000
+DPAA2 MC			0x00A00000	0x05000
+DPAA2 DPL			0x00D00000	0x06800
+DPAA2 DPC			0x00E00000	0x07000
+Kernel.itb			0x01000000	0x08000
+
 Environment Variables
 ---------------------
 - mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 59361e9..302ff76 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -22,7 +22,7 @@
 
 #define MC_BOOT_ENV_VAR "mcinitcmd"
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
  /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
  *   Bank 1 -> Lanes A, B, C, D, E, F, G, H
  *   Bank 2 -> Lanes A,B, C, D, E, F, G, H
@@ -834,8 +834,8 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
 int board_eth_init(bd_t *bis)
 {
 	int error;
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	char *mc_boot_env_var;
-#ifdef CONFIG_FSL_MC_ENET
 	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
 	int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) &
 				FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK)
@@ -918,7 +918,3 @@ int board_eth_init(bd_t *bis)
 	error = pci_eth_init(bis);
 	return error;
 }
-
-#ifdef CONFIG_FSL_MC_ENET
-
-#endif
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 6da9c6c..f36fb98 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -280,7 +280,7 @@ int arch_misc_init(void)
 }
 #endif
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 void fdt_fixup_board_enet(void *fdt)
 {
 	int offset;
@@ -336,7 +336,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 	fsl_fdt_fixup_dr_usb(blob, bd);
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	fdt_fixup_board_enet(blob);
 #endif
 
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
new file mode 100644
index 0000000..c1a93b9
--- /dev/null
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS2080AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_FSL_LS_PPA=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 12078c3..8160036 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -197,10 +197,17 @@ unsigned long long get_qixis_addr(void);
 				"earlycon=uart8250,mmio,0x21c0500 " \
 				"ramdisk_size=0x2000000 default_hugepagesz=2m" \
 				" hugepagesz=2m hugepages=256"
+
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_BOOTCOMMAND	"mmc read 0x80200000 0x6800 0x800;"\
+				" fsl_mc apply dpl 0x80200000 &&" \
+				" mmc read $kernel_load $kernel_start" \
+				" $kernel_size && bootm $kernel_load"
+#else
 #define CONFIG_BOOTCOMMAND	"fsl_mc apply dpl 0x580700000 &&" \
 				" cp.b $kernel_start $kernel_load" \
 				" $kernel_size && bootm $kernel_load"
-
+#endif
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 4c48562..44165a9 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -165,12 +165,14 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_LBMAP_DFLTBANK		0x00
 #define QIXIS_LBMAP_ALTBANK		0x04
 #define QIXIS_LBMAP_NAND		0x09
+#define QIXIS_LBMAP_SD			0x00
 #define QIXIS_LBMAP_QSPI		0x0f
 #define QIXIS_RST_CTL_RESET		0x31
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START	0x21
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
 #define QIXIS_RCW_SRC_NAND		0x107
+#define QIXIS_RCW_SRC_SD		0x40
 #define QIXIS_RCW_SRC_QSPI		0x62
 #define	QIXIS_RST_FORCE_MEM		0x01
 
@@ -234,6 +236,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SPL_PAD_TO		0x20000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 * 1024)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(640 * 1024)
+#elif defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET		0x200000
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		0
+#define CONFIG_ENV_SIZE			0x20000
 #endif
 #else
 #define CONFIG_SYS_CSPR0_EXT		CONFIG_SYS_NOR0_CSPR_EXT
@@ -375,7 +382,25 @@ unsigned long get_board_ddr_clk(void);
 	"esbc_validate 0x580cc0000;"            \
 	"fsl_mc start mc 0x580300000"           \
 	" 0x580800000 \0"
+#elif defined(CONFIG_SD_BOOT)
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS               \
+	"hwconfig=fsl_ddr:bank_intlv=auto\0"    \
+	"loadaddr=0x90100000\0"                 \
+	"kernel_addr=0x800\0"                \
+	"ramdisk_addr=0x800000\0"               \
+	"ramdisk_size=0x2000000\0"              \
+	"fdt_high=0xa0000000\0"                 \
+	"initrd_high=0xffffffffffffffff\0"      \
+	"kernel_start=0x8000\0"              \
+	"kernel_load=0xa0000000\0"              \
+	"kernel_size=0x14000\0"               \
+	"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;"  \
+	"mmc read 0x80100000 0x7000 0x800;" \
+	"fsl_mc start mc 0x80000000 0x80100000\0"       \
+	"mcmemsize=0x70000000 \0"
 #else
+#undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS		\
 	"hwconfig=fsl_ddr:bank_intlv=auto\0"	\
 	"loadaddr=0x80100000\0"			\
@@ -393,7 +418,7 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_SECURE_BOOT */
 
 
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 #define CONFIG_FSL_MEMAC
 #define	CONFIG_PHYLIB
 #define CONFIG_PHYLIB_10G
-- 
1.9.1

[U-Boot] [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot

[York Sun]

On 05/05/2017 03:10 AM, Santan Kumar wrote:
> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
> ---
> Changes in v5:
>  1. Update MAINTAINERS file
>  2. Updated the memory layout
>
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c            |  6 +--
>  .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c    |  6 +--
>  board/freescale/ls2080a/ls2080a.c                  |  6 +--
>  board/freescale/ls2080aqds/MAINTAINERS             |  1 +
>  board/freescale/ls2080aqds/README                  | 13 +++++
>  board/freescale/ls2080aqds/eth.c                   |  8 +---
>  board/freescale/ls2080aqds/ls2080aqds.c            |  4 +-
>  configs/ls2080aqds_sdcard_defconfig                | 55 ++++++++++++++++++++++
>  include/configs/ls2080a_common.h                   |  9 +++-
>  include/configs/ls2080aqds.h                       | 27 ++++++++++-
>  10 files changed, 116 insertions(+), 19 deletions(-)
>  create mode 100644 configs/ls2080aqds_sdcard_defconfig
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index bb02960..e5da7a2 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -462,7 +462,7 @@ int cpu_eth_init(bd_t *bis)
>  {
>  	int error = 0;
>
> -#ifdef CONFIG_FSL_MC_ENET
> +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)

You have many changes like this in this patch. Why don't you change the 
Kconfig

--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -96,7 +96,7 @@ config FSL_LSCH3
  config FSL_MC_ENET
         bool "Management Complex network"
         depends on ARCH_LS2080A
-       default y
+       default y if !SPL_BUILD
         select RESV_RAM
         help
           Enable Management Complex (MC) network

Please try it.

York

[U-Boot] [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot

[Santan Kumar]

> -----Original Message-----
> From: York Sun [mailto:york.sun at nxp.com]
> Sent: Friday, May 12, 2017 9:31 PM
> To: Santan Kumar <santan.kumar@nxp.com>; u-boot at lists.denx.de
> Cc: Priyanka Jain <priyanka.jain@nxp.com>; Abhimanyu Saini
> <abhimanyu.saini@nxp.com>
> Subject: Re: [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot
> 
> On 05/05/2017 03:10 AM, Santan Kumar wrote:
> > Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> > Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
> > ---
> > Changes in v5:
> >  1. Update MAINTAINERS file
> >  2. Updated the memory layout
> >
> >  arch/arm/cpu/armv8/fsl-layerscape/cpu.c            |  6 +--
> >  .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c    |  6 +--
> >  board/freescale/ls2080a/ls2080a.c                  |  6 +--
> >  board/freescale/ls2080aqds/MAINTAINERS             |  1 +
> >  board/freescale/ls2080aqds/README                  | 13 +++++
> >  board/freescale/ls2080aqds/eth.c                   |  8 +---
> >  board/freescale/ls2080aqds/ls2080aqds.c            |  4 +-
> >  configs/ls2080aqds_sdcard_defconfig                | 55
> ++++++++++++++++++++++
> >  include/configs/ls2080a_common.h                   |  9 +++-
> >  include/configs/ls2080aqds.h                       | 27 ++++++++++-
> >  10 files changed, 116 insertions(+), 19 deletions(-)  create mode
> > 100644 configs/ls2080aqds_sdcard_defconfig
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > index bb02960..e5da7a2 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > @@ -462,7 +462,7 @@ int cpu_eth_init(bd_t *bis)  {
> >  	int error = 0;
> >
> > -#ifdef CONFIG_FSL_MC_ENET
> > +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> 
> You have many changes like this in this patch. Why don't you change the
> Kconfig
> 
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -96,7 +96,7 @@ config FSL_LSCH3
>   config FSL_MC_ENET
>          bool "Management Complex network"
>          depends on ARCH_LS2080A
> -       default y
> +       default y if !SPL_BUILD
>          select RESV_RAM
>          help
>            Enable Management Complex (MC) network
> 
> Please try it.
> 
> York
[Santan Kumar] I have already tried it. SPL_BUILD flag was not enabled when we this code is executing. That's why I haven't added it in Kconfig.

[U-Boot] [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot

[York Sun]

On 05/14/2017 09:43 PM, Santan Kumar wrote:
>>>
>>> -#ifdef CONFIG_FSL_MC_ENET
>>> +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
>>
>> You have many changes like this in this patch. Why don't you change the
>> Kconfig
>>
>> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> @@ -96,7 +96,7 @@ config FSL_LSCH3
>>   config FSL_MC_ENET
>>          bool "Management Complex network"
>>          depends on ARCH_LS2080A
>> -       default y
>> +       default y if !SPL_BUILD
>>          select RESV_RAM
>>          help
>>            Enable Management Complex (MC) network
>>
>> Please try it.
>>
>> York
> [Santan Kumar] I have already tried it. SPL_BUILD flag was not enabled when we this code is executing. That's why I haven't added it in Kconfig.
>

Thanks for checking.

York

[U-Boot] [PATCH 1/2][v5] armv8: ls2080a: Reorganise NAND_BOOT code in config flag

[york sun]

On 05/05/2017 03:09 AM, Santan Kumar wrote:
> Add CONFIG_NAND_BOOT config flag to organise
> NAND_BOOT specific code in config flag like
> -nand-boot specfic errata errata_rcw_src()
> -CONFIG_SYS_NAND_U_BOOT_DST,etc
> 
> Signed-off-by: Santan Kumar<santan.kumar@nxp.com>
> Signed-off-by: Priyanka Jain<priyanka.jain@nxp.com>
> Signed-off-by: Abhimanyu Saini<abhimanyu.saini@nxp.com>
> ---
> Changes in v5:
>   Rebase in latest code base
> 
>   arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
>   configs/ls2080aqds_nand_defconfig       | 1 +
>   include/configs/ls2080a_common.h        | 2 ++
>   include/configs/ls2080aqds.h            | 4 +++-
>   4 files changed, 7 insertions(+), 2 deletions(-)

You missed ls2080ardb_nand_defconfig.

Added CONFIG_NAND_BOOT=y to ls2080ardb_nand_defconfig. Applied to 
fsl-qoriq master, awaiting upstream. Thanks.

York