* [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization
@ 2017-05-10 9:21 Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 2/7] drm/i915/dp: Check error return during DPCD capability queries Imre Deak
` (6 more replies)
0 siblings, 7 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 9:21 UTC (permalink / raw)
To: intel-gfx
The current code looks like a typo, the specification calls for setting
bits 31:24 to 0x8C, while preserving bits 23:0. Fix things accordingly.
I'm not aware of the typo causing a real problem, so the fix is only for
consistency.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a190973..0a59c1d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6369,8 +6369,8 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv, enum pipe
vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW9(1), reg_val);
reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13);
- reg_val &= 0x8cffffff;
- reg_val = 0x8c000000;
+ reg_val &= 0x00ffffff;
+ reg_val |= 0x8c000000;
vlv_dpio_write(dev_priv, pipe, VLV_REF_DW13, reg_val);
reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1));
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH RESEND-CI 2/7] drm/i915/dp: Check error return during DPCD capability queries
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
@ 2017-05-10 9:21 ` Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 3/7] drm/i915/sdvo: Check error return from intel_sdvo_get_value() Imre Deak
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 9:21 UTC (permalink / raw)
To: intel-gfx
The assumptions of these users of drm_dp_dpcd_readb() is that the passed
in output buffer won't change in case of error, but this isn't
guaranteed. Fix this by treating any error as the lack of the given
capability.
In case of DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP an error would leave the
buffer uninitialized even with the above assumption.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 08834f7..4a6feb6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3088,7 +3088,8 @@ static bool intel_dp_get_y_cord_status(struct intel_dp *intel_dp)
{
uint8_t psr_caps = 0;
- drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_CAPS, &psr_caps);
+ if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_CAPS, &psr_caps) != 1)
+ return false;
return psr_caps & DP_PSR2_SU_Y_COORDINATE_REQUIRED;
}
@@ -3096,9 +3097,9 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
{
uint8_t dprx = 0;
- drm_dp_dpcd_readb(&intel_dp->aux,
- DP_DPRX_FEATURE_ENUMERATION_LIST,
- &dprx);
+ if (drm_dp_dpcd_readb(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST,
+ &dprx) != 1)
+ return false;
return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
}
@@ -3106,7 +3107,9 @@ static bool intel_dp_get_alpm_status(struct intel_dp *intel_dp)
{
uint8_t alpm_caps = 0;
- drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, &alpm_caps);
+ if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP,
+ &alpm_caps) != 1)
+ return false;
return alpm_caps & DP_ALPM_CAP;
}
@@ -3679,9 +3682,10 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
uint8_t frame_sync_cap;
dev_priv->psr.sink_support = true;
- drm_dp_dpcd_readb(&intel_dp->aux,
- DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP,
- &frame_sync_cap);
+ if (drm_dp_dpcd_readb(&intel_dp->aux,
+ DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP,
+ &frame_sync_cap) != 1)
+ frame_sync_cap = 0;
dev_priv->psr.aux_frame_sync = frame_sync_cap ? true : false;
/* PSR2 needs frame sync as well */
dev_priv->psr.psr2_support = dev_priv->psr.aux_frame_sync;
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH RESEND-CI 3/7] drm/i915/sdvo: Check error return from intel_sdvo_get_value()
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 2/7] drm/i915/dp: Check error return during DPCD capability queries Imre Deak
@ 2017-05-10 9:21 ` Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 4/7] drm/i915: Check error return when setting DMA mask Imre Deak
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 9:21 UTC (permalink / raw)
To: intel-gfx
The current code assumes that 'enhancements' won't change in case of an
error, but this isn't guaranteed. Fix things by treating any error as a
lack of the given capability.
v2:
- Remove the now redundant init of enhancements. (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sdvo.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index ef6fa87..6cc1812 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -2875,11 +2875,10 @@ static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
BUILD_BUG_ON(sizeof(enhancements) != 2);
- enhancements.response = 0;
- intel_sdvo_get_value(intel_sdvo,
- SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
- &enhancements, sizeof(enhancements));
- if (enhancements.response == 0) {
+ if (!intel_sdvo_get_value(intel_sdvo,
+ SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
+ &enhancements, sizeof(enhancements)) ||
+ enhancements.response == 0) {
DRM_DEBUG_KMS("No enhancement is supported\n");
return true;
}
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH RESEND-CI 4/7] drm/i915: Check error return when setting DMA mask
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 2/7] drm/i915/dp: Check error return during DPCD capability queries Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 3/7] drm/i915/sdvo: Check error return from intel_sdvo_get_value() Imre Deak
@ 2017-05-10 9:21 ` Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 5/7] drm/i915: Check error return when converting pipe to connector Imre Deak
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 9:21 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Even though an error from these functions isn't fatal we still want to
have a diagnostic message about it.
v2:
- Don't do assignments in if statements. (Jani)
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 8bab4ae..0178c9e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2741,13 +2741,17 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
struct pci_dev *pdev = dev_priv->drm.pdev;
unsigned int size;
u16 snb_gmch_ctl;
+ int err;
/* TODO: We're not aware of mappable constraints on gen8 yet */
ggtt->mappable_base = pci_resource_start(pdev, 2);
ggtt->mappable_end = pci_resource_len(pdev, 2);
- if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(39)))
- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(39));
+ err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
+ if (!err)
+ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(39));
+ if (err)
+ DRM_ERROR("Can't set DMA mask/consistent mask (%d)\n", err);
pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
@@ -2790,6 +2794,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
struct pci_dev *pdev = dev_priv->drm.pdev;
unsigned int size;
u16 snb_gmch_ctl;
+ int err;
ggtt->mappable_base = pci_resource_start(pdev, 2);
ggtt->mappable_end = pci_resource_len(pdev, 2);
@@ -2802,8 +2807,11 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
return -ENXIO;
}
- if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(40)))
- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
+ err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
+ if (!err)
+ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
+ if (err)
+ DRM_ERROR("Can't set DMA mask/consistent mask (%d)\n", err);
pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
ggtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
--
2.7.4
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH RESEND-CI 5/7] drm/i915: Check error return when converting pipe to connector
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
` (2 preceding siblings ...)
2017-05-10 9:21 ` [PATCH RESEND-CI 4/7] drm/i915: Check error return when setting DMA mask Imre Deak
@ 2017-05-10 9:21 ` Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 6/7] drm/i915: Sanitize stolen memory size calculation Imre Deak
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 9:21 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
An error from intel_get_pipe_from_connector() would mean a bug somewhere
else, but we still should check for it to prevent some other more
obscure bug later.
v2:
- Fall back to a reasonable default instead of bailing out in case of
error. (Jani)
v3:
- Fix s/PIPE_INVALID/INVALID_PIPE/ typo. (Jani)
v4:
- Fix bogus bracing around WARN() condition. (Ville)
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_panel.c | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index cb50c52..c8103f8 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -888,10 +888,14 @@ static void pch_enable_backlight(struct intel_connector *connector)
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_panel *panel = &connector->panel;
enum pipe pipe = intel_get_pipe_from_connector(connector);
- enum transcoder cpu_transcoder =
- intel_pipe_to_cpu_transcoder(dev_priv, pipe);
+ enum transcoder cpu_transcoder;
u32 cpu_ctl2, pch_ctl1, pch_ctl2;
+ if (!WARN_ON_ONCE(pipe == INVALID_PIPE))
+ cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, pipe);
+ else
+ cpu_transcoder = TRANSCODER_EDP;
+
cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
if (cpu_ctl2 & BLM_PWM_ENABLE) {
DRM_DEBUG_KMS("cpu backlight already enabled\n");
@@ -973,6 +977,9 @@ static void i965_enable_backlight(struct intel_connector *connector)
enum pipe pipe = intel_get_pipe_from_connector(connector);
u32 ctl, ctl2, freq;
+ if (WARN_ON_ONCE(pipe == INVALID_PIPE))
+ pipe = PIPE_A;
+
ctl2 = I915_READ(BLC_PWM_CTL2);
if (ctl2 & BLM_PWM_ENABLE) {
DRM_DEBUG_KMS("backlight already enabled\n");
@@ -1037,6 +1044,9 @@ static void bxt_enable_backlight(struct intel_connector *connector)
enum pipe pipe = intel_get_pipe_from_connector(connector);
u32 pwm_ctl, val;
+ if (WARN_ON_ONCE(pipe == INVALID_PIPE))
+ pipe = PIPE_A;
+
/* Controller 1 uses the utility pin. */
if (panel->backlight.controller == 1) {
val = I915_READ(UTIL_PIN_CTL);
@@ -1093,7 +1103,8 @@ void intel_panel_enable_backlight(struct intel_connector *connector)
if (!panel->backlight.present)
return;
- DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
+ if (!WARN_ON_ONCE(pipe == INVALID_PIPE))
+ DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
mutex_lock(&dev_priv->backlight_lock);
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH RESEND-CI 6/7] drm/i915: Sanitize stolen memory size calculation
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
` (3 preceding siblings ...)
2017-05-10 9:21 ` [PATCH RESEND-CI 5/7] drm/i915: Check error return when converting pipe to connector Imre Deak
@ 2017-05-10 9:21 ` Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 7/7] drm/i915/lvds: Remove magic from PLL programming Imre Deak
2017-05-10 9:41 ` ✓ Fi.CI.BAT: success for series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization Patchwork
6 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 9:21 UTC (permalink / raw)
To: intel-gfx
On GEN8+ (not counting CHV) the calculation can in theory result in an
incorrect sign extension with all upper bits set. In practice this is
unlikely to happen since it would require 4GB of stolen memory set
aside. For consistency still prevent the sign extension explicitly
everywhere.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 0178c9e..ac2b8f6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2577,14 +2577,14 @@ static size_t gen6_get_stolen_size(u16 snb_gmch_ctl)
{
snb_gmch_ctl >>= SNB_GMCH_GMS_SHIFT;
snb_gmch_ctl &= SNB_GMCH_GMS_MASK;
- return snb_gmch_ctl << 25; /* 32 MB units */
+ return (size_t)snb_gmch_ctl << 25; /* 32 MB units */
}
static size_t gen8_get_stolen_size(u16 bdw_gmch_ctl)
{
bdw_gmch_ctl >>= BDW_GMCH_GMS_SHIFT;
bdw_gmch_ctl &= BDW_GMCH_GMS_MASK;
- return bdw_gmch_ctl << 25; /* 32 MB units */
+ return (size_t)bdw_gmch_ctl << 25; /* 32 MB units */
}
static size_t chv_get_stolen_size(u16 gmch_ctrl)
@@ -2598,11 +2598,11 @@ static size_t chv_get_stolen_size(u16 gmch_ctrl)
* 0x17 to 0x1d: 4MB increments start at 36MB
*/
if (gmch_ctrl < 0x11)
- return gmch_ctrl << 25;
+ return (size_t)gmch_ctrl << 25;
else if (gmch_ctrl < 0x17)
- return (gmch_ctrl - 0x11 + 2) << 22;
+ return (size_t)(gmch_ctrl - 0x11 + 2) << 22;
else
- return (gmch_ctrl - 0x17 + 9) << 22;
+ return (size_t)(gmch_ctrl - 0x17 + 9) << 22;
}
static size_t gen9_get_stolen_size(u16 gen9_gmch_ctl)
@@ -2611,10 +2611,10 @@ static size_t gen9_get_stolen_size(u16 gen9_gmch_ctl)
gen9_gmch_ctl &= BDW_GMCH_GMS_MASK;
if (gen9_gmch_ctl < 0xf0)
- return gen9_gmch_ctl << 25; /* 32 MB units */
+ return (size_t)gen9_gmch_ctl << 25; /* 32 MB units */
else
/* 4MB increments starting at 0xf0 for 4MB */
- return (gen9_gmch_ctl - 0xf0 + 1) << 22;
+ return (size_t)(gen9_gmch_ctl - 0xf0 + 1) << 22;
}
static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH RESEND-CI 7/7] drm/i915/lvds: Remove magic from PLL programming
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
` (4 preceding siblings ...)
2017-05-10 9:21 ` [PATCH RESEND-CI 6/7] drm/i915: Sanitize stolen memory size calculation Imre Deak
@ 2017-05-10 9:21 ` Imre Deak
2017-05-10 9:41 ` ✓ Fi.CI.BAT: success for series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization Patchwork
6 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 9:21 UTC (permalink / raw)
To: intel-gfx
This looks like a left-over from enabling work. The spec defines
CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED as reserved set, so follow
this in the programming.
v2:
- Follow the spec to set CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED.
(Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/dvo_ch7017.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index b3c7c19..80b3e16 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -280,10 +280,10 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
(0 << CH7017_PHASE_DETECTOR_SHIFT);
} else {
outputs_enable = CH7017_LVDS_CHANNEL_A | CH7017_CHARGE_PUMP_HIGH;
- lvds_pll_feedback_div = CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED |
+ lvds_pll_feedback_div =
+ CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED |
(2 << CH7017_LVDS_PLL_FEED_BACK_DIVIDER_SHIFT) |
(3 << CH7017_LVDS_PLL_FEED_FORWARD_DIVIDER_SHIFT);
- lvds_pll_feedback_div = 35;
lvds_control_2 = (3 << CH7017_LOOP_FILTER_SHIFT) |
(0 << CH7017_PHASE_DETECTOR_SHIFT);
if (1) { /* XXX: dual channel panel detection. Assume yes for now. */
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
` (5 preceding siblings ...)
2017-05-10 9:21 ` [PATCH RESEND-CI 7/7] drm/i915/lvds: Remove magic from PLL programming Imre Deak
@ 2017-05-10 9:41 ` Patchwork
2017-05-10 11:20 ` Imre Deak
6 siblings, 1 reply; 9+ messages in thread
From: Patchwork @ 2017-05-10 9:41 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization
URL : https://patchwork.freedesktop.org/series/24215/
State : success
== Summary ==
Series 24215v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/24215/revisions/1/mbox/
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass -> FAIL (fi-snb-2600) fdo#100007
Test gem_exec_suspend:
Subgroup basic-s4-devices:
dmesg-warn -> PASS (fi-kbl-7560u) fdo#100125
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:437s
fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:433s
fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:582s
fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:514s
fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time:543s
fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:494s
fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:492s
fi-elk-e7500 total:278 pass:229 dwarn:0 dfail:0 fail:0 skip:49 time:411s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:413s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:416s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:424s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:491s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:469s
fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:469s
fi-kbl-7560u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:573s
fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:473s
fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time:576s
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:470s
fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:494s
fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:442s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:532s
fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time:415s
01a0c509134a48188628034f6fae0cd92ce7809a drm-tip: 2017y-05m-10d-08h-26m-38s UTC integration manifest
41d8c75 drm/i915/lvds: Remove magic from PLL programming
f67fada drm/i915: Sanitize stolen memory size calculation
64c478e drm/i915: Check error return when converting pipe to connector
dabd6bd drm/i915: Check error return when setting DMA mask
310d3cd drm/i915/sdvo: Check error return from intel_sdvo_get_value()
e04831d drm/i915/dp: Check error return during DPCD capability queries
84e8fc5 drm/i915/vlv: Fix port B PLL opamp initialization
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4655/
_______________________________________________
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: ✓ Fi.CI.BAT: success for series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization
2017-05-10 9:41 ` ✓ Fi.CI.BAT: success for series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization Patchwork
@ 2017-05-10 11:20 ` Imre Deak
0 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2017-05-10 11:20 UTC (permalink / raw)
To: intel-gfx, Ville Syrjälä, Jani Nikula
On Wed, May 10, 2017 at 09:41:13AM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization
> URL : https://patchwork.freedesktop.org/series/24215/
> State : success
I pushed the patchset to -dinq, thanks for the review.
--Imre
>
> == Summary ==
>
> Series 24215v1 Series without cover letter
> https://patchwork.freedesktop.org/api/1.0/series/24215/revisions/1/mbox/
>
> Test gem_exec_flush:
> Subgroup basic-batch-kernel-default-uc:
> pass -> FAIL (fi-snb-2600) fdo#100007
> Test gem_exec_suspend:
> Subgroup basic-s4-devices:
> dmesg-warn -> PASS (fi-kbl-7560u) fdo#100125
>
> fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
> fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
>
> fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:437s
> fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:433s
> fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:582s
> fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:514s
> fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time:543s
> fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:494s
> fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:492s
> fi-elk-e7500 total:278 pass:229 dwarn:0 dfail:0 fail:0 skip:49 time:411s
> fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:413s
> fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:416s
> fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:424s
> fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:491s
> fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:469s
> fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:469s
> fi-kbl-7560u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:573s
> fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:473s
> fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time:576s
> fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:470s
> fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:494s
> fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:442s
> fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:532s
> fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time:415s
>
> 01a0c509134a48188628034f6fae0cd92ce7809a drm-tip: 2017y-05m-10d-08h-26m-38s UTC integration manifest
> 41d8c75 drm/i915/lvds: Remove magic from PLL programming
> f67fada drm/i915: Sanitize stolen memory size calculation
> 64c478e drm/i915: Check error return when converting pipe to connector
> dabd6bd drm/i915: Check error return when setting DMA mask
> 310d3cd drm/i915/sdvo: Check error return from intel_sdvo_get_value()
> e04831d drm/i915/dp: Check error return during DPCD capability queries
> 84e8fc5 drm/i915/vlv: Fix port B PLL opamp initialization
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4655/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2017-05-10 11:20 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-10 9:21 [PATCH RESEND-CI 1/7] drm/i915/vlv: Fix port B PLL opamp initialization Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 2/7] drm/i915/dp: Check error return during DPCD capability queries Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 3/7] drm/i915/sdvo: Check error return from intel_sdvo_get_value() Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 4/7] drm/i915: Check error return when setting DMA mask Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 5/7] drm/i915: Check error return when converting pipe to connector Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 6/7] drm/i915: Sanitize stolen memory size calculation Imre Deak
2017-05-10 9:21 ` [PATCH RESEND-CI 7/7] drm/i915/lvds: Remove magic from PLL programming Imre Deak
2017-05-10 9:41 ` ✓ Fi.CI.BAT: success for series starting with [RESEND-CI,1/7] drm/i915/vlv: Fix port B PLL opamp initialization Patchwork
2017-05-10 11:20 ` Imre Deak
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