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From: Geetha sowjanya <gakula@caviumnetworks.com>
To: will.deacon@arm.com, robin.murphy@arm.com,
	lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org,
	sudeep.holla@arm.com, iommu@lists.linux-foundation.org
Cc: robert.moore@intel.com, lv.zheng@intel.com, rjw@rjwysocki.net,
	jcm@redhat.com, linux-kernel@vger.kernel.org,
	robert.richter@cavium.com, catalin.marinas@arm.com,
	sgoutham@cavium.com, linux-arm-kernel@lists.infradead.org,
	linux-acpi@vger.kernel.org, geethasowjanya.akula@gmail.com,
	devel@acpica.org, linu.cherian@cavium.com,
	Charles.Garcia-Tobin@arm.com,
	Geetha Sowjanya <geethasowjanya.akula@cavium.com>
Subject: [v6 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model
Date: Fri, 12 May 2017 18:11:04 +0530	[thread overview]
Message-ID: <1494592866-14076-2-git-send-email-gakula@caviumnetworks.com> (raw)
In-Reply-To: <1494592866-14076-1-git-send-email-gakula@caviumnetworks.com>

From: Linu Cherian <linu.cherian@cavium.com>

Cavium ThunderX2 implementation doesn't support second page in SMMU
register space. Hence, resource size is set as 64k for this model.

Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
---
 drivers/acpi/arm64/iort.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index c5fecf9..bba2b59 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -833,12 +833,20 @@ static void __init arm_smmu_v3_init_resources(struct resource *res,
 {
 	struct acpi_iort_smmu_v3 *smmu;
 	int num_res = 0;
+	unsigned long size = SZ_128K;
 
 	/* Retrieve SMMUv3 specific data */
 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
 
+	/*
+	 * Override the size, for Cavium ThunderX2 implementation
+	 * which doesn't support the page 1 SMMU register space.
+	 */
+	if (smmu->model == ACPI_IORT_SMMU_CAVIUM_CN99XX)
+		size = SZ_64K;
+
 	res[num_res].start = smmu->base_address;
-	res[num_res].end = smmu->base_address + SZ_128K - 1;
+	res[num_res].end = smmu->base_address + size - 1;
 	res[num_res].flags = IORESOURCE_MEM;
 
 	num_res++;
-- 
1.8.3.1

WARNING: multiple messages have this Message-ID (diff)
From: gakula@caviumnetworks.com (Geetha sowjanya)
To: linux-arm-kernel@lists.infradead.org
Subject: [v6 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model
Date: Fri, 12 May 2017 18:11:04 +0530	[thread overview]
Message-ID: <1494592866-14076-2-git-send-email-gakula@caviumnetworks.com> (raw)
In-Reply-To: <1494592866-14076-1-git-send-email-gakula@caviumnetworks.com>

From: Linu Cherian <linu.cherian@cavium.com>

Cavium ThunderX2 implementation doesn't support second page in SMMU
register space. Hence, resource size is set as 64k for this model.

Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
---
 drivers/acpi/arm64/iort.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index c5fecf9..bba2b59 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -833,12 +833,20 @@ static void __init arm_smmu_v3_init_resources(struct resource *res,
 {
 	struct acpi_iort_smmu_v3 *smmu;
 	int num_res = 0;
+	unsigned long size = SZ_128K;
 
 	/* Retrieve SMMUv3 specific data */
 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
 
+	/*
+	 * Override the size, for Cavium ThunderX2 implementation
+	 * which doesn't support the page 1 SMMU register space.
+	 */
+	if (smmu->model == ACPI_IORT_SMMU_CAVIUM_CN99XX)
+		size = SZ_64K;
+
 	res[num_res].start = smmu->base_address;
-	res[num_res].end = smmu->base_address + SZ_128K - 1;
+	res[num_res].end = smmu->base_address + size - 1;
 	res[num_res].flags = IORESOURCE_MEM;
 
 	num_res++;
-- 
1.8.3.1

  reply	other threads:[~2017-05-12 12:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-12 12:41 [v6 0/3] Cavium ThunderX2 SMMUv3 errata workarounds Geetha sowjanya
2017-05-12 12:41 ` Geetha sowjanya
2017-05-12 12:41 ` Geetha sowjanya [this message]
2017-05-12 12:41   ` [v6 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha sowjanya
     [not found]   ` <1494592866-14076-2-git-send-email-gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2017-05-13  0:33     ` kbuild test robot
2017-05-13  0:33       ` kbuild test robot
2017-05-13  0:33       ` kbuild test robot
2017-05-13  3:18       ` Geetha Akula
2017-05-13  3:18         ` Geetha Akula
     [not found] ` <1494592866-14076-1-git-send-email-gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2017-05-12 12:41   ` [v6 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Geetha sowjanya
2017-05-12 12:41     ` Geetha sowjanya
2017-05-12 12:41     ` Geetha sowjanya
2017-05-13  1:04     ` kbuild test robot
2017-05-13  1:04       ` kbuild test robot
2017-05-16  0:15     ` Rob Herring
2017-05-16  0:15       ` Rob Herring
2017-05-16  0:15       ` Rob Herring
2017-05-18 13:43       ` Geetha Akula
2017-05-18 13:43         ` Geetha Akula
2017-05-18 13:43         ` Geetha Akula
2017-05-17 10:13     ` Shameerali Kolothum Thodi
2017-05-17 10:13       ` Shameerali Kolothum Thodi
2017-05-17 10:13       ` Shameerali Kolothum Thodi
2017-06-06  9:38       ` Hanjun Guo
2017-06-06  9:38         ` [Devel] " Hanjun Guo
2017-06-06  9:38         ` Hanjun Guo
2017-06-06  9:38         ` Hanjun Guo
2017-05-12 12:41   ` [v6 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126 Geetha sowjanya
2017-05-12 12:41     ` Geetha sowjanya
2017-05-12 12:41     ` Geetha sowjanya

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