All of lore.kernel.org
 help / color / mirror / Atom feed
From: Xiaoguang Chen <xiaoguang.chen@intel.com>
To: alex.williamson@redhat.com, kraxel@redhat.com,
	chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, zhenyuw@linux.intel.com,
	zhiyuan.lv@intel.com, intel-gvt-dev@lists.freedesktop.org,
	zhi.a.wang@intel.com, kevin.tian@intel.com
Cc: Xiaoguang Chen <xiaoguang.chen@intel.com>, Bing Niu <bing.niu@intel.com>
Subject: [PATCH v6 2/6] drm/i915/gvt: OpRegion support for GVT-g
Date: Sat, 27 May 2017 16:38:48 +0800	[thread overview]
Message-ID: <1495874332-2851-3-git-send-email-xiaoguang.chen@intel.com> (raw)
In-Reply-To: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com>

OpRegion is needed to support display related operation for
intel vgpu.

A vfio device region is added to intel vgpu to deliver the
host OpRegion information to user space so user space can
construct the OpRegion for vgpu.

Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
---
 drivers/gpu/drm/i915/gvt/kvmgt.c    | 97 +++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/gvt/opregion.c |  8 ++-
 2 files changed, 104 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index 3c6a02b..389f072 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -53,6 +53,8 @@ static const struct intel_gvt_ops *intel_gvt_ops;
 #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
 #define VFIO_PCI_OFFSET_MASK    (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
 
+#define OPREGION_SIGNATURE "IntelGraphicsMem"
+
 struct vfio_region;
 struct intel_vgpu_regops {
 	size_t (*rw)(struct intel_vgpu *vgpu, char *buf,
@@ -436,6 +438,92 @@ static void kvmgt_protect_table_del(struct kvmgt_guest_info *info,
 	}
 }
 
+static size_t intel_vgpu_reg_rw_opregion(struct intel_vgpu *vgpu, char *buf,
+		size_t count, loff_t *ppos, bool iswrite)
+{
+	unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) -
+			VFIO_PCI_NUM_REGIONS;
+	void *base = vgpu->vdev.region[i].data;
+	loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
+
+	if (pos >= vgpu->vdev.region[i].size || iswrite) {
+		gvt_vgpu_err("invalid op or offset for Intel vgpu OpRegion\n");
+		return -EINVAL;
+	}
+	count = min(count, (size_t)(vgpu->vdev.region[i].size - pos));
+	memcpy(buf, base + pos, count);
+
+	return count;
+}
+
+static void intel_vgpu_reg_release_opregion(struct intel_vgpu *vgpu,
+		struct vfio_region *region)
+{
+	memunmap(region->data);
+}
+
+static const struct intel_vgpu_regops intel_vgpu_regops_opregion = {
+	.rw = intel_vgpu_reg_rw_opregion,
+	.release = intel_vgpu_reg_release_opregion,
+};
+
+static int intel_vgpu_register_reg(struct intel_vgpu *vgpu,
+		unsigned int type, unsigned int subtype,
+		const struct intel_vgpu_regops *ops,
+		size_t size, u32 flags, void *data)
+{
+	struct vfio_region *region;
+
+	region = krealloc(vgpu->vdev.region,
+			(vgpu->vdev.num_regions + 1) * sizeof(*region),
+			GFP_KERNEL);
+	if (!region)
+		return -ENOMEM;
+
+	vgpu->vdev.region = region;
+	vgpu->vdev.region[vgpu->vdev.num_regions].type = type;
+	vgpu->vdev.region[vgpu->vdev.num_regions].subtype = subtype;
+	vgpu->vdev.region[vgpu->vdev.num_regions].ops = ops;
+	vgpu->vdev.region[vgpu->vdev.num_regions].size = size;
+	vgpu->vdev.region[vgpu->vdev.num_regions].flags = flags;
+	vgpu->vdev.region[vgpu->vdev.num_regions].data = data;
+	vgpu->vdev.num_regions++;
+
+	return 0;
+}
+
+static int intel_vgpu_reg_init_opregion(struct intel_vgpu *vgpu)
+{
+	unsigned int addr;
+	void *base;
+	int ret;
+
+	addr = vgpu->gvt->opregion.opregion_pa;
+	if (!addr || !(~addr))
+		return -ENODEV;
+
+	base = memremap(addr, OPREGION_SIZE, MEMREMAP_WB);
+	if (!base)
+		return -ENOMEM;
+
+	if (memcmp(base, OPREGION_SIGNATURE, 16)) {
+		memunmap(base);
+		return -EINVAL;
+	}
+
+	ret = intel_vgpu_register_reg(vgpu,
+			PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
+			VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION,
+			&intel_vgpu_regops_opregion, OPREGION_SIZE,
+			VFIO_REGION_INFO_FLAG_READ, base);
+	if (ret) {
+		memunmap(base);
+		return ret;
+	}
+
+	return ret;
+}
+
 static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev)
 {
 	struct intel_vgpu *vgpu = NULL;
@@ -467,6 +555,15 @@ static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev)
 	vgpu->vdev.mdev = mdev;
 	mdev_set_drvdata(mdev, vgpu);
 
+	ret = intel_vgpu_reg_init_opregion(vgpu);
+	if (ret) {
+		gvt_vgpu_err("create OpRegion failed\n");
+		goto out;
+	}
+
+	gvt_dbg_core("create OpRegion succeeded for mdev:%s\n",
+			dev_name(mdev_dev(mdev)));
+
 	gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n",
 		     dev_name(mdev_dev(mdev)));
 	ret = 0;
diff --git a/drivers/gpu/drm/i915/gvt/opregion.c b/drivers/gpu/drm/i915/gvt/opregion.c
index 3117991..5c7496d 100644
--- a/drivers/gpu/drm/i915/gvt/opregion.c
+++ b/drivers/gpu/drm/i915/gvt/opregion.c
@@ -114,6 +114,7 @@ void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu)
 int intel_vgpu_init_opregion(struct intel_vgpu *vgpu, u32 gpa)
 {
 	int ret;
+	unsigned long pfn;
 
 	gvt_dbg_core("vgpu%d: init vgpu opregion\n", vgpu->id);
 
@@ -127,7 +128,12 @@ int intel_vgpu_init_opregion(struct intel_vgpu *vgpu, u32 gpa)
 		ret = map_vgpu_opregion(vgpu, true);
 		if (ret)
 			return ret;
-	}
+	} else {
+		pfn = intel_gvt_hypervisor_gfn_to_mfn(vgpu, gpa >> PAGE_SHIFT);
+		vgpu_opregion(vgpu)->va = memremap(pfn << PAGE_SHIFT,
+						INTEL_GVT_OPREGION_SIZE,
+						MEMREMAP_WB);
+		}
 
 	return 0;
 }
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: Xiaoguang Chen <xiaoguang.chen@intel.com>
To: alex.williamson@redhat.com, kraxel@redhat.com,
	chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, zhenyuw@linux.intel.com,
	zhiyuan.lv@intel.com, intel-gvt-dev@lists.freedesktop.org,
	zhi.a.wang@intel.com, kevin.tian@intel.com
Cc: Xiaoguang Chen <xiaoguang.chen@intel.com>
Subject: [PATCH v6 2/6] drm/i915/gvt: OpRegion support for GVT-g
Date: Sat, 27 May 2017 16:38:48 +0800	[thread overview]
Message-ID: <1495874332-2851-3-git-send-email-xiaoguang.chen@intel.com> (raw)
In-Reply-To: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com>

OpRegion is needed to support display related operation for
intel vgpu.

A vfio device region is added to intel vgpu to deliver the
host OpRegion information to user space so user space can
construct the OpRegion for vgpu.

Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
---
 drivers/gpu/drm/i915/gvt/kvmgt.c    | 97 +++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/gvt/opregion.c |  8 ++-
 2 files changed, 104 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index 3c6a02b..389f072 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -53,6 +53,8 @@ static const struct intel_gvt_ops *intel_gvt_ops;
 #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
 #define VFIO_PCI_OFFSET_MASK    (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
 
+#define OPREGION_SIGNATURE "IntelGraphicsMem"
+
 struct vfio_region;
 struct intel_vgpu_regops {
 	size_t (*rw)(struct intel_vgpu *vgpu, char *buf,
@@ -436,6 +438,92 @@ static void kvmgt_protect_table_del(struct kvmgt_guest_info *info,
 	}
 }
 
+static size_t intel_vgpu_reg_rw_opregion(struct intel_vgpu *vgpu, char *buf,
+		size_t count, loff_t *ppos, bool iswrite)
+{
+	unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) -
+			VFIO_PCI_NUM_REGIONS;
+	void *base = vgpu->vdev.region[i].data;
+	loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
+
+	if (pos >= vgpu->vdev.region[i].size || iswrite) {
+		gvt_vgpu_err("invalid op or offset for Intel vgpu OpRegion\n");
+		return -EINVAL;
+	}
+	count = min(count, (size_t)(vgpu->vdev.region[i].size - pos));
+	memcpy(buf, base + pos, count);
+
+	return count;
+}
+
+static void intel_vgpu_reg_release_opregion(struct intel_vgpu *vgpu,
+		struct vfio_region *region)
+{
+	memunmap(region->data);
+}
+
+static const struct intel_vgpu_regops intel_vgpu_regops_opregion = {
+	.rw = intel_vgpu_reg_rw_opregion,
+	.release = intel_vgpu_reg_release_opregion,
+};
+
+static int intel_vgpu_register_reg(struct intel_vgpu *vgpu,
+		unsigned int type, unsigned int subtype,
+		const struct intel_vgpu_regops *ops,
+		size_t size, u32 flags, void *data)
+{
+	struct vfio_region *region;
+
+	region = krealloc(vgpu->vdev.region,
+			(vgpu->vdev.num_regions + 1) * sizeof(*region),
+			GFP_KERNEL);
+	if (!region)
+		return -ENOMEM;
+
+	vgpu->vdev.region = region;
+	vgpu->vdev.region[vgpu->vdev.num_regions].type = type;
+	vgpu->vdev.region[vgpu->vdev.num_regions].subtype = subtype;
+	vgpu->vdev.region[vgpu->vdev.num_regions].ops = ops;
+	vgpu->vdev.region[vgpu->vdev.num_regions].size = size;
+	vgpu->vdev.region[vgpu->vdev.num_regions].flags = flags;
+	vgpu->vdev.region[vgpu->vdev.num_regions].data = data;
+	vgpu->vdev.num_regions++;
+
+	return 0;
+}
+
+static int intel_vgpu_reg_init_opregion(struct intel_vgpu *vgpu)
+{
+	unsigned int addr;
+	void *base;
+	int ret;
+
+	addr = vgpu->gvt->opregion.opregion_pa;
+	if (!addr || !(~addr))
+		return -ENODEV;
+
+	base = memremap(addr, OPREGION_SIZE, MEMREMAP_WB);
+	if (!base)
+		return -ENOMEM;
+
+	if (memcmp(base, OPREGION_SIGNATURE, 16)) {
+		memunmap(base);
+		return -EINVAL;
+	}
+
+	ret = intel_vgpu_register_reg(vgpu,
+			PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
+			VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION,
+			&intel_vgpu_regops_opregion, OPREGION_SIZE,
+			VFIO_REGION_INFO_FLAG_READ, base);
+	if (ret) {
+		memunmap(base);
+		return ret;
+	}
+
+	return ret;
+}
+
 static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev)
 {
 	struct intel_vgpu *vgpu = NULL;
@@ -467,6 +555,15 @@ static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev)
 	vgpu->vdev.mdev = mdev;
 	mdev_set_drvdata(mdev, vgpu);
 
+	ret = intel_vgpu_reg_init_opregion(vgpu);
+	if (ret) {
+		gvt_vgpu_err("create OpRegion failed\n");
+		goto out;
+	}
+
+	gvt_dbg_core("create OpRegion succeeded for mdev:%s\n",
+			dev_name(mdev_dev(mdev)));
+
 	gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n",
 		     dev_name(mdev_dev(mdev)));
 	ret = 0;
diff --git a/drivers/gpu/drm/i915/gvt/opregion.c b/drivers/gpu/drm/i915/gvt/opregion.c
index 3117991..5c7496d 100644
--- a/drivers/gpu/drm/i915/gvt/opregion.c
+++ b/drivers/gpu/drm/i915/gvt/opregion.c
@@ -114,6 +114,7 @@ void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu)
 int intel_vgpu_init_opregion(struct intel_vgpu *vgpu, u32 gpa)
 {
 	int ret;
+	unsigned long pfn;
 
 	gvt_dbg_core("vgpu%d: init vgpu opregion\n", vgpu->id);
 
@@ -127,7 +128,12 @@ int intel_vgpu_init_opregion(struct intel_vgpu *vgpu, u32 gpa)
 		ret = map_vgpu_opregion(vgpu, true);
 		if (ret)
 			return ret;
-	}
+	} else {
+		pfn = intel_gvt_hypervisor_gfn_to_mfn(vgpu, gpa >> PAGE_SHIFT);
+		vgpu_opregion(vgpu)->va = memremap(pfn << PAGE_SHIFT,
+						INTEL_GVT_OPREGION_SIZE,
+						MEMREMAP_WB);
+		}
 
 	return 0;
 }
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-05-27  8:40 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-27  8:38 [PATCH v6 0/6] drm/i915/gvt: Dma-buf support for GVT-g Xiaoguang Chen
2017-05-27  8:38 ` Xiaoguang Chen
2017-05-27  8:38 ` [PATCH v6 1/6] drm/i915/gvt: Extend the GVT-g architecture to support vfio device region Xiaoguang Chen
2017-05-27  8:38   ` Xiaoguang Chen
2017-05-27  8:38 ` Xiaoguang Chen [this message]
2017-05-27  8:38   ` [PATCH v6 2/6] drm/i915/gvt: OpRegion support for GVT-g Xiaoguang Chen
2017-05-31  4:47   ` Zhenyu Wang
2017-05-31  4:47     ` Zhenyu Wang
2017-05-31  6:22     ` Chen, Xiaoguang
2017-05-31  6:22       ` Chen, Xiaoguang
2017-05-31  6:30       ` Zhenyu Wang
2017-05-31  6:30         ` Zhenyu Wang
2017-05-31  6:44         ` Chen, Xiaoguang
2017-05-31  6:44           ` Chen, Xiaoguang
2017-05-27  8:38 ` [PATCH v6 3/6] drm/i915/gvt: Frame buffer decoder " Xiaoguang Chen
2017-05-27  8:38   ` Xiaoguang Chen
2017-05-31  5:12   ` Zhenyu Wang
2017-05-31  5:12     ` Zhenyu Wang
2017-05-31  6:46     ` Chen, Xiaoguang
2017-05-31  6:46       ` Chen, Xiaoguang
2017-05-27  8:38 ` [PATCH v6 4/6] vfio: Define vfio based vgpu's dma-buf operations Xiaoguang Chen
2017-05-29  7:20   ` Gerd Hoffmann
2017-05-29  7:20     ` Gerd Hoffmann
2017-05-31  6:18     ` Chen, Xiaoguang
2017-05-31  6:18       ` Chen, Xiaoguang
2017-05-31 17:22       ` Kirti Wankhede
2017-05-31 17:22         ` Kirti Wankhede
2017-06-01  3:01         ` Chen, Xiaoguang
2017-06-01  3:01           ` Chen, Xiaoguang
2017-06-01 16:38           ` Alex Williamson
2017-06-01 16:38             ` Alex Williamson
2017-06-01 18:46             ` Kirti Wankhede
2017-06-01 18:46               ` Kirti Wankhede
2017-06-02  8:38               ` Gerd Hoffmann
2017-06-02  8:38                 ` Gerd Hoffmann
2017-06-05  8:26                 ` Kirti Wankhede
2017-06-05  8:26                   ` Kirti Wankhede
2017-06-06  7:59                   ` Gerd Hoffmann
2017-06-06  7:59                     ` Gerd Hoffmann
2017-05-27  8:38 ` [PATCH v6 5/6] drm/i915/gvt: Dmabuf support for GVT-g Xiaoguang Chen
2017-05-27  8:38   ` Xiaoguang Chen
2017-05-31 12:04   ` Gerd Hoffmann
2017-05-31 12:04     ` Gerd Hoffmann
2017-06-01  3:02     ` Chen, Xiaoguang
2017-06-01  3:02       ` Chen, Xiaoguang
2017-06-01  9:15   ` Chris Wilson
2017-06-01  9:15     ` Chris Wilson
2017-05-27  8:38 ` [PATCH v6 6/6] drm/i915/gvt: Adding interface so user space can get the dma-buf Xiaoguang Chen
2017-05-27  8:38   ` Xiaoguang Chen
2017-06-01 18:08   ` Alex Williamson
2017-06-01 18:08     ` Alex Williamson
2017-06-02  3:24     ` Chen, Xiaoguang
2017-06-02  3:24       ` Chen, Xiaoguang
2017-06-02  3:34       ` Alex Williamson
2017-06-02  3:34         ` Alex Williamson
2017-06-02  9:31         ` Chen, Xiaoguang
2017-06-02  9:31           ` Chen, Xiaoguang
2017-06-02 14:58           ` Alex Williamson
2017-06-02 14:58             ` Alex Williamson
2017-06-02 15:23             ` Gerd Hoffmann
2017-06-02 15:23               ` Gerd Hoffmann
2017-06-05  2:39               ` Chen, Xiaoguang
2017-06-05  2:39                 ` Chen, Xiaoguang
2017-06-06  7:35                 ` Gerd Hoffmann
2017-06-06  7:35                   ` Gerd Hoffmann
2017-05-27  8:44 ` ✗ Fi.CI.BAT: failure for drm/i915/gvt: dma-buf support for GVT-g (rev6) Patchwork
2017-05-30 10:23 ` [PATCH v6 0/6] drm/i915/gvt: Dma-buf support for GVT-g Gerd Hoffmann
2017-05-30 10:23   ` Gerd Hoffmann
2017-05-31  2:29   ` Chen, Xiaoguang
2017-05-31  2:29     ` Chen, Xiaoguang
2017-05-31  8:59     ` Gerd Hoffmann
2017-05-31  8:59       ` Gerd Hoffmann
2017-05-31  9:07       ` Chen, Xiaoguang
2017-05-31  9:07         ` Chen, Xiaoguang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1495874332-2851-3-git-send-email-xiaoguang.chen@intel.com \
    --to=xiaoguang.chen@intel.com \
    --cc=alex.williamson@redhat.com \
    --cc=bing.niu@intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-gvt-dev@lists.freedesktop.org \
    --cc=kevin.tian@intel.com \
    --cc=kraxel@redhat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=zhenyuw@linux.intel.com \
    --cc=zhi.a.wang@intel.com \
    --cc=zhiyuan.lv@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.