* [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
@ 2017-05-31 20:22 Samuel Li
[not found] ` <1496262170-4222-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
2017-06-12 9:50 ` [PATCH libdrm] " Michel Dänzer
0 siblings, 2 replies; 21+ messages in thread
From: Samuel Li @ 2017-05-31 20:22 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Samuel Li, Xiaojie Yuan
From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
change printf() to drmMsg(); add initial amdgpu.ids
v4: integrate some recent internal changes, including format changes
v5: fix line number for empty/commented lines; realloc to save memory; indentation changes
v6: remove a line error
Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
---
Makefile.am | 3 +
amdgpu/Makefile.am | 2 +
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 211 +++++++++++++++++++++++++++++++++++++++++++++++
amdgpu/amdgpu_asic_id.h | 165 ------------------------------------
amdgpu/amdgpu_device.c | 28 +++++--
amdgpu/amdgpu_internal.h | 10 +++
include/drm/amdgpu.ids | 170 ++++++++++++++++++++++++++++++++++++++
8 files changed, 418 insertions(+), 173 deletions(-)
create mode 100644 amdgpu/amdgpu_asic_id.c
delete mode 100644 amdgpu/amdgpu_asic_id.h
create mode 100644 include/drm/amdgpu.ids
diff --git a/Makefile.am b/Makefile.am
index dfb8fcd..8de8f6c 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -45,6 +45,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
pkgconfigdir = @pkgconfigdir@
pkgconfig_DATA = libdrm.pc
+libdrmdatadir = $(datadir)/libdrm
+dist_libdrmdata_DATA = include/drm/amdgpu.ids
+export libdrmdatadir
if HAVE_LIBKMS
LIBKMS_SUBDIR = libkms
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..da71c1c 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\"
+
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
libdrm_amdgpu_ladir = $(libdir)
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
LIBDRM_AMDGPU_FILES := \
- amdgpu_asic_id.h \
+ amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 0000000..be39f4e
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include "xf86drm.h"
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+ char *buf, *saveptr;
+ char *s_did;
+ char *s_rid;
+ char *s_name;
+ char *endptr;
+ int r = 0;
+
+ buf = strdup(line);
+ if (!buf)
+ return -ENOMEM;
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ r = -EAGAIN;
+ goto out;
+ }
+
+ /* device id */
+ s_did = strtok_r(buf, ",", &saveptr);
+ if (!s_did) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->did = strtol(s_did, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* revision id */
+ s_rid = strtok_r(NULL, ",", &saveptr);
+ if (!s_rid) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->rid = strtol(s_rid, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* marketing name */
+ s_name = strtok_r(NULL, ",", &saveptr);
+ if (!s_name) {
+ r = -EINVAL;
+ goto out;
+ }
+ /* trim leading whitespaces or tabs */
+ while (*s_name == ' ' || *s_name == '\t')
+ s_name++;
+ if (strlen(s_name) == 0) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->marketing_name = strdup(s_name);
+ if (id->marketing_name == NULL) {
+ r = -EINVAL;
+ goto out;
+ }
+
+out:
+ free(buf);
+
+ return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+ struct amdgpu_asic_id *asic_id_table;
+ struct amdgpu_asic_id *id;
+ FILE *fp;
+ char *line = NULL;
+ size_t len = 0;
+ ssize_t n;
+ int line_num = 1;
+ size_t table_size = 0;
+ size_t table_max_size = 256;
+ int r = 0;
+
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+ if (!fp) {
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ strerror(errno));
+ return -EINVAL;
+ }
+
+ asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto close;
+ }
+
+ /* 1st valid line is file version */
+ while ((n = getline(&line, &len, fp)) != -1) {
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ line_num++;
+ continue;
+ }
+
+ drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
+ break;
+ }
+
+ while ((n = getline(&line, &len, fp)) != -1) {
+ id = asic_id_table + table_size;
+
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ r = parse_one_line(line, id);
+ if (r) {
+ if (r == -EAGAIN) {
+ line_num++;
+ continue;
+ }
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",
+ AMDGPU_ASIC_ID_TABLE, line_num, line);
+ goto free;
+ }
+
+ line_num++;
+ table_size++;
+
+ if (table_size >= table_max_size) {
+ /* double table size */
+ table_max_size *= 2;
+ asic_id_table = realloc(asic_id_table, table_max_size *
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto free;
+ }
+ }
+ }
+
+ /* end of table */
+ id = asic_id_table + table_size;
+ memset(id, 0, sizeof(struct amdgpu_asic_id));
+ asic_id_table = realloc(asic_id_table, (table_size+1) *
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table)
+ r = -ENOMEM;
+
+free:
+ free(line);
+
+ if (r && asic_id_table) {
+ while (table_size--) {
+ id = asic_id_table + table_size;
+ free(id->marketing_name);
+ }
+ free(asic_id_table);
+ asic_id_table = NULL;
+ }
+close:
+ fclose(fp);
+
+ *p_asic_id_table = asic_id_table;
+
+ return r;
+}
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
deleted file mode 100644
index 3e7d736..0000000
--- a/amdgpu/amdgpu_asic_id.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright © 2016 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_ASIC_ID_H__
-#define __AMDGPU_ASIC_ID_H__
-
-static struct amdgpu_asic_id_table_t {
- uint32_t did;
- uint32_t rid;
- const char *marketing_name;
-} const amdgpu_asic_id_table [] = {
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
- {0x6600, 0x81, "AMD Radeon R7 M370"},
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
- {0x6604, 0x81, "AMD Radeon R7 M350"},
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
- {0x6605, 0x81, "AMD Radeon R7 M340"},
- {0x6606, 0x0, "AMD Radeon HD 8790M"},
- {0x6607, 0x0, "AMD Radeon HD8530M"},
- {0x6608, 0x0, "AMD FirePro W2100"},
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
- {0x6610, 0x81, "AMD Radeon R7 350"},
- {0x6610, 0x83, "AMD Radeon R5 340"},
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
- {0x6640, 0x0, "AMD Radeon HD 8950"},
- {0x6640, 0x80, "AMD Radeon R9 M380"},
- {0x6646, 0x0, "AMD Radeon R9 M280X"},
- {0x6646, 0x80, "AMD Radeon R9 M470X"},
- {0x6647, 0x0, "AMD Radeon R9 M270X"},
- {0x6647, 0x80, "AMD Radeon R9 M380"},
- {0x6649, 0x0, "AMD FirePro W5100"},
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
- {0x6660, 0x81, "AMD Radeon R5 M335"},
- {0x6660, 0x83, "AMD Radeon R5 M330"},
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
- {0x6663, 0x83, "AMD Radeon R5 M320"},
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x83, "AMD Radeon R5 M320"},
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
- {0x666F, 0x0, "AMD Radeon HD 8500M"},
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
- {0x6800, 0x0, "AMD Radeon HD 7970M"},
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6820, 0x81, "AMD Radeon R9 M375"},
- {0x6820, 0x83, "AMD Radeon R9 M375X"},
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6821, 0x87, "AMD Radeon R7 M380"},
- {0x6821, 0x83, "AMD Radeon R9 M370X"},
- {0x6822, 0x0, "AMD Radeon E8860"},
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
- {0x682B, 0x87, "AMD Radeon R9 M360"},
- {0x682C, 0x0, "AMD FirePro W4100"},
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
- {0x6900, 0x0, "AMD Radeon R7 M260"},
- {0x6900, 0x81, "AMD Radeon R7 M360"},
- {0x6900, 0x83, "AMD Radeon R7 M340"},
- {0x6901, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x87, "AMD Radeon R5 M315"},
- {0x6920, 0x0, "AMD Radeon R9 M395X"},
- {0x6920, 0x1, "AMD Radeon R9 M390X"},
- {0x6921, 0x0, "AMD Radeon R9 M295X"},
- {0x6929, 0x0, "AMD FirePro S7150"},
- {0x692B, 0x0, "AMD FirePro W7100"},
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},
-
- {0x0000, 0x0, "\0"},
-};
-#endif
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index f473d2d..ed8b346 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -44,7 +44,6 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
-#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
+ const struct amdgpu_asic_id *id;
amdgpu_vamgr_deinit(&dev->vamgr_32);
amdgpu_vamgr_deinit(&dev->vamgr);
util_hash_table_destroy(dev->bo_flink_names);
@@ -140,6 +140,12 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
+ if (dev->asic_ids) {
+ for (id = dev->asic_ids; id->did; id++)
+ free(id->marketing_name);
+
+ free(dev->asic_ids);
+ }
free(dev);
}
@@ -267,6 +273,12 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);
+ if (r) {
+ fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
+ __func__, r);
+ }
+
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
+ const struct amdgpu_asic_id *id;
+
+ if (!dev->asic_ids)
+ return NULL;
- while (t->did) {
- if ((t->did == dev->info.asic_id) &&
- (t->rid == dev->info.pci_rev_id))
- return t->marketing_name;
- t++;
+ for (id = dev->asic_ids; id->did; id++) {
+ if ((id->did == dev->info.asic_id) &&
+ (id->rid == dev->info.pci_rev_id))
+ return id->marketing_name;
}
return NULL;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index cf119a5..e68246b 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -69,6 +69,12 @@ struct amdgpu_va {
struct amdgpu_bo_va_mgr *vamgr;
};
+struct amdgpu_asic_id {
+ uint32_t did;
+ uint32_t rid;
+ char *marketing_name;
+};
+
struct amdgpu_device {
atomic_t refcount;
int fd;
@@ -76,6 +82,8 @@ struct amdgpu_device {
unsigned major_version;
unsigned minor_version;
+ /** Lookup table of asic device id, revision id and marketing name */
+ struct amdgpu_asic_id *asic_ids;
/** List of buffer handles. Protected by bo_table_mutex. */
struct util_hash_table *bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
+
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
diff --git a/include/drm/amdgpu.ids b/include/drm/amdgpu.ids
new file mode 100644
index 0000000..da3b5d2
--- /dev/null
+++ b/include/drm/amdgpu.ids
@@ -0,0 +1,170 @@
+# List of AMDGPU IDs
+#
+# Syntax:
+# device_id, revision_id, product_name <-- single tab after comma
+
+1.0.0
+6600, 0, AMD Radeon HD 8600/8700M
+6600, 81, AMD Radeon (TM) R7 M370
+6601, 0, AMD Radeon (TM) HD 8500M/8700M
+6604, 0, AMD Radeon R7 M265 Series
+6604, 81, AMD Radeon (TM) R7 M350
+6605, 0, AMD Radeon R7 M260 Series
+6605, 81, AMD Radeon (TM) R7 M340
+6606, 0, AMD Radeon HD 8790M
+6607, 0, AMD Radeon (TM) HD8530M
+6608, 0, AMD FirePro W2100
+6610, 0, AMD Radeon HD 8600 Series
+6610, 81, AMD Radeon (TM) R7 350
+6610, 83, AMD Radeon (TM) R5 340
+6611, 0, AMD Radeon HD 8500 Series
+6613, 0, AMD Radeon HD 8500 series
+6617, C7, AMD Radeon R7 240 Series
+6640, 0, AMD Radeon HD 8950
+6640, 80, AMD Radeon (TM) R9 M380
+6646, 0, AMD Radeon R9 M280X
+6646, 80, AMD Radeon (TM) R9 M470X
+6647, 0, AMD Radeon R9 M270X
+6647, 80, AMD Radeon (TM) R9 M380
+6649, 0, AMD FirePro W5100
+6658, 0, AMD Radeon R7 200 Series
+665C, 0, AMD Radeon HD 7700 Series
+665D, 0, AMD Radeon R7 200 Series
+665F, 81, AMD Radeon (TM) R7 300 Series
+6660, 0, AMD Radeon HD 8600M Series
+6660, 81, AMD Radeon (TM) R5 M335
+6660, 83, AMD Radeon (TM) R5 M330
+6663, 0, AMD Radeon HD 8500M Series
+6663, 83, AMD Radeon (TM) R5 M320
+6664, 0, AMD Radeon R5 M200 Series
+6665, 0, AMD Radeon R5 M200 Series
+6665, 83, AMD Radeon (TM) R5 M320
+6667, 0, AMD Radeon R5 M200 Series
+666F, 0, AMD Radeon HD 8500M
+6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
+678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
+6798, 0, AMD Radeon HD 7900 Series
+679A, 0, AMD Radeon HD 7900 Series
+679B, 0, AMD Radeon HD 7900 Series
+679E, 0, AMD Radeon HD 7800 Series
+67A0, 0, AMD Radeon FirePro W9100
+67A1, 0, AMD Radeon FirePro W8100
+67B0, 0, AMD Radeon R9 200 Series
+67B0, 80, AMD Radeon (TM) R9 390 Series
+67B1, 0, AMD Radeon R9 200 Series
+67B1, 80, AMD Radeon (TM) R9 390 Series
+67B9, 0, AMD Radeon R9 200 Series
+67DF, C1, Radeon RX 580 Series
+67DF, C2, Radeon RX 570 Series
+67DF, C3, Radeon RX 580 Series
+67DF, C4, AMD Radeon (TM) RX 480 Graphics
+67DF, C5, AMD Radeon (TM) RX 470 Graphics
+67DF, C6, Radeon RX 570 Series
+67DF, C7, AMD Radeon (TM) RX 480 Graphics
+67DF, CF, AMD Radeon (TM) RX 470 Graphics
+67DF, E3, Radeon RX Series
+67DF, E7, Radeon RX 580 Series
+67DF, EF, Radeon RX 570 Series
+67C2, 0, 67C2:00
+67C2, 01, AMD Radeon (TM) Pro V7350x2
+67C2, 02, AMD Radeon (TM) Pro V7300X
+67C4, 00, AMD Radeon (TM) Pro WX 7100 Graphics
+67C7, 00, AMD Radeon (TM) Pro WX 5100 Graphics
+67C0, 00, AMD Radeon (TM) Pro WX 7100 Graphics
+67D0, 0, 67D0:00
+67D0, 01, AMD Radeon (TM) Pro V7350x2
+67D0, 02, AMD Radeon (TM) Pro V7300X
+67E0, 00, AMD Radeon (TM) Pro WX Series
+67E3, 00, AMD Radeon (TM) Pro WX 4100
+67E8, 00, AMD Radeon (TM) Pro WX Series
+67E8, 01, AMD Radeon (TM) Pro WX Series
+67E8, 80, AMD Radeon (TM) E9260 Graphics
+67EB, 00, AMD Radeon (TM) Pro V5300X
+67EF, C0, AMD Radeon (TM) RX Graphics
+67EF, C1, AMD Radeon (TM) RX 460 Graphics
+67EF, C3, Radeon RX Series
+67EF, C5, AMD Radeon (TM) RX 460 Graphics
+67EF, C7, AMD Radeon (TM) RX Graphics
+67EF, CF, AMD Radeon (TM) RX 460 Graphics
+67EF, E0, 67EF:E0
+67EF, E1, Radeon RX Series
+67EF, E3, Radeon RX Series
+67EF, E5, 67EF:E5
+67EF, E7, Radeon RX Series
+67EF, EF, AMD Radeon (TM) RX Graphics
+67EF, FF, Radeon RX Series
+67FF, C0, AMD Radeon (TM) RX Graphics
+67FF, C1, AMD Radeon (TM) RX Graphics
+67FF, CF, 67FF:CF
+67FF, EF, 67FF:EF
+67FF, FF, Radeon RX 550 Series
+6800, 0, AMD Radeon HD 7970M
+6801, 0, AMD Radeon(TM) HD8970M
+6808, 0, ATI FirePro V(FireGL V) Graphics Adapter
+6809, 0, ATI FirePro V(FireGL V) Graphics Adapter
+6810, 0, AMD Radeon(TM) HD 8800 Series
+6810, 81, AMD Radeon (TM) R7 370 Series
+6811, 0, AMD Radeon(TM) HD8800 Series
+6811, 81, AMD Radeon (TM) R7 300 Series
+6818, 0, AMD Radeon HD 7800 Series
+6819, 0, AMD Radeon HD 7800 Series
+6820, 0, AMD Radeon HD 8800M Series
+6820, 81, AMD Radeon (TM) R9 M375
+6820, 83, AMD Radeon (TM) R9 M375X
+6821, 0, AMD Radeon HD 8800M Series
+6821, 87, AMD Radeon (TM) R7 M380
+6821, 83, AMD Radeon R9 (TM) M370X
+6822, 0, AMD Radeon E8860
+6823, 0, AMD Radeon HD 8800M Series
+6825, 0, AMD Radeon HD 7800M Series
+6827, 0, AMD Radeon HD 7800M Series
+6828, 0, ATI FirePro V(FireGL V) Graphics Adapter
+682B, 0, AMD Radeon HD 8800M Series
+682B, 87, AMD Radeon (TM) R9 M360
+682C, 0, AMD FirePro W4100
+682D, 0, AMD Radeon HD 7700M Series
+682F, 0, AMD Radeon HD 7700M Series
+6835, 0, AMD Radeon R7 Series / HD 9000 Series
+6837, 0, AMD Radeon HD7700 Series
+683D, 0, AMD Radeon HD 7700 Series
+683F, 0, AMD Radeon HD 7700 Series
+6900, 0, AMD Radeon R7 M260
+6900, 81, AMD Radeon (TM) R7 M360
+6900, 83, AMD Radeon (TM) R7 M340
+6901, 0, AMD Radeon R5 M255
+6907, 0, AMD Radeon R5 M255
+6907, 87, AMD Radeon (TM) R5 M315
+6920, 0, AMD RADEON R9 M395X
+6920, 1, AMD RADEON R9 M390X
+6921, 0, AMD Radeon R9 M295X
+6929, 0, AMD FirePro S7150
+692B, 0, AMD FirePro W7100
+6938, 0, AMD Radeon R9 200 Series
+6938, F0, AMD Radeon R9 200 Series
+6938, F1, AMD Radeon (TM) R9 380 Series
+6939, F0, AMD Radeon R9 200 Series
+6939, 0, AMD Radeon R9 200 Series
+6939, F1, AMD Radeon (TM) R9 380 Series
+6980, 00, 6980:00
+6981, C0, 6981:C0
+6985, 00, AMD Radeon Pro WX3100
+6987, 80, 6987:80
+6995, 00, AMD Radeon Pro WX2100
+699F, 81, 699F:81
+699F, C0, Radeon 500 Series
+699F, C1, 699F:C1
+699F, C3, Radeon 500 Series
+699F, C7, Radeon RX 550 Series
+7300, C1, AMD FirePro (TM) S9300 x2
+7300, C8, AMD Radeon (TM) R9 Fury Series
+7300, C9, Radeon (TM) Pro Duo
+7300, CB, AMD Radeon (TM) R9 Fury Series
+7300, CA, AMD Radeon (TM) R9 Fury Series
+9874, C4, AMD Radeon R7 Graphics
+9874, C5, AMD Radeon R6 Graphics
+9874, C6, AMD Radeon R6 Graphics
+9874, C7, AMD Radeon R5 Graphics
+9874, 81, AMD Radeon R6 Graphics
+9874, 87, AMD Radeon R5 Graphics
+9874, 85, AMD Radeon R6 Graphics
+9874, 84, AMD Radeon R7 Graphics
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
[not found] ` <1496262170-4222-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
@ 2017-05-31 22:11 ` Alex Deucher
2017-06-05 2:09 ` Michel Dänzer
2017-06-06 13:43 ` Emil Velikov
2 siblings, 0 replies; 21+ messages in thread
From: Alex Deucher @ 2017-05-31 22:11 UTC (permalink / raw)
To: Samuel Li; +Cc: amd-gfx list, Xiaojie Yuan
On Wed, May 31, 2017 at 4:22 PM, Samuel Li <Samuel.Li@amd.com> wrote:
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal changes, including format changes
> v5: fix line number for empty/commented lines; realloc to save memory; indentation changes
> v6: remove a line error
>
> Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> Makefile.am | 3 +
> amdgpu/Makefile.am | 2 +
> amdgpu/Makefile.sources | 2 +-
> amdgpu/amdgpu_asic_id.c | 211 +++++++++++++++++++++++++++++++++++++++++++++++
> amdgpu/amdgpu_asic_id.h | 165 ------------------------------------
> amdgpu/amdgpu_device.c | 28 +++++--
> amdgpu/amdgpu_internal.h | 10 +++
> include/drm/amdgpu.ids | 170 ++++++++++++++++++++++++++++++++++++++
> 8 files changed, 418 insertions(+), 173 deletions(-)
> create mode 100644 amdgpu/amdgpu_asic_id.c
> delete mode 100644 amdgpu/amdgpu_asic_id.h
> create mode 100644 include/drm/amdgpu.ids
>
> diff --git a/Makefile.am b/Makefile.am
> index dfb8fcd..8de8f6c 100644
> --- a/Makefile.am
> +++ b/Makefile.am
> @@ -45,6 +45,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
>
> pkgconfigdir = @pkgconfigdir@
> pkgconfig_DATA = libdrm.pc
> +libdrmdatadir = $(datadir)/libdrm
> +dist_libdrmdata_DATA = include/drm/amdgpu.ids
> +export libdrmdatadir
>
> if HAVE_LIBKMS
> LIBKMS_SUBDIR = libkms
> diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
> index cf7bc1b..da71c1c 100644
> --- a/amdgpu/Makefile.am
> +++ b/amdgpu/Makefile.am
> @@ -30,6 +30,8 @@ AM_CFLAGS = \
> $(PTHREADSTUBS_CFLAGS) \
> -I$(top_srcdir)/include/drm
>
> +AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\"
> +
> libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
> libdrm_amdgpu_ladir = $(libdir)
> libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
> diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
> index 487b9e0..bc3abaa 100644
> --- a/amdgpu/Makefile.sources
> +++ b/amdgpu/Makefile.sources
> @@ -1,5 +1,5 @@
> LIBDRM_AMDGPU_FILES := \
> - amdgpu_asic_id.h \
> + amdgpu_asic_id.c \
> amdgpu_bo.c \
> amdgpu_cs.c \
> amdgpu_device.c \
> diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
> new file mode 100644
> index 0000000..be39f4e
> --- /dev/null
> +++ b/amdgpu/amdgpu_asic_id.c
> @@ -0,0 +1,211 @@
> +/*
> + * Copyright © 2017 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifdef HAVE_CONFIG_H
> +#include "config.h"
> +#endif
> +
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <stdint.h>
> +#include <string.h>
> +#include <unistd.h>
> +#include <errno.h>
> +
> +#include "xf86drm.h"
> +#include "amdgpu_drm.h"
> +#include "amdgpu_internal.h"
> +
> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
> +{
> + char *buf, *saveptr;
> + char *s_did;
> + char *s_rid;
> + char *s_name;
> + char *endptr;
> + int r = 0;
> +
> + buf = strdup(line);
> + if (!buf)
> + return -ENOMEM;
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + r = -EAGAIN;
> + goto out;
> + }
> +
> + /* device id */
> + s_did = strtok_r(buf, ",", &saveptr);
> + if (!s_did) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->did = strtol(s_did, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* revision id */
> + s_rid = strtok_r(NULL, ",", &saveptr);
> + if (!s_rid) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->rid = strtol(s_rid, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* marketing name */
> + s_name = strtok_r(NULL, ",", &saveptr);
> + if (!s_name) {
> + r = -EINVAL;
> + goto out;
> + }
> + /* trim leading whitespaces or tabs */
> + while (*s_name == ' ' || *s_name == '\t')
> + s_name++;
> + if (strlen(s_name) == 0) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->marketing_name = strdup(s_name);
> + if (id->marketing_name == NULL) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> +out:
> + free(buf);
> +
> + return r;
> +}
> +
> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
> +{
> + struct amdgpu_asic_id *asic_id_table;
> + struct amdgpu_asic_id *id;
> + FILE *fp;
> + char *line = NULL;
> + size_t len = 0;
> + ssize_t n;
> + int line_num = 1;
> + size_t table_size = 0;
> + size_t table_max_size = 256;
> + int r = 0;
> +
> + fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
> + if (!fp) {
> + fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
> + strerror(errno));
> + return -EINVAL;
> + }
> +
> + asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto close;
> + }
> +
> + /* 1st valid line is file version */
> + while ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + line_num++;
> + continue;
> + }
> +
> + drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + break;
> + }
> +
> + while ((n = getline(&line, &len, fp)) != -1) {
> + id = asic_id_table + table_size;
> +
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + r = parse_one_line(line, id);
> + if (r) {
> + if (r == -EAGAIN) {
> + line_num++;
> + continue;
> + }
> + fprintf(stderr, "Invalid format: %s: line %d: %s\n",
> + AMDGPU_ASIC_ID_TABLE, line_num, line);
> + goto free;
> + }
> +
> + line_num++;
> + table_size++;
> +
> + if (table_size >= table_max_size) {
> + /* double table size */
> + table_max_size *= 2;
> + asic_id_table = realloc(asic_id_table, table_max_size *
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto free;
> + }
> + }
> + }
> +
> + /* end of table */
> + id = asic_id_table + table_size;
> + memset(id, 0, sizeof(struct amdgpu_asic_id));
> + asic_id_table = realloc(asic_id_table, (table_size+1) *
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table)
> + r = -ENOMEM;
> +
> +free:
> + free(line);
> +
> + if (r && asic_id_table) {
> + while (table_size--) {
> + id = asic_id_table + table_size;
> + free(id->marketing_name);
> + }
> + free(asic_id_table);
> + asic_id_table = NULL;
> + }
> +close:
> + fclose(fp);
> +
> + *p_asic_id_table = asic_id_table;
> +
> + return r;
> +}
> diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
> deleted file mode 100644
> index 3e7d736..0000000
> --- a/amdgpu/amdgpu_asic_id.h
> +++ /dev/null
> @@ -1,165 +0,0 @@
> -/*
> - * Copyright © 2016 Advanced Micro Devices, Inc.
> - * All Rights Reserved.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - */
> -
> -#ifndef __AMDGPU_ASIC_ID_H__
> -#define __AMDGPU_ASIC_ID_H__
> -
> -static struct amdgpu_asic_id_table_t {
> - uint32_t did;
> - uint32_t rid;
> - const char *marketing_name;
> -} const amdgpu_asic_id_table [] = {
> - {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
> - {0x6600, 0x81, "AMD Radeon R7 M370"},
> - {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
> - {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
> - {0x6604, 0x81, "AMD Radeon R7 M350"},
> - {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
> - {0x6605, 0x81, "AMD Radeon R7 M340"},
> - {0x6606, 0x0, "AMD Radeon HD 8790M"},
> - {0x6607, 0x0, "AMD Radeon HD8530M"},
> - {0x6608, 0x0, "AMD FirePro W2100"},
> - {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
> - {0x6610, 0x81, "AMD Radeon R7 350"},
> - {0x6610, 0x83, "AMD Radeon R5 340"},
> - {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
> - {0x6613, 0x0, "AMD Radeon HD 8500 series"},
> - {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
> - {0x6640, 0x0, "AMD Radeon HD 8950"},
> - {0x6640, 0x80, "AMD Radeon R9 M380"},
> - {0x6646, 0x0, "AMD Radeon R9 M280X"},
> - {0x6646, 0x80, "AMD Radeon R9 M470X"},
> - {0x6647, 0x0, "AMD Radeon R9 M270X"},
> - {0x6647, 0x80, "AMD Radeon R9 M380"},
> - {0x6649, 0x0, "AMD FirePro W5100"},
> - {0x6658, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x665D, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665F, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
> - {0x6660, 0x81, "AMD Radeon R5 M335"},
> - {0x6660, 0x83, "AMD Radeon R5 M330"},
> - {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
> - {0x6663, 0x83, "AMD Radeon R5 M320"},
> - {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x83, "AMD Radeon R5 M320"},
> - {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x666F, 0x0, "AMD Radeon HD 8500M"},
> - {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
> - {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
> - {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
> - {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
> - {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
> - {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
> - {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
> - {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
> - {0x6800, 0x0, "AMD Radeon HD 7970M"},
> - {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
> - {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
> - {0x6810, 0x81, "AMD Radeon R7 370 Series"},
> - {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
> - {0x6811, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6820, 0x81, "AMD Radeon R9 M375"},
> - {0x6820, 0x83, "AMD Radeon R9 M375X"},
> - {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6821, 0x87, "AMD Radeon R7 M380"},
> - {0x6821, 0x83, "AMD Radeon R9 M370X"},
> - {0x6822, 0x0, "AMD Radeon E8860"},
> - {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x682B, 0x87, "AMD Radeon R9 M360"},
> - {0x682C, 0x0, "AMD FirePro W4100"},
> - {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
> - {0x6837, 0x0, "AMD Radeon HD7700 Series"},
> - {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x6900, 0x0, "AMD Radeon R7 M260"},
> - {0x6900, 0x81, "AMD Radeon R7 M360"},
> - {0x6900, 0x83, "AMD Radeon R7 M340"},
> - {0x6901, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x87, "AMD Radeon R5 M315"},
> - {0x6920, 0x0, "AMD Radeon R9 M395X"},
> - {0x6920, 0x1, "AMD Radeon R9 M390X"},
> - {0x6921, 0x0, "AMD Radeon R9 M295X"},
> - {0x6929, 0x0, "AMD FirePro S7150"},
> - {0x692B, 0x0, "AMD FirePro W7100"},
> - {0x6938, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
> - {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
> - {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x81, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x87, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x85, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x84, "AMD Radeon R7 Graphics"},
> -
> - {0x0000, 0x0, "\0"},
> -};
> -#endif
> diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
> index f473d2d..ed8b346 100644
> --- a/amdgpu/amdgpu_device.c
> +++ b/amdgpu/amdgpu_device.c
> @@ -44,7 +44,6 @@
> #include "amdgpu_internal.h"
> #include "util_hash_table.h"
> #include "util_math.h"
> -#include "amdgpu_asic_id.h"
>
> #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
> #define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
> @@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
>
> static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> {
> + const struct amdgpu_asic_id *id;
> amdgpu_vamgr_deinit(&dev->vamgr_32);
> amdgpu_vamgr_deinit(&dev->vamgr);
> util_hash_table_destroy(dev->bo_flink_names);
> @@ -140,6 +140,12 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> close(dev->fd);
> if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
> close(dev->flink_fd);
> + if (dev->asic_ids) {
> + for (id = dev->asic_ids; id->did; id++)
> + free(id->marketing_name);
> +
> + free(dev->asic_ids);
> + }
> free(dev);
> }
>
> @@ -267,6 +273,12 @@ int amdgpu_device_initialize(int fd,
> amdgpu_vamgr_init(&dev->vamgr_32, start, max,
> dev->dev_info.virtual_address_alignment);
>
> + r = amdgpu_parse_asic_ids(&dev->asic_ids);
> + if (r) {
> + fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
> + __func__, r);
> + }
> +
> *major_version = dev->major_version;
> *minor_version = dev->minor_version;
> *device_handle = dev;
> @@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
>
> const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
> {
> - const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
> + const struct amdgpu_asic_id *id;
> +
> + if (!dev->asic_ids)
> + return NULL;
>
> - while (t->did) {
> - if ((t->did == dev->info.asic_id) &&
> - (t->rid == dev->info.pci_rev_id))
> - return t->marketing_name;
> - t++;
> + for (id = dev->asic_ids; id->did; id++) {
> + if ((id->did == dev->info.asic_id) &&
> + (id->rid == dev->info.pci_rev_id))
> + return id->marketing_name;
> }
>
> return NULL;
> diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
> index cf119a5..e68246b 100644
> --- a/amdgpu/amdgpu_internal.h
> +++ b/amdgpu/amdgpu_internal.h
> @@ -69,6 +69,12 @@ struct amdgpu_va {
> struct amdgpu_bo_va_mgr *vamgr;
> };
>
> +struct amdgpu_asic_id {
> + uint32_t did;
> + uint32_t rid;
> + char *marketing_name;
> +};
> +
> struct amdgpu_device {
> atomic_t refcount;
> int fd;
> @@ -76,6 +82,8 @@ struct amdgpu_device {
> unsigned major_version;
> unsigned minor_version;
>
> + /** Lookup table of asic device id, revision id and marketing name */
> + struct amdgpu_asic_id *asic_ids;
> /** List of buffer handles. Protected by bo_table_mutex. */
> struct util_hash_table *bo_handles;
> /** List of buffer GEM flink names. Protected by bo_table_mutex. */
> @@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
> drm_private void
> amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
>
> +drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
> +
> drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
>
> drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
> diff --git a/include/drm/amdgpu.ids b/include/drm/amdgpu.ids
> new file mode 100644
> index 0000000..da3b5d2
> --- /dev/null
> +++ b/include/drm/amdgpu.ids
> @@ -0,0 +1,170 @@
> +# List of AMDGPU IDs
> +#
> +# Syntax:
> +# device_id, revision_id, product_name <-- single tab after comma
> +
> +1.0.0
> +6600, 0, AMD Radeon HD 8600/8700M
> +6600, 81, AMD Radeon (TM) R7 M370
> +6601, 0, AMD Radeon (TM) HD 8500M/8700M
> +6604, 0, AMD Radeon R7 M265 Series
> +6604, 81, AMD Radeon (TM) R7 M350
> +6605, 0, AMD Radeon R7 M260 Series
> +6605, 81, AMD Radeon (TM) R7 M340
> +6606, 0, AMD Radeon HD 8790M
> +6607, 0, AMD Radeon (TM) HD8530M
> +6608, 0, AMD FirePro W2100
> +6610, 0, AMD Radeon HD 8600 Series
> +6610, 81, AMD Radeon (TM) R7 350
> +6610, 83, AMD Radeon (TM) R5 340
> +6611, 0, AMD Radeon HD 8500 Series
> +6613, 0, AMD Radeon HD 8500 series
> +6617, C7, AMD Radeon R7 240 Series
> +6640, 0, AMD Radeon HD 8950
> +6640, 80, AMD Radeon (TM) R9 M380
> +6646, 0, AMD Radeon R9 M280X
> +6646, 80, AMD Radeon (TM) R9 M470X
> +6647, 0, AMD Radeon R9 M270X
> +6647, 80, AMD Radeon (TM) R9 M380
> +6649, 0, AMD FirePro W5100
> +6658, 0, AMD Radeon R7 200 Series
> +665C, 0, AMD Radeon HD 7700 Series
> +665D, 0, AMD Radeon R7 200 Series
> +665F, 81, AMD Radeon (TM) R7 300 Series
> +6660, 0, AMD Radeon HD 8600M Series
> +6660, 81, AMD Radeon (TM) R5 M335
> +6660, 83, AMD Radeon (TM) R5 M330
> +6663, 0, AMD Radeon HD 8500M Series
> +6663, 83, AMD Radeon (TM) R5 M320
> +6664, 0, AMD Radeon R5 M200 Series
> +6665, 0, AMD Radeon R5 M200 Series
> +6665, 83, AMD Radeon (TM) R5 M320
> +6667, 0, AMD Radeon R5 M200 Series
> +666F, 0, AMD Radeon HD 8500M
> +6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +6798, 0, AMD Radeon HD 7900 Series
> +679A, 0, AMD Radeon HD 7900 Series
> +679B, 0, AMD Radeon HD 7900 Series
> +679E, 0, AMD Radeon HD 7800 Series
> +67A0, 0, AMD Radeon FirePro W9100
> +67A1, 0, AMD Radeon FirePro W8100
> +67B0, 0, AMD Radeon R9 200 Series
> +67B0, 80, AMD Radeon (TM) R9 390 Series
> +67B1, 0, AMD Radeon R9 200 Series
> +67B1, 80, AMD Radeon (TM) R9 390 Series
> +67B9, 0, AMD Radeon R9 200 Series
> +67DF, C1, Radeon RX 580 Series
> +67DF, C2, Radeon RX 570 Series
> +67DF, C3, Radeon RX 580 Series
> +67DF, C4, AMD Radeon (TM) RX 480 Graphics
> +67DF, C5, AMD Radeon (TM) RX 470 Graphics
> +67DF, C6, Radeon RX 570 Series
> +67DF, C7, AMD Radeon (TM) RX 480 Graphics
> +67DF, CF, AMD Radeon (TM) RX 470 Graphics
> +67DF, E3, Radeon RX Series
> +67DF, E7, Radeon RX 580 Series
> +67DF, EF, Radeon RX 570 Series
> +67C2, 0, 67C2:00
> +67C2, 01, AMD Radeon (TM) Pro V7350x2
> +67C2, 02, AMD Radeon (TM) Pro V7300X
> +67C4, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67C7, 00, AMD Radeon (TM) Pro WX 5100 Graphics
> +67C0, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67D0, 0, 67D0:00
> +67D0, 01, AMD Radeon (TM) Pro V7350x2
> +67D0, 02, AMD Radeon (TM) Pro V7300X
> +67E0, 00, AMD Radeon (TM) Pro WX Series
> +67E3, 00, AMD Radeon (TM) Pro WX 4100
> +67E8, 00, AMD Radeon (TM) Pro WX Series
> +67E8, 01, AMD Radeon (TM) Pro WX Series
> +67E8, 80, AMD Radeon (TM) E9260 Graphics
> +67EB, 00, AMD Radeon (TM) Pro V5300X
> +67EF, C0, AMD Radeon (TM) RX Graphics
> +67EF, C1, AMD Radeon (TM) RX 460 Graphics
> +67EF, C3, Radeon RX Series
> +67EF, C5, AMD Radeon (TM) RX 460 Graphics
> +67EF, C7, AMD Radeon (TM) RX Graphics
> +67EF, CF, AMD Radeon (TM) RX 460 Graphics
> +67EF, E0, 67EF:E0
> +67EF, E1, Radeon RX Series
> +67EF, E3, Radeon RX Series
> +67EF, E5, 67EF:E5
> +67EF, E7, Radeon RX Series
> +67EF, EF, AMD Radeon (TM) RX Graphics
> +67EF, FF, Radeon RX Series
> +67FF, C0, AMD Radeon (TM) RX Graphics
> +67FF, C1, AMD Radeon (TM) RX Graphics
> +67FF, CF, 67FF:CF
> +67FF, EF, 67FF:EF
> +67FF, FF, Radeon RX 550 Series
> +6800, 0, AMD Radeon HD 7970M
> +6801, 0, AMD Radeon(TM) HD8970M
> +6808, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6809, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6810, 0, AMD Radeon(TM) HD 8800 Series
> +6810, 81, AMD Radeon (TM) R7 370 Series
> +6811, 0, AMD Radeon(TM) HD8800 Series
> +6811, 81, AMD Radeon (TM) R7 300 Series
> +6818, 0, AMD Radeon HD 7800 Series
> +6819, 0, AMD Radeon HD 7800 Series
> +6820, 0, AMD Radeon HD 8800M Series
> +6820, 81, AMD Radeon (TM) R9 M375
> +6820, 83, AMD Radeon (TM) R9 M375X
> +6821, 0, AMD Radeon HD 8800M Series
> +6821, 87, AMD Radeon (TM) R7 M380
> +6821, 83, AMD Radeon R9 (TM) M370X
> +6822, 0, AMD Radeon E8860
> +6823, 0, AMD Radeon HD 8800M Series
> +6825, 0, AMD Radeon HD 7800M Series
> +6827, 0, AMD Radeon HD 7800M Series
> +6828, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +682B, 0, AMD Radeon HD 8800M Series
> +682B, 87, AMD Radeon (TM) R9 M360
> +682C, 0, AMD FirePro W4100
> +682D, 0, AMD Radeon HD 7700M Series
> +682F, 0, AMD Radeon HD 7700M Series
> +6835, 0, AMD Radeon R7 Series / HD 9000 Series
> +6837, 0, AMD Radeon HD7700 Series
> +683D, 0, AMD Radeon HD 7700 Series
> +683F, 0, AMD Radeon HD 7700 Series
> +6900, 0, AMD Radeon R7 M260
> +6900, 81, AMD Radeon (TM) R7 M360
> +6900, 83, AMD Radeon (TM) R7 M340
> +6901, 0, AMD Radeon R5 M255
> +6907, 0, AMD Radeon R5 M255
> +6907, 87, AMD Radeon (TM) R5 M315
> +6920, 0, AMD RADEON R9 M395X
> +6920, 1, AMD RADEON R9 M390X
> +6921, 0, AMD Radeon R9 M295X
> +6929, 0, AMD FirePro S7150
> +692B, 0, AMD FirePro W7100
> +6938, 0, AMD Radeon R9 200 Series
> +6938, F0, AMD Radeon R9 200 Series
> +6938, F1, AMD Radeon (TM) R9 380 Series
> +6939, F0, AMD Radeon R9 200 Series
> +6939, 0, AMD Radeon R9 200 Series
> +6939, F1, AMD Radeon (TM) R9 380 Series
> +6980, 00, 6980:00
> +6981, C0, 6981:C0
> +6985, 00, AMD Radeon Pro WX3100
> +6987, 80, 6987:80
> +6995, 00, AMD Radeon Pro WX2100
> +699F, 81, 699F:81
> +699F, C0, Radeon 500 Series
> +699F, C1, 699F:C1
> +699F, C3, Radeon 500 Series
> +699F, C7, Radeon RX 550 Series
> +7300, C1, AMD FirePro (TM) S9300 x2
> +7300, C8, AMD Radeon (TM) R9 Fury Series
> +7300, C9, Radeon (TM) Pro Duo
> +7300, CB, AMD Radeon (TM) R9 Fury Series
> +7300, CA, AMD Radeon (TM) R9 Fury Series
> +9874, C4, AMD Radeon R7 Graphics
> +9874, C5, AMD Radeon R6 Graphics
> +9874, C6, AMD Radeon R6 Graphics
> +9874, C7, AMD Radeon R5 Graphics
> +9874, 81, AMD Radeon R6 Graphics
> +9874, 87, AMD Radeon R5 Graphics
> +9874, 85, AMD Radeon R6 Graphics
> +9874, 84, AMD Radeon R7 Graphics
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
[not found] ` <1496262170-4222-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
2017-05-31 22:11 ` Alex Deucher
@ 2017-06-05 2:09 ` Michel Dänzer
[not found] ` <416b1697-6e97-9289-f837-dbd504452ec5-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-06 13:43 ` Emil Velikov
2 siblings, 1 reply; 21+ messages in thread
From: Michel Dänzer @ 2017-06-05 2:09 UTC (permalink / raw)
To: Samuel Li; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Xiaojie Yuan
On 01/06/17 05:22 AM, Samuel Li wrote:
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal changes, including format changes
> v5: fix line number for empty/commented lines; realloc to save memory; indentation changes
> v6: remove a line error
>
> Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
[...]
> + /* 1st valid line is file version */
> + while ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + line_num++;
> + continue;
> + }
> +
> + drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + break;
> + }
BTW, what is the purpose of the file version? If it's about the format
of the file, we need to check here that the file has a format we can
parse, something like
if (<major version> != 1)
return -EINVAL;
Note that making backwards incompatible changes to the file format would
pretty much kill the idea of updating the file with a script like
update-pciids.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
[not found] ` <416b1697-6e97-9289-f837-dbd504452ec5-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-06-05 16:00 ` Li, Samuel
0 siblings, 0 replies; 21+ messages in thread
From: Li, Samuel @ 2017-06-05 16:00 UTC (permalink / raw)
To: Michel Dänzer
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
> what is the purpose of the file version
The initial purpose is to act like a version tag, not necessarily format related.
Sam
-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net]
Sent: Sunday, June 04, 2017 10:10 PM
To: Li, Samuel <Samuel.Li@amd.com>
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
On 01/06/17 05:22 AM, Samuel Li wrote:
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal changes, including format changes
> v5: fix line number for empty/commented lines; realloc to save memory;
> indentation changes
> v6: remove a line error
>
> Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
[...]
> + /* 1st valid line is file version */
> + while ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + line_num++;
> + continue;
> + }
> +
> + drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + break;
> + }
BTW, what is the purpose of the file version? If it's about the format of the file, we need to check here that the file has a format we can parse, something like
if (<major version> != 1)
return -EINVAL;
Note that making backwards incompatible changes to the file format would pretty much kill the idea of updating the file with a script like update-pciids.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
[not found] ` <1496262170-4222-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
2017-05-31 22:11 ` Alex Deucher
2017-06-05 2:09 ` Michel Dänzer
@ 2017-06-06 13:43 ` Emil Velikov
[not found] ` <CACvgo50KM8dvXENsza1ZKbGc_Ww-sDaEVUemKpzjkbsSu+hruQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2 siblings, 1 reply; 21+ messages in thread
From: Emil Velikov @ 2017-06-06 13:43 UTC (permalink / raw)
To: Samuel Li; +Cc: amd-gfx mailing list, Xiaojie Yuan
Hi Samuel,
With all the other discussion aside here is some code specific input
which I'd hope you agree with.
On 31 May 2017 at 21:22, Samuel Li <Samuel.Li@amd.com> wrote:
> --- a/Makefile.am
> +++ b/Makefile.am
> @@ -45,6 +45,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
>
> pkgconfigdir = @pkgconfigdir@
> pkgconfig_DATA = libdrm.pc
> +libdrmdatadir = $(datadir)/libdrm
> +dist_libdrmdata_DATA = include/drm/amdgpu.ids
> +export libdrmdatadir
Don't place exports in the makefiles. See how pkgconfigdir is managed
in configure.ac and do do with libdrmdatadir.
> --- /dev/null
> +++ b/amdgpu/amdgpu_asic_id.c
> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
> +{
> + char *buf, *saveptr;
> + char *s_did;
> + char *s_rid;
> + char *s_name;
> + char *endptr;
> + int r = 0;
> +
> + buf = strdup(line);
You don't need the extra strdup here if you use strchr over strtok.
> + if (!buf)
> + return -ENOMEM;
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
You might want to check/trim whitespace before #? Same question applies below.
> + r = -EAGAIN;
> + goto out;
With the strdup, hence free() gone, all the errors will be "return -EFOO;"
> + /* trim leading whitespaces or tabs */
> + while (*s_name == ' ' || *s_name == '\t')
> + s_name++;
Use isblank/isspace - they should handle \r et al, which will creep as
someone on the team uses Windows ;-)
> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
> +{
> + /* 1st valid line is file version */
> + while ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
Why do we need this - afaict none of the parsing code cares if we have
\n or not?
Same question applies for the second loop, below.
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + line_num++;
> + continue;
> + }
> +
> + drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + break;
> + }
> +
Should the lack of a version line/tag be considered fatal or not? An
inline comment is welcome.
> + while ((n = getline(&line, &len, fp)) != -1) {
> +
> + if (table_size >= table_max_size) {
Move it at the top of the loop, since as-is it will end up reallocate
even when it doesn't need to.
> + /* double table size */
> + table_max_size *= 2;
> + asic_id_table = realloc(asic_id_table, table_max_size *
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
Memory originally pointed by asic_id_table is leaked.
> + r = -ENOMEM;
> + goto free;
> + }
> + }
> + }
> +
> + /* end of table */
> + id = asic_id_table + table_size;
> + memset(id, 0, sizeof(struct amdgpu_asic_id));
Here one clears the sentinel, which is needed as we hit realloc above, correct?
> + asic_id_table = realloc(asic_id_table, (table_size+1) *
> + sizeof(struct amdgpu_asic_id));
But why do we realloc again?
> + if (!asic_id_table)
As above - we have a leak original asic_id_table.
> + r = -ENOMEM;
> +
> +free:
> + free(line);
> +
> + if (r && asic_id_table) {
> + while (table_size--) {
> + id = asic_id_table + table_size;
> + free(id->marketing_name);
> + }
> + free(asic_id_table);
> + asic_id_table = NULL;
> + }
> +close:
> + fclose(fp);
> +
> + *p_asic_id_table = asic_id_table;
> +
Please don't entwine the error path with the normal one.
Setting *p_asic_id_table (or any user provided pointer) when the
function fails is bad design.
Regards,
Emil
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
[not found] ` <CACvgo50KM8dvXENsza1ZKbGc_Ww-sDaEVUemKpzjkbsSu+hruQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-06-07 8:40 ` Michel Dänzer
[not found] ` <01541f06-7e21-4fab-2975-d6ad4c4abeb2-otUistvHUpPR7s880joybQ@public.gmane.org>
0 siblings, 1 reply; 21+ messages in thread
From: Michel Dänzer @ 2017-06-07 8:40 UTC (permalink / raw)
To: Emil Velikov, Samuel Li; +Cc: amd-gfx mailing list, Xiaojie Yuan
On 06/06/17 10:43 PM, Emil Velikov wrote:
> On 31 May 2017 at 21:22, Samuel Li <Samuel.Li@amd.com> wrote:
>
>> --- /dev/null
>> +++ b/amdgpu/amdgpu_asic_id.c
>
>> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
>> +{
>> + char *buf, *saveptr;
>> + char *s_did;
>> + char *s_rid;
>> + char *s_name;
>> + char *endptr;
>> + int r = 0;
>> +
>> + buf = strdup(line);
> You don't need the extra strdup here if you use strchr over strtok.
Beware that without strdup here, amdgpu_parse_asic_ids must set line =
NULL after table_line++, so that getline allocates a new buffer for the
next line.
>> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
>> +{
>
>> + /* 1st valid line is file version */
>> + while ((n = getline(&line, &len, fp)) != -1) {
>> + /* trim trailing newline */
>> + if (line[n - 1] == '\n')
>> + line[n - 1] = '\0';
> Why do we need this - afaict none of the parsing code cares if we have
> \n or not?
The \n has to be removed somehow, otherwise it ends up as part of the
marketing name returned to the application.
>> + /* end of table */
>> + id = asic_id_table + table_size;
>> + memset(id, 0, sizeof(struct amdgpu_asic_id));
> Here one clears the sentinel, which is needed as we hit realloc above, correct?
>
>> + asic_id_table = realloc(asic_id_table, (table_size+1) *
>> + sizeof(struct amdgpu_asic_id));
> But why do we realloc again?
I asked for that, in order not to waste memory for unused table entries.
>> +free:
>> + free(line);
>> +
>> + if (r && asic_id_table) {
>> + while (table_size--) {
>> + id = asic_id_table + table_size;
>> + free(id->marketing_name);
>> + }
>> + free(asic_id_table);
>> + asic_id_table = NULL;
>> + }
>> +close:
>> + fclose(fp);
>> +
>> + *p_asic_id_table = asic_id_table;
>> +
> Please don't entwine the error path with the normal one.
>
> Setting *p_asic_id_table (or any user provided pointer) when the
> function fails is bad design.
I don't really see the issue with that; it's fine for the only caller of
this function.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
[not found] ` <01541f06-7e21-4fab-2975-d6ad4c4abeb2-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-06-07 11:12 ` Emil Velikov
[not found] ` <CACvgo50==aCZTjNPdQREi+KyTiqdSGGax+zhXPUJjStgLACMxA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 21+ messages in thread
From: Emil Velikov @ 2017-06-07 11:12 UTC (permalink / raw)
To: Michel Dänzer; +Cc: amd-gfx mailing list, Samuel Li, Xiaojie Yuan
On 7 June 2017 at 09:40, Michel Dänzer <michel@daenzer.net> wrote:
> On 06/06/17 10:43 PM, Emil Velikov wrote:
>> On 31 May 2017 at 21:22, Samuel Li <Samuel.Li@amd.com> wrote:
>>
>>> --- /dev/null
>>> +++ b/amdgpu/amdgpu_asic_id.c
>>
>>> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
>>> +{
>>> + char *buf, *saveptr;
>>> + char *s_did;
>>> + char *s_rid;
>>> + char *s_name;
>>> + char *endptr;
>>> + int r = 0;
>>> +
>>> + buf = strdup(line);
>> You don't need the extra strdup here if you use strchr over strtok.
>
> Beware that without strdup here, amdgpu_parse_asic_ids must set line =
> NULL after table_line++, so that getline allocates a new buffer for the
> next line.
>
A simple "line = NULL" will lead to a memory leak, AFAICT.
In either case, I'm a bit baffled how that is affected by the
presence/lack of strdup?
We don't alter or reuse the backing storage only
strcmp/isblank/strtol/strdup it.
>
>>> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
>>> +{
>>
>>> + /* 1st valid line is file version */
>>> + while ((n = getline(&line, &len, fp)) != -1) {
>>> + /* trim trailing newline */
>>> + if (line[n - 1] == '\n')
>>> + line[n - 1] = '\0';
>> Why do we need this - afaict none of the parsing code cares if we have
>> \n or not?
>
> The \n has to be removed somehow, otherwise it ends up as part of the
> marketing name returned to the application.
>
Wouldn't be better to do that in parse_one_line() around the
marketing_name = strdup(...) call?
It's a matter of taste, so feel free to ignore me.
>
>>> + /* end of table */
>>> + id = asic_id_table + table_size;
>>> + memset(id, 0, sizeof(struct amdgpu_asic_id));
>> Here one clears the sentinel, which is needed as we hit realloc above, correct?
>>
>>> + asic_id_table = realloc(asic_id_table, (table_size+1) *
>>> + sizeof(struct amdgpu_asic_id));
>> But why do we realloc again?
>
> I asked for that, in order not to waste memory for unused table entries.
>
D'oh, indeed. Thank you. Worth adding a note?
>
>>> +free:
>>> + free(line);
>>> +
>>> + if (r && asic_id_table) {
>>> + while (table_size--) {
>>> + id = asic_id_table + table_size;
>>> + free(id->marketing_name);
>>> + }
>>> + free(asic_id_table);
>>> + asic_id_table = NULL;
>>> + }
>>> +close:
>>> + fclose(fp);
>>> +
>>> + *p_asic_id_table = asic_id_table;
>>> +
>> Please don't entwine the error path with the normal one.
>>
>> Setting *p_asic_id_table (or any user provided pointer) when the
>> function fails is bad design.
>
> I don't really see the issue with that; it's fine for the only caller of
> this function.
>
it's not obvious and might come to bite. Since *p_asic_id_table is
already NULL (we're using calloc) I'd opt for dropping it.
Not trying to force my opinion, just stating concerns.
Another crazy idea that just came to mind:
Since getline() can do multiple implicit realloc's one can allocate "a
sane" default and feed that instead of the current NULL.
Regards,
Emil
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file
[not found] ` <CACvgo50==aCZTjNPdQREi+KyTiqdSGGax+zhXPUJjStgLACMxA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-06-07 15:20 ` Michel Dänzer
0 siblings, 0 replies; 21+ messages in thread
From: Michel Dänzer @ 2017-06-07 15:20 UTC (permalink / raw)
To: Emil Velikov; +Cc: Samuel Li, amd-gfx mailing list, Xiaojie Yuan
On 07/06/17 08:12 PM, Emil Velikov wrote:
> On 7 June 2017 at 09:40, Michel Dänzer <michel@daenzer.net> wrote:
>> On 06/06/17 10:43 PM, Emil Velikov wrote:
>>> On 31 May 2017 at 21:22, Samuel Li <Samuel.Li@amd.com> wrote:
>>>
>>>> --- /dev/null
>>>> +++ b/amdgpu/amdgpu_asic_id.c
>>>
>>>> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
>>>> +{
>>>> + char *buf, *saveptr;
>>>> + char *s_did;
>>>> + char *s_rid;
>>>> + char *s_name;
>>>> + char *endptr;
>>>> + int r = 0;
>>>> +
>>>> + buf = strdup(line);
>>> You don't need the extra strdup here if you use strchr over strtok.
>>
>> Beware that without strdup here, amdgpu_parse_asic_ids must set line =
>> NULL after table_line++, so that getline allocates a new buffer for the
>> next line.
>>
> A simple "line = NULL" will lead to a memory leak, AFAICT.
>
> In either case, I'm a bit baffled how that is affected by the
> presence/lack of strdup?
> We don't alter or reuse the backing storage only
> strcmp/isblank/strtol/strdup it.
Oh, I missed that id->marketing_name is strdup'd again.
Anyway, it's probably better not to change the logic too much at this
point, other than anything needed to fix immediate bugs. It can always
be improved with follow-up patches.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH libdrm] amdgpu: move asic id table to a separate file
2017-05-31 20:22 [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file Samuel Li
[not found] ` <1496262170-4222-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
@ 2017-06-12 9:50 ` Michel Dänzer
[not found] ` <20170612095021.5711-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-07-04 6:40 ` [PATCH libdrm] " Chih-Wei Huang
1 sibling, 2 replies; 21+ messages in thread
From: Michel Dänzer @ 2017-06-12 9:50 UTC (permalink / raw)
To: amd-gfx; +Cc: dri-devel
From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
change printf() to drmMsg(); add initial amdgpu.ids
v4: integrate some recent internal changes, including format changes
v5: fix line number for empty/commented lines; realloc to save memory;
indentation changes
v6: remove a line error
v7: [Michel Dänzer]
* Move amdgpu.ids to new data directory
* Remove placeholder entries from amdgpu.ids
* Set libdrmdatadir variable in configure.ac instead of Makefile.am
[Emil Velikov]
* Use isblank() instead of open-coding it [Emil Velikov]
* Don't leak asic_id_table memory if realloc fails [Emil Velikov]
* Check and bump table_max_size at the beginning of the while loop [Emil
Velikov]
* Initialize table_max_size to the number of entries in data/amdgpu.ids
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
Makefile.am | 1 +
amdgpu/Makefile.am | 6 ++
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 219 +++++++++++++++++++++++++++++++++++++++++++++++
amdgpu/amdgpu_asic_id.h | 165 -----------------------------------
amdgpu/amdgpu_device.c | 28 ++++--
amdgpu/amdgpu_internal.h | 10 +++
configure.ac | 4 +
data/Makefile.am | 23 +++++
data/amdgpu.ids | 159 ++++++++++++++++++++++++++++++++++
10 files changed, 444 insertions(+), 173 deletions(-)
create mode 100644 amdgpu/amdgpu_asic_id.c
delete mode 100644 amdgpu/amdgpu_asic_id.h
create mode 100644 data/Makefile.am
create mode 100644 data/amdgpu.ids
diff --git a/Makefile.am b/Makefile.am
index dfb8fcdb..7b86214e 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -109,6 +109,7 @@ SUBDIRS = \
$(TEGRA_SUBDIR) \
$(VC4_SUBDIR) \
$(ETNAVIV_SUBDIR) \
+ data \
tests \
$(MAN_SUBDIR)
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1ba..3444883f 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,12 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
+libdrmdatadir = @libdrmdatadir@
+ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' \
+ $(top_srcdir)/data/amdgpu.ids)
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\" \
+ -DAMDGPU_ASIC_ID_TABLE_NUM_ENTRIES=$(ASIC_ID_TABLE_NUM_ENTRIES)
+
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
libdrm_amdgpu_ladir = $(libdir)
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0a..bc3abaa6 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
LIBDRM_AMDGPU_FILES := \
- amdgpu_asic_id.h \
+ amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 00000000..3a88896b
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,219 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <ctype.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include "xf86drm.h"
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+ char *buf, *saveptr;
+ char *s_did;
+ char *s_rid;
+ char *s_name;
+ char *endptr;
+ int r = 0;
+
+ buf = strdup(line);
+ if (!buf)
+ return -ENOMEM;
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ r = -EAGAIN;
+ goto out;
+ }
+
+ /* device id */
+ s_did = strtok_r(buf, ",", &saveptr);
+ if (!s_did) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->did = strtol(s_did, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* revision id */
+ s_rid = strtok_r(NULL, ",", &saveptr);
+ if (!s_rid) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->rid = strtol(s_rid, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* marketing name */
+ s_name = strtok_r(NULL, ",", &saveptr);
+ if (!s_name) {
+ r = -EINVAL;
+ goto out;
+ }
+ /* trim leading whitespaces or tabs */
+ while (isblank(*s_name))
+ s_name++;
+ if (strlen(s_name) == 0) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->marketing_name = strdup(s_name);
+ if (id->marketing_name == NULL) {
+ r = -EINVAL;
+ goto out;
+ }
+
+out:
+ free(buf);
+
+ return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+ struct amdgpu_asic_id *asic_id_table;
+ struct amdgpu_asic_id *id;
+ FILE *fp;
+ char *line = NULL;
+ size_t len = 0;
+ ssize_t n;
+ int line_num = 1;
+ size_t table_size = 0;
+ size_t table_max_size = AMDGPU_ASIC_ID_TABLE_NUM_ENTRIES;
+ int r = 0;
+
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+ if (!fp) {
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ strerror(errno));
+ return -EINVAL;
+ }
+
+ asic_id_table = calloc(table_max_size + 1,
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto close;
+ }
+
+ /* 1st valid line is file version */
+ while ((n = getline(&line, &len, fp)) != -1) {
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ line_num++;
+ continue;
+ }
+
+ drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
+ break;
+ }
+
+ while ((n = getline(&line, &len, fp)) != -1) {
+ if (table_size > table_max_size) {
+ /* double table size */
+ table_max_size *= 2;
+ id = realloc(asic_id_table, (table_max_size + 1) *
+ sizeof(struct amdgpu_asic_id));
+ if (!id) {
+ r = -ENOMEM;
+ goto free;
+ }
+ asic_id_table = id;
+ }
+
+ id = asic_id_table + table_size;
+
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ r = parse_one_line(line, id);
+ if (r) {
+ if (r == -EAGAIN) {
+ line_num++;
+ continue;
+ }
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",
+ AMDGPU_ASIC_ID_TABLE, line_num, line);
+ goto free;
+ }
+
+ line_num++;
+ table_size++;
+ }
+
+ /* end of table */
+ id = asic_id_table + table_size;
+ memset(id, 0, sizeof(struct amdgpu_asic_id));
+
+ if (table_size != table_max_size) {
+ id = realloc(asic_id_table, (table_size + 1) *
+ sizeof(struct amdgpu_asic_id));
+ if (!id)
+ r = -ENOMEM;
+ else
+ asic_id_table = id;
+ }
+
+free:
+ free(line);
+
+ if (r && asic_id_table) {
+ while (table_size--) {
+ id = asic_id_table + table_size;
+ free(id->marketing_name);
+ }
+ free(asic_id_table);
+ asic_id_table = NULL;
+ }
+close:
+ fclose(fp);
+
+ *p_asic_id_table = asic_id_table;
+
+ return r;
+}
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
deleted file mode 100644
index 3e7d736b..00000000
--- a/amdgpu/amdgpu_asic_id.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright © 2016 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_ASIC_ID_H__
-#define __AMDGPU_ASIC_ID_H__
-
-static struct amdgpu_asic_id_table_t {
- uint32_t did;
- uint32_t rid;
- const char *marketing_name;
-} const amdgpu_asic_id_table [] = {
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
- {0x6600, 0x81, "AMD Radeon R7 M370"},
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
- {0x6604, 0x81, "AMD Radeon R7 M350"},
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
- {0x6605, 0x81, "AMD Radeon R7 M340"},
- {0x6606, 0x0, "AMD Radeon HD 8790M"},
- {0x6607, 0x0, "AMD Radeon HD8530M"},
- {0x6608, 0x0, "AMD FirePro W2100"},
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
- {0x6610, 0x81, "AMD Radeon R7 350"},
- {0x6610, 0x83, "AMD Radeon R5 340"},
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
- {0x6640, 0x0, "AMD Radeon HD 8950"},
- {0x6640, 0x80, "AMD Radeon R9 M380"},
- {0x6646, 0x0, "AMD Radeon R9 M280X"},
- {0x6646, 0x80, "AMD Radeon R9 M470X"},
- {0x6647, 0x0, "AMD Radeon R9 M270X"},
- {0x6647, 0x80, "AMD Radeon R9 M380"},
- {0x6649, 0x0, "AMD FirePro W5100"},
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
- {0x6660, 0x81, "AMD Radeon R5 M335"},
- {0x6660, 0x83, "AMD Radeon R5 M330"},
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
- {0x6663, 0x83, "AMD Radeon R5 M320"},
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x83, "AMD Radeon R5 M320"},
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
- {0x666F, 0x0, "AMD Radeon HD 8500M"},
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
- {0x6800, 0x0, "AMD Radeon HD 7970M"},
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6820, 0x81, "AMD Radeon R9 M375"},
- {0x6820, 0x83, "AMD Radeon R9 M375X"},
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6821, 0x87, "AMD Radeon R7 M380"},
- {0x6821, 0x83, "AMD Radeon R9 M370X"},
- {0x6822, 0x0, "AMD Radeon E8860"},
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
- {0x682B, 0x87, "AMD Radeon R9 M360"},
- {0x682C, 0x0, "AMD FirePro W4100"},
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
- {0x6900, 0x0, "AMD Radeon R7 M260"},
- {0x6900, 0x81, "AMD Radeon R7 M360"},
- {0x6900, 0x83, "AMD Radeon R7 M340"},
- {0x6901, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x87, "AMD Radeon R5 M315"},
- {0x6920, 0x0, "AMD Radeon R9 M395X"},
- {0x6920, 0x1, "AMD Radeon R9 M390X"},
- {0x6921, 0x0, "AMD Radeon R9 M295X"},
- {0x6929, 0x0, "AMD FirePro S7150"},
- {0x692B, 0x0, "AMD FirePro W7100"},
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},
-
- {0x0000, 0x0, "\0"},
-};
-#endif
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index f473d2da..9a238d97 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -44,7 +44,6 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
-#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
+ const struct amdgpu_asic_id *id;
amdgpu_vamgr_deinit(&dev->vamgr_32);
amdgpu_vamgr_deinit(&dev->vamgr);
util_hash_table_destroy(dev->bo_flink_names);
@@ -140,6 +140,12 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
+ if (dev->asic_ids) {
+ for (id = dev->asic_ids; id->did; id++)
+ free(id->marketing_name);
+
+ free(dev->asic_ids);
+ }
free(dev);
}
@@ -267,6 +273,12 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);
+ if (r) {
+ fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
+ __func__, r);
+ }
+
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
+ const struct amdgpu_asic_id *id;
+
+ if (!dev->asic_ids)
+ return NULL;
- while (t->did) {
- if ((t->did == dev->info.asic_id) &&
- (t->rid == dev->info.pci_rev_id))
- return t->marketing_name;
- t++;
+ for (id = dev->asic_ids; id->did; id++) {
+ if ((id->did == dev->info.asic_id) &&
+ (id->rid == dev->info.pci_rev_id))
+ return id->marketing_name;
}
return NULL;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index cf119a53..e68246bf 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -69,6 +69,12 @@ struct amdgpu_va {
struct amdgpu_bo_va_mgr *vamgr;
};
+struct amdgpu_asic_id {
+ uint32_t did;
+ uint32_t rid;
+ char *marketing_name;
+};
+
struct amdgpu_device {
atomic_t refcount;
int fd;
@@ -76,6 +82,8 @@ struct amdgpu_device {
unsigned major_version;
unsigned minor_version;
+ /** Lookup table of asic device id, revision id and marketing name */
+ struct amdgpu_asic_id *asic_ids;
/** List of buffer handles. Protected by bo_table_mutex. */
struct util_hash_table *bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
+
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
diff --git a/configure.ac b/configure.ac
index 1cfb8c27..aa9529cd 100644
--- a/configure.ac
+++ b/configure.ac
@@ -84,6 +84,9 @@ fi
pkgconfigdir=${libdir}/pkgconfig
AC_SUBST(pkgconfigdir)
+libdrmdatadir=${datadir}/libdrm
+AC_SUBST(libdrmdatadir)
+
AC_ARG_ENABLE([udev],
[AS_HELP_STRING([--enable-udev],
[Enable support for using udev instead of mknod (default: disabled)])],
@@ -527,6 +530,7 @@ fi
AC_SUBST(WARN_CFLAGS)
AC_CONFIG_FILES([
Makefile
+ data/Makefile
libkms/Makefile
libkms/libkms.pc
intel/Makefile
diff --git a/data/Makefile.am b/data/Makefile.am
new file mode 100644
index 00000000..eba915dd
--- /dev/null
+++ b/data/Makefile.am
@@ -0,0 +1,23 @@
+# Copyright © 2017 Advanced Micro Devices, Inc.
+# All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# on the rights to use, copy, modify, merge, publish, distribute, sub
+# license, and/or sell copies of the Software, and to permit persons to whom
+# the Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+libdrmdatadir = @libdrmdatadir@
+dist_libdrmdata_DATA = amdgpu.ids
diff --git a/data/amdgpu.ids b/data/amdgpu.ids
new file mode 100644
index 00000000..0b98c3c3
--- /dev/null
+++ b/data/amdgpu.ids
@@ -0,0 +1,159 @@
+# List of AMDGPU IDs
+#
+# Syntax:
+# device_id, revision_id, product_name <-- single tab after comma
+
+1.0.0
+6600, 0, AMD Radeon HD 8600/8700M
+6600, 81, AMD Radeon (TM) R7 M370
+6601, 0, AMD Radeon (TM) HD 8500M/8700M
+6604, 0, AMD Radeon R7 M265 Series
+6604, 81, AMD Radeon (TM) R7 M350
+6605, 0, AMD Radeon R7 M260 Series
+6605, 81, AMD Radeon (TM) R7 M340
+6606, 0, AMD Radeon HD 8790M
+6607, 0, AMD Radeon (TM) HD8530M
+6608, 0, AMD FirePro W2100
+6610, 0, AMD Radeon HD 8600 Series
+6610, 81, AMD Radeon (TM) R7 350
+6610, 83, AMD Radeon (TM) R5 340
+6611, 0, AMD Radeon HD 8500 Series
+6613, 0, AMD Radeon HD 8500 series
+6617, C7, AMD Radeon R7 240 Series
+6640, 0, AMD Radeon HD 8950
+6640, 80, AMD Radeon (TM) R9 M380
+6646, 0, AMD Radeon R9 M280X
+6646, 80, AMD Radeon (TM) R9 M470X
+6647, 0, AMD Radeon R9 M270X
+6647, 80, AMD Radeon (TM) R9 M380
+6649, 0, AMD FirePro W5100
+6658, 0, AMD Radeon R7 200 Series
+665C, 0, AMD Radeon HD 7700 Series
+665D, 0, AMD Radeon R7 200 Series
+665F, 81, AMD Radeon (TM) R7 300 Series
+6660, 0, AMD Radeon HD 8600M Series
+6660, 81, AMD Radeon (TM) R5 M335
+6660, 83, AMD Radeon (TM) R5 M330
+6663, 0, AMD Radeon HD 8500M Series
+6663, 83, AMD Radeon (TM) R5 M320
+6664, 0, AMD Radeon R5 M200 Series
+6665, 0, AMD Radeon R5 M200 Series
+6665, 83, AMD Radeon (TM) R5 M320
+6667, 0, AMD Radeon R5 M200 Series
+666F, 0, AMD Radeon HD 8500M
+6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
+678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
+6798, 0, AMD Radeon HD 7900 Series
+679A, 0, AMD Radeon HD 7900 Series
+679B, 0, AMD Radeon HD 7900 Series
+679E, 0, AMD Radeon HD 7800 Series
+67A0, 0, AMD Radeon FirePro W9100
+67A1, 0, AMD Radeon FirePro W8100
+67B0, 0, AMD Radeon R9 200 Series
+67B0, 80, AMD Radeon (TM) R9 390 Series
+67B1, 0, AMD Radeon R9 200 Series
+67B1, 80, AMD Radeon (TM) R9 390 Series
+67B9, 0, AMD Radeon R9 200 Series
+67DF, C1, Radeon RX 580 Series
+67DF, C2, Radeon RX 570 Series
+67DF, C3, Radeon RX 580 Series
+67DF, C4, AMD Radeon (TM) RX 480 Graphics
+67DF, C5, AMD Radeon (TM) RX 470 Graphics
+67DF, C6, Radeon RX 570 Series
+67DF, C7, AMD Radeon (TM) RX 480 Graphics
+67DF, CF, AMD Radeon (TM) RX 470 Graphics
+67DF, E3, Radeon RX Series
+67DF, E7, Radeon RX 580 Series
+67DF, EF, Radeon RX 570 Series
+67C2, 01, AMD Radeon (TM) Pro V7350x2
+67C2, 02, AMD Radeon (TM) Pro V7300X
+67C4, 00, AMD Radeon (TM) Pro WX 7100 Graphics
+67C7, 00, AMD Radeon (TM) Pro WX 5100 Graphics
+67C0, 00, AMD Radeon (TM) Pro WX 7100 Graphics
+67D0, 01, AMD Radeon (TM) Pro V7350x2
+67D0, 02, AMD Radeon (TM) Pro V7300X
+67E0, 00, AMD Radeon (TM) Pro WX Series
+67E3, 00, AMD Radeon (TM) Pro WX 4100
+67E8, 00, AMD Radeon (TM) Pro WX Series
+67E8, 01, AMD Radeon (TM) Pro WX Series
+67E8, 80, AMD Radeon (TM) E9260 Graphics
+67EB, 00, AMD Radeon (TM) Pro V5300X
+67EF, C0, AMD Radeon (TM) RX Graphics
+67EF, C1, AMD Radeon (TM) RX 460 Graphics
+67EF, C3, Radeon RX Series
+67EF, C5, AMD Radeon (TM) RX 460 Graphics
+67EF, C7, AMD Radeon (TM) RX Graphics
+67EF, CF, AMD Radeon (TM) RX 460 Graphics
+67EF, E1, Radeon RX Series
+67EF, E3, Radeon RX Series
+67EF, E7, Radeon RX Series
+67EF, EF, AMD Radeon (TM) RX Graphics
+67EF, FF, Radeon RX Series
+67FF, C0, AMD Radeon (TM) RX Graphics
+67FF, C1, AMD Radeon (TM) RX Graphics
+67FF, FF, Radeon RX 550 Series
+6800, 0, AMD Radeon HD 7970M
+6801, 0, AMD Radeon(TM) HD8970M
+6808, 0, ATI FirePro V(FireGL V) Graphics Adapter
+6809, 0, ATI FirePro V(FireGL V) Graphics Adapter
+6810, 0, AMD Radeon(TM) HD 8800 Series
+6810, 81, AMD Radeon (TM) R7 370 Series
+6811, 0, AMD Radeon(TM) HD8800 Series
+6811, 81, AMD Radeon (TM) R7 300 Series
+6818, 0, AMD Radeon HD 7800 Series
+6819, 0, AMD Radeon HD 7800 Series
+6820, 0, AMD Radeon HD 8800M Series
+6820, 81, AMD Radeon (TM) R9 M375
+6820, 83, AMD Radeon (TM) R9 M375X
+6821, 0, AMD Radeon HD 8800M Series
+6821, 87, AMD Radeon (TM) R7 M380
+6821, 83, AMD Radeon R9 (TM) M370X
+6822, 0, AMD Radeon E8860
+6823, 0, AMD Radeon HD 8800M Series
+6825, 0, AMD Radeon HD 7800M Series
+6827, 0, AMD Radeon HD 7800M Series
+6828, 0, ATI FirePro V(FireGL V) Graphics Adapter
+682B, 0, AMD Radeon HD 8800M Series
+682B, 87, AMD Radeon (TM) R9 M360
+682C, 0, AMD FirePro W4100
+682D, 0, AMD Radeon HD 7700M Series
+682F, 0, AMD Radeon HD 7700M Series
+6835, 0, AMD Radeon R7 Series / HD 9000 Series
+6837, 0, AMD Radeon HD7700 Series
+683D, 0, AMD Radeon HD 7700 Series
+683F, 0, AMD Radeon HD 7700 Series
+6900, 0, AMD Radeon R7 M260
+6900, 81, AMD Radeon (TM) R7 M360
+6900, 83, AMD Radeon (TM) R7 M340
+6901, 0, AMD Radeon R5 M255
+6907, 0, AMD Radeon R5 M255
+6907, 87, AMD Radeon (TM) R5 M315
+6920, 0, AMD RADEON R9 M395X
+6920, 1, AMD RADEON R9 M390X
+6921, 0, AMD Radeon R9 M295X
+6929, 0, AMD FirePro S7150
+692B, 0, AMD FirePro W7100
+6938, 0, AMD Radeon R9 200 Series
+6938, F0, AMD Radeon R9 200 Series
+6938, F1, AMD Radeon (TM) R9 380 Series
+6939, F0, AMD Radeon R9 200 Series
+6939, 0, AMD Radeon R9 200 Series
+6939, F1, AMD Radeon (TM) R9 380 Series
+6985, 00, AMD Radeon Pro WX3100
+6995, 00, AMD Radeon Pro WX2100
+699F, C0, Radeon 500 Series
+699F, C3, Radeon 500 Series
+699F, C7, Radeon RX 550 Series
+7300, C1, AMD FirePro (TM) S9300 x2
+7300, C8, AMD Radeon (TM) R9 Fury Series
+7300, C9, Radeon (TM) Pro Duo
+7300, CB, AMD Radeon (TM) R9 Fury Series
+7300, CA, AMD Radeon (TM) R9 Fury Series
+9874, C4, AMD Radeon R7 Graphics
+9874, C5, AMD Radeon R6 Graphics
+9874, C6, AMD Radeon R6 Graphics
+9874, C7, AMD Radeon R5 Graphics
+9874, 81, AMD Radeon R6 Graphics
+9874, 87, AMD Radeon R5 Graphics
+9874, 85, AMD Radeon R6 Graphics
+9874, 84, AMD Radeon R7 Graphics
--
2.11.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* RE: [PATCH libdrm] amdgpu: move asic id table to a separate file
[not found] ` <20170612095021.5711-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-06-12 15:48 ` Deucher, Alexander
2017-06-13 9:45 ` [PATCH libdrm v8] " Michel Dänzer
1 sibling, 0 replies; 21+ messages in thread
From: Deucher, Alexander @ 2017-06-12 15:48 UTC (permalink / raw)
To: 'Michel Dänzer', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Monday, June 12, 2017 5:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Subject: [PATCH libdrm] amdgpu: move asic id table to a separate file
>
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal changes, including format changes
> v5: fix line number for empty/commented lines; realloc to save memory;
> indentation changes
> v6: remove a line error
> v7: [Michel Dänzer]
> * Move amdgpu.ids to new data directory
> * Remove placeholder entries from amdgpu.ids
> * Set libdrmdatadir variable in configure.ac instead of Makefile.am
> [Emil Velikov]
> * Use isblank() instead of open-coding it [Emil Velikov]
> * Don't leak asic_id_table memory if realloc fails [Emil Velikov]
> * Check and bump table_max_size at the beginning of the while loop [Emil
> Velikov]
> * Initialize table_max_size to the number of entries in data/amdgpu.ids
>
> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> Makefile.am | 1 +
> amdgpu/Makefile.am | 6 ++
> amdgpu/Makefile.sources | 2 +-
> amdgpu/amdgpu_asic_id.c | 219
> +++++++++++++++++++++++++++++++++++++++++++++++
> amdgpu/amdgpu_asic_id.h | 165 -----------------------------------
> amdgpu/amdgpu_device.c | 28 ++++--
> amdgpu/amdgpu_internal.h | 10 +++
> configure.ac | 4 +
> data/Makefile.am | 23 +++++
> data/amdgpu.ids | 159 ++++++++++++++++++++++++++++++++++
> 10 files changed, 444 insertions(+), 173 deletions(-)
> create mode 100644 amdgpu/amdgpu_asic_id.c
> delete mode 100644 amdgpu/amdgpu_asic_id.h
> create mode 100644 data/Makefile.am
> create mode 100644 data/amdgpu.ids
>
> diff --git a/Makefile.am b/Makefile.am
> index dfb8fcdb..7b86214e 100644
> --- a/Makefile.am
> +++ b/Makefile.am
> @@ -109,6 +109,7 @@ SUBDIRS = \
> $(TEGRA_SUBDIR) \
> $(VC4_SUBDIR) \
> $(ETNAVIV_SUBDIR) \
> + data \
> tests \
> $(MAN_SUBDIR)
>
> diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
> index cf7bc1ba..3444883f 100644
> --- a/amdgpu/Makefile.am
> +++ b/amdgpu/Makefile.am
> @@ -30,6 +30,12 @@ AM_CFLAGS = \
> $(PTHREADSTUBS_CFLAGS) \
> -I$(top_srcdir)/include/drm
>
> +libdrmdatadir = @libdrmdatadir@
> +ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,'
> \
> + $(top_srcdir)/data/amdgpu.ids)
> +AM_CPPFLAGS = -
> DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\" \
> + -
> DAMDGPU_ASIC_ID_TABLE_NUM_ENTRIES=$(ASIC_ID_TABLE_NUM_ENTRI
> ES)
> +
> libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
> libdrm_amdgpu_ladir = $(libdir)
> libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
> diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
> index 487b9e0a..bc3abaa6 100644
> --- a/amdgpu/Makefile.sources
> +++ b/amdgpu/Makefile.sources
> @@ -1,5 +1,5 @@
> LIBDRM_AMDGPU_FILES := \
> - amdgpu_asic_id.h \
> + amdgpu_asic_id.c \
> amdgpu_bo.c \
> amdgpu_cs.c \
> amdgpu_device.c \
> diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
> new file mode 100644
> index 00000000..3a88896b
> --- /dev/null
> +++ b/amdgpu/amdgpu_asic_id.c
> @@ -0,0 +1,219 @@
> +/*
> + * Copyright © 2017 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO
> EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
> DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
> THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifdef HAVE_CONFIG_H
> +#include "config.h"
> +#endif
> +
> +#include <ctype.h>
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <stdint.h>
> +#include <string.h>
> +#include <unistd.h>
> +#include <errno.h>
> +
> +#include "xf86drm.h"
> +#include "amdgpu_drm.h"
> +#include "amdgpu_internal.h"
> +
> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
> +{
> + char *buf, *saveptr;
> + char *s_did;
> + char *s_rid;
> + char *s_name;
> + char *endptr;
> + int r = 0;
> +
> + buf = strdup(line);
> + if (!buf)
> + return -ENOMEM;
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + r = -EAGAIN;
> + goto out;
> + }
> +
> + /* device id */
> + s_did = strtok_r(buf, ",", &saveptr);
> + if (!s_did) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->did = strtol(s_did, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* revision id */
> + s_rid = strtok_r(NULL, ",", &saveptr);
> + if (!s_rid) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->rid = strtol(s_rid, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* marketing name */
> + s_name = strtok_r(NULL, ",", &saveptr);
> + if (!s_name) {
> + r = -EINVAL;
> + goto out;
> + }
> + /* trim leading whitespaces or tabs */
> + while (isblank(*s_name))
> + s_name++;
> + if (strlen(s_name) == 0) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->marketing_name = strdup(s_name);
> + if (id->marketing_name == NULL) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> +out:
> + free(buf);
> +
> + return r;
> +}
> +
> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
> +{
> + struct amdgpu_asic_id *asic_id_table;
> + struct amdgpu_asic_id *id;
> + FILE *fp;
> + char *line = NULL;
> + size_t len = 0;
> + ssize_t n;
> + int line_num = 1;
> + size_t table_size = 0;
> + size_t table_max_size = AMDGPU_ASIC_ID_TABLE_NUM_ENTRIES;
> + int r = 0;
> +
> + fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
> + if (!fp) {
> + fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
> + strerror(errno));
> + return -EINVAL;
> + }
> +
> + asic_id_table = calloc(table_max_size + 1,
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto close;
> + }
> +
> + /* 1st valid line is file version */
> + while ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + line_num++;
> + continue;
> + }
> +
> + drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE,
> line);
> + break;
> + }
> +
> + while ((n = getline(&line, &len, fp)) != -1) {
> + if (table_size > table_max_size) {
> + /* double table size */
> + table_max_size *= 2;
> + id = realloc(asic_id_table, (table_max_size + 1) *
> + sizeof(struct amdgpu_asic_id));
> + if (!id) {
> + r = -ENOMEM;
> + goto free;
> + }
> + asic_id_table = id;
> + }
> +
> + id = asic_id_table + table_size;
> +
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + r = parse_one_line(line, id);
> + if (r) {
> + if (r == -EAGAIN) {
> + line_num++;
> + continue;
> + }
> + fprintf(stderr, "Invalid format: %s: line %d: %s\n",
> + AMDGPU_ASIC_ID_TABLE, line_num, line);
> + goto free;
> + }
> +
> + line_num++;
> + table_size++;
> + }
> +
> + /* end of table */
> + id = asic_id_table + table_size;
> + memset(id, 0, sizeof(struct amdgpu_asic_id));
> +
> + if (table_size != table_max_size) {
> + id = realloc(asic_id_table, (table_size + 1) *
> + sizeof(struct amdgpu_asic_id));
> + if (!id)
> + r = -ENOMEM;
> + else
> + asic_id_table = id;
> + }
> +
> +free:
> + free(line);
> +
> + if (r && asic_id_table) {
> + while (table_size--) {
> + id = asic_id_table + table_size;
> + free(id->marketing_name);
> + }
> + free(asic_id_table);
> + asic_id_table = NULL;
> + }
> +close:
> + fclose(fp);
> +
> + *p_asic_id_table = asic_id_table;
> +
> + return r;
> +}
> diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
> deleted file mode 100644
> index 3e7d736b..00000000
> --- a/amdgpu/amdgpu_asic_id.h
> +++ /dev/null
> @@ -1,165 +0,0 @@
> -/*
> - * Copyright © 2016 Advanced Micro Devices, Inc.
> - * All Rights Reserved.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the
> "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO
> EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
> DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
> THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - */
> -
> -#ifndef __AMDGPU_ASIC_ID_H__
> -#define __AMDGPU_ASIC_ID_H__
> -
> -static struct amdgpu_asic_id_table_t {
> - uint32_t did;
> - uint32_t rid;
> - const char *marketing_name;
> -} const amdgpu_asic_id_table [] = {
> - {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
> - {0x6600, 0x81, "AMD Radeon R7 M370"},
> - {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
> - {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
> - {0x6604, 0x81, "AMD Radeon R7 M350"},
> - {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
> - {0x6605, 0x81, "AMD Radeon R7 M340"},
> - {0x6606, 0x0, "AMD Radeon HD 8790M"},
> - {0x6607, 0x0, "AMD Radeon HD8530M"},
> - {0x6608, 0x0, "AMD FirePro W2100"},
> - {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
> - {0x6610, 0x81, "AMD Radeon R7 350"},
> - {0x6610, 0x83, "AMD Radeon R5 340"},
> - {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
> - {0x6613, 0x0, "AMD Radeon HD 8500 series"},
> - {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
> - {0x6640, 0x0, "AMD Radeon HD 8950"},
> - {0x6640, 0x80, "AMD Radeon R9 M380"},
> - {0x6646, 0x0, "AMD Radeon R9 M280X"},
> - {0x6646, 0x80, "AMD Radeon R9 M470X"},
> - {0x6647, 0x0, "AMD Radeon R9 M270X"},
> - {0x6647, 0x80, "AMD Radeon R9 M380"},
> - {0x6649, 0x0, "AMD FirePro W5100"},
> - {0x6658, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x665D, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665F, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
> - {0x6660, 0x81, "AMD Radeon R5 M335"},
> - {0x6660, 0x83, "AMD Radeon R5 M330"},
> - {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
> - {0x6663, 0x83, "AMD Radeon R5 M320"},
> - {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x83, "AMD Radeon R5 M320"},
> - {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x666F, 0x0, "AMD Radeon HD 8500M"},
> - {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
> - {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
> - {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
> - {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
> - {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
> - {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
> - {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
> - {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
> - {0x6800, 0x0, "AMD Radeon HD 7970M"},
> - {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
> - {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
> - {0x6810, 0x81, "AMD Radeon R7 370 Series"},
> - {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
> - {0x6811, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6820, 0x81, "AMD Radeon R9 M375"},
> - {0x6820, 0x83, "AMD Radeon R9 M375X"},
> - {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6821, 0x87, "AMD Radeon R7 M380"},
> - {0x6821, 0x83, "AMD Radeon R9 M370X"},
> - {0x6822, 0x0, "AMD Radeon E8860"},
> - {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x682B, 0x87, "AMD Radeon R9 M360"},
> - {0x682C, 0x0, "AMD FirePro W4100"},
> - {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
> - {0x6837, 0x0, "AMD Radeon HD7700 Series"},
> - {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x6900, 0x0, "AMD Radeon R7 M260"},
> - {0x6900, 0x81, "AMD Radeon R7 M360"},
> - {0x6900, 0x83, "AMD Radeon R7 M340"},
> - {0x6901, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x87, "AMD Radeon R5 M315"},
> - {0x6920, 0x0, "AMD Radeon R9 M395X"},
> - {0x6920, 0x1, "AMD Radeon R9 M390X"},
> - {0x6921, 0x0, "AMD Radeon R9 M295X"},
> - {0x6929, 0x0, "AMD FirePro S7150"},
> - {0x692B, 0x0, "AMD FirePro W7100"},
> - {0x6938, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
> - {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
> - {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x81, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x87, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x85, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x84, "AMD Radeon R7 Graphics"},
> -
> - {0x0000, 0x0, "\0"},
> -};
> -#endif
> diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
> index f473d2da..9a238d97 100644
> --- a/amdgpu/amdgpu_device.c
> +++ b/amdgpu/amdgpu_device.c
> @@ -44,7 +44,6 @@
> #include "amdgpu_internal.h"
> #include "util_hash_table.h"
> #include "util_math.h"
> -#include "amdgpu_asic_id.h"
>
> #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
> #define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
> @@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
>
> static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> {
> + const struct amdgpu_asic_id *id;
> amdgpu_vamgr_deinit(&dev->vamgr_32);
> amdgpu_vamgr_deinit(&dev->vamgr);
> util_hash_table_destroy(dev->bo_flink_names);
> @@ -140,6 +140,12 @@ static void
> amdgpu_device_free_internal(amdgpu_device_handle dev)
> close(dev->fd);
> if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
> close(dev->flink_fd);
> + if (dev->asic_ids) {
> + for (id = dev->asic_ids; id->did; id++)
> + free(id->marketing_name);
> +
> + free(dev->asic_ids);
> + }
> free(dev);
> }
>
> @@ -267,6 +273,12 @@ int amdgpu_device_initialize(int fd,
> amdgpu_vamgr_init(&dev->vamgr_32, start, max,
> dev->dev_info.virtual_address_alignment);
>
> + r = amdgpu_parse_asic_ids(&dev->asic_ids);
> + if (r) {
> + fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
> + __func__, r);
> + }
> +
> *major_version = dev->major_version;
> *minor_version = dev->minor_version;
> *device_handle = dev;
> @@ -297,13 +309,15 @@ int
> amdgpu_device_deinitialize(amdgpu_device_handle dev)
>
> const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
> {
> - const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
> + const struct amdgpu_asic_id *id;
> +
> + if (!dev->asic_ids)
> + return NULL;
>
> - while (t->did) {
> - if ((t->did == dev->info.asic_id) &&
> - (t->rid == dev->info.pci_rev_id))
> - return t->marketing_name;
> - t++;
> + for (id = dev->asic_ids; id->did; id++) {
> + if ((id->did == dev->info.asic_id) &&
> + (id->rid == dev->info.pci_rev_id))
> + return id->marketing_name;
> }
>
> return NULL;
> diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
> index cf119a53..e68246bf 100644
> --- a/amdgpu/amdgpu_internal.h
> +++ b/amdgpu/amdgpu_internal.h
> @@ -69,6 +69,12 @@ struct amdgpu_va {
> struct amdgpu_bo_va_mgr *vamgr;
> };
>
> +struct amdgpu_asic_id {
> + uint32_t did;
> + uint32_t rid;
> + char *marketing_name;
> +};
> +
> struct amdgpu_device {
> atomic_t refcount;
> int fd;
> @@ -76,6 +82,8 @@ struct amdgpu_device {
> unsigned major_version;
> unsigned minor_version;
>
> + /** Lookup table of asic device id, revision id and marketing name */
> + struct amdgpu_asic_id *asic_ids;
> /** List of buffer handles. Protected by bo_table_mutex. */
> struct util_hash_table *bo_handles;
> /** List of buffer GEM flink names. Protected by bo_table_mutex. */
> @@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr
> *mgr, uint64_t size,
> drm_private void
> amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va,
> uint64_t size);
>
> +drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
> +
> drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle
> dev);
>
> drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
> diff --git a/configure.ac b/configure.ac
> index 1cfb8c27..aa9529cd 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -84,6 +84,9 @@ fi
>
> pkgconfigdir=${libdir}/pkgconfig
> AC_SUBST(pkgconfigdir)
> +libdrmdatadir=${datadir}/libdrm
> +AC_SUBST(libdrmdatadir)
> +
> AC_ARG_ENABLE([udev],
> [AS_HELP_STRING([--enable-udev],
> [Enable support for using udev instead of mknod (default:
> disabled)])],
> @@ -527,6 +530,7 @@ fi
> AC_SUBST(WARN_CFLAGS)
> AC_CONFIG_FILES([
> Makefile
> + data/Makefile
> libkms/Makefile
> libkms/libkms.pc
> intel/Makefile
> diff --git a/data/Makefile.am b/data/Makefile.am
> new file mode 100644
> index 00000000..eba915dd
> --- /dev/null
> +++ b/data/Makefile.am
> @@ -0,0 +1,23 @@
> +# Copyright © 2017 Advanced Micro Devices, Inc.
> +# All Rights Reserved.
> +#
> +# Permission is hereby granted, free of charge, to any person obtaining a
> +# copy of this software and associated documentation files (the
> "Software"),
> +# to deal in the Software without restriction, including without limitation
> +# on the rights to use, copy, modify, merge, publish, distribute, sub
> +# license, and/or sell copies of the Software, and to permit persons to
> whom
> +# the Software is furnished to do so, subject to the following conditions:
> +#
> +# The above copyright notice and this permission notice (including the next
> +# paragraph) shall be included in all copies or substantial portions of the
> +# Software.
> +#
> +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO
> EVENT SHALL
> +# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> LIABILITY, WHETHER
> +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
> OF OR IN
> +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> THE SOFTWARE.
> +
> +libdrmdatadir = @libdrmdatadir@
> +dist_libdrmdata_DATA = amdgpu.ids
> diff --git a/data/amdgpu.ids b/data/amdgpu.ids
> new file mode 100644
> index 00000000..0b98c3c3
> --- /dev/null
> +++ b/data/amdgpu.ids
> @@ -0,0 +1,159 @@
> +# List of AMDGPU IDs
> +#
> +# Syntax:
> +# device_id, revision_id, product_name <-- single tab after comma
> +
> +1.0.0
> +6600, 0, AMD Radeon HD 8600/8700M
> +6600, 81, AMD Radeon (TM) R7 M370
> +6601, 0, AMD Radeon (TM) HD 8500M/8700M
> +6604, 0, AMD Radeon R7 M265 Series
> +6604, 81, AMD Radeon (TM) R7 M350
> +6605, 0, AMD Radeon R7 M260 Series
> +6605, 81, AMD Radeon (TM) R7 M340
> +6606, 0, AMD Radeon HD 8790M
> +6607, 0, AMD Radeon (TM) HD8530M
> +6608, 0, AMD FirePro W2100
> +6610, 0, AMD Radeon HD 8600 Series
> +6610, 81, AMD Radeon (TM) R7 350
> +6610, 83, AMD Radeon (TM) R5 340
> +6611, 0, AMD Radeon HD 8500 Series
> +6613, 0, AMD Radeon HD 8500 series
> +6617, C7, AMD Radeon R7 240 Series
> +6640, 0, AMD Radeon HD 8950
> +6640, 80, AMD Radeon (TM) R9 M380
> +6646, 0, AMD Radeon R9 M280X
> +6646, 80, AMD Radeon (TM) R9 M470X
> +6647, 0, AMD Radeon R9 M270X
> +6647, 80, AMD Radeon (TM) R9 M380
> +6649, 0, AMD FirePro W5100
> +6658, 0, AMD Radeon R7 200 Series
> +665C, 0, AMD Radeon HD 7700 Series
> +665D, 0, AMD Radeon R7 200 Series
> +665F, 81, AMD Radeon (TM) R7 300 Series
> +6660, 0, AMD Radeon HD 8600M Series
> +6660, 81, AMD Radeon (TM) R5 M335
> +6660, 83, AMD Radeon (TM) R5 M330
> +6663, 0, AMD Radeon HD 8500M Series
> +6663, 83, AMD Radeon (TM) R5 M320
> +6664, 0, AMD Radeon R5 M200 Series
> +6665, 0, AMD Radeon R5 M200 Series
> +6665, 83, AMD Radeon (TM) R5 M320
> +6667, 0, AMD Radeon R5 M200 Series
> +666F, 0, AMD Radeon HD 8500M
> +6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +6798, 0, AMD Radeon HD 7900 Series
> +679A, 0, AMD Radeon HD 7900 Series
> +679B, 0, AMD Radeon HD 7900 Series
> +679E, 0, AMD Radeon HD 7800 Series
> +67A0, 0, AMD Radeon FirePro W9100
> +67A1, 0, AMD Radeon FirePro W8100
> +67B0, 0, AMD Radeon R9 200 Series
> +67B0, 80, AMD Radeon (TM) R9 390 Series
> +67B1, 0, AMD Radeon R9 200 Series
> +67B1, 80, AMD Radeon (TM) R9 390 Series
> +67B9, 0, AMD Radeon R9 200 Series
> +67DF, C1, Radeon RX 580 Series
> +67DF, C2, Radeon RX 570 Series
> +67DF, C3, Radeon RX 580 Series
> +67DF, C4, AMD Radeon (TM) RX 480 Graphics
> +67DF, C5, AMD Radeon (TM) RX 470 Graphics
> +67DF, C6, Radeon RX 570 Series
> +67DF, C7, AMD Radeon (TM) RX 480 Graphics
> +67DF, CF, AMD Radeon (TM) RX 470 Graphics
> +67DF, E3, Radeon RX Series
> +67DF, E7, Radeon RX 580 Series
> +67DF, EF, Radeon RX 570 Series
> +67C2, 01, AMD Radeon (TM) Pro V7350x2
> +67C2, 02, AMD Radeon (TM) Pro V7300X
> +67C4, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67C7, 00, AMD Radeon (TM) Pro WX 5100 Graphics
> +67C0, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67D0, 01, AMD Radeon (TM) Pro V7350x2
> +67D0, 02, AMD Radeon (TM) Pro V7300X
> +67E0, 00, AMD Radeon (TM) Pro WX Series
> +67E3, 00, AMD Radeon (TM) Pro WX 4100
> +67E8, 00, AMD Radeon (TM) Pro WX Series
> +67E8, 01, AMD Radeon (TM) Pro WX Series
> +67E8, 80, AMD Radeon (TM) E9260 Graphics
> +67EB, 00, AMD Radeon (TM) Pro V5300X
> +67EF, C0, AMD Radeon (TM) RX Graphics
> +67EF, C1, AMD Radeon (TM) RX 460 Graphics
> +67EF, C3, Radeon RX Series
> +67EF, C5, AMD Radeon (TM) RX 460 Graphics
> +67EF, C7, AMD Radeon (TM) RX Graphics
> +67EF, CF, AMD Radeon (TM) RX 460 Graphics
> +67EF, E1, Radeon RX Series
> +67EF, E3, Radeon RX Series
> +67EF, E7, Radeon RX Series
> +67EF, EF, AMD Radeon (TM) RX Graphics
> +67EF, FF, Radeon RX Series
> +67FF, C0, AMD Radeon (TM) RX Graphics
> +67FF, C1, AMD Radeon (TM) RX Graphics
> +67FF, FF, Radeon RX 550 Series
> +6800, 0, AMD Radeon HD 7970M
> +6801, 0, AMD Radeon(TM) HD8970M
> +6808, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6809, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6810, 0, AMD Radeon(TM) HD 8800 Series
> +6810, 81, AMD Radeon (TM) R7 370 Series
> +6811, 0, AMD Radeon(TM) HD8800 Series
> +6811, 81, AMD Radeon (TM) R7 300 Series
> +6818, 0, AMD Radeon HD 7800 Series
> +6819, 0, AMD Radeon HD 7800 Series
> +6820, 0, AMD Radeon HD 8800M Series
> +6820, 81, AMD Radeon (TM) R9 M375
> +6820, 83, AMD Radeon (TM) R9 M375X
> +6821, 0, AMD Radeon HD 8800M Series
> +6821, 87, AMD Radeon (TM) R7 M380
> +6821, 83, AMD Radeon R9 (TM) M370X
> +6822, 0, AMD Radeon E8860
> +6823, 0, AMD Radeon HD 8800M Series
> +6825, 0, AMD Radeon HD 7800M Series
> +6827, 0, AMD Radeon HD 7800M Series
> +6828, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +682B, 0, AMD Radeon HD 8800M Series
> +682B, 87, AMD Radeon (TM) R9 M360
> +682C, 0, AMD FirePro W4100
> +682D, 0, AMD Radeon HD 7700M Series
> +682F, 0, AMD Radeon HD 7700M Series
> +6835, 0, AMD Radeon R7 Series / HD 9000 Series
> +6837, 0, AMD Radeon HD7700 Series
> +683D, 0, AMD Radeon HD 7700 Series
> +683F, 0, AMD Radeon HD 7700 Series
> +6900, 0, AMD Radeon R7 M260
> +6900, 81, AMD Radeon (TM) R7 M360
> +6900, 83, AMD Radeon (TM) R7 M340
> +6901, 0, AMD Radeon R5 M255
> +6907, 0, AMD Radeon R5 M255
> +6907, 87, AMD Radeon (TM) R5 M315
> +6920, 0, AMD RADEON R9 M395X
> +6920, 1, AMD RADEON R9 M390X
> +6921, 0, AMD Radeon R9 M295X
> +6929, 0, AMD FirePro S7150
> +692B, 0, AMD FirePro W7100
> +6938, 0, AMD Radeon R9 200 Series
> +6938, F0, AMD Radeon R9 200 Series
> +6938, F1, AMD Radeon (TM) R9 380 Series
> +6939, F0, AMD Radeon R9 200 Series
> +6939, 0, AMD Radeon R9 200 Series
> +6939, F1, AMD Radeon (TM) R9 380 Series
> +6985, 00, AMD Radeon Pro WX3100
> +6995, 00, AMD Radeon Pro WX2100
> +699F, C0, Radeon 500 Series
> +699F, C3, Radeon 500 Series
> +699F, C7, Radeon RX 550 Series
> +7300, C1, AMD FirePro (TM) S9300 x2
> +7300, C8, AMD Radeon (TM) R9 Fury Series
> +7300, C9, Radeon (TM) Pro Duo
> +7300, CB, AMD Radeon (TM) R9 Fury Series
> +7300, CA, AMD Radeon (TM) R9 Fury Series
> +9874, C4, AMD Radeon R7 Graphics
> +9874, C5, AMD Radeon R6 Graphics
> +9874, C6, AMD Radeon R6 Graphics
> +9874, C7, AMD Radeon R5 Graphics
> +9874, 81, AMD Radeon R6 Graphics
> +9874, 87, AMD Radeon R5 Graphics
> +9874, 85, AMD Radeon R6 Graphics
> +9874, 84, AMD Radeon R7 Graphics
> --
> 2.11.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH libdrm v8] amdgpu: move asic id table to a separate file
[not found] ` <20170612095021.5711-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-12 15:48 ` Deucher, Alexander
@ 2017-06-13 9:45 ` Michel Dänzer
[not found] ` <20170613094555.29998-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-14 11:34 ` Emil Velikov
1 sibling, 2 replies; 21+ messages in thread
From: Michel Dänzer @ 2017-06-13 9:45 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
change printf() to drmMsg(); add initial amdgpu.ids
v4: integrate some recent internal changes, including format changes
v5: fix line number for empty/commented lines; realloc to save memory;
indentation changes
v6: remove a line error
v7: [Michel Dänzer]
* Move amdgpu.ids to new data directory
* Remove placeholder entries from amdgpu.ids
* Set libdrmdatadir variable in configure.ac instead of Makefile.am
[Emil Velikov]
* Use isblank() instead of open-coding it [Emil Velikov]
* Don't leak asic_id_table memory if realloc fails [Emil Velikov]
* Check and bump table_max_size at the beginning of the while loop [Emil
Velikov]
* Initialize table_max_size to the number of entries in data/amdgpu.ids
v8: [Michel Dänzer]
* Make sure amdgpu_asic_id.c gets rebuilt when amdgpu.ids changes
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> # v7
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
Makefile.am | 1 +
amdgpu/Makefile.am | 7 ++
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 219 +++++++++++++++++++++++++++++++++++++++++++++++
amdgpu/amdgpu_asic_id.h | 165 -----------------------------------
amdgpu/amdgpu_device.c | 28 ++++--
amdgpu/amdgpu_internal.h | 10 +++
configure.ac | 4 +
data/Makefile.am | 23 +++++
data/amdgpu.ids | 159 ++++++++++++++++++++++++++++++++++
10 files changed, 445 insertions(+), 173 deletions(-)
create mode 100644 amdgpu/amdgpu_asic_id.c
delete mode 100644 amdgpu/amdgpu_asic_id.h
create mode 100644 data/Makefile.am
create mode 100644 data/amdgpu.ids
diff --git a/Makefile.am b/Makefile.am
index dfb8fcdb..7b86214e 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -109,6 +109,7 @@ SUBDIRS = \
$(TEGRA_SUBDIR) \
$(VC4_SUBDIR) \
$(ETNAVIV_SUBDIR) \
+ data \
tests \
$(MAN_SUBDIR)
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1ba..66f6f676 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,12 +30,19 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
+libdrmdatadir = @libdrmdatadir@
+ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' \
+ $(top_srcdir)/data/amdgpu.ids)
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\" \
+ -DAMDGPU_ASIC_ID_TABLE_NUM_ENTRIES=$(ASIC_ID_TABLE_NUM_ENTRIES)
+
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
libdrm_amdgpu_ladir = $(libdir)
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
libdrm_amdgpu_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
libdrm_amdgpu_la_SOURCES = $(LIBDRM_AMDGPU_FILES)
+amdgpu_asic_id.lo: $(top_srcdir)/data/amdgpu.ids
libdrm_amdgpuincludedir = ${includedir}/libdrm
libdrm_amdgpuinclude_HEADERS = $(LIBDRM_AMDGPU_H_FILES)
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0a..bc3abaa6 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
LIBDRM_AMDGPU_FILES := \
- amdgpu_asic_id.h \
+ amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 00000000..3a88896b
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,219 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <ctype.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include "xf86drm.h"
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+ char *buf, *saveptr;
+ char *s_did;
+ char *s_rid;
+ char *s_name;
+ char *endptr;
+ int r = 0;
+
+ buf = strdup(line);
+ if (!buf)
+ return -ENOMEM;
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ r = -EAGAIN;
+ goto out;
+ }
+
+ /* device id */
+ s_did = strtok_r(buf, ",", &saveptr);
+ if (!s_did) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->did = strtol(s_did, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* revision id */
+ s_rid = strtok_r(NULL, ",", &saveptr);
+ if (!s_rid) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->rid = strtol(s_rid, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* marketing name */
+ s_name = strtok_r(NULL, ",", &saveptr);
+ if (!s_name) {
+ r = -EINVAL;
+ goto out;
+ }
+ /* trim leading whitespaces or tabs */
+ while (isblank(*s_name))
+ s_name++;
+ if (strlen(s_name) == 0) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->marketing_name = strdup(s_name);
+ if (id->marketing_name == NULL) {
+ r = -EINVAL;
+ goto out;
+ }
+
+out:
+ free(buf);
+
+ return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+ struct amdgpu_asic_id *asic_id_table;
+ struct amdgpu_asic_id *id;
+ FILE *fp;
+ char *line = NULL;
+ size_t len = 0;
+ ssize_t n;
+ int line_num = 1;
+ size_t table_size = 0;
+ size_t table_max_size = AMDGPU_ASIC_ID_TABLE_NUM_ENTRIES;
+ int r = 0;
+
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+ if (!fp) {
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ strerror(errno));
+ return -EINVAL;
+ }
+
+ asic_id_table = calloc(table_max_size + 1,
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto close;
+ }
+
+ /* 1st valid line is file version */
+ while ((n = getline(&line, &len, fp)) != -1) {
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ line_num++;
+ continue;
+ }
+
+ drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
+ break;
+ }
+
+ while ((n = getline(&line, &len, fp)) != -1) {
+ if (table_size > table_max_size) {
+ /* double table size */
+ table_max_size *= 2;
+ id = realloc(asic_id_table, (table_max_size + 1) *
+ sizeof(struct amdgpu_asic_id));
+ if (!id) {
+ r = -ENOMEM;
+ goto free;
+ }
+ asic_id_table = id;
+ }
+
+ id = asic_id_table + table_size;
+
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ r = parse_one_line(line, id);
+ if (r) {
+ if (r == -EAGAIN) {
+ line_num++;
+ continue;
+ }
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",
+ AMDGPU_ASIC_ID_TABLE, line_num, line);
+ goto free;
+ }
+
+ line_num++;
+ table_size++;
+ }
+
+ /* end of table */
+ id = asic_id_table + table_size;
+ memset(id, 0, sizeof(struct amdgpu_asic_id));
+
+ if (table_size != table_max_size) {
+ id = realloc(asic_id_table, (table_size + 1) *
+ sizeof(struct amdgpu_asic_id));
+ if (!id)
+ r = -ENOMEM;
+ else
+ asic_id_table = id;
+ }
+
+free:
+ free(line);
+
+ if (r && asic_id_table) {
+ while (table_size--) {
+ id = asic_id_table + table_size;
+ free(id->marketing_name);
+ }
+ free(asic_id_table);
+ asic_id_table = NULL;
+ }
+close:
+ fclose(fp);
+
+ *p_asic_id_table = asic_id_table;
+
+ return r;
+}
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
deleted file mode 100644
index 3e7d736b..00000000
--- a/amdgpu/amdgpu_asic_id.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright © 2016 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_ASIC_ID_H__
-#define __AMDGPU_ASIC_ID_H__
-
-static struct amdgpu_asic_id_table_t {
- uint32_t did;
- uint32_t rid;
- const char *marketing_name;
-} const amdgpu_asic_id_table [] = {
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
- {0x6600, 0x81, "AMD Radeon R7 M370"},
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
- {0x6604, 0x81, "AMD Radeon R7 M350"},
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
- {0x6605, 0x81, "AMD Radeon R7 M340"},
- {0x6606, 0x0, "AMD Radeon HD 8790M"},
- {0x6607, 0x0, "AMD Radeon HD8530M"},
- {0x6608, 0x0, "AMD FirePro W2100"},
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
- {0x6610, 0x81, "AMD Radeon R7 350"},
- {0x6610, 0x83, "AMD Radeon R5 340"},
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
- {0x6640, 0x0, "AMD Radeon HD 8950"},
- {0x6640, 0x80, "AMD Radeon R9 M380"},
- {0x6646, 0x0, "AMD Radeon R9 M280X"},
- {0x6646, 0x80, "AMD Radeon R9 M470X"},
- {0x6647, 0x0, "AMD Radeon R9 M270X"},
- {0x6647, 0x80, "AMD Radeon R9 M380"},
- {0x6649, 0x0, "AMD FirePro W5100"},
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
- {0x6660, 0x81, "AMD Radeon R5 M335"},
- {0x6660, 0x83, "AMD Radeon R5 M330"},
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
- {0x6663, 0x83, "AMD Radeon R5 M320"},
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x83, "AMD Radeon R5 M320"},
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
- {0x666F, 0x0, "AMD Radeon HD 8500M"},
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
- {0x6800, 0x0, "AMD Radeon HD 7970M"},
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6820, 0x81, "AMD Radeon R9 M375"},
- {0x6820, 0x83, "AMD Radeon R9 M375X"},
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6821, 0x87, "AMD Radeon R7 M380"},
- {0x6821, 0x83, "AMD Radeon R9 M370X"},
- {0x6822, 0x0, "AMD Radeon E8860"},
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
- {0x682B, 0x87, "AMD Radeon R9 M360"},
- {0x682C, 0x0, "AMD FirePro W4100"},
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
- {0x6900, 0x0, "AMD Radeon R7 M260"},
- {0x6900, 0x81, "AMD Radeon R7 M360"},
- {0x6900, 0x83, "AMD Radeon R7 M340"},
- {0x6901, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x87, "AMD Radeon R5 M315"},
- {0x6920, 0x0, "AMD Radeon R9 M395X"},
- {0x6920, 0x1, "AMD Radeon R9 M390X"},
- {0x6921, 0x0, "AMD Radeon R9 M295X"},
- {0x6929, 0x0, "AMD FirePro S7150"},
- {0x692B, 0x0, "AMD FirePro W7100"},
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},
-
- {0x0000, 0x0, "\0"},
-};
-#endif
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index f473d2da..9a238d97 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -44,7 +44,6 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
-#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
+ const struct amdgpu_asic_id *id;
amdgpu_vamgr_deinit(&dev->vamgr_32);
amdgpu_vamgr_deinit(&dev->vamgr);
util_hash_table_destroy(dev->bo_flink_names);
@@ -140,6 +140,12 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
+ if (dev->asic_ids) {
+ for (id = dev->asic_ids; id->did; id++)
+ free(id->marketing_name);
+
+ free(dev->asic_ids);
+ }
free(dev);
}
@@ -267,6 +273,12 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);
+ if (r) {
+ fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
+ __func__, r);
+ }
+
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
+ const struct amdgpu_asic_id *id;
+
+ if (!dev->asic_ids)
+ return NULL;
- while (t->did) {
- if ((t->did == dev->info.asic_id) &&
- (t->rid == dev->info.pci_rev_id))
- return t->marketing_name;
- t++;
+ for (id = dev->asic_ids; id->did; id++) {
+ if ((id->did == dev->info.asic_id) &&
+ (id->rid == dev->info.pci_rev_id))
+ return id->marketing_name;
}
return NULL;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index cf119a53..e68246bf 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -69,6 +69,12 @@ struct amdgpu_va {
struct amdgpu_bo_va_mgr *vamgr;
};
+struct amdgpu_asic_id {
+ uint32_t did;
+ uint32_t rid;
+ char *marketing_name;
+};
+
struct amdgpu_device {
atomic_t refcount;
int fd;
@@ -76,6 +82,8 @@ struct amdgpu_device {
unsigned major_version;
unsigned minor_version;
+ /** Lookup table of asic device id, revision id and marketing name */
+ struct amdgpu_asic_id *asic_ids;
/** List of buffer handles. Protected by bo_table_mutex. */
struct util_hash_table *bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
+
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
diff --git a/configure.ac b/configure.ac
index 1cfb8c27..aa9529cd 100644
--- a/configure.ac
+++ b/configure.ac
@@ -84,6 +84,9 @@ fi
pkgconfigdir=${libdir}/pkgconfig
AC_SUBST(pkgconfigdir)
+libdrmdatadir=${datadir}/libdrm
+AC_SUBST(libdrmdatadir)
+
AC_ARG_ENABLE([udev],
[AS_HELP_STRING([--enable-udev],
[Enable support for using udev instead of mknod (default: disabled)])],
@@ -527,6 +530,7 @@ fi
AC_SUBST(WARN_CFLAGS)
AC_CONFIG_FILES([
Makefile
+ data/Makefile
libkms/Makefile
libkms/libkms.pc
intel/Makefile
diff --git a/data/Makefile.am b/data/Makefile.am
new file mode 100644
index 00000000..eba915dd
--- /dev/null
+++ b/data/Makefile.am
@@ -0,0 +1,23 @@
+# Copyright © 2017 Advanced Micro Devices, Inc.
+# All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# on the rights to use, copy, modify, merge, publish, distribute, sub
+# license, and/or sell copies of the Software, and to permit persons to whom
+# the Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+libdrmdatadir = @libdrmdatadir@
+dist_libdrmdata_DATA = amdgpu.ids
diff --git a/data/amdgpu.ids b/data/amdgpu.ids
new file mode 100644
index 00000000..0b98c3c3
--- /dev/null
+++ b/data/amdgpu.ids
@@ -0,0 +1,159 @@
+# List of AMDGPU IDs
+#
+# Syntax:
+# device_id, revision_id, product_name <-- single tab after comma
+
+1.0.0
+6600, 0, AMD Radeon HD 8600/8700M
+6600, 81, AMD Radeon (TM) R7 M370
+6601, 0, AMD Radeon (TM) HD 8500M/8700M
+6604, 0, AMD Radeon R7 M265 Series
+6604, 81, AMD Radeon (TM) R7 M350
+6605, 0, AMD Radeon R7 M260 Series
+6605, 81, AMD Radeon (TM) R7 M340
+6606, 0, AMD Radeon HD 8790M
+6607, 0, AMD Radeon (TM) HD8530M
+6608, 0, AMD FirePro W2100
+6610, 0, AMD Radeon HD 8600 Series
+6610, 81, AMD Radeon (TM) R7 350
+6610, 83, AMD Radeon (TM) R5 340
+6611, 0, AMD Radeon HD 8500 Series
+6613, 0, AMD Radeon HD 8500 series
+6617, C7, AMD Radeon R7 240 Series
+6640, 0, AMD Radeon HD 8950
+6640, 80, AMD Radeon (TM) R9 M380
+6646, 0, AMD Radeon R9 M280X
+6646, 80, AMD Radeon (TM) R9 M470X
+6647, 0, AMD Radeon R9 M270X
+6647, 80, AMD Radeon (TM) R9 M380
+6649, 0, AMD FirePro W5100
+6658, 0, AMD Radeon R7 200 Series
+665C, 0, AMD Radeon HD 7700 Series
+665D, 0, AMD Radeon R7 200 Series
+665F, 81, AMD Radeon (TM) R7 300 Series
+6660, 0, AMD Radeon HD 8600M Series
+6660, 81, AMD Radeon (TM) R5 M335
+6660, 83, AMD Radeon (TM) R5 M330
+6663, 0, AMD Radeon HD 8500M Series
+6663, 83, AMD Radeon (TM) R5 M320
+6664, 0, AMD Radeon R5 M200 Series
+6665, 0, AMD Radeon R5 M200 Series
+6665, 83, AMD Radeon (TM) R5 M320
+6667, 0, AMD Radeon R5 M200 Series
+666F, 0, AMD Radeon HD 8500M
+6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
+678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
+6798, 0, AMD Radeon HD 7900 Series
+679A, 0, AMD Radeon HD 7900 Series
+679B, 0, AMD Radeon HD 7900 Series
+679E, 0, AMD Radeon HD 7800 Series
+67A0, 0, AMD Radeon FirePro W9100
+67A1, 0, AMD Radeon FirePro W8100
+67B0, 0, AMD Radeon R9 200 Series
+67B0, 80, AMD Radeon (TM) R9 390 Series
+67B1, 0, AMD Radeon R9 200 Series
+67B1, 80, AMD Radeon (TM) R9 390 Series
+67B9, 0, AMD Radeon R9 200 Series
+67DF, C1, Radeon RX 580 Series
+67DF, C2, Radeon RX 570 Series
+67DF, C3, Radeon RX 580 Series
+67DF, C4, AMD Radeon (TM) RX 480 Graphics
+67DF, C5, AMD Radeon (TM) RX 470 Graphics
+67DF, C6, Radeon RX 570 Series
+67DF, C7, AMD Radeon (TM) RX 480 Graphics
+67DF, CF, AMD Radeon (TM) RX 470 Graphics
+67DF, E3, Radeon RX Series
+67DF, E7, Radeon RX 580 Series
+67DF, EF, Radeon RX 570 Series
+67C2, 01, AMD Radeon (TM) Pro V7350x2
+67C2, 02, AMD Radeon (TM) Pro V7300X
+67C4, 00, AMD Radeon (TM) Pro WX 7100 Graphics
+67C7, 00, AMD Radeon (TM) Pro WX 5100 Graphics
+67C0, 00, AMD Radeon (TM) Pro WX 7100 Graphics
+67D0, 01, AMD Radeon (TM) Pro V7350x2
+67D0, 02, AMD Radeon (TM) Pro V7300X
+67E0, 00, AMD Radeon (TM) Pro WX Series
+67E3, 00, AMD Radeon (TM) Pro WX 4100
+67E8, 00, AMD Radeon (TM) Pro WX Series
+67E8, 01, AMD Radeon (TM) Pro WX Series
+67E8, 80, AMD Radeon (TM) E9260 Graphics
+67EB, 00, AMD Radeon (TM) Pro V5300X
+67EF, C0, AMD Radeon (TM) RX Graphics
+67EF, C1, AMD Radeon (TM) RX 460 Graphics
+67EF, C3, Radeon RX Series
+67EF, C5, AMD Radeon (TM) RX 460 Graphics
+67EF, C7, AMD Radeon (TM) RX Graphics
+67EF, CF, AMD Radeon (TM) RX 460 Graphics
+67EF, E1, Radeon RX Series
+67EF, E3, Radeon RX Series
+67EF, E7, Radeon RX Series
+67EF, EF, AMD Radeon (TM) RX Graphics
+67EF, FF, Radeon RX Series
+67FF, C0, AMD Radeon (TM) RX Graphics
+67FF, C1, AMD Radeon (TM) RX Graphics
+67FF, FF, Radeon RX 550 Series
+6800, 0, AMD Radeon HD 7970M
+6801, 0, AMD Radeon(TM) HD8970M
+6808, 0, ATI FirePro V(FireGL V) Graphics Adapter
+6809, 0, ATI FirePro V(FireGL V) Graphics Adapter
+6810, 0, AMD Radeon(TM) HD 8800 Series
+6810, 81, AMD Radeon (TM) R7 370 Series
+6811, 0, AMD Radeon(TM) HD8800 Series
+6811, 81, AMD Radeon (TM) R7 300 Series
+6818, 0, AMD Radeon HD 7800 Series
+6819, 0, AMD Radeon HD 7800 Series
+6820, 0, AMD Radeon HD 8800M Series
+6820, 81, AMD Radeon (TM) R9 M375
+6820, 83, AMD Radeon (TM) R9 M375X
+6821, 0, AMD Radeon HD 8800M Series
+6821, 87, AMD Radeon (TM) R7 M380
+6821, 83, AMD Radeon R9 (TM) M370X
+6822, 0, AMD Radeon E8860
+6823, 0, AMD Radeon HD 8800M Series
+6825, 0, AMD Radeon HD 7800M Series
+6827, 0, AMD Radeon HD 7800M Series
+6828, 0, ATI FirePro V(FireGL V) Graphics Adapter
+682B, 0, AMD Radeon HD 8800M Series
+682B, 87, AMD Radeon (TM) R9 M360
+682C, 0, AMD FirePro W4100
+682D, 0, AMD Radeon HD 7700M Series
+682F, 0, AMD Radeon HD 7700M Series
+6835, 0, AMD Radeon R7 Series / HD 9000 Series
+6837, 0, AMD Radeon HD7700 Series
+683D, 0, AMD Radeon HD 7700 Series
+683F, 0, AMD Radeon HD 7700 Series
+6900, 0, AMD Radeon R7 M260
+6900, 81, AMD Radeon (TM) R7 M360
+6900, 83, AMD Radeon (TM) R7 M340
+6901, 0, AMD Radeon R5 M255
+6907, 0, AMD Radeon R5 M255
+6907, 87, AMD Radeon (TM) R5 M315
+6920, 0, AMD RADEON R9 M395X
+6920, 1, AMD RADEON R9 M390X
+6921, 0, AMD Radeon R9 M295X
+6929, 0, AMD FirePro S7150
+692B, 0, AMD FirePro W7100
+6938, 0, AMD Radeon R9 200 Series
+6938, F0, AMD Radeon R9 200 Series
+6938, F1, AMD Radeon (TM) R9 380 Series
+6939, F0, AMD Radeon R9 200 Series
+6939, 0, AMD Radeon R9 200 Series
+6939, F1, AMD Radeon (TM) R9 380 Series
+6985, 00, AMD Radeon Pro WX3100
+6995, 00, AMD Radeon Pro WX2100
+699F, C0, Radeon 500 Series
+699F, C3, Radeon 500 Series
+699F, C7, Radeon RX 550 Series
+7300, C1, AMD FirePro (TM) S9300 x2
+7300, C8, AMD Radeon (TM) R9 Fury Series
+7300, C9, Radeon (TM) Pro Duo
+7300, CB, AMD Radeon (TM) R9 Fury Series
+7300, CA, AMD Radeon (TM) R9 Fury Series
+9874, C4, AMD Radeon R7 Graphics
+9874, C5, AMD Radeon R6 Graphics
+9874, C6, AMD Radeon R6 Graphics
+9874, C7, AMD Radeon R5 Graphics
+9874, 81, AMD Radeon R6 Graphics
+9874, 87, AMD Radeon R5 Graphics
+9874, 85, AMD Radeon R6 Graphics
+9874, 84, AMD Radeon R7 Graphics
--
2.11.0
_______________________________________________
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amd-gfx@lists.freedesktop.org
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v8] amdgpu: move asic id table to a separate file
[not found] ` <20170613094555.29998-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-06-13 14:31 ` Alex Deucher
0 siblings, 0 replies; 21+ messages in thread
From: Alex Deucher @ 2017-06-13 14:31 UTC (permalink / raw)
To: Michel Dänzer; +Cc: Maling list - DRI developers, amd-gfx list
On Tue, Jun 13, 2017 at 5:45 AM, Michel Dänzer <michel@daenzer.net> wrote:
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal changes, including format changes
> v5: fix line number for empty/commented lines; realloc to save memory;
> indentation changes
> v6: remove a line error
> v7: [Michel Dänzer]
> * Move amdgpu.ids to new data directory
> * Remove placeholder entries from amdgpu.ids
> * Set libdrmdatadir variable in configure.ac instead of Makefile.am
> [Emil Velikov]
> * Use isblank() instead of open-coding it [Emil Velikov]
> * Don't leak asic_id_table memory if realloc fails [Emil Velikov]
> * Check and bump table_max_size at the beginning of the while loop [Emil
> Velikov]
> * Initialize table_max_size to the number of entries in data/amdgpu.ids
> v8: [Michel Dänzer]
> * Make sure amdgpu_asic_id.c gets rebuilt when amdgpu.ids changes
>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> # v7
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Alex
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
> ---
> Makefile.am | 1 +
> amdgpu/Makefile.am | 7 ++
> amdgpu/Makefile.sources | 2 +-
> amdgpu/amdgpu_asic_id.c | 219 +++++++++++++++++++++++++++++++++++++++++++++++
> amdgpu/amdgpu_asic_id.h | 165 -----------------------------------
> amdgpu/amdgpu_device.c | 28 ++++--
> amdgpu/amdgpu_internal.h | 10 +++
> configure.ac | 4 +
> data/Makefile.am | 23 +++++
> data/amdgpu.ids | 159 ++++++++++++++++++++++++++++++++++
> 10 files changed, 445 insertions(+), 173 deletions(-)
> create mode 100644 amdgpu/amdgpu_asic_id.c
> delete mode 100644 amdgpu/amdgpu_asic_id.h
> create mode 100644 data/Makefile.am
> create mode 100644 data/amdgpu.ids
>
> diff --git a/Makefile.am b/Makefile.am
> index dfb8fcdb..7b86214e 100644
> --- a/Makefile.am
> +++ b/Makefile.am
> @@ -109,6 +109,7 @@ SUBDIRS = \
> $(TEGRA_SUBDIR) \
> $(VC4_SUBDIR) \
> $(ETNAVIV_SUBDIR) \
> + data \
> tests \
> $(MAN_SUBDIR)
>
> diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
> index cf7bc1ba..66f6f676 100644
> --- a/amdgpu/Makefile.am
> +++ b/amdgpu/Makefile.am
> @@ -30,12 +30,19 @@ AM_CFLAGS = \
> $(PTHREADSTUBS_CFLAGS) \
> -I$(top_srcdir)/include/drm
>
> +libdrmdatadir = @libdrmdatadir@
> +ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' \
> + $(top_srcdir)/data/amdgpu.ids)
> +AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\" \
> + -DAMDGPU_ASIC_ID_TABLE_NUM_ENTRIES=$(ASIC_ID_TABLE_NUM_ENTRIES)
> +
> libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
> libdrm_amdgpu_ladir = $(libdir)
> libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
> libdrm_amdgpu_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
>
> libdrm_amdgpu_la_SOURCES = $(LIBDRM_AMDGPU_FILES)
> +amdgpu_asic_id.lo: $(top_srcdir)/data/amdgpu.ids
>
> libdrm_amdgpuincludedir = ${includedir}/libdrm
> libdrm_amdgpuinclude_HEADERS = $(LIBDRM_AMDGPU_H_FILES)
> diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
> index 487b9e0a..bc3abaa6 100644
> --- a/amdgpu/Makefile.sources
> +++ b/amdgpu/Makefile.sources
> @@ -1,5 +1,5 @@
> LIBDRM_AMDGPU_FILES := \
> - amdgpu_asic_id.h \
> + amdgpu_asic_id.c \
> amdgpu_bo.c \
> amdgpu_cs.c \
> amdgpu_device.c \
> diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
> new file mode 100644
> index 00000000..3a88896b
> --- /dev/null
> +++ b/amdgpu/amdgpu_asic_id.c
> @@ -0,0 +1,219 @@
> +/*
> + * Copyright © 2017 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifdef HAVE_CONFIG_H
> +#include "config.h"
> +#endif
> +
> +#include <ctype.h>
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <stdint.h>
> +#include <string.h>
> +#include <unistd.h>
> +#include <errno.h>
> +
> +#include "xf86drm.h"
> +#include "amdgpu_drm.h"
> +#include "amdgpu_internal.h"
> +
> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
> +{
> + char *buf, *saveptr;
> + char *s_did;
> + char *s_rid;
> + char *s_name;
> + char *endptr;
> + int r = 0;
> +
> + buf = strdup(line);
> + if (!buf)
> + return -ENOMEM;
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + r = -EAGAIN;
> + goto out;
> + }
> +
> + /* device id */
> + s_did = strtok_r(buf, ",", &saveptr);
> + if (!s_did) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->did = strtol(s_did, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* revision id */
> + s_rid = strtok_r(NULL, ",", &saveptr);
> + if (!s_rid) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->rid = strtol(s_rid, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* marketing name */
> + s_name = strtok_r(NULL, ",", &saveptr);
> + if (!s_name) {
> + r = -EINVAL;
> + goto out;
> + }
> + /* trim leading whitespaces or tabs */
> + while (isblank(*s_name))
> + s_name++;
> + if (strlen(s_name) == 0) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->marketing_name = strdup(s_name);
> + if (id->marketing_name == NULL) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> +out:
> + free(buf);
> +
> + return r;
> +}
> +
> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
> +{
> + struct amdgpu_asic_id *asic_id_table;
> + struct amdgpu_asic_id *id;
> + FILE *fp;
> + char *line = NULL;
> + size_t len = 0;
> + ssize_t n;
> + int line_num = 1;
> + size_t table_size = 0;
> + size_t table_max_size = AMDGPU_ASIC_ID_TABLE_NUM_ENTRIES;
> + int r = 0;
> +
> + fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
> + if (!fp) {
> + fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
> + strerror(errno));
> + return -EINVAL;
> + }
> +
> + asic_id_table = calloc(table_max_size + 1,
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto close;
> + }
> +
> + /* 1st valid line is file version */
> + while ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + line_num++;
> + continue;
> + }
> +
> + drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + break;
> + }
> +
> + while ((n = getline(&line, &len, fp)) != -1) {
> + if (table_size > table_max_size) {
> + /* double table size */
> + table_max_size *= 2;
> + id = realloc(asic_id_table, (table_max_size + 1) *
> + sizeof(struct amdgpu_asic_id));
> + if (!id) {
> + r = -ENOMEM;
> + goto free;
> + }
> + asic_id_table = id;
> + }
> +
> + id = asic_id_table + table_size;
> +
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + r = parse_one_line(line, id);
> + if (r) {
> + if (r == -EAGAIN) {
> + line_num++;
> + continue;
> + }
> + fprintf(stderr, "Invalid format: %s: line %d: %s\n",
> + AMDGPU_ASIC_ID_TABLE, line_num, line);
> + goto free;
> + }
> +
> + line_num++;
> + table_size++;
> + }
> +
> + /* end of table */
> + id = asic_id_table + table_size;
> + memset(id, 0, sizeof(struct amdgpu_asic_id));
> +
> + if (table_size != table_max_size) {
> + id = realloc(asic_id_table, (table_size + 1) *
> + sizeof(struct amdgpu_asic_id));
> + if (!id)
> + r = -ENOMEM;
> + else
> + asic_id_table = id;
> + }
> +
> +free:
> + free(line);
> +
> + if (r && asic_id_table) {
> + while (table_size--) {
> + id = asic_id_table + table_size;
> + free(id->marketing_name);
> + }
> + free(asic_id_table);
> + asic_id_table = NULL;
> + }
> +close:
> + fclose(fp);
> +
> + *p_asic_id_table = asic_id_table;
> +
> + return r;
> +}
> diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
> deleted file mode 100644
> index 3e7d736b..00000000
> --- a/amdgpu/amdgpu_asic_id.h
> +++ /dev/null
> @@ -1,165 +0,0 @@
> -/*
> - * Copyright © 2016 Advanced Micro Devices, Inc.
> - * All Rights Reserved.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - */
> -
> -#ifndef __AMDGPU_ASIC_ID_H__
> -#define __AMDGPU_ASIC_ID_H__
> -
> -static struct amdgpu_asic_id_table_t {
> - uint32_t did;
> - uint32_t rid;
> - const char *marketing_name;
> -} const amdgpu_asic_id_table [] = {
> - {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
> - {0x6600, 0x81, "AMD Radeon R7 M370"},
> - {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
> - {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
> - {0x6604, 0x81, "AMD Radeon R7 M350"},
> - {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
> - {0x6605, 0x81, "AMD Radeon R7 M340"},
> - {0x6606, 0x0, "AMD Radeon HD 8790M"},
> - {0x6607, 0x0, "AMD Radeon HD8530M"},
> - {0x6608, 0x0, "AMD FirePro W2100"},
> - {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
> - {0x6610, 0x81, "AMD Radeon R7 350"},
> - {0x6610, 0x83, "AMD Radeon R5 340"},
> - {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
> - {0x6613, 0x0, "AMD Radeon HD 8500 series"},
> - {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
> - {0x6640, 0x0, "AMD Radeon HD 8950"},
> - {0x6640, 0x80, "AMD Radeon R9 M380"},
> - {0x6646, 0x0, "AMD Radeon R9 M280X"},
> - {0x6646, 0x80, "AMD Radeon R9 M470X"},
> - {0x6647, 0x0, "AMD Radeon R9 M270X"},
> - {0x6647, 0x80, "AMD Radeon R9 M380"},
> - {0x6649, 0x0, "AMD FirePro W5100"},
> - {0x6658, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x665D, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665F, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
> - {0x6660, 0x81, "AMD Radeon R5 M335"},
> - {0x6660, 0x83, "AMD Radeon R5 M330"},
> - {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
> - {0x6663, 0x83, "AMD Radeon R5 M320"},
> - {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x83, "AMD Radeon R5 M320"},
> - {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x666F, 0x0, "AMD Radeon HD 8500M"},
> - {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
> - {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
> - {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
> - {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
> - {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
> - {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
> - {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
> - {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
> - {0x6800, 0x0, "AMD Radeon HD 7970M"},
> - {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
> - {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
> - {0x6810, 0x81, "AMD Radeon R7 370 Series"},
> - {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
> - {0x6811, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6820, 0x81, "AMD Radeon R9 M375"},
> - {0x6820, 0x83, "AMD Radeon R9 M375X"},
> - {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6821, 0x87, "AMD Radeon R7 M380"},
> - {0x6821, 0x83, "AMD Radeon R9 M370X"},
> - {0x6822, 0x0, "AMD Radeon E8860"},
> - {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x682B, 0x87, "AMD Radeon R9 M360"},
> - {0x682C, 0x0, "AMD FirePro W4100"},
> - {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
> - {0x6837, 0x0, "AMD Radeon HD7700 Series"},
> - {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x6900, 0x0, "AMD Radeon R7 M260"},
> - {0x6900, 0x81, "AMD Radeon R7 M360"},
> - {0x6900, 0x83, "AMD Radeon R7 M340"},
> - {0x6901, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x87, "AMD Radeon R5 M315"},
> - {0x6920, 0x0, "AMD Radeon R9 M395X"},
> - {0x6920, 0x1, "AMD Radeon R9 M390X"},
> - {0x6921, 0x0, "AMD Radeon R9 M295X"},
> - {0x6929, 0x0, "AMD FirePro S7150"},
> - {0x692B, 0x0, "AMD FirePro W7100"},
> - {0x6938, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
> - {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
> - {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x81, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x87, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x85, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x84, "AMD Radeon R7 Graphics"},
> -
> - {0x0000, 0x0, "\0"},
> -};
> -#endif
> diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
> index f473d2da..9a238d97 100644
> --- a/amdgpu/amdgpu_device.c
> +++ b/amdgpu/amdgpu_device.c
> @@ -44,7 +44,6 @@
> #include "amdgpu_internal.h"
> #include "util_hash_table.h"
> #include "util_math.h"
> -#include "amdgpu_asic_id.h"
>
> #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
> #define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
> @@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
>
> static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> {
> + const struct amdgpu_asic_id *id;
> amdgpu_vamgr_deinit(&dev->vamgr_32);
> amdgpu_vamgr_deinit(&dev->vamgr);
> util_hash_table_destroy(dev->bo_flink_names);
> @@ -140,6 +140,12 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> close(dev->fd);
> if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
> close(dev->flink_fd);
> + if (dev->asic_ids) {
> + for (id = dev->asic_ids; id->did; id++)
> + free(id->marketing_name);
> +
> + free(dev->asic_ids);
> + }
> free(dev);
> }
>
> @@ -267,6 +273,12 @@ int amdgpu_device_initialize(int fd,
> amdgpu_vamgr_init(&dev->vamgr_32, start, max,
> dev->dev_info.virtual_address_alignment);
>
> + r = amdgpu_parse_asic_ids(&dev->asic_ids);
> + if (r) {
> + fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
> + __func__, r);
> + }
> +
> *major_version = dev->major_version;
> *minor_version = dev->minor_version;
> *device_handle = dev;
> @@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
>
> const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
> {
> - const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
> + const struct amdgpu_asic_id *id;
> +
> + if (!dev->asic_ids)
> + return NULL;
>
> - while (t->did) {
> - if ((t->did == dev->info.asic_id) &&
> - (t->rid == dev->info.pci_rev_id))
> - return t->marketing_name;
> - t++;
> + for (id = dev->asic_ids; id->did; id++) {
> + if ((id->did == dev->info.asic_id) &&
> + (id->rid == dev->info.pci_rev_id))
> + return id->marketing_name;
> }
>
> return NULL;
> diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
> index cf119a53..e68246bf 100644
> --- a/amdgpu/amdgpu_internal.h
> +++ b/amdgpu/amdgpu_internal.h
> @@ -69,6 +69,12 @@ struct amdgpu_va {
> struct amdgpu_bo_va_mgr *vamgr;
> };
>
> +struct amdgpu_asic_id {
> + uint32_t did;
> + uint32_t rid;
> + char *marketing_name;
> +};
> +
> struct amdgpu_device {
> atomic_t refcount;
> int fd;
> @@ -76,6 +82,8 @@ struct amdgpu_device {
> unsigned major_version;
> unsigned minor_version;
>
> + /** Lookup table of asic device id, revision id and marketing name */
> + struct amdgpu_asic_id *asic_ids;
> /** List of buffer handles. Protected by bo_table_mutex. */
> struct util_hash_table *bo_handles;
> /** List of buffer GEM flink names. Protected by bo_table_mutex. */
> @@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
> drm_private void
> amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
>
> +drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
> +
> drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
>
> drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
> diff --git a/configure.ac b/configure.ac
> index 1cfb8c27..aa9529cd 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -84,6 +84,9 @@ fi
>
> pkgconfigdir=${libdir}/pkgconfig
> AC_SUBST(pkgconfigdir)
> +libdrmdatadir=${datadir}/libdrm
> +AC_SUBST(libdrmdatadir)
> +
> AC_ARG_ENABLE([udev],
> [AS_HELP_STRING([--enable-udev],
> [Enable support for using udev instead of mknod (default: disabled)])],
> @@ -527,6 +530,7 @@ fi
> AC_SUBST(WARN_CFLAGS)
> AC_CONFIG_FILES([
> Makefile
> + data/Makefile
> libkms/Makefile
> libkms/libkms.pc
> intel/Makefile
> diff --git a/data/Makefile.am b/data/Makefile.am
> new file mode 100644
> index 00000000..eba915dd
> --- /dev/null
> +++ b/data/Makefile.am
> @@ -0,0 +1,23 @@
> +# Copyright © 2017 Advanced Micro Devices, Inc.
> +# All Rights Reserved.
> +#
> +# Permission is hereby granted, free of charge, to any person obtaining a
> +# copy of this software and associated documentation files (the "Software"),
> +# to deal in the Software without restriction, including without limitation
> +# on the rights to use, copy, modify, merge, publish, distribute, sub
> +# license, and/or sell copies of the Software, and to permit persons to whom
> +# the Software is furnished to do so, subject to the following conditions:
> +#
> +# The above copyright notice and this permission notice (including the next
> +# paragraph) shall be included in all copies or substantial portions of the
> +# Software.
> +#
> +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
> +# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
> +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
> +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> +
> +libdrmdatadir = @libdrmdatadir@
> +dist_libdrmdata_DATA = amdgpu.ids
> diff --git a/data/amdgpu.ids b/data/amdgpu.ids
> new file mode 100644
> index 00000000..0b98c3c3
> --- /dev/null
> +++ b/data/amdgpu.ids
> @@ -0,0 +1,159 @@
> +# List of AMDGPU IDs
> +#
> +# Syntax:
> +# device_id, revision_id, product_name <-- single tab after comma
> +
> +1.0.0
> +6600, 0, AMD Radeon HD 8600/8700M
> +6600, 81, AMD Radeon (TM) R7 M370
> +6601, 0, AMD Radeon (TM) HD 8500M/8700M
> +6604, 0, AMD Radeon R7 M265 Series
> +6604, 81, AMD Radeon (TM) R7 M350
> +6605, 0, AMD Radeon R7 M260 Series
> +6605, 81, AMD Radeon (TM) R7 M340
> +6606, 0, AMD Radeon HD 8790M
> +6607, 0, AMD Radeon (TM) HD8530M
> +6608, 0, AMD FirePro W2100
> +6610, 0, AMD Radeon HD 8600 Series
> +6610, 81, AMD Radeon (TM) R7 350
> +6610, 83, AMD Radeon (TM) R5 340
> +6611, 0, AMD Radeon HD 8500 Series
> +6613, 0, AMD Radeon HD 8500 series
> +6617, C7, AMD Radeon R7 240 Series
> +6640, 0, AMD Radeon HD 8950
> +6640, 80, AMD Radeon (TM) R9 M380
> +6646, 0, AMD Radeon R9 M280X
> +6646, 80, AMD Radeon (TM) R9 M470X
> +6647, 0, AMD Radeon R9 M270X
> +6647, 80, AMD Radeon (TM) R9 M380
> +6649, 0, AMD FirePro W5100
> +6658, 0, AMD Radeon R7 200 Series
> +665C, 0, AMD Radeon HD 7700 Series
> +665D, 0, AMD Radeon R7 200 Series
> +665F, 81, AMD Radeon (TM) R7 300 Series
> +6660, 0, AMD Radeon HD 8600M Series
> +6660, 81, AMD Radeon (TM) R5 M335
> +6660, 83, AMD Radeon (TM) R5 M330
> +6663, 0, AMD Radeon HD 8500M Series
> +6663, 83, AMD Radeon (TM) R5 M320
> +6664, 0, AMD Radeon R5 M200 Series
> +6665, 0, AMD Radeon R5 M200 Series
> +6665, 83, AMD Radeon (TM) R5 M320
> +6667, 0, AMD Radeon R5 M200 Series
> +666F, 0, AMD Radeon HD 8500M
> +6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +6798, 0, AMD Radeon HD 7900 Series
> +679A, 0, AMD Radeon HD 7900 Series
> +679B, 0, AMD Radeon HD 7900 Series
> +679E, 0, AMD Radeon HD 7800 Series
> +67A0, 0, AMD Radeon FirePro W9100
> +67A1, 0, AMD Radeon FirePro W8100
> +67B0, 0, AMD Radeon R9 200 Series
> +67B0, 80, AMD Radeon (TM) R9 390 Series
> +67B1, 0, AMD Radeon R9 200 Series
> +67B1, 80, AMD Radeon (TM) R9 390 Series
> +67B9, 0, AMD Radeon R9 200 Series
> +67DF, C1, Radeon RX 580 Series
> +67DF, C2, Radeon RX 570 Series
> +67DF, C3, Radeon RX 580 Series
> +67DF, C4, AMD Radeon (TM) RX 480 Graphics
> +67DF, C5, AMD Radeon (TM) RX 470 Graphics
> +67DF, C6, Radeon RX 570 Series
> +67DF, C7, AMD Radeon (TM) RX 480 Graphics
> +67DF, CF, AMD Radeon (TM) RX 470 Graphics
> +67DF, E3, Radeon RX Series
> +67DF, E7, Radeon RX 580 Series
> +67DF, EF, Radeon RX 570 Series
> +67C2, 01, AMD Radeon (TM) Pro V7350x2
> +67C2, 02, AMD Radeon (TM) Pro V7300X
> +67C4, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67C7, 00, AMD Radeon (TM) Pro WX 5100 Graphics
> +67C0, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67D0, 01, AMD Radeon (TM) Pro V7350x2
> +67D0, 02, AMD Radeon (TM) Pro V7300X
> +67E0, 00, AMD Radeon (TM) Pro WX Series
> +67E3, 00, AMD Radeon (TM) Pro WX 4100
> +67E8, 00, AMD Radeon (TM) Pro WX Series
> +67E8, 01, AMD Radeon (TM) Pro WX Series
> +67E8, 80, AMD Radeon (TM) E9260 Graphics
> +67EB, 00, AMD Radeon (TM) Pro V5300X
> +67EF, C0, AMD Radeon (TM) RX Graphics
> +67EF, C1, AMD Radeon (TM) RX 460 Graphics
> +67EF, C3, Radeon RX Series
> +67EF, C5, AMD Radeon (TM) RX 460 Graphics
> +67EF, C7, AMD Radeon (TM) RX Graphics
> +67EF, CF, AMD Radeon (TM) RX 460 Graphics
> +67EF, E1, Radeon RX Series
> +67EF, E3, Radeon RX Series
> +67EF, E7, Radeon RX Series
> +67EF, EF, AMD Radeon (TM) RX Graphics
> +67EF, FF, Radeon RX Series
> +67FF, C0, AMD Radeon (TM) RX Graphics
> +67FF, C1, AMD Radeon (TM) RX Graphics
> +67FF, FF, Radeon RX 550 Series
> +6800, 0, AMD Radeon HD 7970M
> +6801, 0, AMD Radeon(TM) HD8970M
> +6808, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6809, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6810, 0, AMD Radeon(TM) HD 8800 Series
> +6810, 81, AMD Radeon (TM) R7 370 Series
> +6811, 0, AMD Radeon(TM) HD8800 Series
> +6811, 81, AMD Radeon (TM) R7 300 Series
> +6818, 0, AMD Radeon HD 7800 Series
> +6819, 0, AMD Radeon HD 7800 Series
> +6820, 0, AMD Radeon HD 8800M Series
> +6820, 81, AMD Radeon (TM) R9 M375
> +6820, 83, AMD Radeon (TM) R9 M375X
> +6821, 0, AMD Radeon HD 8800M Series
> +6821, 87, AMD Radeon (TM) R7 M380
> +6821, 83, AMD Radeon R9 (TM) M370X
> +6822, 0, AMD Radeon E8860
> +6823, 0, AMD Radeon HD 8800M Series
> +6825, 0, AMD Radeon HD 7800M Series
> +6827, 0, AMD Radeon HD 7800M Series
> +6828, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +682B, 0, AMD Radeon HD 8800M Series
> +682B, 87, AMD Radeon (TM) R9 M360
> +682C, 0, AMD FirePro W4100
> +682D, 0, AMD Radeon HD 7700M Series
> +682F, 0, AMD Radeon HD 7700M Series
> +6835, 0, AMD Radeon R7 Series / HD 9000 Series
> +6837, 0, AMD Radeon HD7700 Series
> +683D, 0, AMD Radeon HD 7700 Series
> +683F, 0, AMD Radeon HD 7700 Series
> +6900, 0, AMD Radeon R7 M260
> +6900, 81, AMD Radeon (TM) R7 M360
> +6900, 83, AMD Radeon (TM) R7 M340
> +6901, 0, AMD Radeon R5 M255
> +6907, 0, AMD Radeon R5 M255
> +6907, 87, AMD Radeon (TM) R5 M315
> +6920, 0, AMD RADEON R9 M395X
> +6920, 1, AMD RADEON R9 M390X
> +6921, 0, AMD Radeon R9 M295X
> +6929, 0, AMD FirePro S7150
> +692B, 0, AMD FirePro W7100
> +6938, 0, AMD Radeon R9 200 Series
> +6938, F0, AMD Radeon R9 200 Series
> +6938, F1, AMD Radeon (TM) R9 380 Series
> +6939, F0, AMD Radeon R9 200 Series
> +6939, 0, AMD Radeon R9 200 Series
> +6939, F1, AMD Radeon (TM) R9 380 Series
> +6985, 00, AMD Radeon Pro WX3100
> +6995, 00, AMD Radeon Pro WX2100
> +699F, C0, Radeon 500 Series
> +699F, C3, Radeon 500 Series
> +699F, C7, Radeon RX 550 Series
> +7300, C1, AMD FirePro (TM) S9300 x2
> +7300, C8, AMD Radeon (TM) R9 Fury Series
> +7300, C9, Radeon (TM) Pro Duo
> +7300, CB, AMD Radeon (TM) R9 Fury Series
> +7300, CA, AMD Radeon (TM) R9 Fury Series
> +9874, C4, AMD Radeon R7 Graphics
> +9874, C5, AMD Radeon R6 Graphics
> +9874, C6, AMD Radeon R6 Graphics
> +9874, C7, AMD Radeon R5 Graphics
> +9874, 81, AMD Radeon R6 Graphics
> +9874, 87, AMD Radeon R5 Graphics
> +9874, 85, AMD Radeon R6 Graphics
> +9874, 84, AMD Radeon R7 Graphics
> --
> 2.11.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v8] amdgpu: move asic id table to a separate file
2017-06-13 9:45 ` [PATCH libdrm v8] " Michel Dänzer
[not found] ` <20170613094555.29998-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-06-14 11:34 ` Emil Velikov
[not found] ` <CACvgo52rca1jcgzb-or8D48iFsF8NcPP1DemEaOrjfhK0x4Q5Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
1 sibling, 1 reply; 21+ messages in thread
From: Emil Velikov @ 2017-06-14 11:34 UTC (permalink / raw)
To: Michel Dänzer; +Cc: ML dri-devel, amd-gfx mailing list
On 13 June 2017 at 10:45, Michel Dänzer <michel@daenzer.net> wrote:
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal changes, including format changes
> v5: fix line number for empty/commented lines; realloc to save memory;
> indentation changes
> v6: remove a line error
> v7: [Michel Dänzer]
> * Move amdgpu.ids to new data directory
> * Remove placeholder entries from amdgpu.ids
> * Set libdrmdatadir variable in configure.ac instead of Makefile.am
> [Emil Velikov]
> * Use isblank() instead of open-coding it [Emil Velikov]
> * Don't leak asic_id_table memory if realloc fails [Emil Velikov]
> * Check and bump table_max_size at the beginning of the while loop [Emil
> Velikov]
> * Initialize table_max_size to the number of entries in data/amdgpu.ids
Thank you for addressing some of my suggestions.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Personally I would not have bothered with the table_max_size thing or
the separate Makefile.
But that's the icing of the cake.
-Emil
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v8] amdgpu: move asic id table to a separate file
[not found] ` <CACvgo52rca1jcgzb-or8D48iFsF8NcPP1DemEaOrjfhK0x4Q5Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-06-15 3:16 ` Michel Dänzer
[not found] ` <be8496f8-6091-c50e-fa70-332ed937a5c6-otUistvHUpPR7s880joybQ@public.gmane.org>
0 siblings, 1 reply; 21+ messages in thread
From: Michel Dänzer @ 2017-06-15 3:16 UTC (permalink / raw)
To: Emil Velikov; +Cc: amd-gfx mailing list, ML dri-devel
On 14/06/17 08:34 PM, Emil Velikov wrote:
> On 13 June 2017 at 10:45, Michel Dänzer <michel@daenzer.net> wrote:
>> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>>
>> v2: fix an off by one error and leading white spaces
>> v3: use thread safe strtok_r(); initialize len before calling getline();
>> change printf() to drmMsg(); add initial amdgpu.ids
>> v4: integrate some recent internal changes, including format changes
>> v5: fix line number for empty/commented lines; realloc to save memory;
>> indentation changes
>> v6: remove a line error
>> v7: [Michel Dänzer]
>> * Move amdgpu.ids to new data directory
>> * Remove placeholder entries from amdgpu.ids
>> * Set libdrmdatadir variable in configure.ac instead of Makefile.am
>> [Emil Velikov]
>> * Use isblank() instead of open-coding it [Emil Velikov]
>> * Don't leak asic_id_table memory if realloc fails [Emil Velikov]
>> * Check and bump table_max_size at the beginning of the while loop [Emil
>> Velikov]
>> * Initialize table_max_size to the number of entries in data/amdgpu.ids
> Thank you for addressing some of my suggestions.
> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Thanks! Pushed.
> Personally I would not have bothered with the table_max_size thing
It seemed silly to reallocate the memory in the default case where the
amdgpu.ids file from this repository is used. :)
> or the separate Makefile.
You mean data/Makefile.am? What would you have done instead?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v8] amdgpu: move asic id table to a separate file
[not found] ` <be8496f8-6091-c50e-fa70-332ed937a5c6-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-06-15 7:42 ` Emil Velikov
[not found] ` <CACvgo51i-yEJ_9n82WuG+uRrY3PVcS0SJVYMVeS6SHdC67wRMQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 21+ messages in thread
From: Emil Velikov @ 2017-06-15 7:42 UTC (permalink / raw)
To: Michel Dänzer; +Cc: amd-gfx mailing list, ML dri-devel
On 15 June 2017 at 04:16, Michel Dänzer <michel@daenzer.net> wrote:
> On 14/06/17 08:34 PM, Emil Velikov wrote:
>> On 13 June 2017 at 10:45, Michel Dänzer <michel@daenzer.net> wrote:
>>> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>>>
>>> v2: fix an off by one error and leading white spaces
>>> v3: use thread safe strtok_r(); initialize len before calling getline();
>>> change printf() to drmMsg(); add initial amdgpu.ids
>>> v4: integrate some recent internal changes, including format changes
>>> v5: fix line number for empty/commented lines; realloc to save memory;
>>> indentation changes
>>> v6: remove a line error
>>> v7: [Michel Dänzer]
>>> * Move amdgpu.ids to new data directory
>>> * Remove placeholder entries from amdgpu.ids
>>> * Set libdrmdatadir variable in configure.ac instead of Makefile.am
>>> [Emil Velikov]
>>> * Use isblank() instead of open-coding it [Emil Velikov]
>>> * Don't leak asic_id_table memory if realloc fails [Emil Velikov]
>>> * Check and bump table_max_size at the beginning of the while loop [Emil
>>> Velikov]
>>> * Initialize table_max_size to the number of entries in data/amdgpu.ids
>> Thank you for addressing some of my suggestions.
>> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
>
> Thanks! Pushed.
>
>
>> Personally I would not have bothered with the table_max_size thing
>
> It seemed silly to reallocate the memory in the default case where the
> amdgpu.ids file from this repository is used. :)
>
Agreed. Yet the single, "reduce memory consumption" realloc seems to
diminish amongst the ~150 [unneeded] strdup/free, in parse_one_line
</tease>
>> or the separate Makefile.
>
> You mean data/Makefile.am? What would you have done instead?
>
One can fold the two lines within the top makefile (see below) since
I'm lazy to complete the "use non-recursive makefiles" [1] branch.
-Emil
[1] https://github.com/evelikov/libdrm/commits/hello-world
--- a/Makefile.am
+++ b/Makefile.am
@@ -43,6 +43,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-manpages \
--enable-valgrind
+libdrmdatadir = @libdrmdatadir@
+dist_libdrmdata_DATA = data/amdgpu.ids
+
pkgconfigdir = @pkgconfigdir@
pkgconfig_DATA = libdrm.pc
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm v8] amdgpu: move asic id table to a separate file
[not found] ` <CACvgo51i-yEJ_9n82WuG+uRrY3PVcS0SJVYMVeS6SHdC67wRMQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-06-15 8:09 ` Michel Dänzer
0 siblings, 0 replies; 21+ messages in thread
From: Michel Dänzer @ 2017-06-15 8:09 UTC (permalink / raw)
To: Emil Velikov; +Cc: ML dri-devel, amd-gfx mailing list
On 15/06/17 04:42 PM, Emil Velikov wrote:
> On 15 June 2017 at 04:16, Michel Dänzer <michel@daenzer.net> wrote:
>> On 14/06/17 08:34 PM, Emil Velikov wrote:
>>
>>> Personally I would not have bothered with the table_max_size thing
>>
>> It seemed silly to reallocate the memory in the default case where the
>> amdgpu.ids file from this repository is used. :)
>>
> Agreed. Yet the single, "reduce memory consumption" realloc seems to
> diminish amongst the ~150 [unneeded] strdup/free, in parse_one_line
> </tease>
True.
>>> or the separate Makefile.
>>
>> You mean data/Makefile.am? What would you have done instead?
>>
> One can fold the two lines within the top makefile (see below) since
> I'm lazy to complete the "use non-recursive makefiles" [1] branch.
>
> -Emil
> [1] https://github.com/evelikov/libdrm/commits/hello-world
>
> --- a/Makefile.am
> +++ b/Makefile.am
> @@ -43,6 +43,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
> --enable-manpages \
> --enable-valgrind
>
> +libdrmdatadir = @libdrmdatadir@
> +dist_libdrmdata_DATA = data/amdgpu.ids
> +
> pkgconfigdir = @pkgconfigdir@
> pkgconfig_DATA = libdrm.pc
Thanks. I'm afraid I don't care enough right now, but maybe somebody
else can pick up your suggestions.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm] amdgpu: move asic id table to a separate file
2017-06-12 9:50 ` [PATCH libdrm] " Michel Dänzer
[not found] ` <20170612095021.5711-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-07-04 6:40 ` Chih-Wei Huang
2017-07-05 9:35 ` Emil Velikov
1 sibling, 1 reply; 21+ messages in thread
From: Chih-Wei Huang @ 2017-07-04 6:40 UTC (permalink / raw)
To: Michel Dänzer; +Cc: ML dri-devel, amd-gfx
2017-06-12 17:50 GMT+08:00 Michel Dänzer <michel@daenzer.net>:
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal changes, including format changes
> v5: fix line number for empty/commented lines; realloc to save memory;
> indentation changes
> v6: remove a line error
> v7: [Michel Dänzer]
> * Move amdgpu.ids to new data directory
> * Remove placeholder entries from amdgpu.ids
> * Set libdrmdatadir variable in configure.ac instead of Makefile.am
> [Emil Velikov]
> * Use isblank() instead of open-coding it [Emil Velikov]
> * Don't leak asic_id_table memory if realloc fails [Emil Velikov]
> * Check and bump table_max_size at the beginning of the while loop [Emil
> Velikov]
> * Initialize table_max_size to the number of entries in data/amdgpu.ids
>
> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
> ---
> Makefile.am | 1 +
> amdgpu/Makefile.am | 6 ++
> amdgpu/Makefile.sources | 2 +-
> amdgpu/amdgpu_asic_id.c | 219 +++++++++++++++++++++++++++++++++++++++++++++++
> amdgpu/amdgpu_asic_id.h | 165 -----------------------------------
> amdgpu/amdgpu_device.c | 28 ++++--
> amdgpu/amdgpu_internal.h | 10 +++
> configure.ac | 4 +
> data/Makefile.am | 23 +++++
> data/amdgpu.ids | 159 ++++++++++++++++++++++++++++++++++
> 10 files changed, 444 insertions(+), 173 deletions(-)
> create mode 100644 amdgpu/amdgpu_asic_id.c
> delete mode 100644 amdgpu/amdgpu_asic_id.h
> create mode 100644 data/Makefile.am
> create mode 100644 data/amdgpu.ids
>
> diff --git a/Makefile.am b/Makefile.am
> index dfb8fcdb..7b86214e 100644
> --- a/Makefile.am
> +++ b/Makefile.am
> @@ -109,6 +109,7 @@ SUBDIRS = \
> $(TEGRA_SUBDIR) \
> $(VC4_SUBDIR) \
> $(ETNAVIV_SUBDIR) \
> + data \
> tests \
> $(MAN_SUBDIR)
>
> diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
> index cf7bc1ba..3444883f 100644
> --- a/amdgpu/Makefile.am
> +++ b/amdgpu/Makefile.am
> @@ -30,6 +30,12 @@ AM_CFLAGS = \
> $(PTHREADSTUBS_CFLAGS) \
> -I$(top_srcdir)/include/drm
>
> +libdrmdatadir = @libdrmdatadir@
> +ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' \
> + $(top_srcdir)/data/amdgpu.ids)
> +AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\" \
> + -DAMDGPU_ASIC_ID_TABLE_NUM_ENTRIES=$(ASIC_ID_TABLE_NUM_ENTRIES)
Unfortunately this patch breaks Android build
since the two macros are not defined.
Anyone is working on a fix?
If not, I'll try to provide one.
> libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
> libdrm_amdgpu_ladir = $(libdir)
> libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
> diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
> index 487b9e0a..bc3abaa6 100644
> --- a/amdgpu/Makefile.sources
> +++ b/amdgpu/Makefile.sources
> @@ -1,5 +1,5 @@
> LIBDRM_AMDGPU_FILES := \
> - amdgpu_asic_id.h \
> + amdgpu_asic_id.c \
> amdgpu_bo.c \
> amdgpu_cs.c \
> amdgpu_device.c \
> diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
> new file mode 100644
> index 00000000..3a88896b
> --- /dev/null
> +++ b/amdgpu/amdgpu_asic_id.c
> @@ -0,0 +1,219 @@
> +/*
> + * Copyright © 2017 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifdef HAVE_CONFIG_H
> +#include "config.h"
> +#endif
> +
> +#include <ctype.h>
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <stdint.h>
> +#include <string.h>
> +#include <unistd.h>
> +#include <errno.h>
> +
> +#include "xf86drm.h"
> +#include "amdgpu_drm.h"
> +#include "amdgpu_internal.h"
> +
> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
> +{
> + char *buf, *saveptr;
> + char *s_did;
> + char *s_rid;
> + char *s_name;
> + char *endptr;
> + int r = 0;
> +
> + buf = strdup(line);
> + if (!buf)
> + return -ENOMEM;
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + r = -EAGAIN;
> + goto out;
> + }
> +
> + /* device id */
> + s_did = strtok_r(buf, ",", &saveptr);
> + if (!s_did) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->did = strtol(s_did, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* revision id */
> + s_rid = strtok_r(NULL, ",", &saveptr);
> + if (!s_rid) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->rid = strtol(s_rid, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* marketing name */
> + s_name = strtok_r(NULL, ",", &saveptr);
> + if (!s_name) {
> + r = -EINVAL;
> + goto out;
> + }
> + /* trim leading whitespaces or tabs */
> + while (isblank(*s_name))
> + s_name++;
> + if (strlen(s_name) == 0) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->marketing_name = strdup(s_name);
> + if (id->marketing_name == NULL) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> +out:
> + free(buf);
> +
> + return r;
> +}
> +
> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
> +{
> + struct amdgpu_asic_id *asic_id_table;
> + struct amdgpu_asic_id *id;
> + FILE *fp;
> + char *line = NULL;
> + size_t len = 0;
> + ssize_t n;
> + int line_num = 1;
> + size_t table_size = 0;
> + size_t table_max_size = AMDGPU_ASIC_ID_TABLE_NUM_ENTRIES;
> + int r = 0;
> +
> + fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
> + if (!fp) {
> + fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
> + strerror(errno));
> + return -EINVAL;
> + }
> +
> + asic_id_table = calloc(table_max_size + 1,
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto close;
> + }
> +
> + /* 1st valid line is file version */
> + while ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + line_num++;
> + continue;
> + }
> +
> + drmMsg("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + break;
> + }
> +
> + while ((n = getline(&line, &len, fp)) != -1) {
> + if (table_size > table_max_size) {
> + /* double table size */
> + table_max_size *= 2;
> + id = realloc(asic_id_table, (table_max_size + 1) *
> + sizeof(struct amdgpu_asic_id));
> + if (!id) {
> + r = -ENOMEM;
> + goto free;
> + }
> + asic_id_table = id;
> + }
> +
> + id = asic_id_table + table_size;
> +
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + r = parse_one_line(line, id);
> + if (r) {
> + if (r == -EAGAIN) {
> + line_num++;
> + continue;
> + }
> + fprintf(stderr, "Invalid format: %s: line %d: %s\n",
> + AMDGPU_ASIC_ID_TABLE, line_num, line);
> + goto free;
> + }
> +
> + line_num++;
> + table_size++;
> + }
> +
> + /* end of table */
> + id = asic_id_table + table_size;
> + memset(id, 0, sizeof(struct amdgpu_asic_id));
> +
> + if (table_size != table_max_size) {
> + id = realloc(asic_id_table, (table_size + 1) *
> + sizeof(struct amdgpu_asic_id));
> + if (!id)
> + r = -ENOMEM;
> + else
> + asic_id_table = id;
> + }
> +
> +free:
> + free(line);
> +
> + if (r && asic_id_table) {
> + while (table_size--) {
> + id = asic_id_table + table_size;
> + free(id->marketing_name);
> + }
> + free(asic_id_table);
> + asic_id_table = NULL;
> + }
> +close:
> + fclose(fp);
> +
> + *p_asic_id_table = asic_id_table;
> +
> + return r;
> +}
> diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
> deleted file mode 100644
> index 3e7d736b..00000000
> --- a/amdgpu/amdgpu_asic_id.h
> +++ /dev/null
> @@ -1,165 +0,0 @@
> -/*
> - * Copyright © 2016 Advanced Micro Devices, Inc.
> - * All Rights Reserved.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - */
> -
> -#ifndef __AMDGPU_ASIC_ID_H__
> -#define __AMDGPU_ASIC_ID_H__
> -
> -static struct amdgpu_asic_id_table_t {
> - uint32_t did;
> - uint32_t rid;
> - const char *marketing_name;
> -} const amdgpu_asic_id_table [] = {
> - {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
> - {0x6600, 0x81, "AMD Radeon R7 M370"},
> - {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
> - {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
> - {0x6604, 0x81, "AMD Radeon R7 M350"},
> - {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
> - {0x6605, 0x81, "AMD Radeon R7 M340"},
> - {0x6606, 0x0, "AMD Radeon HD 8790M"},
> - {0x6607, 0x0, "AMD Radeon HD8530M"},
> - {0x6608, 0x0, "AMD FirePro W2100"},
> - {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
> - {0x6610, 0x81, "AMD Radeon R7 350"},
> - {0x6610, 0x83, "AMD Radeon R5 340"},
> - {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
> - {0x6613, 0x0, "AMD Radeon HD 8500 series"},
> - {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
> - {0x6640, 0x0, "AMD Radeon HD 8950"},
> - {0x6640, 0x80, "AMD Radeon R9 M380"},
> - {0x6646, 0x0, "AMD Radeon R9 M280X"},
> - {0x6646, 0x80, "AMD Radeon R9 M470X"},
> - {0x6647, 0x0, "AMD Radeon R9 M270X"},
> - {0x6647, 0x80, "AMD Radeon R9 M380"},
> - {0x6649, 0x0, "AMD FirePro W5100"},
> - {0x6658, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x665D, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665F, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
> - {0x6660, 0x81, "AMD Radeon R5 M335"},
> - {0x6660, 0x83, "AMD Radeon R5 M330"},
> - {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
> - {0x6663, 0x83, "AMD Radeon R5 M320"},
> - {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x83, "AMD Radeon R5 M320"},
> - {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x666F, 0x0, "AMD Radeon HD 8500M"},
> - {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
> - {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
> - {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
> - {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
> - {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
> - {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
> - {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
> - {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
> - {0x6800, 0x0, "AMD Radeon HD 7970M"},
> - {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
> - {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
> - {0x6810, 0x81, "AMD Radeon R7 370 Series"},
> - {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
> - {0x6811, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6820, 0x81, "AMD Radeon R9 M375"},
> - {0x6820, 0x83, "AMD Radeon R9 M375X"},
> - {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6821, 0x87, "AMD Radeon R7 M380"},
> - {0x6821, 0x83, "AMD Radeon R9 M370X"},
> - {0x6822, 0x0, "AMD Radeon E8860"},
> - {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x682B, 0x87, "AMD Radeon R9 M360"},
> - {0x682C, 0x0, "AMD FirePro W4100"},
> - {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
> - {0x6837, 0x0, "AMD Radeon HD7700 Series"},
> - {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x6900, 0x0, "AMD Radeon R7 M260"},
> - {0x6900, 0x81, "AMD Radeon R7 M360"},
> - {0x6900, 0x83, "AMD Radeon R7 M340"},
> - {0x6901, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x87, "AMD Radeon R5 M315"},
> - {0x6920, 0x0, "AMD Radeon R9 M395X"},
> - {0x6920, 0x1, "AMD Radeon R9 M390X"},
> - {0x6921, 0x0, "AMD Radeon R9 M295X"},
> - {0x6929, 0x0, "AMD FirePro S7150"},
> - {0x692B, 0x0, "AMD FirePro W7100"},
> - {0x6938, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
> - {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
> - {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x81, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x87, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x85, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x84, "AMD Radeon R7 Graphics"},
> -
> - {0x0000, 0x0, "\0"},
> -};
> -#endif
> diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
> index f473d2da..9a238d97 100644
> --- a/amdgpu/amdgpu_device.c
> +++ b/amdgpu/amdgpu_device.c
> @@ -44,7 +44,6 @@
> #include "amdgpu_internal.h"
> #include "util_hash_table.h"
> #include "util_math.h"
> -#include "amdgpu_asic_id.h"
>
> #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
> #define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
> @@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
>
> static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> {
> + const struct amdgpu_asic_id *id;
> amdgpu_vamgr_deinit(&dev->vamgr_32);
> amdgpu_vamgr_deinit(&dev->vamgr);
> util_hash_table_destroy(dev->bo_flink_names);
> @@ -140,6 +140,12 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> close(dev->fd);
> if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
> close(dev->flink_fd);
> + if (dev->asic_ids) {
> + for (id = dev->asic_ids; id->did; id++)
> + free(id->marketing_name);
> +
> + free(dev->asic_ids);
> + }
> free(dev);
> }
>
> @@ -267,6 +273,12 @@ int amdgpu_device_initialize(int fd,
> amdgpu_vamgr_init(&dev->vamgr_32, start, max,
> dev->dev_info.virtual_address_alignment);
>
> + r = amdgpu_parse_asic_ids(&dev->asic_ids);
> + if (r) {
> + fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
> + __func__, r);
> + }
> +
> *major_version = dev->major_version;
> *minor_version = dev->minor_version;
> *device_handle = dev;
> @@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
>
> const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
> {
> - const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
> + const struct amdgpu_asic_id *id;
> +
> + if (!dev->asic_ids)
> + return NULL;
>
> - while (t->did) {
> - if ((t->did == dev->info.asic_id) &&
> - (t->rid == dev->info.pci_rev_id))
> - return t->marketing_name;
> - t++;
> + for (id = dev->asic_ids; id->did; id++) {
> + if ((id->did == dev->info.asic_id) &&
> + (id->rid == dev->info.pci_rev_id))
> + return id->marketing_name;
> }
>
> return NULL;
> diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
> index cf119a53..e68246bf 100644
> --- a/amdgpu/amdgpu_internal.h
> +++ b/amdgpu/amdgpu_internal.h
> @@ -69,6 +69,12 @@ struct amdgpu_va {
> struct amdgpu_bo_va_mgr *vamgr;
> };
>
> +struct amdgpu_asic_id {
> + uint32_t did;
> + uint32_t rid;
> + char *marketing_name;
> +};
> +
> struct amdgpu_device {
> atomic_t refcount;
> int fd;
> @@ -76,6 +82,8 @@ struct amdgpu_device {
> unsigned major_version;
> unsigned minor_version;
>
> + /** Lookup table of asic device id, revision id and marketing name */
> + struct amdgpu_asic_id *asic_ids;
> /** List of buffer handles. Protected by bo_table_mutex. */
> struct util_hash_table *bo_handles;
> /** List of buffer GEM flink names. Protected by bo_table_mutex. */
> @@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
> drm_private void
> amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
>
> +drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
> +
> drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
>
> drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
> diff --git a/configure.ac b/configure.ac
> index 1cfb8c27..aa9529cd 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -84,6 +84,9 @@ fi
>
> pkgconfigdir=${libdir}/pkgconfig
> AC_SUBST(pkgconfigdir)
> +libdrmdatadir=${datadir}/libdrm
> +AC_SUBST(libdrmdatadir)
> +
> AC_ARG_ENABLE([udev],
> [AS_HELP_STRING([--enable-udev],
> [Enable support for using udev instead of mknod (default: disabled)])],
> @@ -527,6 +530,7 @@ fi
> AC_SUBST(WARN_CFLAGS)
> AC_CONFIG_FILES([
> Makefile
> + data/Makefile
> libkms/Makefile
> libkms/libkms.pc
> intel/Makefile
> diff --git a/data/Makefile.am b/data/Makefile.am
> new file mode 100644
> index 00000000..eba915dd
> --- /dev/null
> +++ b/data/Makefile.am
> @@ -0,0 +1,23 @@
> +# Copyright © 2017 Advanced Micro Devices, Inc.
> +# All Rights Reserved.
> +#
> +# Permission is hereby granted, free of charge, to any person obtaining a
> +# copy of this software and associated documentation files (the "Software"),
> +# to deal in the Software without restriction, including without limitation
> +# on the rights to use, copy, modify, merge, publish, distribute, sub
> +# license, and/or sell copies of the Software, and to permit persons to whom
> +# the Software is furnished to do so, subject to the following conditions:
> +#
> +# The above copyright notice and this permission notice (including the next
> +# paragraph) shall be included in all copies or substantial portions of the
> +# Software.
> +#
> +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
> +# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
> +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
> +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> +
> +libdrmdatadir = @libdrmdatadir@
> +dist_libdrmdata_DATA = amdgpu.ids
> diff --git a/data/amdgpu.ids b/data/amdgpu.ids
> new file mode 100644
> index 00000000..0b98c3c3
> --- /dev/null
> +++ b/data/amdgpu.ids
> @@ -0,0 +1,159 @@
> +# List of AMDGPU IDs
> +#
> +# Syntax:
> +# device_id, revision_id, product_name <-- single tab after comma
> +
> +1.0.0
> +6600, 0, AMD Radeon HD 8600/8700M
> +6600, 81, AMD Radeon (TM) R7 M370
> +6601, 0, AMD Radeon (TM) HD 8500M/8700M
> +6604, 0, AMD Radeon R7 M265 Series
> +6604, 81, AMD Radeon (TM) R7 M350
> +6605, 0, AMD Radeon R7 M260 Series
> +6605, 81, AMD Radeon (TM) R7 M340
> +6606, 0, AMD Radeon HD 8790M
> +6607, 0, AMD Radeon (TM) HD8530M
> +6608, 0, AMD FirePro W2100
> +6610, 0, AMD Radeon HD 8600 Series
> +6610, 81, AMD Radeon (TM) R7 350
> +6610, 83, AMD Radeon (TM) R5 340
> +6611, 0, AMD Radeon HD 8500 Series
> +6613, 0, AMD Radeon HD 8500 series
> +6617, C7, AMD Radeon R7 240 Series
> +6640, 0, AMD Radeon HD 8950
> +6640, 80, AMD Radeon (TM) R9 M380
> +6646, 0, AMD Radeon R9 M280X
> +6646, 80, AMD Radeon (TM) R9 M470X
> +6647, 0, AMD Radeon R9 M270X
> +6647, 80, AMD Radeon (TM) R9 M380
> +6649, 0, AMD FirePro W5100
> +6658, 0, AMD Radeon R7 200 Series
> +665C, 0, AMD Radeon HD 7700 Series
> +665D, 0, AMD Radeon R7 200 Series
> +665F, 81, AMD Radeon (TM) R7 300 Series
> +6660, 0, AMD Radeon HD 8600M Series
> +6660, 81, AMD Radeon (TM) R5 M335
> +6660, 83, AMD Radeon (TM) R5 M330
> +6663, 0, AMD Radeon HD 8500M Series
> +6663, 83, AMD Radeon (TM) R5 M320
> +6664, 0, AMD Radeon R5 M200 Series
> +6665, 0, AMD Radeon R5 M200 Series
> +6665, 83, AMD Radeon (TM) R5 M320
> +6667, 0, AMD Radeon R5 M200 Series
> +666F, 0, AMD Radeon HD 8500M
> +6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
> +6798, 0, AMD Radeon HD 7900 Series
> +679A, 0, AMD Radeon HD 7900 Series
> +679B, 0, AMD Radeon HD 7900 Series
> +679E, 0, AMD Radeon HD 7800 Series
> +67A0, 0, AMD Radeon FirePro W9100
> +67A1, 0, AMD Radeon FirePro W8100
> +67B0, 0, AMD Radeon R9 200 Series
> +67B0, 80, AMD Radeon (TM) R9 390 Series
> +67B1, 0, AMD Radeon R9 200 Series
> +67B1, 80, AMD Radeon (TM) R9 390 Series
> +67B9, 0, AMD Radeon R9 200 Series
> +67DF, C1, Radeon RX 580 Series
> +67DF, C2, Radeon RX 570 Series
> +67DF, C3, Radeon RX 580 Series
> +67DF, C4, AMD Radeon (TM) RX 480 Graphics
> +67DF, C5, AMD Radeon (TM) RX 470 Graphics
> +67DF, C6, Radeon RX 570 Series
> +67DF, C7, AMD Radeon (TM) RX 480 Graphics
> +67DF, CF, AMD Radeon (TM) RX 470 Graphics
> +67DF, E3, Radeon RX Series
> +67DF, E7, Radeon RX 580 Series
> +67DF, EF, Radeon RX 570 Series
> +67C2, 01, AMD Radeon (TM) Pro V7350x2
> +67C2, 02, AMD Radeon (TM) Pro V7300X
> +67C4, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67C7, 00, AMD Radeon (TM) Pro WX 5100 Graphics
> +67C0, 00, AMD Radeon (TM) Pro WX 7100 Graphics
> +67D0, 01, AMD Radeon (TM) Pro V7350x2
> +67D0, 02, AMD Radeon (TM) Pro V7300X
> +67E0, 00, AMD Radeon (TM) Pro WX Series
> +67E3, 00, AMD Radeon (TM) Pro WX 4100
> +67E8, 00, AMD Radeon (TM) Pro WX Series
> +67E8, 01, AMD Radeon (TM) Pro WX Series
> +67E8, 80, AMD Radeon (TM) E9260 Graphics
> +67EB, 00, AMD Radeon (TM) Pro V5300X
> +67EF, C0, AMD Radeon (TM) RX Graphics
> +67EF, C1, AMD Radeon (TM) RX 460 Graphics
> +67EF, C3, Radeon RX Series
> +67EF, C5, AMD Radeon (TM) RX 460 Graphics
> +67EF, C7, AMD Radeon (TM) RX Graphics
> +67EF, CF, AMD Radeon (TM) RX 460 Graphics
> +67EF, E1, Radeon RX Series
> +67EF, E3, Radeon RX Series
> +67EF, E7, Radeon RX Series
> +67EF, EF, AMD Radeon (TM) RX Graphics
> +67EF, FF, Radeon RX Series
> +67FF, C0, AMD Radeon (TM) RX Graphics
> +67FF, C1, AMD Radeon (TM) RX Graphics
> +67FF, FF, Radeon RX 550 Series
> +6800, 0, AMD Radeon HD 7970M
> +6801, 0, AMD Radeon(TM) HD8970M
> +6808, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6809, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +6810, 0, AMD Radeon(TM) HD 8800 Series
> +6810, 81, AMD Radeon (TM) R7 370 Series
> +6811, 0, AMD Radeon(TM) HD8800 Series
> +6811, 81, AMD Radeon (TM) R7 300 Series
> +6818, 0, AMD Radeon HD 7800 Series
> +6819, 0, AMD Radeon HD 7800 Series
> +6820, 0, AMD Radeon HD 8800M Series
> +6820, 81, AMD Radeon (TM) R9 M375
> +6820, 83, AMD Radeon (TM) R9 M375X
> +6821, 0, AMD Radeon HD 8800M Series
> +6821, 87, AMD Radeon (TM) R7 M380
> +6821, 83, AMD Radeon R9 (TM) M370X
> +6822, 0, AMD Radeon E8860
> +6823, 0, AMD Radeon HD 8800M Series
> +6825, 0, AMD Radeon HD 7800M Series
> +6827, 0, AMD Radeon HD 7800M Series
> +6828, 0, ATI FirePro V(FireGL V) Graphics Adapter
> +682B, 0, AMD Radeon HD 8800M Series
> +682B, 87, AMD Radeon (TM) R9 M360
> +682C, 0, AMD FirePro W4100
> +682D, 0, AMD Radeon HD 7700M Series
> +682F, 0, AMD Radeon HD 7700M Series
> +6835, 0, AMD Radeon R7 Series / HD 9000 Series
> +6837, 0, AMD Radeon HD7700 Series
> +683D, 0, AMD Radeon HD 7700 Series
> +683F, 0, AMD Radeon HD 7700 Series
> +6900, 0, AMD Radeon R7 M260
> +6900, 81, AMD Radeon (TM) R7 M360
> +6900, 83, AMD Radeon (TM) R7 M340
> +6901, 0, AMD Radeon R5 M255
> +6907, 0, AMD Radeon R5 M255
> +6907, 87, AMD Radeon (TM) R5 M315
> +6920, 0, AMD RADEON R9 M395X
> +6920, 1, AMD RADEON R9 M390X
> +6921, 0, AMD Radeon R9 M295X
> +6929, 0, AMD FirePro S7150
> +692B, 0, AMD FirePro W7100
> +6938, 0, AMD Radeon R9 200 Series
> +6938, F0, AMD Radeon R9 200 Series
> +6938, F1, AMD Radeon (TM) R9 380 Series
> +6939, F0, AMD Radeon R9 200 Series
> +6939, 0, AMD Radeon R9 200 Series
> +6939, F1, AMD Radeon (TM) R9 380 Series
> +6985, 00, AMD Radeon Pro WX3100
> +6995, 00, AMD Radeon Pro WX2100
> +699F, C0, Radeon 500 Series
> +699F, C3, Radeon 500 Series
> +699F, C7, Radeon RX 550 Series
> +7300, C1, AMD FirePro (TM) S9300 x2
> +7300, C8, AMD Radeon (TM) R9 Fury Series
> +7300, C9, Radeon (TM) Pro Duo
> +7300, CB, AMD Radeon (TM) R9 Fury Series
> +7300, CA, AMD Radeon (TM) R9 Fury Series
> +9874, C4, AMD Radeon R7 Graphics
> +9874, C5, AMD Radeon R6 Graphics
> +9874, C6, AMD Radeon R6 Graphics
> +9874, C7, AMD Radeon R5 Graphics
> +9874, 81, AMD Radeon R6 Graphics
> +9874, 87, AMD Radeon R5 Graphics
> +9874, 85, AMD Radeon R6 Graphics
> +9874, 84, AMD Radeon R7 Graphics
> --
--
Chih-Wei
Android-x86 project
http://www.android-x86.org
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm] amdgpu: move asic id table to a separate file
2017-07-04 6:40 ` [PATCH libdrm] " Chih-Wei Huang
@ 2017-07-05 9:35 ` Emil Velikov
[not found] ` <CACvgo50fDYbeQey54H2Yn7X=cwnExPPgziQqF2EQu2A79wXqWA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 21+ messages in thread
From: Emil Velikov @ 2017-07-05 9:35 UTC (permalink / raw)
To: Chih-Wei Huang; +Cc: Michel Dänzer, amd-gfx mailing list, ML dri-devel
On 4 July 2017 at 07:40, Chih-Wei Huang <cwhuang@android-x86.org> wrote:
> 2017-06-12 17:50 GMT+08:00 Michel Dänzer <michel@daenzer.net>:
>> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>>
>> v2: fix an off by one error and leading white spaces
>> v3: use thread safe strtok_r(); initialize len before calling getline();
>> change printf() to drmMsg(); add initial amdgpu.ids
>> v4: integrate some recent internal changes, including format changes
>> v5: fix line number for empty/commented lines; realloc to save memory;
>> indentation changes
>> v6: remove a line error
>> v7: [Michel Dänzer]
>> * Move amdgpu.ids to new data directory
>> * Remove placeholder entries from amdgpu.ids
>> * Set libdrmdatadir variable in configure.ac instead of Makefile.am
>> [Emil Velikov]
>> * Use isblank() instead of open-coding it [Emil Velikov]
>> * Don't leak asic_id_table memory if realloc fails [Emil Velikov]
>> * Check and bump table_max_size at the beginning of the while loop [Emil
>> Velikov]
>> * Initialize table_max_size to the number of entries in data/amdgpu.ids
>>
>> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
>> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
>> ---
>> Makefile.am | 1 +
>> amdgpu/Makefile.am | 6 ++
>> amdgpu/Makefile.sources | 2 +-
>> amdgpu/amdgpu_asic_id.c | 219 +++++++++++++++++++++++++++++++++++++++++++++++
>> amdgpu/amdgpu_asic_id.h | 165 -----------------------------------
>> amdgpu/amdgpu_device.c | 28 ++++--
>> amdgpu/amdgpu_internal.h | 10 +++
>> configure.ac | 4 +
>> data/Makefile.am | 23 +++++
>> data/amdgpu.ids | 159 ++++++++++++++++++++++++++++++++++
>> 10 files changed, 444 insertions(+), 173 deletions(-)
>> create mode 100644 amdgpu/amdgpu_asic_id.c
>> delete mode 100644 amdgpu/amdgpu_asic_id.h
>> create mode 100644 data/Makefile.am
>> create mode 100644 data/amdgpu.ids
>>
>> diff --git a/Makefile.am b/Makefile.am
>> index dfb8fcdb..7b86214e 100644
>> --- a/Makefile.am
>> +++ b/Makefile.am
>> @@ -109,6 +109,7 @@ SUBDIRS = \
>> $(TEGRA_SUBDIR) \
>> $(VC4_SUBDIR) \
>> $(ETNAVIV_SUBDIR) \
>> + data \
>> tests \
>> $(MAN_SUBDIR)
>>
>> diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
>> index cf7bc1ba..3444883f 100644
>> --- a/amdgpu/Makefile.am
>> +++ b/amdgpu/Makefile.am
>> @@ -30,6 +30,12 @@ AM_CFLAGS = \
>> $(PTHREADSTUBS_CFLAGS) \
>> -I$(top_srcdir)/include/drm
>>
>> +libdrmdatadir = @libdrmdatadir@
>> +ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' \
>> + $(top_srcdir)/data/amdgpu.ids)
>> +AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\" \
>> + -DAMDGPU_ASIC_ID_TABLE_NUM_ENTRIES=$(ASIC_ID_TABLE_NUM_ENTRIES)
>
> Unfortunately this patch breaks Android build
> since the two macros are not defined.
>
> Anyone is working on a fix?
> If not, I'll try to provide one.
>
Please send a patch. I doubt many of the AMD devs have an Android setup.
Do ensure that the amdgpu.ids file is installed and accessible.
JFYI: a similar work is coming on the radeon side, so keep an eye open.
Thanks
Emil
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm] amdgpu: move asic id table to a separate file
[not found] ` <CACvgo50fDYbeQey54H2Yn7X=cwnExPPgziQqF2EQu2A79wXqWA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-07-05 10:44 ` Chih-Wei Huang
[not found] ` <CAKc24n3iT8mcBmaDM7KDJ_OweVtcyHQi0eCdbB6nFX7im2ffNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 21+ messages in thread
From: Chih-Wei Huang @ 2017-07-05 10:44 UTC (permalink / raw)
To: Emil Velikov; +Cc: Michel Dänzer, amd-gfx mailing list, ML dri-devel
2017-07-05 17:35 GMT+08:00 Emil Velikov <emil.l.velikov@gmail.com>:
> On 4 July 2017 at 07:40, Chih-Wei Huang <cwhuang@android-x86.org> wrote:
>>
>> Unfortunately this patch breaks Android build
>> since the two macros are not defined.
>>
>> Anyone is working on a fix?
>> If not, I'll try to provide one.
>>
> Please send a patch. I doubt many of the AMD devs have an Android setup.
> Do ensure that the amdgpu.ids file is installed and accessible.
Yep. The first problem to prepare the patch is,
where to install amdgpu.ids on Android?
Is /system/etc/amdgpu.ids OK?
> JFYI: a similar work is coming on the radeon side, so keep an eye open.
--
Chih-Wei
Android-x86 project
http://www.android-x86.org
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm] amdgpu: move asic id table to a separate file
[not found] ` <CAKc24n3iT8mcBmaDM7KDJ_OweVtcyHQi0eCdbB6nFX7im2ffNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-07-05 11:05 ` Emil Velikov
[not found] ` <CACvgo53goXVskuOCMrL3jRjm_+Eh2OzaGh6a9k54aT+ZC=BEDA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 21+ messages in thread
From: Emil Velikov @ 2017-07-05 11:05 UTC (permalink / raw)
To: Chih-Wei Huang; +Cc: Michel Dänzer, amd-gfx mailing list, ML dri-devel
On 5 July 2017 at 11:44, Chih-Wei Huang <cwhuang@android-x86.org> wrote:
> 2017-07-05 17:35 GMT+08:00 Emil Velikov <emil.l.velikov@gmail.com>:
>> On 4 July 2017 at 07:40, Chih-Wei Huang <cwhuang@android-x86.org> wrote:
>>>
>>> Unfortunately this patch breaks Android build
>>> since the two macros are not defined.
>>>
>>> Anyone is working on a fix?
>>> If not, I'll try to provide one.
>>>
>> Please send a patch. I doubt many of the AMD devs have an Android setup.
>> Do ensure that the amdgpu.ids file is installed and accessible.
>
> Yep. The first problem to prepare the patch is,
> where to install amdgpu.ids on Android?
> Is /system/etc/amdgpu.ids OK?
>
Personally I'd stick it alongside the pci.ids/usb.ids, but it's up-to
you really.
The library does not care about the filename/path - it's passed as a define.
-Emil
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH libdrm] amdgpu: move asic id table to a separate file
[not found] ` <CACvgo53goXVskuOCMrL3jRjm_+Eh2OzaGh6a9k54aT+ZC=BEDA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-07-19 10:10 ` Chih-Wei Huang
0 siblings, 0 replies; 21+ messages in thread
From: Chih-Wei Huang @ 2017-07-19 10:10 UTC (permalink / raw)
To: Emil Velikov; +Cc: Michel Dänzer, amd-gfx mailing list, ML dri-devel
Sorry for reply late.
2017-07-05 19:05 GMT+08:00 Emil Velikov <emil.l.velikov@gmail.com>:
> On 5 July 2017 at 11:44, Chih-Wei Huang <cwhuang@android-x86.org> wrote:
>>
>> Yep. The first problem to prepare the patch is,
>> where to install amdgpu.ids on Android?
>> Is /system/etc/amdgpu.ids OK?
>>
> Personally I'd stick it alongside the pci.ids/usb.ids, but it's up-to
> you really.
Thanks!
There files are usually in /usr/share/hwdata/
but Android has no such a directory.
So I'm going to use /etc/hwdata/.
> The library does not care about the filename/path - it's passed as a define.
--
Chih-Wei
Android-x86 project
http://www.android-x86.org
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
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Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-31 20:22 [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file Samuel Li
[not found] ` <1496262170-4222-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
2017-05-31 22:11 ` Alex Deucher
2017-06-05 2:09 ` Michel Dänzer
[not found] ` <416b1697-6e97-9289-f837-dbd504452ec5-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-05 16:00 ` Li, Samuel
2017-06-06 13:43 ` Emil Velikov
[not found] ` <CACvgo50KM8dvXENsza1ZKbGc_Ww-sDaEVUemKpzjkbsSu+hruQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-06-07 8:40 ` Michel Dänzer
[not found] ` <01541f06-7e21-4fab-2975-d6ad4c4abeb2-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-07 11:12 ` Emil Velikov
[not found] ` <CACvgo50==aCZTjNPdQREi+KyTiqdSGGax+zhXPUJjStgLACMxA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-06-07 15:20 ` Michel Dänzer
2017-06-12 9:50 ` [PATCH libdrm] " Michel Dänzer
[not found] ` <20170612095021.5711-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-12 15:48 ` Deucher, Alexander
2017-06-13 9:45 ` [PATCH libdrm v8] " Michel Dänzer
[not found] ` <20170613094555.29998-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-13 14:31 ` Alex Deucher
2017-06-14 11:34 ` Emil Velikov
[not found] ` <CACvgo52rca1jcgzb-or8D48iFsF8NcPP1DemEaOrjfhK0x4Q5Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-06-15 3:16 ` Michel Dänzer
[not found] ` <be8496f8-6091-c50e-fa70-332ed937a5c6-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-06-15 7:42 ` Emil Velikov
[not found] ` <CACvgo51i-yEJ_9n82WuG+uRrY3PVcS0SJVYMVeS6SHdC67wRMQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-06-15 8:09 ` Michel Dänzer
2017-07-04 6:40 ` [PATCH libdrm] " Chih-Wei Huang
2017-07-05 9:35 ` Emil Velikov
[not found] ` <CACvgo50fDYbeQey54H2Yn7X=cwnExPPgziQqF2EQu2A79wXqWA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-07-05 10:44 ` Chih-Wei Huang
[not found] ` <CAKc24n3iT8mcBmaDM7KDJ_OweVtcyHQi0eCdbB6nFX7im2ffNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-07-05 11:05 ` Emil Velikov
[not found] ` <CACvgo53goXVskuOCMrL3jRjm_+Eh2OzaGh6a9k54aT+ZC=BEDA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-07-19 10:10 ` Chih-Wei Huang
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