[PATCH v2 0/2] Device tree changes for Tegra186 cpufreq

[PATCH v2 0/2] Device tree changes for Tegra186 cpufreq

[Mikko Perttunen]

Hi,

these are the device tree and bindings changes for the Tegra186 cpufreq
driver that was recently merged. The patches are the same as those that
were originally posted with the driver.

Mikko Perttunen (2):
  dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster
  arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186

 .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt        | 17 +++++++++++++++++
 arch/arm64/boot/dts/nvidia/tegra186.dtsi                |  7 +++++++
 2 files changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

-- 
2.1.4

[PATCH v2 0/2] Device tree changes for Tegra186 cpufreq

[Mikko Perttunen]

Hi,

these are the device tree and bindings changes for the Tegra186 cpufreq
driver that was recently merged. The patches are the same as those that
were originally posted with the driver.

Mikko Perttunen (2):
  dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster
  arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186

 .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt        | 17 +++++++++++++++++
 arch/arm64/boot/dts/nvidia/tegra186.dtsi                |  7 +++++++
 2 files changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

-- 
2.1.4

[PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt        | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..e8fb416c892b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,17 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+Required properties:
+- compatible: Should contain one of the following:
+  - "nvidia,tegra186-ccplex-cluster": for Tegra186
+- reg: Must contain an (offset, length) pair of the device's MMIO
+  register area
+- nvidia,bpmp: phandle to BPMP device that can be queried for OPP tables
+
+Example:
+
+	ccplex@e000000 {
+		compatible = "nvidia,tegra186-ccplex-cluster";
+		reg = <0x0 0x0e000000 0x0 0x3fffff>,
+
+		nvidia,bpmp = <&bpmp>;
+	};
-- 
2.1.4

[PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt        | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..e8fb416c892b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,17 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+Required properties:
+- compatible: Should contain one of the following:
+  - "nvidia,tegra186-ccplex-cluster": for Tegra186
+- reg: Must contain an (offset, length) pair of the device's MMIO
+  register area
+- nvidia,bpmp: phandle to BPMP device that can be queried for OPP tables
+
+Example:
+
+	ccplex@e000000 {
+		compatible = "nvidia,tegra186-ccplex-cluster";
+		reg = <0x0 0x0e000000 0x0 0x3fffff>,
+
+		nvidia,bpmp = <&bpmp>;
+	};
-- 
2.1.4

Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Rob Herring]

On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.

What the block is should also go in the binding doc. With that,

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

> 
> Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt        | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
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Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Rob Herring]

On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.

What the block is should also go in the binding doc. With that,

Acked-by: Rob Herring <robh@kernel.org>

> 
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt        | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

On 08.06.2017 01:11, Rob Herring wrote:
> On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>> registers that initiate CPU frequency/voltage transitions.
>
> What the block is should also go in the binding doc. With that,

I don't know how to explain it in more detail; this thing is literally 
just a few magic registers that route into some CPU control logic to 
trigger frequency/voltage transitions :)

Mikko

>
> Acked-by: Rob Herring <robh@kernel.org>
>
>>
>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
>> ---
>>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt        | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
> --
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> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>

Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Rob Herring]

On Thu, Jun 8, 2017 at 2:32 AM, Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org> wrote:
> On 08.06.2017 01:11, Rob Herring wrote:
>>
>> On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
>>>
>>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>>> registers that initiate CPU frequency/voltage transitions.
>>
>>
>> What the block is should also go in the binding doc. With that,
>
>
> I don't know how to explain it in more detail; this thing is literally just
> a few magic registers that route into some CPU control logic to trigger
> frequency/voltage transitions :)

Copy the commit msg text to the binding doc. That's all I'm asking for.

Rob

Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Rob Herring]

On Thu, Jun 8, 2017 at 2:32 AM, Mikko Perttunen <cyndis@kapsi.fi> wrote:
> On 08.06.2017 01:11, Rob Herring wrote:
>>
>> On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
>>>
>>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>>> registers that initiate CPU frequency/voltage transitions.
>>
>>
>> What the block is should also go in the binding doc. With that,
>
>
> I don't know how to explain it in more detail; this thing is literally just
> a few magic registers that route into some CPU control logic to trigger
> frequency/voltage transitions :)

Copy the commit msg text to the binding doc. That's all I'm asking for.

Rob

Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

On 09.06.2017 23:54, Rob Herring wrote:
> On Thu, Jun 8, 2017 at 2:32 AM, Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org> wrote:
>> On 08.06.2017 01:11, Rob Herring wrote:
>>>
>>> On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
>>>>
>>>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>>>> registers that initiate CPU frequency/voltage transitions.
>>>
>>>
>>> What the block is should also go in the binding doc. With that,
>>
>>
>> I don't know how to explain it in more detail; this thing is literally just
>> a few magic registers that route into some CPU control logic to trigger
>> frequency/voltage transitions :)
>
> Copy the commit msg text to the binding doc. That's all I'm asking for.
>
> Rob
>

I see. Will do, thanks.

Mikko

Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

On 09.06.2017 23:54, Rob Herring wrote:
> On Thu, Jun 8, 2017 at 2:32 AM, Mikko Perttunen <cyndis@kapsi.fi> wrote:
>> On 08.06.2017 01:11, Rob Herring wrote:
>>>
>>> On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
>>>>
>>>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>>>> registers that initiate CPU frequency/voltage transitions.
>>>
>>>
>>> What the block is should also go in the binding doc. With that,
>>
>>
>> I don't know how to explain it in more detail; this thing is literally just
>> a few magic registers that route into some CPU control logic to trigger
>> frequency/voltage transitions :)
>
> Copy the commit msg text to the binding doc. That's all I'm asking for.
>
> Rob
>

I see. Will do, thanks.

Mikko

[PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.

Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..0c80cd8ee839
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,20 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
+registers that initiate CPU frequency/voltage transitions.
+
+Required properties:
+- compatible: Should contain one of the following:
+  - "nvidia,tegra186-ccplex-cluster": for Tegra186
+- reg: Must contain an (offset, length) pair of the device's MMIO
+  register area
+- nvidia,bpmp: phandle to BPMP device that can be queried for OPP tables
+
+Example:
+
+	ccplex@e000000 {
+		compatible = "nvidia,tegra186-ccplex-cluster";
+		reg = <0x0 0x0e000000 0x0 0x3fffff>,
+
+		nvidia,bpmp = <&bpmp>;
+	};
-- 
2.1.4

[PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..0c80cd8ee839
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,20 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
+registers that initiate CPU frequency/voltage transitions.
+
+Required properties:
+- compatible: Should contain one of the following:
+  - "nvidia,tegra186-ccplex-cluster": for Tegra186
+- reg: Must contain an (offset, length) pair of the device's MMIO
+  register area
+- nvidia,bpmp: phandle to BPMP device that can be queried for OPP tables
+
+Example:
+
+	ccplex@e000000 {
+		compatible = "nvidia,tegra186-ccplex-cluster";
+		reg = <0x0 0x0e000000 0x0 0x3fffff>,
+
+		nvidia,bpmp = <&bpmp>;
+	};
-- 
2.1.4

Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Thierry Reding]

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On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.
> 
> Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> ---
>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

The ARM SoC maintainers don't like to pick up device tree bindings, so
I'd prefer this to go through the cpufreq tree that also contains the
driver patches. Presumably this wasn't merged through that tree because
of the missing Acked-by by a device tree maintainer? Given that Rob's
acked it now, maybe you can resend this to Viresh, who I think had
picked up the driver?

Thanks,
Thierry

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Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Thierry Reding]

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On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.
> 
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt

The ARM SoC maintainers don't like to pick up device tree bindings, so
I'd prefer this to go through the cpufreq tree that also contains the
driver patches. Presumably this wasn't merged through that tree because
of the missing Acked-by by a device tree maintainer? Given that Rob's
acked it now, maybe you can resend this to Viresh, who I think had
picked up the driver?

Thanks,
Thierry

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Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

On 13.06.2017 15:42, Thierry Reding wrote:
> On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>> registers that initiate CPU frequency/voltage transitions.
>>
>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>> ---
>>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20 ++++++++++++++++++++
>>  1 file changed, 20 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
>
> The ARM SoC maintainers don't like to pick up device tree bindings, so
> I'd prefer this to go through the cpufreq tree that also contains the
> driver patches. Presumably this wasn't merged through that tree because
> of the missing Acked-by by a device tree maintainer? Given that Rob's
> acked it now, maybe you can resend this to Viresh, who I think had
> picked up the driver?

Sure, I'll do that. I guess the .dts change should then also go in that way?

Mikko

>
> Thanks,
> Thierry
>

Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

On 13.06.2017 15:46, Mikko Perttunen wrote:
> On 13.06.2017 15:42, Thierry Reding wrote:
>> On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
>>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>>> registers that initiate CPU frequency/voltage transitions.
>>>
>>> Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>>> ---
>>>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20
>>> ++++++++++++++++++++
>>>  1 file changed, 20 insertions(+)
>>>  create mode 100644
>>> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
>>>
>>
>> The ARM SoC maintainers don't like to pick up device tree bindings, so
>> I'd prefer this to go through the cpufreq tree that also contains the
>> driver patches. Presumably this wasn't merged through that tree because
>> of the missing Acked-by by a device tree maintainer? Given that Rob's
>> acked it now, maybe you can resend this to Viresh, who I think had
>> picked up the driver?
>
> Sure, I'll do that.

> I guess the .dts change should then also go in that
> way?

Or I guess not, since you applied it :)

Cheers,
Mikko

>
> Mikko
>
>>
>> Thanks,
>> Thierry
>>

Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Mikko Perttunen]

On 13.06.2017 15:46, Mikko Perttunen wrote:
> On 13.06.2017 15:42, Thierry Reding wrote:
>> On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
>>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
>>> registers that initiate CPU frequency/voltage transitions.
>>>
>>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
>>> Acked-by: Rob Herring <robh@kernel.org>
>>> ---
>>>  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20
>>> ++++++++++++++++++++
>>>  1 file changed, 20 insertions(+)
>>>  create mode 100644
>>> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
>>>
>>
>> The ARM SoC maintainers don't like to pick up device tree bindings, so
>> I'd prefer this to go through the cpufreq tree that also contains the
>> driver patches. Presumably this wasn't merged through that tree because
>> of the missing Acked-by by a device tree maintainer? Given that Rob's
>> acked it now, maybe you can resend this to Viresh, who I think had
>> picked up the driver?
>
> Sure, I'll do that.

> I guess the .dts change should then also go in that
> way?

Or I guess not, since you applied it :)

Cheers,
Mikko

>
> Mikko
>
>>
>> Thanks,
>> Thierry
>>

Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Thierry Reding]

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On Tue, Jun 13, 2017 at 03:47:39PM +0300, Mikko Perttunen wrote:
> 
> 
> On 13.06.2017 15:46, Mikko Perttunen wrote:
> > On 13.06.2017 15:42, Thierry Reding wrote:
> > > On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
> > > > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> > > > registers that initiate CPU frequency/voltage transitions.
> > > > 
> > > > Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > > > Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > > > ---
> > > >  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20
> > > > ++++++++++++++++++++
> > > >  1 file changed, 20 insertions(+)
> > > >  create mode 100644
> > > > Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
> > > > 
> > > 
> > > The ARM SoC maintainers don't like to pick up device tree bindings, so
> > > I'd prefer this to go through the cpufreq tree that also contains the
> > > driver patches. Presumably this wasn't merged through that tree because
> > > of the missing Acked-by by a device tree maintainer? Given that Rob's
> > > acked it now, maybe you can resend this to Viresh, who I think had
> > > picked up the driver?
> > 
> > Sure, I'll do that.
> 
> > I guess the .dts change should then also go in that
> > way?
> 
> Or I guess not, since you applied it :)

So the rule of thumb is that .dts changes should go through ARM SoC and
device tree binding changes should be going through the same tree as the
driver changes that implement the binding.

Thierry

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Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster

[Thierry Reding]

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On Tue, Jun 13, 2017 at 03:47:39PM +0300, Mikko Perttunen wrote:
> 
> 
> On 13.06.2017 15:46, Mikko Perttunen wrote:
> > On 13.06.2017 15:42, Thierry Reding wrote:
> > > On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
> > > > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> > > > registers that initiate CPU frequency/voltage transitions.
> > > > 
> > > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> > > > Acked-by: Rob Herring <robh@kernel.org>
> > > > ---
> > > >  .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt     | 20
> > > > ++++++++++++++++++++
> > > >  1 file changed, 20 insertions(+)
> > > >  create mode 100644
> > > > Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
> > > > 
> > > 
> > > The ARM SoC maintainers don't like to pick up device tree bindings, so
> > > I'd prefer this to go through the cpufreq tree that also contains the
> > > driver patches. Presumably this wasn't merged through that tree because
> > > of the missing Acked-by by a device tree maintainer? Given that Rob's
> > > acked it now, maybe you can resend this to Viresh, who I think had
> > > picked up the driver?
> > 
> > Sure, I'll do that.
> 
> > I guess the .dts change should then also go in that
> > way?
> 
> Or I guess not, since you applied it :)

So the rule of thumb is that .dts changes should go through ARM SoC and
device tree binding changes should be going through the same tree as the
driver changes that implement the binding.

Thierry

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[PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186

[Mikko Perttunen]

The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 3ea5e6369bc3..c023af0be43d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -347,6 +347,13 @@
 		reg-names = "pmc", "wake", "aotag", "scratch";
 	};
 
+	ccplex@e000000 {
+		compatible = "nvidia,tegra186-ccplex-cluster";
+		reg = <0x0 0x0e000000 0x0 0x3fffff>;
+
+		nvidia,bpmp = <&bpmp>;
+	};
+
 	sysram@30000000 {
 		compatible = "nvidia,tegra186-sysram", "mmio-sram";
 		reg = <0x0 0x30000000 0x0 0x50000>;
-- 
2.1.4

[PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186

[Mikko Perttunen]

The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 3ea5e6369bc3..c023af0be43d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -347,6 +347,13 @@
 		reg-names = "pmc", "wake", "aotag", "scratch";
 	};
 
+	ccplex@e000000 {
+		compatible = "nvidia,tegra186-ccplex-cluster";
+		reg = <0x0 0x0e000000 0x0 0x3fffff>;
+
+		nvidia,bpmp = <&bpmp>;
+	};
+
 	sysram@30000000 {
 		compatible = "nvidia,tegra186-sysram", "mmio-sram";
 		reg = <0x0 0x30000000 0x0 0x50000>;
-- 
2.1.4

Re: [PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186

[Thierry Reding]

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On Thu, Jun 01, 2017 at 11:04:05AM +0300, Mikko Perttunen wrote:
> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.
> 
> Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)

Applied, thanks.

Thierry

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Re: [PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186

[Thierry Reding]

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On Thu, Jun 01, 2017 at 11:04:05AM +0300, Mikko Perttunen wrote:
> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.
> 
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)

Applied, thanks.

Thierry

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