[U-Boot] [PATCH 1/1] board/ls2080aqds, SD-boot: Update env offset

[U-Boot] [PATCH 1/1] board/ls2080aqds, SD-boot: Update env offset

[Santan Kumar]

As per new memory layout, Update env offset
from 0x200000 to 0x300000

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
---
 include/configs/ls2080aqds.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 8a8ee9d..c32c184 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -238,7 +238,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 * 1024)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(640 * 1024)
 #elif defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET		0x200000
+#define CONFIG_ENV_OFFSET		0x300000
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_ENV_SIZE			0x20000
-- 
1.9.1

[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[Santan Kumar]

LS2080ARDB/LS2088ARDB updated RevF boards do not have
smart voltage translator, so no need to program GPIO
for LS2088ARDB boards
The GPIO programming is required only for LS2081ARDB.

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 board/freescale/ls2080ardb/ls2080ardb.c | 18 ++----------------
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index df2d768..210142c 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -257,31 +257,17 @@ int board_early_init_f(void)
 
 int misc_init_r(void)
 {
-#ifdef CONFIG_FSL_QIXIS
-	/*
-	 * LS2081ARDB has smart voltage translator which needs
-	 * to be programmed as below
-	 */
-#ifndef CONFIG_TARGET_LS2081ARDB
-	u8 sw;
-
-	sw = QIXIS_READ(arch);
 	/*
-	 * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
+	 * LS2081ARDB RevF board has smart voltage translator
 	 * which needs to be programmed to enable high speed SD interface
 	 * by setting GPIO4_10 output to zero
 	 */
-	if ((sw & 0xf) == 0x5) {
-#endif
+#ifdef CONFIG_TARGET_LS2081ARDB
 		out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
 					    in_le32(GPIO4_GPDIR_ADDR)));
 		out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
 					    in_le32(GPIO4_GPDAT_ADDR)));
-#ifndef CONFIG_TARGET_LS2081ARDB
-	}
-#endif
 #endif
-
 	if (hwconfig("sdhc"))
 		config_board_mux(MUX_TYPE_SDHC);
 
-- 
1.9.1

[U-Boot] [PATCH 1/1] board/ls2081ardb: Update qspi flash type and checkboard

[Santan Kumar]

Patch makes below changes:
 -As per updated board design, different QSPI flash is connected on boards,
	hence change QSPI flash type from n25q512a to s25fs512ss
 -Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE
 -Increase env size from 64kb to 256kb for qspi boot
 -Update checkboard() to detect boot source and display message

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 arch/arm/dts/fsl-ls2081a-rdb.dts        |  4 ++--
 board/freescale/ls2080ardb/ls2080ardb.c | 15 +++------------
 include/configs/ls2080a_common.h        |  2 +-
 include/configs/ls2080ardb.h            |  7 +------
 4 files changed, 7 insertions(+), 21 deletions(-)

diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-rdb.dts
index 6489362..aa4aa68 100644
--- a/arch/arm/dts/fsl-ls2081a-rdb.dts
+++ b/arch/arm/dts/fsl-ls2081a-rdb.dts
@@ -41,7 +41,7 @@
 	bus-num = <0>;
 	status = "okay";
 
-	qflash0: n25q512a at 0 {
+	qflash0: s25fs512s at 0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "spi-flash";
@@ -49,7 +49,7 @@
 		reg = <0>;
 	};
 
-	qflash1: n25q512a at 1 {
+	qflash1: s25fs512s at 1 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "spi-flash";
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 210142c..9d21d1e 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -71,36 +71,27 @@ int checkboard(void)
 #ifdef CONFIG_TARGET_LS2081ARDB
 #ifdef CONFIG_FSL_QIXIS
 	sw = QIXIS_READ(arch);
-	printf("Board Arch: V%d, ", sw >> 4);
 	printf("Board version: %c, ", (sw & 0xf) + 'A');
 
 	sw = QIXIS_READ(brdcfg[0]);
-	sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT;
+	sw = sw  >> QIXIS_QMAP_SHIFT;
 	switch (sw) {
 	case 0:
+	case 4:
 		puts("boot from QSPI DEV#0\n");
-		puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
 		break;
 	case 1:
 		puts("boot from QSPI DEV#1\n");
-		puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
 		break;
 	case 2:
-		puts("boot from QSPI EMU\n");
-		puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
-		break;
 	case 3:
 		puts("boot from QSPI EMU\n");
-		puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
-		break;
-	case 4:
-		puts("boot from QSPI DEV#0\n");
-		puts("QSPI_CSA_1 mapped to QSPI EMU\n");
 		break;
 	default:
 		printf("invalid setting of SW%u\n", sw);
 		break;
 	}
+	printf("FPGA: v%d.%d\n", QIXIS_READ(scver), QIXIS_READ(tagdata));
 #endif
 	puts("SERDES1 Reference : ");
 	printf("Clock1 = 100MHz ");
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index e311d0b..68191f2 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -34,7 +34,7 @@
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SIZE			0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET		0x300000        /* 3MB */
-#define CONFIG_ENV_SECT_SIZE		0x10000
+#define CONFIG_ENV_SECT_SIZE		0x40000
 #endif
 
 #define CONFIG_SUPPORT_RAW_INITRD
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2dab065..a5f7eea 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -18,7 +18,6 @@
 #define CONFIG_QIXIS_I2C_ACCESS
 #endif
 #define CONFIG_SYS_I2C_EARLY_INIT
-#define CONFIG_DISPLAY_BOARDINFO_LATE
 #endif
 
 #define I2C_MUX_CH_VOL_MONITOR		0xa
@@ -293,19 +292,15 @@ unsigned long get_board_sys_clk(void);
 /* SPI */
 #if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
 #define CONFIG_SPI_FLASH
-#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_FSL_DSPI
 #define CONFIG_SPI_FLASH_STMICRO
 #endif
 #ifdef CONFIG_FSL_QSPI
-#ifdef CONFIG_TARGET_LS2081ARDB
-#define CONFIG_SPI_FLASH_STMICRO
-#else
 #define CONFIG_SPI_FLASH_SPANSION
 #endif
 #define FSL_QSPI_FLASH_SIZE		SZ_64M	/* 64MB */
 #define FSL_QSPI_FLASH_NUM		2
 #endif
-#endif
 
 /*
  * RTC configuration
-- 
1.9.1

[U-Boot] [PATCH 1/1] fsl/usb: enable errata-a010151 for ls2088a and ls2081a

[Santan Kumar]

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
---
 drivers/usb/common/fsl-errata.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 338ac08..383a433 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -198,6 +198,10 @@ bool has_erratum_a010151(void)
 #ifdef CONFIG_ARM64
 	case SVR_LS2080A:
 	case SVR_LS2085A:
+			/* fallthrough */
+	case SVR_LS2088A:
+			/* fallthrough */
+	case SVR_LS2081A:
 	case SVR_LS1046A:
 	case SVR_LS1012A:
 		return IS_SVR_REV(svr, 1, 0);
-- 
1.9.1

[U-Boot] [PATCH 1/1] soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A

[Santan Kumar]

Update SVR as per the SOC document.
 -LS2081A: 0x870919 -> 0x870918
 -LS2041A: 0x870915 -> 0x870914

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++--
 drivers/pci/pcie_layerscape.h                  | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index cc3b079..fae5730 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -55,8 +55,8 @@ struct cpu_type {
 #define SVR_LS2084A		0x870910
 #define SVR_LS2048A		0x870920
 #define SVR_LS2044A		0x870930
-#define SVR_LS2081A		0x870919
-#define SVR_LS2041A		0x870915
+#define SVR_LS2081A		0x870918
+#define SVR_LS2041A		0x870914
 
 #define SVR_DEV_LS2080A		0x8701
 
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 308b073..782e3ab 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -118,8 +118,8 @@
 #define SVR_LS2084A		0x870910
 #define SVR_LS2048A		0x870920
 #define SVR_LS2044A		0x870930
-#define SVR_LS2081A		0x870919
-#define SVR_LS2041A		0x870915
+#define SVR_LS2081A		0x870918
+#define SVR_LS2041A		0x870914
 
 /* LS1021a PCIE space */
 #define LS1021_PCIE_SPACE_OFFSET	0x4000000000ULL
-- 
1.9.1

[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[York Sun]

On 06/08/2017 11:16 PM, Santan Kumar wrote:
> LS2080ARDB/LS2088ARDB updated RevF boards do not have
> smart voltage translator, so no need to program GPIO
> for LS2088ARDB boards
> The GPIO programming is required only for LS2081ARDB.
> 
> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> ---
>   board/freescale/ls2080ardb/ls2080ardb.c | 18 ++----------------
>   1 file changed, 2 insertions(+), 16 deletions(-)
> 
> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
> index df2d768..210142c 100644
> --- a/board/freescale/ls2080ardb/ls2080ardb.c
> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> @@ -257,31 +257,17 @@ int board_early_init_f(void)
>   
>   int misc_init_r(void)
>   {
> -#ifdef CONFIG_FSL_QIXIS
> -	/*
> -	 * LS2081ARDB has smart voltage translator which needs
> -	 * to be programmed as below
> -	 */
> -#ifndef CONFIG_TARGET_LS2081ARDB
> -	u8 sw;
> -
> -	sw = QIXIS_READ(arch);
>   	/*
> -	 * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
> +	 * LS2081ARDB RevF board has smart voltage translator
>   	 * which needs to be programmed to enable high speed SD interface
>   	 * by setting GPIO4_10 output to zero
>   	 */
> -	if ((sw & 0xf) == 0x5) {
> -#endif
> +#ifdef CONFIG_TARGET_LS2081ARDB
>   		out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
>   					    in_le32(GPIO4_GPDIR_ADDR)));
>   		out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
>   					    in_le32(GPIO4_GPDAT_ADDR)));
> -#ifndef CONFIG_TARGET_LS2081ARDB
> -	}
> -#endif
>   #endif
> -
>   	if (hwconfig("sdhc"))
>   		config_board_mux(MUX_TYPE_SDHC);
>   
> 

This change is not backward-compatible, is it?

York

[U-Boot] [PATCH 1/1] board/ls2081ardb: Update qspi flash type and checkboard

[York Sun]

On 06/08/2017 11:16 PM, Santan Kumar wrote:
> Patch makes below changes:
>   -As per updated board design, different QSPI flash is connected on boards,
> 	hence change QSPI flash type from n25q512a to s25fs512ss
>   -Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE
>   -Increase env size from 64kb to 256kb for qspi boot
>   -Update checkboard() to detect boot source and display message

Please separate common change from board specific change.

> 
> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> ---
>   arch/arm/dts/fsl-ls2081a-rdb.dts        |  4 ++--
>   board/freescale/ls2080ardb/ls2080ardb.c | 15 +++------------
>   include/configs/ls2080a_common.h        |  2 +-
>   include/configs/ls2080ardb.h            |  7 +------
>   4 files changed, 7 insertions(+), 21 deletions(-)
> 
> diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-rdb.dts
> index 6489362..aa4aa68 100644
> --- a/arch/arm/dts/fsl-ls2081a-rdb.dts
> +++ b/arch/arm/dts/fsl-ls2081a-rdb.dts
> @@ -41,7 +41,7 @@
>   	bus-num = <0>;
>   	status = "okay";
>   
> -	qflash0: n25q512a at 0 {
> +	qflash0: s25fs512s at 0 {

Is there any version of LS2081ARDB with n25q512a?

>   		#address-cells = <1>;
>   		#size-cells = <1>;
>   		compatible = "spi-flash";
> @@ -49,7 +49,7 @@
>   		reg = <0>;
>   	};
>   
> -	qflash1: n25q512a at 1 {
> +	qflash1: s25fs512s at 1 {
>   		#address-cells = <1>;
>   		#size-cells = <1>;
>   		compatible = "spi-flash";
> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
> index 210142c..9d21d1e 100644
> --- a/board/freescale/ls2080ardb/ls2080ardb.c
> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> @@ -71,36 +71,27 @@ int checkboard(void)
>   #ifdef CONFIG_TARGET_LS2081ARDB
>   #ifdef CONFIG_FSL_QIXIS
>   	sw = QIXIS_READ(arch);
> -	printf("Board Arch: V%d, ", sw >> 4);
>   	printf("Board version: %c, ", (sw & 0xf) + 'A');
>   

What's the reason to drop "Board Arch"?

>   	sw = QIXIS_READ(brdcfg[0]);
> -	sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT;
> +	sw = sw  >> QIXIS_QMAP_SHIFT;
>   	switch (sw) {
>   	case 0:
> +	case 4:
>   		puts("boot from QSPI DEV#0\n");
> -		puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
>   		break;
>   	case 1:
>   		puts("boot from QSPI DEV#1\n");
> -		puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
>   		break;
>   	case 2:
> -		puts("boot from QSPI EMU\n");
> -		puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
> -		break;
>   	case 3:
>   		puts("boot from QSPI EMU\n");
> -		puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
> -		break;
> -	case 4:
> -		puts("boot from QSPI DEV#0\n");
> -		puts("QSPI_CSA_1 mapped to QSPI EMU\n");
>   		break;
>   	default:
>   		printf("invalid setting of SW%u\n", sw);
>   		break;
>   	}
> +	printf("FPGA: v%d.%d\n", QIXIS_READ(scver), QIXIS_READ(tagdata));

What are you changing in this function?

York

[U-Boot] [PATCH 1/1] board/ls2081ardb: Update qspi flash type and checkboard

[Priyanka Jain]

> -----Original Message-----
> From: York Sun
> Sent: Wednesday, June 14, 2017 2:23 AM
> To: Santan Kumar <santan.kumar@nxp.com>; u-boot at lists.denx.de
> Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Priyanka Jain
> <priyanka.jain@nxp.com>
> Subject: Re: [PATCH 1/1] board/ls2081ardb: Update qspi flash type and
> checkboard
> 
> On 06/08/2017 11:16 PM, Santan Kumar wrote:
> > Patch makes below changes:
> >   -As per updated board design, different QSPI flash is connected on boards,
> > 	hence change QSPI flash type from n25q512a to s25fs512ss
> >   -Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE
> >   -Increase env size from 64kb to 256kb for qspi boot
> >   -Update checkboard() to detect boot source and display message
> 
> Please separate common change from board specific change.
> 
> >
> > Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> > Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
> > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> > ---
> >   arch/arm/dts/fsl-ls2081a-rdb.dts        |  4 ++--
> >   board/freescale/ls2080ardb/ls2080ardb.c | 15 +++------------
> >   include/configs/ls2080a_common.h        |  2 +-
> >   include/configs/ls2080ardb.h            |  7 +------
> >   4 files changed, 7 insertions(+), 21 deletions(-)
> >
> > diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-
> rdb.dts
> > index 6489362..aa4aa68 100644
> > --- a/arch/arm/dts/fsl-ls2081a-rdb.dts
> > +++ b/arch/arm/dts/fsl-ls2081a-rdb.dts
> > @@ -41,7 +41,7 @@
> >   	bus-num = <0>;
> >   	status = "okay";
> >
> > -	qflash0: n25q512a at 0 {
> > +	qflash0: s25fs512s at 0 {
> 
> Is there any version of LS2081ARDB with n25q512a?
No, All ls2081ardb boards will have s25fs512s device
> 
> >   		#address-cells = <1>;
> >   		#size-cells = <1>;
> >   		compatible = "spi-flash";
> > @@ -49,7 +49,7 @@
> >   		reg = <0>;
> >   	};
> >
> > -	qflash1: n25q512a at 1 {
> > +	qflash1: s25fs512s at 1 {
> >   		#address-cells = <1>;
> >   		#size-cells = <1>;
> >   		compatible = "spi-flash";
> > diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
> b/board/freescale/ls2080ardb/ls2080ardb.c
> > index 210142c..9d21d1e 100644
> > --- a/board/freescale/ls2080ardb/ls2080ardb.c
> > +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> > @@ -71,36 +71,27 @@ int checkboard(void)
> >   #ifdef CONFIG_TARGET_LS2081ARDB
> >   #ifdef CONFIG_FSL_QIXIS
> >   	sw = QIXIS_READ(arch);
> > -	printf("Board Arch: V%d, ", sw >> 4);
> >   	printf("Board version: %c, ", (sw & 0xf) + 'A');
> >
> 
> What's the reason to drop "Board Arch"?
Based on feedback from board team, this is not required for RDB boards
Arch contains Qixis architecture version to use common Qixis image across multipl platforms.
This field is relevant for QDS boards. For RDB boards it is always constant as '1'
> 
> >   	sw = QIXIS_READ(brdcfg[0]);
> > -	sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT;
> > +	sw = sw  >> QIXIS_QMAP_SHIFT;
> >   	switch (sw) {
> >   	case 0:
> > +	case 4:
> >   		puts("boot from QSPI DEV#0\n");
> > -		puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
> >   		break;
> >   	case 1:
> >   		puts("boot from QSPI DEV#1\n");
> > -		puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
> >   		break;
> >   	case 2:
> > -		puts("boot from QSPI EMU\n");
> > -		puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
> > -		break;
> >   	case 3:
> >   		puts("boot from QSPI EMU\n");
> > -		puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
> > -		break;
> > -	case 4:
> > -		puts("boot from QSPI DEV#0\n");
> > -		puts("QSPI_CSA_1 mapped to QSPI EMU\n");
> >   		break;
> >   	default:
> >   		printf("invalid setting of SW%u\n", sw);
> >   		break;
> >   	}
> > +	printf("FPGA: v%d.%d\n", QIXIS_READ(scver), QIXIS_READ(tagdata));
> 
> What are you changing in this function?
>
> York
Sw value is updated to sw = sw  >> QIXIS_QMP_SHIFT 
Instead of  sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT 
Also With earlier version of prints, u-boot boot messages were confusing.
So, tried to make the bootlogs similar to Nor boot bootlogs to make them  more user friendly.
 
Priyanka

[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[Priyanka Jain]

> -----Original Message-----
> From: York Sun
> Sent: Wednesday, June 14, 2017 2:16 AM
> To: Santan Kumar <santan.kumar@nxp.com>; u-boot at lists.denx.de
> Cc: Priyanka Jain <priyanka.jain@nxp.com>
> Subject: Re: [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO
> programming
> 
> On 06/08/2017 11:16 PM, Santan Kumar wrote:
> > LS2080ARDB/LS2088ARDB updated RevF boards do not have smart voltage
> > translator, so no need to program GPIO for LS2088ARDB boards The GPIO
> > programming is required only for LS2081ARDB.
> >
> > Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> > ---
> >   board/freescale/ls2080ardb/ls2080ardb.c | 18 ++----------------
> >   1 file changed, 2 insertions(+), 16 deletions(-)
> >
> > diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
> > b/board/freescale/ls2080ardb/ls2080ardb.c
> > index df2d768..210142c 100644
> > --- a/board/freescale/ls2080ardb/ls2080ardb.c
> > +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> > @@ -257,31 +257,17 @@ int board_early_init_f(void)
> >
> >   int misc_init_r(void)
> >   {
> > -#ifdef CONFIG_FSL_QIXIS
> > -	/*
> > -	 * LS2081ARDB has smart voltage translator which needs
> > -	 * to be programmed as below
> > -	 */
> > -#ifndef CONFIG_TARGET_LS2081ARDB
> > -	u8 sw;
> > -
> > -	sw = QIXIS_READ(arch);
> >   	/*
> > -	 * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
> > +	 * LS2081ARDB RevF board has smart voltage translator
> >   	 * which needs to be programmed to enable high speed SD interface
> >   	 * by setting GPIO4_10 output to zero
> >   	 */
> > -	if ((sw & 0xf) == 0x5) {
> > -#endif
> > +#ifdef CONFIG_TARGET_LS2081ARDB
> >   		out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
> >   					    in_le32(GPIO4_GPDIR_ADDR)));
> >   		out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
> >   					    in_le32(GPIO4_GPDAT_ADDR))); -
> #ifndef
> > CONFIG_TARGET_LS2081ARDB
> > -	}
> > -#endif
> >   #endif
> > -
> >   	if (hwconfig("sdhc"))
> >   		config_board_mux(MUX_TYPE_SDHC);
> >
> >
> 
> This change is not backward-compatible, is it?
> 
> York
Yes, It is backward compatible. As per updated board designs and the manufactured boards, GPIO programming is required only for LS2081ARDB boards.

Priyanka

[U-Boot] [PATCH 1/1] board/ls2080aqds, SD-boot: Update env offset

[York Sun]

On 06/08/2017 11:15 PM, Santan Kumar wrote:
> As per new memory layout, Update env offset
> from 0x200000 to 0x300000
> 
> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> ---

Applied to fsl-qoriq master. Thanks.

York

[U-Boot] [PATCH 1/1] fsl/usb: enable errata-a010151 for ls2088a and ls2081a

[York Sun]

On 06/08/2017 11:16 PM, Santan Kumar wrote:
> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> ---
>   drivers/usb/common/fsl-errata.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 

Applied to fsl-qoriq master. Thanks.

York

[U-Boot] [PATCH 1/1] soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A

[York Sun]

On 06/08/2017 11:16 PM, Santan Kumar wrote:
> Update SVR as per the SOC document.
>   -LS2081A: 0x870919 -> 0x870918
>   -LS2041A: 0x870915 -> 0x870914
> 
> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---

Applied to fsl-qoriq master. Thanks.

York

[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[York Sun]

On 06/20/2017 11:54 PM, Priyanka Jain wrote:
> 
> 
>> -----Original Message-----
>> From: York Sun
>> Sent: Wednesday, June 14, 2017 2:16 AM
>> To: Santan Kumar <santan.kumar@nxp.com>; u-boot at lists.denx.de
>> Cc: Priyanka Jain <priyanka.jain@nxp.com>
>> Subject: Re: [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO
>> programming
>>
>> On 06/08/2017 11:16 PM, Santan Kumar wrote:
>>> LS2080ARDB/LS2088ARDB updated RevF boards do not have smart voltage
>>> translator, so no need to program GPIO for LS2088ARDB boards The GPIO
>>> programming is required only for LS2081ARDB.
>>>
>>> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
>>> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
>>> ---
>>>    board/freescale/ls2080ardb/ls2080ardb.c | 18 ++----------------
>>>    1 file changed, 2 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
>>> b/board/freescale/ls2080ardb/ls2080ardb.c
>>> index df2d768..210142c 100644
>>> --- a/board/freescale/ls2080ardb/ls2080ardb.c
>>> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
>>> @@ -257,31 +257,17 @@ int board_early_init_f(void)
>>>
>>>    int misc_init_r(void)
>>>    {
>>> -#ifdef CONFIG_FSL_QIXIS
>>> -	/*
>>> -	 * LS2081ARDB has smart voltage translator which needs
>>> -	 * to be programmed as below
>>> -	 */
>>> -#ifndef CONFIG_TARGET_LS2081ARDB
>>> -	u8 sw;
>>> -
>>> -	sw = QIXIS_READ(arch);
>>>    	/*
>>> -	 * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
>>> +	 * LS2081ARDB RevF board has smart voltage translator
>>>    	 * which needs to be programmed to enable high speed SD interface
>>>    	 * by setting GPIO4_10 output to zero
>>>    	 */
>>> -	if ((sw & 0xf) == 0x5) {
>>> -#endif
>>> +#ifdef CONFIG_TARGET_LS2081ARDB
>>>    		out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
>>>    					    in_le32(GPIO4_GPDIR_ADDR)));
>>>    		out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
>>>    					    in_le32(GPIO4_GPDAT_ADDR))); -
>> #ifndef
>>> CONFIG_TARGET_LS2081ARDB
>>> -	}
>>> -#endif
>>>    #endif
>>> -
>>>    	if (hwconfig("sdhc"))
>>>    		config_board_mux(MUX_TYPE_SDHC);
>>>
>>>
>>
>> This change is not backward-compatible, is it?
>>
>> York
> Yes, It is backward compatible. As per updated board designs and the manufactured boards, GPIO programming is required only for LS2081ARDB boards.

Priyanka,

I looked at this patch again. Before this change, LS2080ARDB rev F and 
LS2081ARDB both have the smart voltage translator enabled. After this 
change, rev F no longer enables this voltage translator. You still 
consider it backward-compatible?

York

[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[Priyanka Jain]

> -----Original Message-----
> From: York Sun
> Sent: Tuesday, August 08, 2017 2:20 AM
> To: Priyanka Jain <priyanka.jain@nxp.com>; Santan Kumar
> <santan.kumar@nxp.com>; u-boot at lists.denx.de
> Subject: Re: [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO
> programming
> 
> On 06/20/2017 11:54 PM, Priyanka Jain wrote:
> >
> >
> >> -----Original Message-----
> >> From: York Sun
> >> Sent: Wednesday, June 14, 2017 2:16 AM
> >> To: Santan Kumar <santan.kumar@nxp.com>; u-boot at lists.denx.de
> >> Cc: Priyanka Jain <priyanka.jain@nxp.com>
> >> Subject: Re: [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO
> >> programming
> >>
> >> On 06/08/2017 11:16 PM, Santan Kumar wrote:
> >>> LS2080ARDB/LS2088ARDB updated RevF boards do not have smart voltage
> >>> translator, so no need to program GPIO for LS2088ARDB boards The
> >>> GPIO programming is required only for LS2081ARDB.
> >>>
> >>> Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
> >>> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> >>> ---
> >>>    board/freescale/ls2080ardb/ls2080ardb.c | 18 ++----------------
> >>>    1 file changed, 2 insertions(+), 16 deletions(-)
> >>>
> >>> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
> >>> b/board/freescale/ls2080ardb/ls2080ardb.c
> >>> index df2d768..210142c 100644
> >>> --- a/board/freescale/ls2080ardb/ls2080ardb.c
> >>> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> >>> @@ -257,31 +257,17 @@ int board_early_init_f(void)
> >>>
> >>>    int misc_init_r(void)
> >>>    {
> >>> -#ifdef CONFIG_FSL_QIXIS
> >>> -	/*
> >>> -	 * LS2081ARDB has smart voltage translator which needs
> >>> -	 * to be programmed as below
> >>> -	 */
> >>> -#ifndef CONFIG_TARGET_LS2081ARDB
> >>> -	u8 sw;
> >>> -
> >>> -	sw = QIXIS_READ(arch);
> >>>    	/*
> >>> -	 * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
> >>> +	 * LS2081ARDB RevF board has smart voltage translator
> >>>    	 * which needs to be programmed to enable high speed SD interface
> >>>    	 * by setting GPIO4_10 output to zero
> >>>    	 */
> >>> -	if ((sw & 0xf) == 0x5) {
> >>> -#endif
> >>> +#ifdef CONFIG_TARGET_LS2081ARDB
> >>>    		out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
> >>>    					    in_le32(GPIO4_GPDIR_ADDR)));
> >>>    		out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
> >>>    					    in_le32(GPIO4_GPDAT_ADDR))); -
> >> #ifndef
> >>> CONFIG_TARGET_LS2081ARDB
> >>> -	}
> >>> -#endif
> >>>    #endif
> >>> -
> >>>    	if (hwconfig("sdhc"))
> >>>    		config_board_mux(MUX_TYPE_SDHC);
> >>>
> >>>
> >>
> >> This change is not backward-compatible, is it?
> >>
> >> York
> > Yes, It is backward compatible. As per updated board designs and the
> manufactured boards, GPIO programming is required only for LS2081ARDB
> boards.
> 
> Priyanka,
> 
> I looked at this patch again. Before this change, LS2080ARDB rev F and
> LS2081ARDB both have the smart voltage translator enabled. After this change,
> rev F no longer enables this voltage translator. You still consider it backward-
> compatible?
> 
> York

Both LS2080ARDB rev F and LS2081ARDB were initially designed to have smart voltage translator to support SD-boot and UHS mode 
At a later stage, due to some issues on LS2088ARDB RevF board to support SD-boot, translator was removed from RevF boards.

I confirmed with board team that all LS2088ARDB RevF board will not have the smart voltage translator and all LS2081ARDB boards will have smart voltage translator.

Priyanka

[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[York Sun]

On 08/07/2017 10:18 PM, Priyanka Jain wrote:
<snip>
>>>>
>>>> This change is not backward-compatible, is it?
>>>>
>>>> York
>>> Yes, It is backward compatible. As per updated board designs and the
>> manufactured boards, GPIO programming is required only for LS2081ARDB
>> boards.
>>
>> Priyanka,
>>
>> I looked at this patch again. Before this change, LS2080ARDB rev F and
>> LS2081ARDB both have the smart voltage translator enabled. After this change,
>> rev F no longer enables this voltage translator. You still consider it backward-
>> compatible?
>>
>> York
> 
> Both LS2080ARDB rev F and LS2081ARDB were initially designed to have smart voltage translator to support SD-boot and UHS mode
> At a later stage, due to some issues on LS2088ARDB RevF board to support SD-boot, translator was removed from RevF boards.
> 
> I confirmed with board team that all LS2088ARDB RevF board will not have the smart voltage translator and all LS2081ARDB boards will have smart voltage translator.
>

OK. Thanks.

York

[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming

[York Sun]

On 08/07/2017 10:18 PM, Priyanka Jain wrote:

> Both LS2080ARDB rev F and LS2081ARDB were initially designed to have smart voltage translator to support SD-boot and UHS mode
> At a later stage, due to some issues on LS2088ARDB RevF board to support SD-boot, translator was removed from RevF boards.
> 
> I confirmed with board team that all LS2088ARDB RevF board will not have the smart voltage translator and all LS2081ARDB boards will have smart voltage translator.
> 

Applied to fsl-qoriq master, awaiting upstream.
Thanks.

York