From: "Christian König" <deathsimple@vodafone.de> To: helgaas@kernel.org, linux-pci@vger.kernel.org, dri-devel@lists.freedesktop.org, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org Subject: [PATCH v5 1/6] PCI: add a define for the PCI resource type mask v2 Date: Fri, 9 Jun 2017 10:59:42 +0200 [thread overview] Message-ID: <1496998787-6371-2-git-send-email-deathsimple@vodafone.de> (raw) In-Reply-To: <1496998787-6371-1-git-send-email-deathsimple@vodafone.de> From: Christian König <christian.koenig@amd.com> We use this mask multiple times in the bus setup. v2: fix some style nit picks Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> --- drivers/pci/pci.h | 4 ++++ drivers/pci/setup-bus.c | 12 +++--------- 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 8dd38e6..b3da553 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -3,6 +3,10 @@ #define PCI_FIND_CAP_TTL 48 +#define PCI_RES_TYPE_MASK \ + (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH |\ + IORESOURCE_MEM_64) + extern const unsigned char pcie_link_speed[]; bool pcie_cap_has_lnkctl(const struct pci_dev *dev); diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index cb389277..451a9c0 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1523,8 +1523,6 @@ static void pci_bridge_release_resources(struct pci_bus *bus, { struct pci_dev *dev = bus->self; struct resource *r; - unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | - IORESOURCE_PREFETCH | IORESOURCE_MEM_64; unsigned old_flags = 0; struct resource *b_res; int idx = 1; @@ -1567,7 +1565,7 @@ static void pci_bridge_release_resources(struct pci_bus *bus, */ release_child_resources(r); if (!release_resource(r)) { - type = old_flags = r->flags & type_mask; + type = old_flags = r->flags & PCI_RES_TYPE_MASK; dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n", PCI_BRIDGE_RESOURCES + idx, r); /* keep the old size */ @@ -1758,8 +1756,6 @@ void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus) enum release_type rel_type = leaf_only; LIST_HEAD(fail_head); struct pci_dev_resource *fail_res; - unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | - IORESOURCE_PREFETCH | IORESOURCE_MEM_64; int pci_try_num = 1; enum enable_type enable_local; @@ -1818,7 +1814,7 @@ void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus) */ list_for_each_entry(fail_res, &fail_head, list) pci_bus_release_bridge_resources(fail_res->dev->bus, - fail_res->flags & type_mask, + fail_res->flags & PCI_RES_TYPE_MASK, rel_type); /* restore size and flags */ @@ -1862,8 +1858,6 @@ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) LIST_HEAD(fail_head); struct pci_dev_resource *fail_res; int retval; - unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | - IORESOURCE_PREFETCH | IORESOURCE_MEM_64; again: __pci_bus_size_bridges(parent, &add_list); @@ -1889,7 +1883,7 @@ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) */ list_for_each_entry(fail_res, &fail_head, list) pci_bus_release_bridge_resources(fail_res->dev->bus, - fail_res->flags & type_mask, + fail_res->flags & PCI_RES_TYPE_MASK, whole_subtree); /* restore size and flags */ -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: "Christian König" <deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> To: helgaas-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, platform-driver-x86-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Subject: [PATCH v5 1/6] PCI: add a define for the PCI resource type mask v2 Date: Fri, 9 Jun 2017 10:59:42 +0200 [thread overview] Message-ID: <1496998787-6371-2-git-send-email-deathsimple@vodafone.de> (raw) In-Reply-To: <1496998787-6371-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> From: Christian König <christian.koenig@amd.com> We use this mask multiple times in the bus setup. v2: fix some style nit picks Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> --- drivers/pci/pci.h | 4 ++++ drivers/pci/setup-bus.c | 12 +++--------- 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 8dd38e6..b3da553 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -3,6 +3,10 @@ #define PCI_FIND_CAP_TTL 48 +#define PCI_RES_TYPE_MASK \ + (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH |\ + IORESOURCE_MEM_64) + extern const unsigned char pcie_link_speed[]; bool pcie_cap_has_lnkctl(const struct pci_dev *dev); diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index cb389277..451a9c0 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1523,8 +1523,6 @@ static void pci_bridge_release_resources(struct pci_bus *bus, { struct pci_dev *dev = bus->self; struct resource *r; - unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | - IORESOURCE_PREFETCH | IORESOURCE_MEM_64; unsigned old_flags = 0; struct resource *b_res; int idx = 1; @@ -1567,7 +1565,7 @@ static void pci_bridge_release_resources(struct pci_bus *bus, */ release_child_resources(r); if (!release_resource(r)) { - type = old_flags = r->flags & type_mask; + type = old_flags = r->flags & PCI_RES_TYPE_MASK; dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n", PCI_BRIDGE_RESOURCES + idx, r); /* keep the old size */ @@ -1758,8 +1756,6 @@ void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus) enum release_type rel_type = leaf_only; LIST_HEAD(fail_head); struct pci_dev_resource *fail_res; - unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | - IORESOURCE_PREFETCH | IORESOURCE_MEM_64; int pci_try_num = 1; enum enable_type enable_local; @@ -1818,7 +1814,7 @@ void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus) */ list_for_each_entry(fail_res, &fail_head, list) pci_bus_release_bridge_resources(fail_res->dev->bus, - fail_res->flags & type_mask, + fail_res->flags & PCI_RES_TYPE_MASK, rel_type); /* restore size and flags */ @@ -1862,8 +1858,6 @@ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) LIST_HEAD(fail_head); struct pci_dev_resource *fail_res; int retval; - unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | - IORESOURCE_PREFETCH | IORESOURCE_MEM_64; again: __pci_bus_size_bridges(parent, &add_list); @@ -1889,7 +1883,7 @@ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) */ list_for_each_entry(fail_res, &fail_head, list) pci_bus_release_bridge_resources(fail_res->dev->bus, - fail_res->flags & type_mask, + fail_res->flags & PCI_RES_TYPE_MASK, whole_subtree); /* restore size and flags */ -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2017-06-09 9:11 UTC|newest] Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-09 8:59 Resizeable PCI BAR support V5 Christian König 2017-06-09 8:59 ` Christian König 2017-06-09 8:59 ` Christian König [this message] 2017-06-09 8:59 ` [PATCH v5 1/6] PCI: add a define for the PCI resource type mask v2 Christian König 2017-06-09 8:59 ` [PATCH v5 2/6] PCI: add resizeable BAR infrastructure v5 Christian König 2017-06-09 8:59 ` Christian König 2017-06-09 8:59 ` [PATCH v5 3/6] PCI: add functionality for resizing resources v6 Christian König 2017-06-09 8:59 ` Christian König 2017-06-14 18:54 ` Bjorn Helgaas 2017-06-09 8:59 ` [PATCH v5 4/6] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v4 Christian König 2017-06-09 8:59 ` Christian König 2017-06-09 8:59 ` [PATCH v5 5/6] drm/amdgpu: move hw generation check into amdgpu_doorbell_init Christian König 2017-06-09 8:59 ` Christian König 2017-06-09 10:14 ` Andy Shevchenko 2017-06-09 10:14 ` Andy Shevchenko 2017-06-09 8:59 ` [PATCH v5 6/6] drm/amdgpu: resize VRAM BAR for CPU access v3 Christian König 2017-06-09 8:59 ` Christian König 2017-06-14 19:00 ` Bjorn Helgaas 2017-06-14 19:27 ` Alex Deucher 2017-06-14 19:27 ` Alex Deucher 2017-06-14 19:27 ` Alex Deucher 2017-06-14 18:52 ` Resizeable PCI BAR support V5 Bjorn Helgaas 2017-06-29 23:51 ` Dieter Nützel 2017-06-29 23:51 ` Dieter Nützel 2017-06-30 12:55 ` Christian König 2017-08-06 22:30 ` Dieter Nützel 2017-08-06 22:30 ` Dieter Nützel
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