[PATCH 1/5] drm/amdgpu/atombios: use bios_scratch_reg_offset for atombios

[PATCH 1/5] drm/amdgpu/atombios: use bios_scratch_reg_offset for atombios

[Alex Deucher]

Align with the atomfirmware code.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 1e8e112..8e7a7b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -1686,7 +1686,7 @@ void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock)
 {
 	uint32_t bios_6_scratch;
 
-	bios_6_scratch = RREG32(mmBIOS_SCRATCH_6);
+	bios_6_scratch = RREG32(adev->bios_scratch_reg_offset + 6);
 
 	if (lock) {
 		bios_6_scratch |= ATOM_S6_CRITICAL_STATE;
@@ -1696,15 +1696,17 @@ void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock)
 		bios_6_scratch |= ATOM_S6_ACC_MODE;
 	}
 
-	WREG32(mmBIOS_SCRATCH_6, bios_6_scratch);
+	WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);
 }
 
 void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
 {
 	uint32_t bios_2_scratch, bios_6_scratch;
 
-	bios_2_scratch = RREG32(mmBIOS_SCRATCH_2);
-	bios_6_scratch = RREG32(mmBIOS_SCRATCH_6);
+	adev->bios_scratch_reg_offset = mmBIOS_SCRATCH_0;
+
+	bios_2_scratch = RREG32(adev->bios_scratch_reg_offset + 2);
+	bios_6_scratch = RREG32(adev->bios_scratch_reg_offset + 6);
 
 	/* let the bios control the backlight */
 	bios_2_scratch &= ~ATOM_S2_VRI_BRIGHT_ENABLE;
@@ -1715,8 +1717,8 @@ void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
 	/* clear the vbios dpms state */
 	bios_2_scratch &= ~ATOM_S2_DEVICE_DPMS_STATE;
 
-	WREG32(mmBIOS_SCRATCH_2, bios_2_scratch);
-	WREG32(mmBIOS_SCRATCH_6, bios_6_scratch);
+	WREG32(adev->bios_scratch_reg_offset + 2, bios_2_scratch);
+	WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);
 }
 
 void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev)
@@ -1724,7 +1726,7 @@ void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev)
 	int i;
 
 	for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
-		adev->bios_scratch[i] = RREG32(mmBIOS_SCRATCH_0 + i);
+		adev->bios_scratch[i] = RREG32(adev->bios_scratch_reg_offset + i);
 }
 
 void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev)
@@ -1738,20 +1740,20 @@ void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev)
 	adev->bios_scratch[7] &= ~ATOM_S7_ASIC_INIT_COMPLETE_MASK;
 
 	for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
-		WREG32(mmBIOS_SCRATCH_0 + i, adev->bios_scratch[i]);
+		WREG32(adev->bios_scratch_reg_offset + i, adev->bios_scratch[i]);
 }
 
 void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
 					      bool hung)
 {
-	u32 tmp = RREG32(mmBIOS_SCRATCH_3);
+	u32 tmp = RREG32(adev->bios_scratch_reg_offset + 3);
 
 	if (hung)
 		tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG;
 	else
 		tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG;
 
-	WREG32(mmBIOS_SCRATCH_3, tmp);
+	WREG32(adev->bios_scratch_reg_offset + 3, tmp);
 }
 
 /* Atom needs data in little endian format
-- 
2.5.5

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[PATCH 2/5] drm/amdgpu: unify some atombios/atomfirmware scratch reg functions

[Alex Deucher]

Now that we use a pointer to the scratch reg start offset,
most of the functions were duplicated.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 35 ------------------------
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h |  4 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c       | 20 +++-----------
 drivers/gpu/drm/amd/amdgpu/soc15.c               |  6 ++--
 4 files changed, 7 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 4bdda56..9ddfe34 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -66,41 +66,6 @@ void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev)
 	}
 }
 
-void amdgpu_atomfirmware_scratch_regs_save(struct amdgpu_device *adev)
-{
-	int i;
-
-	for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
-		adev->bios_scratch[i] = RREG32(adev->bios_scratch_reg_offset + i);
-}
-
-void amdgpu_atomfirmware_scratch_regs_restore(struct amdgpu_device *adev)
-{
-	int i;
-
-	/*
-	 * VBIOS will check ASIC_INIT_COMPLETE bit to decide if
-	 * execute ASIC_Init posting via driver
-	 */
-	adev->bios_scratch[7] &= ~ATOM_S7_ASIC_INIT_COMPLETE_MASK;
-
-	for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
-		WREG32(adev->bios_scratch_reg_offset + i, adev->bios_scratch[i]);
-}
-
-void amdgpu_atomfirmware_scratch_regs_engine_hung(struct amdgpu_device *adev,
-						  bool hung)
-{
-	u32 tmp = RREG32(adev->bios_scratch_reg_offset + 3);
-
-	if (hung)
-		tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG;
-	else
-		tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG;
-
-	WREG32(adev->bios_scratch_reg_offset + 3, tmp);
-}
-
 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev)
 {
 	struct atom_context *ctx = adev->mode_info.atom_context;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
index a2c3ebe..907e48f6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
@@ -26,10 +26,6 @@
 
 bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev);
 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
-void amdgpu_atomfirmware_scratch_regs_save(struct amdgpu_device *adev);
-void amdgpu_atomfirmware_scratch_regs_restore(struct amdgpu_device *adev);
-void amdgpu_atomfirmware_scratch_regs_engine_hung(struct amdgpu_device *adev,
-						  bool hung);
 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
 
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 5b1220f..63f4bed 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2438,10 +2438,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon)
 	 */
 	amdgpu_bo_evict_vram(adev);
 
-	if (adev->is_atom_fw)
-		amdgpu_atomfirmware_scratch_regs_save(adev);
-	else
-		amdgpu_atombios_scratch_regs_save(adev);
+	amdgpu_atombios_scratch_regs_save(adev);
 	pci_save_state(dev->pdev);
 	if (suspend) {
 		/* Shut down the device */
@@ -2490,10 +2487,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
 		if (r)
 			goto unlock;
 	}
-	if (adev->is_atom_fw)
-		amdgpu_atomfirmware_scratch_regs_restore(adev);
-	else
-		amdgpu_atombios_scratch_regs_restore(adev);
+	amdgpu_atombios_scratch_regs_restore(adev);
 
 	/* post card */
 	if (amdgpu_need_post(adev)) {
@@ -2926,15 +2920,9 @@ int amdgpu_gpu_reset(struct amdgpu_device *adev)
 		r = amdgpu_suspend(adev);
 
 retry:
-		if (adev->is_atom_fw)
-			amdgpu_atomfirmware_scratch_regs_save(adev);
-		else
-			amdgpu_atombios_scratch_regs_save(adev);
+		amdgpu_atombios_scratch_regs_save(adev);
 		r = amdgpu_asic_reset(adev);
-		if (adev->is_atom_fw)
-			amdgpu_atomfirmware_scratch_regs_restore(adev);
-		else
-			amdgpu_atombios_scratch_regs_restore(adev);
+		amdgpu_atombios_scratch_regs_restore(adev);
 		/* post card */
 		amdgpu_atom_asic_init(adev->mode_info.atom_context);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 9210126..8a4b76d 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -25,7 +25,7 @@
 #include <linux/module.h>
 #include "drmP.h"
 #include "amdgpu.h"
-#include "amdgpu_atomfirmware.h"
+#include "amdgpu_atombios.h"
 #include "amdgpu_ih.h"
 #include "amdgpu_uvd.h"
 #include "amdgpu_vce.h"
@@ -392,11 +392,11 @@ static void soc15_gpu_pci_config_reset(struct amdgpu_device *adev)
 
 static int soc15_asic_reset(struct amdgpu_device *adev)
 {
-	amdgpu_atomfirmware_scratch_regs_engine_hung(adev, true);
+	amdgpu_atombios_scratch_regs_engine_hung(adev, true);
 
 	soc15_gpu_pci_config_reset(adev);
 
-	amdgpu_atomfirmware_scratch_regs_engine_hung(adev, false);
+	amdgpu_atombios_scratch_regs_engine_hung(adev, false);
 
 	return 0;
 }
-- 
2.5.5

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[PATCH 3/5] drm/amdgpu/atombios: add function for whether we need asic_init

[Alex Deucher]

Check the atom scratch registers to see if asic_init is complete
or not.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 10 ++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h |  1 +
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 8e7a7b9..ce44358 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -1756,6 +1756,16 @@ void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
 	WREG32(adev->bios_scratch_reg_offset + 3, tmp);
 }
 
+bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev)
+{
+	u32 tmp = RREG32(adev->bios_scratch_reg_offset + 7);
+
+	if (tmp & ATOM_S7_ASIC_INIT_COMPLETE_MASK)
+		return false;
+	else
+		return true;
+}
+
 /* Atom needs data in little endian format
  * so swap as appropriate when copying data to
  * or from atom. Note that atom operates on
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
index 38d0fe3..b0d5d1d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
@@ -200,6 +200,7 @@ void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev);
 void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev);
 void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
 					      bool hung);
+bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev);
 
 void amdgpu_atombios_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
 int amdgpu_atombios_get_max_vddc(struct amdgpu_device *adev, u8 voltage_type,
-- 
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[PATCH 4/5] drm/amdgpu: check scratch registers to see if we need post

[Alex Deucher]

Rather than checking the CONGIG_MEMSIZE register as that may
not be reliable on some APUs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +---------
 1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 63f4bed..9d08f53 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -716,20 +716,12 @@ void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
  */
 bool amdgpu_need_post(struct amdgpu_device *adev)
 {
-	uint32_t reg;
-
 	if (adev->has_hw_reset) {
 		adev->has_hw_reset = false;
 		return true;
 	}
-	/* then check MEM_SIZE, in case the crtcs are off */
-	reg = amdgpu_asic_get_config_memsize(adev);
-
-	if ((reg != 0) && (reg != 0xffffffff))
-		return false;
-
-	return true;
 
+	return amdgpu_atombios_scratch_need_asic_init(adev);
 }
 
 static bool amdgpu_vpost_needed(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 5/5] drm/amdgpu: remove get_memsize asic callback

[Alex Deucher]

We don't need this anymore since we use bios scratch
registers instead for checking if we need asic_init.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ---
 drivers/gpu/drm/amd/amdgpu/cik.c    | 6 ------
 drivers/gpu/drm/amd/amdgpu/si.c     | 6 ------
 drivers/gpu/drm/amd/amdgpu/soc15.c  | 9 ---------
 drivers/gpu/drm/amd/amdgpu/vi.c     | 6 ------
 5 files changed, 30 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ab1dad2..466c97e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1378,8 +1378,6 @@ struct amdgpu_asic_funcs {
 	/* static power management */
 	int (*get_pcie_lanes)(struct amdgpu_device *adev);
 	void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
-	/* get config memsize register */
-	u32 (*get_config_memsize)(struct amdgpu_device *adev);
 };
 
 /*
@@ -1875,7 +1873,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))
 #define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
 #define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
-#define amdgpu_asic_get_config_memsize(adev) (adev)->asic_funcs->get_config_memsize((adev))
 #define amdgpu_gart_flush_gpu_tlb(adev, vmid) (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
 #define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) (adev)->gart.gart_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))
 #define amdgpu_gart_get_vm_pde(adev, addr) (adev)->gart.gart_funcs->get_vm_pde((adev), (addr))
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index 6ce9f80..79a0434 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1212,11 +1212,6 @@ static int cik_asic_reset(struct amdgpu_device *adev)
 	return r;
 }
 
-static u32 cik_get_config_memsize(struct amdgpu_device *adev)
-{
-	return RREG32(mmCONFIG_MEMSIZE);
-}
-
 static int cik_set_uvd_clock(struct amdgpu_device *adev, u32 clock,
 			      u32 cntl_reg, u32 status_reg)
 {
@@ -1646,7 +1641,6 @@ static const struct amdgpu_asic_funcs cik_asic_funcs =
 	.get_xclk = &cik_get_xclk,
 	.set_uvd_clocks = &cik_set_uvd_clocks,
 	.set_vce_clocks = &cik_set_vce_clocks,
-	.get_config_memsize = &cik_get_config_memsize,
 };
 
 static int cik_common_early_init(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 3bd6332..02ce8ff 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1156,11 +1156,6 @@ static int si_asic_reset(struct amdgpu_device *adev)
 	return 0;
 }
 
-static u32 si_get_config_memsize(struct amdgpu_device *adev)
-{
-	return RREG32(mmCONFIG_MEMSIZE);
-}
-
 static void si_vga_set_state(struct amdgpu_device *adev, bool state)
 {
 	uint32_t temp;
@@ -1212,7 +1207,6 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
 	.get_xclk = &si_get_xclk,
 	.set_uvd_clocks = &si_set_uvd_clocks,
 	.set_vce_clocks = NULL,
-	.get_config_memsize = &si_get_config_memsize,
 };
 
 static uint32_t si_get_rev_id(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 8a4b76d..b3cb8f6 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -198,14 +198,6 @@ static void soc15_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
 	spin_unlock_irqrestore(&adev->didt_idx_lock, flags);
 }
 
-static u32 soc15_get_config_memsize(struct amdgpu_device *adev)
-{
-	if (adev->flags & AMD_IS_APU)
-		return nbio_v7_0_get_memsize(adev);
-	else
-		return nbio_v6_1_get_memsize(adev);
-}
-
 static const u32 vega10_golden_init[] =
 {
 };
@@ -553,7 +545,6 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs =
 	.get_xclk = &soc15_get_xclk,
 	.set_uvd_clocks = &soc15_set_uvd_clocks,
 	.set_vce_clocks = &soc15_set_vce_clocks,
-	.get_config_memsize = &soc15_get_config_memsize,
 };
 
 static int soc15_common_early_init(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 18bb3cb..3e58c31 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -706,11 +706,6 @@ static int vi_asic_reset(struct amdgpu_device *adev)
 	return r;
 }
 
-static u32 vi_get_config_memsize(struct amdgpu_device *adev)
-{
-	return RREG32(mmCONFIG_MEMSIZE);
-}
-
 static int vi_set_uvd_clock(struct amdgpu_device *adev, u32 clock,
 			u32 cntl_reg, u32 status_reg)
 {
@@ -862,7 +857,6 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
 	.get_xclk = &vi_get_xclk,
 	.set_uvd_clocks = &vi_set_uvd_clocks,
 	.set_vce_clocks = &vi_set_vce_clocks,
-	.get_config_memsize = &vi_get_config_memsize,
 };
 
 #define CZ_REV_BRISTOL(rev)	 \
-- 
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Re: [PATCH 1/5] drm/amdgpu/atombios: use bios_scratch_reg_offset for atombios

[Christian König]

Am 30.06.2017 um 23:32 schrieb Alex Deucher:
> Align with the atomfirmware code.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Patch #1 and #2 in this series are Acked-by: Christian König 
<christian.koenig@amd.com>.

Patch #3-#5 are Reviewed-by: Christian König <christian.koenig@amd.com>.

Regards,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 22 ++++++++++++----------
>   1 file changed, 12 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> index 1e8e112..8e7a7b9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> @@ -1686,7 +1686,7 @@ void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock)
>   {
>   	uint32_t bios_6_scratch;
>   
> -	bios_6_scratch = RREG32(mmBIOS_SCRATCH_6);
> +	bios_6_scratch = RREG32(adev->bios_scratch_reg_offset + 6);
>   
>   	if (lock) {
>   		bios_6_scratch |= ATOM_S6_CRITICAL_STATE;
> @@ -1696,15 +1696,17 @@ void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock)
>   		bios_6_scratch |= ATOM_S6_ACC_MODE;
>   	}
>   
> -	WREG32(mmBIOS_SCRATCH_6, bios_6_scratch);
> +	WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);
>   }
>   
>   void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
>   {
>   	uint32_t bios_2_scratch, bios_6_scratch;
>   
> -	bios_2_scratch = RREG32(mmBIOS_SCRATCH_2);
> -	bios_6_scratch = RREG32(mmBIOS_SCRATCH_6);
> +	adev->bios_scratch_reg_offset = mmBIOS_SCRATCH_0;
> +
> +	bios_2_scratch = RREG32(adev->bios_scratch_reg_offset + 2);
> +	bios_6_scratch = RREG32(adev->bios_scratch_reg_offset + 6);
>   
>   	/* let the bios control the backlight */
>   	bios_2_scratch &= ~ATOM_S2_VRI_BRIGHT_ENABLE;
> @@ -1715,8 +1717,8 @@ void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
>   	/* clear the vbios dpms state */
>   	bios_2_scratch &= ~ATOM_S2_DEVICE_DPMS_STATE;
>   
> -	WREG32(mmBIOS_SCRATCH_2, bios_2_scratch);
> -	WREG32(mmBIOS_SCRATCH_6, bios_6_scratch);
> +	WREG32(adev->bios_scratch_reg_offset + 2, bios_2_scratch);
> +	WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);
>   }
>   
>   void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev)
> @@ -1724,7 +1726,7 @@ void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev)
>   	int i;
>   
>   	for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
> -		adev->bios_scratch[i] = RREG32(mmBIOS_SCRATCH_0 + i);
> +		adev->bios_scratch[i] = RREG32(adev->bios_scratch_reg_offset + i);
>   }
>   
>   void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev)
> @@ -1738,20 +1740,20 @@ void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev)
>   	adev->bios_scratch[7] &= ~ATOM_S7_ASIC_INIT_COMPLETE_MASK;
>   
>   	for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
> -		WREG32(mmBIOS_SCRATCH_0 + i, adev->bios_scratch[i]);
> +		WREG32(adev->bios_scratch_reg_offset + i, adev->bios_scratch[i]);
>   }
>   
>   void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
>   					      bool hung)
>   {
> -	u32 tmp = RREG32(mmBIOS_SCRATCH_3);
> +	u32 tmp = RREG32(adev->bios_scratch_reg_offset + 3);
>   
>   	if (hung)
>   		tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG;
>   	else
>   		tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG;
>   
> -	WREG32(mmBIOS_SCRATCH_3, tmp);
> +	WREG32(adev->bios_scratch_reg_offset + 3, tmp);
>   }
>   
>   /* Atom needs data in little endian format


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Re: [PATCH 4/5] drm/amdgpu: check scratch registers to see if we need post

[Zhang, Jerry (Junwei)]

On 07/01/2017 05:32 AM, Alex Deucher wrote:
> Rather than checking the CONGIG_MEMSIZE register as that may
> not be reliable on some APUs.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +---------
>   1 file changed, 1 insertion(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 63f4bed..9d08f53 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -716,20 +716,12 @@ void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
>    */
>   bool amdgpu_need_post(struct amdgpu_device *adev)
>   {
> -	uint32_t reg;
> -
>   	if (adev->has_hw_reset) {
>   		adev->has_hw_reset = false;
>   		return true;
>   	}
> -	/* then check MEM_SIZE, in case the crtcs are off */
> -	reg = amdgpu_asic_get_config_memsize(adev);

Do we still need it for SI?

Jerry

> -
> -	if ((reg != 0) && (reg != 0xffffffff))
> -		return false;
> -
> -	return true;
>
> +	return amdgpu_atombios_scratch_need_asic_init(adev);
>   }
>
>   static bool amdgpu_vpost_needed(struct amdgpu_device *adev)
>
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RE: [PATCH 4/5] drm/amdgpu: check scratch registers to see if we need post

[Deucher, Alexander]

> -----Original Message-----
> From: Zhang, Jerry
> Sent: Thursday, July 06, 2017 2:08 AM
> To: Alex Deucher; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: Re: [PATCH 4/5] drm/amdgpu: check scratch registers to see if we
> need post
> 
> On 07/01/2017 05:32 AM, Alex Deucher wrote:
> > Rather than checking the CONGIG_MEMSIZE register as that may
> > not be reliable on some APUs.
> >
> > Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> > ---
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +---------
> >   1 file changed, 1 insertion(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > index 63f4bed..9d08f53 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > @@ -716,20 +716,12 @@ void amdgpu_gtt_location(struct amdgpu_device
> *adev, struct amdgpu_mc *mc)
> >    */
> >   bool amdgpu_need_post(struct amdgpu_device *adev)
> >   {
> > -	uint32_t reg;
> > -
> >   	if (adev->has_hw_reset) {
> >   		adev->has_hw_reset = false;
> >   		return true;
> >   	}
> > -	/* then check MEM_SIZE, in case the crtcs are off */
> > -	reg = amdgpu_asic_get_config_memsize(adev);
> 
> Do we still need it for SI?

Yes, I sent out a v2 of the patch.

Alex

> 
> Jerry
> 
> > -
> > -	if ((reg != 0) && (reg != 0xffffffff))
> > -		return false;
> > -
> > -	return true;
> >
> > +	return amdgpu_atombios_scratch_need_asic_init(adev);
> >   }
> >
> >   static bool amdgpu_vpost_needed(struct amdgpu_device *adev)
> >
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