* [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon, Magnus,
R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
used for several purposes. One such purpose is holding a jump stub for CPU
core bringup.
This patch series adds the SRAM blocks to the various DTS files, following
the generic DT bindings for "mmio-sram" in
Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
stub for CPU core bringup will be handled in a follow-up series.
Thanks!
Geert Uytterhoeven (7):
ARM: dts: r8a7743: Add Inter Connect RAM
ARM: dts: r8a7745: Add Inter Connect RAM
ARM: dts: r8a7790: Add Inter Connect RAM
ARM: dts: r8a7791: Add Inter Connect RAM
ARM: dts: r8a7792: Add Inter Connect RAM
ARM: dts: r8a7793: Add Inter Connect RAM
ARM: dts: r8a7794: Add Inter Connect RAM
arch/arm/boot/dts/r8a7743.dtsi | 15 +++++++++++++++
arch/arm/boot/dts/r8a7745.dtsi | 15 +++++++++++++++
arch/arm/boot/dts/r8a7790.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7791.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7792.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7793.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7794.dtsi | 10 ++++++++++
7 files changed, 80 insertions(+)
--
2.7.4
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
Hi Simon, Magnus,
R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
used for several purposes. One such purpose is holding a jump stub for CPU
core bringup.
This patch series adds the SRAM blocks to the various DTS files, following
the generic DT bindings for "mmio-sram" in
Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
stub for CPU core bringup will be handled in a follow-up series.
Thanks!
Geert Uytterhoeven (7):
ARM: dts: r8a7743: Add Inter Connect RAM
ARM: dts: r8a7745: Add Inter Connect RAM
ARM: dts: r8a7790: Add Inter Connect RAM
ARM: dts: r8a7791: Add Inter Connect RAM
ARM: dts: r8a7792: Add Inter Connect RAM
ARM: dts: r8a7793: Add Inter Connect RAM
ARM: dts: r8a7794: Add Inter Connect RAM
arch/arm/boot/dts/r8a7743.dtsi | 15 +++++++++++++++
arch/arm/boot/dts/r8a7745.dtsi | 15 +++++++++++++++
arch/arm/boot/dts/r8a7790.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7791.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7792.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7793.dtsi | 10 ++++++++++
arch/arm/boot/dts/r8a7794.dtsi | 10 ++++++++++
7 files changed, 80 insertions(+)
--
2.7.4
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH 2/7] ARM: dts: r8a7745: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
@ 2017-07-04 15:23 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7745.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 2feb0084bb3b1b51..88cf92bcd2f9b4fc 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -468,6 +468,21 @@
status = "disabled";
};
+ icram2: sram@e6300000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe6300000 0 0x40000>;
+ };
+
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7745";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 2/7] ARM: dts: r8a7745: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7745.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 2feb0084bb3b1b51..88cf92bcd2f9b4fc 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -468,6 +468,21 @@
status = "disabled";
};
+ icram2: sram at e6300000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe6300000 0 0x40000>;
+ };
+
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet at ee700000 {
compatible = "renesas,ether-r8a7745";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 3/7] ARM: dts: r8a7790: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
@ 2017-07-04 15:23 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
R-Car H2 has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 2805a8608d4ba007..4ee34995573cf505 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -830,6 +830,16 @@
status = "disabled";
};
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7790";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 3/7] ARM: dts: r8a7790: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
R-Car H2 has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 2805a8608d4ba007..4ee34995573cf505 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -830,6 +830,16 @@
status = "disabled";
};
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet at ee700000 {
compatible = "renesas,ether-r8a7790";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 5/7] ARM: dts: r8a7792: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
@ 2017-07-04 15:23 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
R-Car V2H has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7792.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 0efecb232ee52ce0..136a86ac64974adb 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -465,6 +465,16 @@
status = "disabled";
};
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7792";
reg = <0 0xee100000 0 0x328>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 5/7] ARM: dts: r8a7792: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
R-Car V2H has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7792.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 0efecb232ee52ce0..136a86ac64974adb 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -465,6 +465,16 @@
status = "disabled";
};
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
sdhi0: sd at ee100000 {
compatible = "renesas,sdhi-r8a7792";
reg = <0 0xee100000 0 0x328>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
[parent not found: <1499181798-28859-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>]
* [PATCH 1/7] ARM: dts: r8a7743: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
(?)
@ 2017-07-04 15:23 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
RZ/G1M has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
arch/arm/boot/dts/r8a7743.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 0ddac81742e4cdc7..b8ce935f6fb196fe 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -468,6 +468,21 @@
status = "disabled";
};
+ icram2: sram@e6300000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe6300000 0 0x40000>;
+ };
+
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7743";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 1/7] ARM: dts: r8a7743: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
RZ/G1M has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7743.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 0ddac81742e4cdc7..b8ce935f6fb196fe 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -468,6 +468,21 @@
status = "disabled";
};
+ icram2: sram at e6300000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe6300000 0 0x40000>;
+ };
+
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet at ee700000 {
compatible = "renesas,ether-r8a7743";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 1/7] ARM: dts: r8a7743: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
RZ/G1M has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7743.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 0ddac81742e4cdc7..b8ce935f6fb196fe 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -468,6 +468,21 @@
status = "disabled";
};
+ icram2: sram@e6300000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe6300000 0 0x40000>;
+ };
+
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7743";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 4/7] ARM: dts: r8a7791: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
(?)
@ 2017-07-04 15:23 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
arch/arm/boot/dts/r8a7791.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index bd93f699ad840987..f4748a9cb0375e4d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -890,6 +890,16 @@
status = "disabled";
};
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7791";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 4/7] ARM: dts: r8a7791: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index bd93f699ad840987..f4748a9cb0375e4d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -890,6 +890,16 @@
status = "disabled";
};
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet at ee700000 {
compatible = "renesas,ether-r8a7791";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 4/7] ARM: dts: r8a7791: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index bd93f699ad840987..f4748a9cb0375e4d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -890,6 +890,16 @@
status = "disabled";
};
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7791";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 6/7] ARM: dts: r8a7793: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
(?)
@ 2017-07-04 15:23 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
R-Car M2-N has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
arch/arm/boot/dts/r8a7793.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 13b980f27bbc885f..bc6a44272f555215 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -848,6 +848,16 @@
status = "disabled";
};
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7793";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 6/7] ARM: dts: r8a7793: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
R-Car M2-N has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7793.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 13b980f27bbc885f..bc6a44272f555215 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -848,6 +848,16 @@
status = "disabled";
};
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet at ee700000 {
compatible = "renesas,ether-r8a7793";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 6/7] ARM: dts: r8a7793: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
R-Car M2-N has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7793.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 13b980f27bbc885f..bc6a44272f555215 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -848,6 +848,16 @@
status = "disabled";
};
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7793";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 7/7] ARM: dts: r8a7794: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
@ 2017-07-04 15:23 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, devicetree, Geert Uytterhoeven
R-Car E2 has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 7d9a81d970d87c6b..78973cee7185ffe6 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -588,6 +588,16 @@
status = "disabled";
};
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7794";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 7/7] ARM: dts: r8a7794: Add Inter Connect RAM
@ 2017-07-04 15:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
R-Car E2 has 2 regions of Inter Connect RAM (72 + 4 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 7d9a81d970d87c6b..78973cee7185ffe6 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -588,6 +588,16 @@
status = "disabled";
};
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet at ee700000 {
compatible = "renesas,ether-r8a7794";
reg = <0 0xee700000 0 0x400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
2017-07-04 15:23 ` Geert Uytterhoeven
@ 2017-07-10 8:40 ` Simon Horman
-1 siblings, 0 replies; 26+ messages in thread
From: Simon Horman @ 2017-07-10 8:40 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, linux-renesas-soc, linux-arm-kernel, devicetree
On Tue, Jul 04, 2017 at 05:23:11PM +0200, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
> used for several purposes. One such purpose is holding a jump stub for CPU
> core bringup.
>
> This patch series adds the SRAM blocks to the various DTS files, following
> the generic DT bindings for "mmio-sram" in
> Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
> stub for CPU core bringup will be handled in a follow-up series.
>
> Thanks!
Geert, these seem nice and clean to me.
Are they ready to be applied?
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
@ 2017-07-10 8:40 ` Simon Horman
0 siblings, 0 replies; 26+ messages in thread
From: Simon Horman @ 2017-07-10 8:40 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 04, 2017 at 05:23:11PM +0200, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
> used for several purposes. One such purpose is holding a jump stub for CPU
> core bringup.
>
> This patch series adds the SRAM blocks to the various DTS files, following
> the generic DT bindings for "mmio-sram" in
> Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
> stub for CPU core bringup will be handled in a follow-up series.
>
> Thanks!
Geert, these seem nice and clean to me.
Are they ready to be applied?
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
2017-07-10 8:40 ` Simon Horman
@ 2017-07-10 8:45 ` Geert Uytterhoeven
-1 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-10 8:45 UTC (permalink / raw)
To: Simon Horman
Cc: Geert Uytterhoeven, Magnus Damm, Linux-Renesas, linux-arm-kernel,
devicetree
Hi Simon,
On Mon, Jul 10, 2017 at 10:40 AM, Simon Horman <horms@verge.net.au> wrote:
> On Tue, Jul 04, 2017 at 05:23:11PM +0200, Geert Uytterhoeven wrote:
>> R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
>> used for several purposes. One such purpose is holding a jump stub for CPU
>> core bringup.
>>
>> This patch series adds the SRAM blocks to the various DTS files, following
>> the generic DT bindings for "mmio-sram" in
>> Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
>> stub for CPU core bringup will be handled in a follow-up series.
>>
>> Thanks!
>
> Geert, these seem nice and clean to me.
> Are they ready to be applied?
I think they are.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
@ 2017-07-10 8:45 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2017-07-10 8:45 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
On Mon, Jul 10, 2017 at 10:40 AM, Simon Horman <horms@verge.net.au> wrote:
> On Tue, Jul 04, 2017 at 05:23:11PM +0200, Geert Uytterhoeven wrote:
>> R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
>> used for several purposes. One such purpose is holding a jump stub for CPU
>> core bringup.
>>
>> This patch series adds the SRAM blocks to the various DTS files, following
>> the generic DT bindings for "mmio-sram" in
>> Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
>> stub for CPU core bringup will be handled in a follow-up series.
>>
>> Thanks!
>
> Geert, these seem nice and clean to me.
> Are they ready to be applied?
I think they are.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
2017-07-10 8:45 ` Geert Uytterhoeven
@ 2017-07-10 9:26 ` Simon Horman
-1 siblings, 0 replies; 26+ messages in thread
From: Simon Horman @ 2017-07-10 9:26 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Geert Uytterhoeven, Magnus Damm, Linux-Renesas, linux-arm-kernel,
devicetree
On Mon, Jul 10, 2017 at 10:45:23AM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Mon, Jul 10, 2017 at 10:40 AM, Simon Horman <horms@verge.net.au> wrote:
> > On Tue, Jul 04, 2017 at 05:23:11PM +0200, Geert Uytterhoeven wrote:
> >> R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
> >> used for several purposes. One such purpose is holding a jump stub for CPU
> >> core bringup.
> >>
> >> This patch series adds the SRAM blocks to the various DTS files, following
> >> the generic DT bindings for "mmio-sram" in
> >> Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
> >> stub for CPU core bringup will be handled in a follow-up series.
> >>
> >> Thanks!
> >
> > Geert, these seem nice and clean to me.
> > Are they ready to be applied?
>
> I think they are.
Thanks, all patches applied for v4.14.
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 0/7] ARM: dts: renesas: Add Inter Connect RAM
@ 2017-07-10 9:26 ` Simon Horman
0 siblings, 0 replies; 26+ messages in thread
From: Simon Horman @ 2017-07-10 9:26 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jul 10, 2017 at 10:45:23AM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Mon, Jul 10, 2017 at 10:40 AM, Simon Horman <horms@verge.net.au> wrote:
> > On Tue, Jul 04, 2017 at 05:23:11PM +0200, Geert Uytterhoeven wrote:
> >> R-Car Gen2 and RZ/G1 SoCs contain two or three blocks of SRAM, which can be
> >> used for several purposes. One such purpose is holding a jump stub for CPU
> >> core bringup.
> >>
> >> This patch series adds the SRAM blocks to the various DTS files, following
> >> the generic DT bindings for "mmio-sram" in
> >> Documentation/devicetree/bindings/sram/sram.txt. Reserving SRAM for jump
> >> stub for CPU core bringup will be handled in a follow-up series.
> >>
> >> Thanks!
> >
> > Geert, these seem nice and clean to me.
> > Are they ready to be applied?
>
> I think they are.
Thanks, all patches applied for v4.14.
^ permalink raw reply [flat|nested] 26+ messages in thread