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From: Sinan Kaya <okaya@codeaurora.org>
To: James Hogan <jhogan@kernel.org>
Cc: linux-mips@linux-mips.org, arnd@arndb.de, timur@codeaurora.org,
	sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX()
Date: Wed, 11 Apr 2018 13:10:41 -0400	[thread overview]
Message-ID: <14a663f6-2ea5-230b-2cd0-e42d05d0d7ea@codeaurora.org> (raw)
In-Reply-To: <0f1a4719-9a6f-0df0-7fd9-a25c10e824f5@codeaurora.org>

On 4/7/2018 5:43 PM, Sinan Kaya wrote:
> On 4/6/2018 5:26 PM, James Hogan wrote:
>> On Fri, Apr 06, 2018 at 02:15:57PM -0400, Sinan Kaya wrote:
>>> On 4/5/2018 9:34 PM, Sinan Kaya wrote:
>>>> Can we get these merged to 4.17? 
>>>>
>>>> There was a consensus to fix the architectures having API violation issues.
>>>> https://www.mail-archive.com/netdev@vger.kernel.org/msg225971.html
>>>>
>>>>
>>>
>>> Any news on the MIPS front? Is this something that Arnd can merge? or does it have
>>> to go through the MIPS tree.
>>
>> It needs some MIPS input really. I'll try and take a look soon. Thanks
>> for the nudge.
>>
>>> It feels like the MIPS is dead since nobody replied to me in the last few weeks on
>>> a very important topic.
>>
>> Not dead, just both maintainers heavily distracted by real life right
>> now (which sadly, for me at least, trumps this very important topic) and
>> doing the best they can given the circumstances.
> 
> Thanks for the reply. Glad to hear somebody cares.


How is the likelihood of getting this fixed on 4.17 kernel? There was an agreement
to fix all architectures. MIPS is the only one left.

> 
>>
>> Cheers
>> James
>>
> 
> 


-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

WARNING: multiple messages have this Message-ID (diff)
From: okaya@codeaurora.org (Sinan Kaya)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX()
Date: Wed, 11 Apr 2018 13:10:41 -0400	[thread overview]
Message-ID: <14a663f6-2ea5-230b-2cd0-e42d05d0d7ea@codeaurora.org> (raw)
In-Reply-To: <0f1a4719-9a6f-0df0-7fd9-a25c10e824f5@codeaurora.org>

On 4/7/2018 5:43 PM, Sinan Kaya wrote:
> On 4/6/2018 5:26 PM, James Hogan wrote:
>> On Fri, Apr 06, 2018 at 02:15:57PM -0400, Sinan Kaya wrote:
>>> On 4/5/2018 9:34 PM, Sinan Kaya wrote:
>>>> Can we get these merged to 4.17? 
>>>>
>>>> There was a consensus to fix the architectures having API violation issues.
>>>> https://www.mail-archive.com/netdev at vger.kernel.org/msg225971.html
>>>>
>>>>
>>>
>>> Any news on the MIPS front? Is this something that Arnd can merge? or does it have
>>> to go through the MIPS tree.
>>
>> It needs some MIPS input really. I'll try and take a look soon. Thanks
>> for the nudge.
>>
>>> It feels like the MIPS is dead since nobody replied to me in the last few weeks on
>>> a very important topic.
>>
>> Not dead, just both maintainers heavily distracted by real life right
>> now (which sadly, for me at least, trumps this very important topic) and
>> doing the best they can given the circumstances.
> 
> Thanks for the reply. Glad to hear somebody cares.


How is the likelihood of getting this fixed on 4.17 kernel? There was an agreement
to fix all architectures. MIPS is the only one left.

> 
>>
>> Cheers
>> James
>>
> 
> 


-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

  reply	other threads:[~2018-04-11 17:10 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-03 12:55 [PATCH v3 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation Sinan Kaya
2018-04-03 12:55 ` Sinan Kaya
2018-04-03 12:55 ` [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX() Sinan Kaya
2018-04-03 12:55   ` Sinan Kaya
2018-04-06  1:34   ` Sinan Kaya
2018-04-06  1:34     ` Sinan Kaya
2018-04-06 18:15     ` Sinan Kaya
2018-04-06 18:15       ` Sinan Kaya
2018-04-06 21:26       ` James Hogan
2018-04-06 21:26         ` James Hogan
2018-04-07 21:43         ` Sinan Kaya
2018-04-07 21:43           ` Sinan Kaya
2018-04-11 17:10           ` Sinan Kaya [this message]
2018-04-11 17:10             ` Sinan Kaya
2018-04-11 20:26             ` James Hogan
2018-04-11 20:26               ` James Hogan
2018-04-11 20:26               ` James Hogan
2018-04-11 20:26               ` James Hogan
2018-04-11 20:48               ` Sinan Kaya
2018-04-11 20:48                 ` Sinan Kaya
2018-04-11 17:04         ` Maciej W. Rozycki
2018-04-11 17:04           ` Maciej W. Rozycki
2018-04-11 17:04           ` Maciej W. Rozycki
2018-04-11 17:04           ` Maciej W. Rozycki
2018-04-12 21:51   ` James Hogan
2018-04-12 21:51     ` James Hogan
2018-04-12 21:51     ` James Hogan
2018-04-12 21:58     ` James Hogan
2018-04-12 21:58       ` James Hogan
2018-04-12 22:38       ` Sinan Kaya
2018-04-12 22:38         ` Sinan Kaya
2018-04-12 22:20     ` Sinan Kaya
2018-04-12 22:20       ` Sinan Kaya
2018-04-13 15:41     ` David Laight
2018-04-13 15:41       ` David Laight
2018-04-13 15:41       ` David Laight
2018-04-13 16:36       ` Sinan Kaya
2018-04-13 16:36         ` Sinan Kaya
2018-04-13 16:36         ` Sinan Kaya
2018-04-13 16:36         ` Sinan Kaya

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