* [PATCH i-g-t 0/1] tests/chamelium: Detect analogue bridges and handle EDID accordingly
@ 2017-07-06 13:27 Paul Kocialkowski
2017-07-06 13:27 ` [PATCH i-g-t] " Paul Kocialkowski
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Paul Kocialkowski @ 2017-07-06 13:27 UTC (permalink / raw)
To: intel-gfx; +Cc: Lyude
This patch applies on top of: chamelium: Add support for VGA frame
comparison testing.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH i-g-t] tests/chamelium: Detect analogue bridges and handle EDID accordingly
2017-07-06 13:27 [PATCH i-g-t 0/1] tests/chamelium: Detect analogue bridges and handle EDID accordingly Paul Kocialkowski
@ 2017-07-06 13:27 ` Paul Kocialkowski
2017-07-12 15:00 ` [PATCH i-g-t v2 0/1] " Paul Kocialkowski
2017-07-19 13:50 ` [PATCH i-g-t v3 0/1] " Paul Kocialkowski
2 siblings, 0 replies; 8+ messages in thread
From: Paul Kocialkowski @ 2017-07-06 13:27 UTC (permalink / raw)
To: intel-gfx; +Cc: Lyude
Nowadays, many VGA connectors are not actually native VGA but use a
discrete bridge to a digital connector. These bridges usually enforce
their own EDID instead of the one supplied by the chamelium.
Thus, the EDID read test for VGA is not relevant in that case and
should be skipped. Reported modes may also go beyond what the chamelium
can support. Thus, only supported resolutions should be tested for the
frame dump test and others should be pruned.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@linux.intel.com>
---
tests/chamelium.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
diff --git a/tests/chamelium.c b/tests/chamelium.c
index 5ccdee7c..d26846ba 100644
--- a/tests/chamelium.c
+++ b/tests/chamelium.c
@@ -106,6 +106,76 @@ wait_for_connector(data_t *data, struct chamelium_port *port,
igt_assert(finished);
}
+static int chamelium_vga_modes[][2] = {
+ { 1600, 1200 },
+ { 1920, 1200 },
+ { 1920, 1080 },
+ { 1680, 1050 },
+ { 1280, 1024 },
+ { 1280, 960 },
+ { 1440, 900 },
+ { 1280, 800 },
+ { 1024, 768 },
+ { 1360, 768 },
+ { 1280, 720 },
+ { 800, 600 },
+ { 640, 480 },
+ { -1, -1 },
+};
+
+static bool
+prune_vga_mode(data_t *data, drmModeModeInfo *mode)
+{
+ int i = 0;
+
+ while (chamelium_vga_modes[i][0] != -1) {
+ if (mode->hdisplay == chamelium_vga_modes[i][0] &&
+ mode->vdisplay == chamelium_vga_modes[i][1])
+ return false;
+
+ i++;
+ }
+
+ return true;
+}
+
+static bool
+check_analogue_bridge(data_t *data, struct chamelium_port *port)
+{
+ drmModePropertyBlobPtr edid_blob = NULL;
+ drmModeConnector *connector = chamelium_port_get_connector(
+ data->chamelium, port, false);
+ uint64_t edid_blob_id;
+ unsigned char *edid;
+ char edid_vendor[3];
+
+ if (chamelium_port_get_type(port) != DRM_MODE_CONNECTOR_VGA)
+ return false;
+
+ igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id,
+ DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL,
+ &edid_blob_id, NULL));
+ igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd,
+ edid_blob_id));
+
+ edid = (unsigned char *) edid_blob->data;
+
+ edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@';
+ edid_vendor[1] = (((edid[8] & 0x03) << 3) |
+ ((edid[9] & 0xe0) >> 5)) + '@';
+ edid_vendor[2] = (edid[9] & 0x1f) + '@';
+
+ /* Analogue bridges provide their own EDID */
+ if (edid_vendor[0] != 'I' || edid_vendor[1] != 'G' ||
+ edid_vendor[0] != 'T')
+ return true;
+
+ drmModeFreePropertyBlob(edid_blob);
+ drmModeFreeConnector(connector);
+
+ return false;
+}
+
static void
reset_state(data_t *data, struct chamelium_port *port)
{
@@ -170,6 +240,8 @@ test_edid_read(data_t *data, struct chamelium_port *port,
chamelium_plug(data->chamelium, port);
wait_for_connector(data, port, DRM_MODE_CONNECTED, true);
+ igt_skip_on(check_analogue_bridge(data, port));
+
igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id,
DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL,
&edid_blob_id, NULL));
@@ -487,6 +559,7 @@ test_analogue_frame_dump(data_t *data, struct chamelium_port *port)
const char *connector_name;
char *frame_dump_path;
char path[PATH_MAX];
+ bool bridge;
bool eq;
output = prepare_output(data, &display, port);
@@ -497,9 +570,14 @@ test_analogue_frame_dump(data_t *data, struct chamelium_port *port)
connector_name = kmstest_connector_type_str(connector->connector_type);
frame_dump_path = chamelium_get_frame_dump_path(data->chamelium);
+ bridge = check_analogue_bridge(data, port);
+
for (i = 0; i < connector->count_modes; i++) {
mode = &connector->modes[i];
+ if (bridge && prune_vga_mode(data, mode))
+ continue;
+
fb_id = igt_create_color_pattern_fb(data->drm_fd,
mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
--
2.13.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH i-g-t v2 0/1] tests/chamelium: Detect analogue bridges and handle EDID accordingly
2017-07-06 13:27 [PATCH i-g-t 0/1] tests/chamelium: Detect analogue bridges and handle EDID accordingly Paul Kocialkowski
2017-07-06 13:27 ` [PATCH i-g-t] " Paul Kocialkowski
@ 2017-07-12 15:00 ` Paul Kocialkowski
2017-07-12 15:00 ` [PATCH i-g-t v2] " Paul Kocialkowski
2017-07-19 13:50 ` [PATCH i-g-t v3 0/1] " Paul Kocialkowski
2 siblings, 1 reply; 8+ messages in thread
From: Paul Kocialkowski @ 2017-07-12 15:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Lyude
Changes since v1:
* Rebased on top of the new revisions of the series this depends on
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH i-g-t v2] tests/chamelium: Detect analogue bridges and handle EDID accordingly
2017-07-12 15:00 ` [PATCH i-g-t v2 0/1] " Paul Kocialkowski
@ 2017-07-12 15:00 ` Paul Kocialkowski
0 siblings, 0 replies; 8+ messages in thread
From: Paul Kocialkowski @ 2017-07-12 15:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Lyude
Nowadays, many VGA connectors are not actually native VGA but use a
discrete bridge to a digital connector. These bridges usually enforce
their own EDID instead of the one supplied by the chamelium.
Thus, the EDID read test for VGA is not relevant in that case and
should be skipped. Reported modes may also go beyond what the chamelium
can support. Thus, only supported resolutions should be tested for the
frame dump test and others should be pruned.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@linux.intel.com>
---
tests/chamelium.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
diff --git a/tests/chamelium.c b/tests/chamelium.c
index baaa424b..499672eb 100644
--- a/tests/chamelium.c
+++ b/tests/chamelium.c
@@ -105,6 +105,76 @@ wait_for_connector(data_t *data, struct chamelium_port *port,
igt_assert(finished);
}
+static int chamelium_vga_modes[][2] = {
+ { 1600, 1200 },
+ { 1920, 1200 },
+ { 1920, 1080 },
+ { 1680, 1050 },
+ { 1280, 1024 },
+ { 1280, 960 },
+ { 1440, 900 },
+ { 1280, 800 },
+ { 1024, 768 },
+ { 1360, 768 },
+ { 1280, 720 },
+ { 800, 600 },
+ { 640, 480 },
+ { -1, -1 },
+};
+
+static bool
+prune_vga_mode(data_t *data, drmModeModeInfo *mode)
+{
+ int i = 0;
+
+ while (chamelium_vga_modes[i][0] != -1) {
+ if (mode->hdisplay == chamelium_vga_modes[i][0] &&
+ mode->vdisplay == chamelium_vga_modes[i][1])
+ return false;
+
+ i++;
+ }
+
+ return true;
+}
+
+static bool
+check_analogue_bridge(data_t *data, struct chamelium_port *port)
+{
+ drmModePropertyBlobPtr edid_blob = NULL;
+ drmModeConnector *connector = chamelium_port_get_connector(
+ data->chamelium, port, false);
+ uint64_t edid_blob_id;
+ unsigned char *edid;
+ char edid_vendor[3];
+
+ if (chamelium_port_get_type(port) != DRM_MODE_CONNECTOR_VGA)
+ return false;
+
+ igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id,
+ DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL,
+ &edid_blob_id, NULL));
+ igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd,
+ edid_blob_id));
+
+ edid = (unsigned char *) edid_blob->data;
+
+ edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@';
+ edid_vendor[1] = (((edid[8] & 0x03) << 3) |
+ ((edid[9] & 0xe0) >> 5)) + '@';
+ edid_vendor[2] = (edid[9] & 0x1f) + '@';
+
+ /* Analogue bridges provide their own EDID */
+ if (edid_vendor[0] != 'I' || edid_vendor[1] != 'G' ||
+ edid_vendor[0] != 'T')
+ return true;
+
+ drmModeFreePropertyBlob(edid_blob);
+ drmModeFreeConnector(connector);
+
+ return false;
+}
+
static void
reset_state(data_t *data, struct chamelium_port *port)
{
@@ -168,6 +238,8 @@ test_edid_read(data_t *data, struct chamelium_port *port,
chamelium_plug(data->chamelium, port);
wait_for_connector(data, port, DRM_MODE_CONNECTED);
+ igt_skip_on(check_analogue_bridge(data, port));
+
igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id,
DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL,
&edid_blob_id, NULL));
@@ -506,15 +578,21 @@ test_analogue_frame_dump(data_t *data, struct chamelium_port *port)
drmModeModeInfo *mode;
drmModeConnector *connector;
int fb_id, i;
+ bool bridge;
output = prepare_output(data, &display, port);
connector = chamelium_port_get_connector(data->chamelium, port, false);
primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
igt_assert(primary);
+ bridge = check_analogue_bridge(data, port);
+
for (i = 0; i < connector->count_modes; i++) {
mode = &connector->modes[i];
+ if (bridge && prune_vga_mode(data, mode))
+ continue;
+
fb_id = igt_create_color_pattern_fb(data->drm_fd,
mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
--
2.13.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH i-g-t v3 0/1] tests/chamelium: Detect analogue bridges and handle EDID accordingly
2017-07-06 13:27 [PATCH i-g-t 0/1] tests/chamelium: Detect analogue bridges and handle EDID accordingly Paul Kocialkowski
2017-07-06 13:27 ` [PATCH i-g-t] " Paul Kocialkowski
2017-07-12 15:00 ` [PATCH i-g-t v2 0/1] " Paul Kocialkowski
@ 2017-07-19 13:50 ` Paul Kocialkowski
2017-07-19 13:50 ` [PATCH i-g-t v3] tests/chamelium: Detect analog " Paul Kocialkowski
2 siblings, 1 reply; 8+ messages in thread
From: Paul Kocialkowski @ 2017-07-19 13:50 UTC (permalink / raw)
To: intel-gfx
This patch applies on top of: Analogue/VGA frame comparison support
Changes since v2:
* Changed analogue in favor of analog
* Rebased on top of the new revisions of the series this depends on
Changes since v1:
* Rebased on top of the new revisions of the series this depends on
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH i-g-t v3] tests/chamelium: Detect analog bridges and handle EDID accordingly
2017-07-19 13:50 ` [PATCH i-g-t v3 0/1] " Paul Kocialkowski
@ 2017-07-19 13:50 ` Paul Kocialkowski
2017-07-21 8:19 ` Paul Kocialkowski
0 siblings, 1 reply; 8+ messages in thread
From: Paul Kocialkowski @ 2017-07-19 13:50 UTC (permalink / raw)
To: intel-gfx
Nowadays, many VGA connectors are not actually native VGA but use a
discrete bridge to a digital connector. These bridges usually enforce
their own EDID instead of the one supplied by the chamelium.
Thus, the EDID read test for VGA is not relevant in that case and
should be skipped. Reported modes may also go beyond what the chamelium
can support. Thus, only supported resolutions should be tested for the
frame dump test and others should be pruned.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@linux.intel.com>
---
tests/chamelium.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
diff --git a/tests/chamelium.c b/tests/chamelium.c
index 33ecc2e7..881b7fa9 100644
--- a/tests/chamelium.c
+++ b/tests/chamelium.c
@@ -130,6 +130,76 @@ wait_for_connector(data_t *data, struct chamelium_port *port,
igt_assert(finished);
}
+static int chamelium_vga_modes[][2] = {
+ { 1600, 1200 },
+ { 1920, 1200 },
+ { 1920, 1080 },
+ { 1680, 1050 },
+ { 1280, 1024 },
+ { 1280, 960 },
+ { 1440, 900 },
+ { 1280, 800 },
+ { 1024, 768 },
+ { 1360, 768 },
+ { 1280, 720 },
+ { 800, 600 },
+ { 640, 480 },
+ { -1, -1 },
+};
+
+static bool
+prune_vga_mode(data_t *data, drmModeModeInfo *mode)
+{
+ int i = 0;
+
+ while (chamelium_vga_modes[i][0] != -1) {
+ if (mode->hdisplay == chamelium_vga_modes[i][0] &&
+ mode->vdisplay == chamelium_vga_modes[i][1])
+ return false;
+
+ i++;
+ }
+
+ return true;
+}
+
+static bool
+check_analog_bridge(data_t *data, struct chamelium_port *port)
+{
+ drmModePropertyBlobPtr edid_blob = NULL;
+ drmModeConnector *connector = chamelium_port_get_connector(
+ data->chamelium, port, false);
+ uint64_t edid_blob_id;
+ unsigned char *edid;
+ char edid_vendor[3];
+
+ if (chamelium_port_get_type(port) != DRM_MODE_CONNECTOR_VGA)
+ return false;
+
+ igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id,
+ DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL,
+ &edid_blob_id, NULL));
+ igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd,
+ edid_blob_id));
+
+ edid = (unsigned char *) edid_blob->data;
+
+ edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@';
+ edid_vendor[1] = (((edid[8] & 0x03) << 3) |
+ ((edid[9] & 0xe0) >> 5)) + '@';
+ edid_vendor[2] = (edid[9] & 0x1f) + '@';
+
+ /* Analog bridges provide their own EDID */
+ if (edid_vendor[0] != 'I' || edid_vendor[1] != 'G' ||
+ edid_vendor[0] != 'T')
+ return true;
+
+ drmModeFreePropertyBlob(edid_blob);
+ drmModeFreeConnector(connector);
+
+ return false;
+}
+
static void
reset_state(data_t *data, struct chamelium_port *port)
{
@@ -193,6 +263,8 @@ test_edid_read(data_t *data, struct chamelium_port *port,
chamelium_plug(data->chamelium, port);
wait_for_connector(data, port, DRM_MODE_CONNECTED);
+ igt_skip_on(check_analog_bridge(data, port));
+
igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id,
DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL,
&edid_blob_id, NULL));
@@ -547,15 +619,21 @@ test_analog_frame_dump(data_t *data, struct chamelium_port *port)
drmModeModeInfo *mode;
drmModeConnector *connector;
int fb_id, i;
+ bool bridge;
output = prepare_output(data, &display, port);
connector = chamelium_port_get_connector(data->chamelium, port, false);
primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
igt_assert(primary);
+ bridge = check_analog_bridge(data, port);
+
for (i = 0; i < connector->count_modes; i++) {
mode = &connector->modes[i];
+ if (bridge && prune_vga_mode(data, mode))
+ continue;
+
fb_id = igt_create_color_pattern_fb(data->drm_fd,
mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
--
2.13.2
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH i-g-t v3] tests/chamelium: Detect analog bridges and handle EDID accordingly
2017-07-19 13:50 ` [PATCH i-g-t v3] tests/chamelium: Detect analog " Paul Kocialkowski
@ 2017-07-21 8:19 ` Paul Kocialkowski
2017-07-21 18:33 ` Lyude Paul
0 siblings, 1 reply; 8+ messages in thread
From: Paul Kocialkowski @ 2017-07-21 8:19 UTC (permalink / raw)
To: intel-gfx
On Wed, 2017-07-19 at 16:50 +0300, Paul Kocialkowski wrote:
> Nowadays, many VGA connectors are not actually native VGA but use a
> discrete bridge to a digital connector. These bridges usually enforce
> their own EDID instead of the one supplied by the chamelium.
>
> Thus, the EDID read test for VGA is not relevant in that case and
> should be skipped. Reported modes may also go beyond what the
> chamelium
> can support. Thus, only supported resolutions should be tested for the
> frame dump test and others should be pruned.
This should be ready for merge now that all its dependencies have been
merged!
Cheers,
Paul
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@linux.intel.com>
> ---
> tests/chamelium.c | 78
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 78 insertions(+)
>
> diff --git a/tests/chamelium.c b/tests/chamelium.c
> index 33ecc2e7..881b7fa9 100644
> --- a/tests/chamelium.c
> +++ b/tests/chamelium.c
> @@ -130,6 +130,76 @@ wait_for_connector(data_t *data, struct
> chamelium_port *port,
> igt_assert(finished);
> }
>
> +static int chamelium_vga_modes[][2] = {
> + { 1600, 1200 },
> + { 1920, 1200 },
> + { 1920, 1080 },
> + { 1680, 1050 },
> + { 1280, 1024 },
> + { 1280, 960 },
> + { 1440, 900 },
> + { 1280, 800 },
> + { 1024, 768 },
> + { 1360, 768 },
> + { 1280, 720 },
> + { 800, 600 },
> + { 640, 480 },
> + { -1, -1 },
> +};
> +
> +static bool
> +prune_vga_mode(data_t *data, drmModeModeInfo *mode)
> +{
> + int i = 0;
> +
> + while (chamelium_vga_modes[i][0] != -1) {
> + if (mode->hdisplay == chamelium_vga_modes[i][0] &&
> + mode->vdisplay == chamelium_vga_modes[i][1])
> + return false;
> +
> + i++;
> + }
> +
> + return true;
> +}
> +
> +static bool
> +check_analog_bridge(data_t *data, struct chamelium_port *port)
> +{
> + drmModePropertyBlobPtr edid_blob = NULL;
> + drmModeConnector *connector = chamelium_port_get_connector(
> + data->chamelium, port, false);
> + uint64_t edid_blob_id;
> + unsigned char *edid;
> + char edid_vendor[3];
> +
> + if (chamelium_port_get_type(port) != DRM_MODE_CONNECTOR_VGA)
> + return false;
> +
> + igt_assert(kmstest_get_property(data->drm_fd, connector-
> >connector_id,
> + DRM_MODE_OBJECT_CONNECTOR,
> "EDID", NULL,
> + &edid_blob_id, NULL));
> + igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd,
> + edid_blob_id));
> +
> + edid = (unsigned char *) edid_blob->data;
> +
> + edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@';
> + edid_vendor[1] = (((edid[8] & 0x03) << 3) |
> + ((edid[9] & 0xe0) >> 5)) + '@';
> + edid_vendor[2] = (edid[9] & 0x1f) + '@';
> +
> + /* Analog bridges provide their own EDID */
> + if (edid_vendor[0] != 'I' || edid_vendor[1] != 'G' ||
> + edid_vendor[0] != 'T')
> + return true;
> +
> + drmModeFreePropertyBlob(edid_blob);
> + drmModeFreeConnector(connector);
> +
> + return false;
> +}
> +
> static void
> reset_state(data_t *data, struct chamelium_port *port)
> {
> @@ -193,6 +263,8 @@ test_edid_read(data_t *data, struct chamelium_port
> *port,
> chamelium_plug(data->chamelium, port);
> wait_for_connector(data, port, DRM_MODE_CONNECTED);
>
> + igt_skip_on(check_analog_bridge(data, port));
> +
> igt_assert(kmstest_get_property(data->drm_fd, connector-
> >connector_id,
> DRM_MODE_OBJECT_CONNECTOR,
> "EDID", NULL,
> &edid_blob_id, NULL));
> @@ -547,15 +619,21 @@ test_analog_frame_dump(data_t *data, struct
> chamelium_port *port)
> drmModeModeInfo *mode;
> drmModeConnector *connector;
> int fb_id, i;
> + bool bridge;
>
> output = prepare_output(data, &display, port);
> connector = chamelium_port_get_connector(data->chamelium,
> port, false);
> primary = igt_output_get_plane_type(output,
> DRM_PLANE_TYPE_PRIMARY);
> igt_assert(primary);
>
> + bridge = check_analog_bridge(data, port);
> +
> for (i = 0; i < connector->count_modes; i++) {
> mode = &connector->modes[i];
>
> + if (bridge && prune_vga_mode(data, mode))
> + continue;
> +
> fb_id = igt_create_color_pattern_fb(data->drm_fd,
> mode->hdisplay,
> mode->vdisplay,
> DRM_FORMAT_XRGB88
> 88,
--
Paul Kocialkowski <paul.kocialkowski@linux.intel.com>
Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo, Finland
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH i-g-t v3] tests/chamelium: Detect analog bridges and handle EDID accordingly
2017-07-21 8:19 ` Paul Kocialkowski
@ 2017-07-21 18:33 ` Lyude Paul
0 siblings, 0 replies; 8+ messages in thread
From: Lyude Paul @ 2017-07-21 18:33 UTC (permalink / raw)
To: Paul Kocialkowski, intel-gfx
On Fri, 2017-07-21 at 11:19 +0300, Paul Kocialkowski wrote:
> On Wed, 2017-07-19 at 16:50 +0300, Paul Kocialkowski wrote:
> > Nowadays, many VGA connectors are not actually native VGA but use a
> > discrete bridge to a digital connector. These bridges usually
> > enforce
> > their own EDID instead of the one supplied by the chamelium.
> >
> > Thus, the EDID read test for VGA is not relevant in that case and
> > should be skipped. Reported modes may also go beyond what the
> > chamelium
> > can support. Thus, only supported resolutions should be tested for
> > the
> > frame dump test and others should be pruned.
>
> This should be ready for merge now that all its dependencies have
> been
> merged!
>
Whoops! Thought I had added it but I guess I didn't, I've r-b'd it and
pushed it upstream
> Cheers,
>
> Paul
>
> > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@linux.intel.com
> > >
> > ---
> > tests/chamelium.c | 78
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 78 insertions(+)
> >
> > diff --git a/tests/chamelium.c b/tests/chamelium.c
> > index 33ecc2e7..881b7fa9 100644
> > --- a/tests/chamelium.c
> > +++ b/tests/chamelium.c
> > @@ -130,6 +130,76 @@ wait_for_connector(data_t *data, struct
> > chamelium_port *port,
> > igt_assert(finished);
> > }
> >
> > +static int chamelium_vga_modes[][2] = {
> > + { 1600, 1200 },
> > + { 1920, 1200 },
> > + { 1920, 1080 },
> > + { 1680, 1050 },
> > + { 1280, 1024 },
> > + { 1280, 960 },
> > + { 1440, 900 },
> > + { 1280, 800 },
> > + { 1024, 768 },
> > + { 1360, 768 },
> > + { 1280, 720 },
> > + { 800, 600 },
> > + { 640, 480 },
> > + { -1, -1 },
> > +};
> > +
> > +static bool
> > +prune_vga_mode(data_t *data, drmModeModeInfo *mode)
> > +{
> > + int i = 0;
> > +
> > + while (chamelium_vga_modes[i][0] != -1) {
> > + if (mode->hdisplay == chamelium_vga_modes[i][0] &&
> > + mode->vdisplay == chamelium_vga_modes[i][1])
> > + return false;
> > +
> > + i++;
> > + }
> > +
> > + return true;
> > +}
> > +
> > +static bool
> > +check_analog_bridge(data_t *data, struct chamelium_port *port)
> > +{
> > + drmModePropertyBlobPtr edid_blob = NULL;
> > + drmModeConnector *connector =
> > chamelium_port_get_connector(
> > + data->chamelium, port, false);
> > + uint64_t edid_blob_id;
> > + unsigned char *edid;
> > + char edid_vendor[3];
> > +
> > + if (chamelium_port_get_type(port) !=
> > DRM_MODE_CONNECTOR_VGA)
> > + return false;
> > +
> > + igt_assert(kmstest_get_property(data->drm_fd, connector-
> > > connector_id,
> >
> > + DRM_MODE_OBJECT_CONNECTOR,
> > "EDID", NULL,
> > + &edid_blob_id, NULL));
> > + igt_assert(edid_blob = drmModeGetPropertyBlob(data-
> > >drm_fd,
> > + edid_blob_id
> > ));
> > +
> > + edid = (unsigned char *) edid_blob->data;
> > +
> > + edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@';
> > + edid_vendor[1] = (((edid[8] & 0x03) << 3) |
> > + ((edid[9] & 0xe0) >> 5)) + '@';
> > + edid_vendor[2] = (edid[9] & 0x1f) + '@';
> > +
> > + /* Analog bridges provide their own EDID */
> > + if (edid_vendor[0] != 'I' || edid_vendor[1] != 'G' ||
> > + edid_vendor[0] != 'T')
> > + return true;
> > +
> > + drmModeFreePropertyBlob(edid_blob);
> > + drmModeFreeConnector(connector);
> > +
> > + return false;
> > +}
> > +
> > static void
> > reset_state(data_t *data, struct chamelium_port *port)
> > {
> > @@ -193,6 +263,8 @@ test_edid_read(data_t *data, struct
> > chamelium_port
> > *port,
> > chamelium_plug(data->chamelium, port);
> > wait_for_connector(data, port, DRM_MODE_CONNECTED);
> >
> > + igt_skip_on(check_analog_bridge(data, port));
> > +
> > igt_assert(kmstest_get_property(data->drm_fd, connector-
> > > connector_id,
> >
> > DRM_MODE_OBJECT_CONNECTOR,
> > "EDID", NULL,
> > &edid_blob_id, NULL));
> > @@ -547,15 +619,21 @@ test_analog_frame_dump(data_t *data, struct
> > chamelium_port *port)
> > drmModeModeInfo *mode;
> > drmModeConnector *connector;
> > int fb_id, i;
> > + bool bridge;
> >
> > output = prepare_output(data, &display, port);
> > connector = chamelium_port_get_connector(data->chamelium,
> > port, false);
> > primary = igt_output_get_plane_type(output,
> > DRM_PLANE_TYPE_PRIMARY);
> > igt_assert(primary);
> >
> > + bridge = check_analog_bridge(data, port);
> > +
> > for (i = 0; i < connector->count_modes; i++) {
> > mode = &connector->modes[i];
> >
> > + if (bridge && prune_vga_mode(data, mode))
> > + continue;
> > +
> > fb_id = igt_create_color_pattern_fb(data->drm_fd,
> > mode-
> > >hdisplay,
> > mode->vdisplay,
> > DRM_FORMAT_XRG
> > B88
> > 88,
--
Cheers,
Lyude
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^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-07-21 18:33 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-07-06 13:27 [PATCH i-g-t 0/1] tests/chamelium: Detect analogue bridges and handle EDID accordingly Paul Kocialkowski
2017-07-06 13:27 ` [PATCH i-g-t] " Paul Kocialkowski
2017-07-12 15:00 ` [PATCH i-g-t v2 0/1] " Paul Kocialkowski
2017-07-12 15:00 ` [PATCH i-g-t v2] " Paul Kocialkowski
2017-07-19 13:50 ` [PATCH i-g-t v3 0/1] " Paul Kocialkowski
2017-07-19 13:50 ` [PATCH i-g-t v3] tests/chamelium: Detect analog " Paul Kocialkowski
2017-07-21 8:19 ` Paul Kocialkowski
2017-07-21 18:33 ` Lyude Paul
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