* [PATCH 1/8] drm/amdgpu: cleanup kptr handling
@ 2017-07-27 15:43 Christian König
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
0 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:43 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Don't keep around the same pointer twice.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 26 +++++++++++++++-----------
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++--
5 files changed, 19 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index fe96236..c539bdd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -427,7 +427,6 @@ struct amdgpu_bo {
struct ttm_bo_kmap_obj kmap;
u64 flags;
unsigned pin_count;
- void *kptr;
u64 tiling_flags;
u64 metadata_flags;
void *metadata;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index f0c8123..f48c780 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -246,7 +246,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
tmp = amdgpu_bo_gpu_offset(abo) - adev->mc.vram_start;
info->fix.smem_start = adev->mc.aper_base + tmp;
info->fix.smem_len = amdgpu_bo_size(abo);
- info->screen_base = abo->kptr;
+ info->screen_base = amdgpu_bo_kptr(abo);
info->screen_size = amdgpu_bo_size(abo);
drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 3ec43cf..8fddea4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -609,16 +609,16 @@ int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
{
- bool is_iomem;
+ void *kptr;
long r;
if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
return -EPERM;
- if (bo->kptr) {
- if (ptr) {
- *ptr = bo->kptr;
- }
+ kptr = amdgpu_bo_kptr(bo);
+ if (kptr) {
+ if (ptr)
+ *ptr = kptr;
return 0;
}
@@ -631,19 +631,23 @@ int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
if (r)
return r;
- bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
if (ptr)
- *ptr = bo->kptr;
+ *ptr = amdgpu_bo_kptr(bo);
return 0;
}
+void *amdgpu_bo_kptr(struct amdgpu_bo *bo)
+{
+ bool is_iomem;
+
+ return ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
+}
+
void amdgpu_bo_kunmap(struct amdgpu_bo *bo)
{
- if (bo->kptr == NULL)
- return;
- bo->kptr = NULL;
- ttm_bo_kunmap(&bo->kmap);
+ if (bo->kmap.bo)
+ ttm_bo_kunmap(&bo->kmap);
}
struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 833b172..f53d53d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -147,6 +147,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
void **cpu_addr);
int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
+void *amdgpu_bo_kptr(struct amdgpu_bo *bo);
void amdgpu_bo_kunmap(struct amdgpu_bo *bo);
struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo);
void amdgpu_bo_unref(struct amdgpu_bo **bo);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index fc482cc4..a1d4294 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1059,7 +1059,7 @@ static int amdgpu_vm_update_level(struct amdgpu_device *adev,
shadow = parent->bo->shadow;
if (vm->use_cpu_for_update) {
- pd_addr = (unsigned long)parent->bo->kptr;
+ pd_addr = (unsigned long)amdgpu_bo_kptr(parent->bo);
r = amdgpu_vm_wait_pd(adev, vm, AMDGPU_FENCE_OWNER_VM);
if (unlikely(r))
return r;
@@ -1400,7 +1400,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
pt = entry->bo;
if (use_cpu_update) {
- pe_start = (unsigned long)pt->kptr;
+ pe_start = (unsigned long)amdgpu_bo_kptr(pt);
} else {
if (pt->shadow) {
pe_start = amdgpu_bo_gpu_offset(pt->shadow);
--
2.7.4
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* [PATCH 2/8] drm/amdgpu: consistent use u64_to_user_ptr
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 15:43 ` Christian König
[not found] ` <1501170244-1832-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:43 ` [PATCH 3/8] drm/amdgpu: move some defines around Christian König
` (6 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:43 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Instead of open coding the conversion from u64 to pointers.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8 ++++----
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
index 6fd5831..fd5d192 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
@@ -270,7 +270,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
struct amdgpu_fpriv *fpriv = filp->driver_priv;
union drm_amdgpu_bo_list *args = data;
uint32_t handle = args->in.list_handle;
- const void __user *uptr = (const void*)(uintptr_t)args->in.bo_info_ptr;
+ const void __user *uptr = u64_to_user_ptr(args->in.bo_info_ptr);
struct drm_amdgpu_bo_list_entry *info;
struct amdgpu_bo_list *list;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 44ec11d..cd5c08a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -89,7 +89,7 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
}
/* get chunks */
- chunk_array_user = (uint64_t __user *)(uintptr_t)(cs->in.chunks);
+ chunk_array_user = u64_to_user_ptr(cs->in.chunks);
if (copy_from_user(chunk_array, chunk_array_user,
sizeof(uint64_t)*cs->in.num_chunks)) {
ret = -EFAULT;
@@ -109,7 +109,7 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
struct drm_amdgpu_cs_chunk user_chunk;
uint32_t __user *cdata;
- chunk_ptr = (void __user *)(uintptr_t)chunk_array[i];
+ chunk_ptr = u64_to_user_ptr(chunk_array[i]);
if (copy_from_user(&user_chunk, chunk_ptr,
sizeof(struct drm_amdgpu_cs_chunk))) {
ret = -EFAULT;
@@ -120,7 +120,7 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
p->chunks[i].length_dw = user_chunk.length_dw;
size = p->chunks[i].length_dw;
- cdata = (void __user *)(uintptr_t)user_chunk.chunk_data;
+ cdata = u64_to_user_ptr(user_chunk.chunk_data);
p->chunks[i].kdata = drm_malloc_ab(size, sizeof(uint32_t));
if (p->chunks[i].kdata == NULL) {
@@ -1352,7 +1352,7 @@ int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,
if (fences == NULL)
return -ENOMEM;
- fences_user = (void __user *)(uintptr_t)(wait->in.fences);
+ fences_user = u64_to_user_ptr(wait->in.fences);
if (copy_from_user(fences, fences_user,
sizeof(struct drm_amdgpu_fence) * fence_count)) {
r = -EFAULT;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 917ac5e..88085e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -689,7 +689,7 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
switch (args->op) {
case AMDGPU_GEM_OP_GET_GEM_CREATE_INFO: {
struct drm_amdgpu_gem_create_in info;
- void __user *out = (void __user *)(uintptr_t)args->value;
+ void __user *out = u64_to_user_ptr(args->value);
info.bo_size = robj->gem_base.size;
info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;
--
2.7.4
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* [PATCH 3/8] drm/amdgpu: move some defines around
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:43 ` [PATCH 2/8] drm/amdgpu: consistent use u64_to_user_ptr Christian König
@ 2017-07-27 15:43 ` Christian König
[not found] ` <1501170244-1832-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:44 ` [PATCH 4/8] drm/amdgpu: shadow and mn list are mutal exclusive Christian König
` (5 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:43 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Move amdgpu_bo and related structures into amdgpu_object.h.
Move amdgpu_bo_list structures to the amdgpu_bo_list functions.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 77 ++++--------------------------
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 58 ++++++++++++++++++++++
2 files changed, 67 insertions(+), 68 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index c539bdd..3c59d7b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -375,77 +375,10 @@ struct amdgpu_clock {
};
/*
- * BO.
+ * GEM.
*/
-struct amdgpu_bo_list_entry {
- struct amdgpu_bo *robj;
- struct ttm_validate_buffer tv;
- struct amdgpu_bo_va *bo_va;
- uint32_t priority;
- struct page **user_pages;
- int user_invalidated;
-};
-
-struct amdgpu_bo_va_mapping {
- struct list_head list;
- struct rb_node rb;
- uint64_t start;
- uint64_t last;
- uint64_t __subtree_last;
- uint64_t offset;
- uint64_t flags;
-};
-
-/* bo virtual addresses in a specific vm */
-struct amdgpu_bo_va {
- /* protected by bo being reserved */
- struct list_head bo_list;
- struct dma_fence *last_pt_update;
- unsigned ref_count;
-
- /* protected by vm mutex and spinlock */
- struct list_head vm_status;
-
- /* mappings for this bo_va */
- struct list_head invalids;
- struct list_head valids;
-
- /* constant after initialization */
- struct amdgpu_vm *vm;
- struct amdgpu_bo *bo;
-};
#define AMDGPU_GEM_DOMAIN_MAX 0x3
-
-struct amdgpu_bo {
- /* Protected by tbo.reserved */
- u32 prefered_domains;
- u32 allowed_domains;
- struct ttm_place placements[AMDGPU_GEM_DOMAIN_MAX + 1];
- struct ttm_placement placement;
- struct ttm_buffer_object tbo;
- struct ttm_bo_kmap_obj kmap;
- u64 flags;
- unsigned pin_count;
- u64 tiling_flags;
- u64 metadata_flags;
- void *metadata;
- u32 metadata_size;
- unsigned prime_shared_count;
- /* list of all virtual address to which this bo
- * is associated to
- */
- struct list_head va;
- /* Constant after initialization */
- struct drm_gem_object gem_base;
- struct amdgpu_bo *parent;
- struct amdgpu_bo *shadow;
-
- struct ttm_bo_kmap_obj dma_buf_vmap;
- struct amdgpu_mn *mn;
- struct list_head mn_list;
- struct list_head shadow_list;
-};
#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, gem_base)
void amdgpu_gem_object_free(struct drm_gem_object *obj);
@@ -826,6 +759,14 @@ struct amdgpu_fpriv {
/*
* residency list
*/
+struct amdgpu_bo_list_entry {
+ struct amdgpu_bo *robj;
+ struct ttm_validate_buffer tv;
+ struct amdgpu_bo_va *bo_va;
+ uint32_t priority;
+ struct page **user_pages;
+ int user_invalidated;
+};
struct amdgpu_bo_list {
struct mutex lock;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index f53d53d..a401fe3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -33,6 +33,64 @@
#define AMDGPU_BO_INVALID_OFFSET LONG_MAX
+struct amdgpu_bo_va_mapping {
+ struct list_head list;
+ struct rb_node rb;
+ uint64_t start;
+ uint64_t last;
+ uint64_t __subtree_last;
+ uint64_t offset;
+ uint64_t flags;
+};
+
+/* bo virtual addresses in a specific vm */
+struct amdgpu_bo_va {
+ /* protected by bo being reserved */
+ struct list_head bo_list;
+ struct dma_fence *last_pt_update;
+ unsigned ref_count;
+
+ /* protected by vm mutex and spinlock */
+ struct list_head vm_status;
+
+ /* mappings for this bo_va */
+ struct list_head invalids;
+ struct list_head valids;
+
+ /* constant after initialization */
+ struct amdgpu_vm *vm;
+ struct amdgpu_bo *bo;
+};
+
+
+struct amdgpu_bo {
+ /* Protected by tbo.reserved */
+ u32 prefered_domains;
+ u32 allowed_domains;
+ struct ttm_place placements[AMDGPU_GEM_DOMAIN_MAX + 1];
+ struct ttm_placement placement;
+ struct ttm_buffer_object tbo;
+ struct ttm_bo_kmap_obj kmap;
+ u64 flags;
+ unsigned pin_count;
+ u64 tiling_flags;
+ u64 metadata_flags;
+ void *metadata;
+ u32 metadata_size;
+ unsigned prime_shared_count;
+ /* list of all virtual address to which this bo is associated to */
+ struct list_head va;
+ /* Constant after initialization */
+ struct drm_gem_object gem_base;
+ struct amdgpu_bo *parent;
+ struct amdgpu_bo *shadow;
+
+ struct ttm_bo_kmap_obj dma_buf_vmap;
+ struct amdgpu_mn *mn;
+ struct list_head mn_list;
+ struct list_head shadow_list;
+};
+
/**
* amdgpu_mem_type_to_domain - return domain corresponding to mem_type
* @mem_type: ttm memory type
--
2.7.4
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* [PATCH 4/8] drm/amdgpu: shadow and mn list are mutal exclusive
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:43 ` [PATCH 2/8] drm/amdgpu: consistent use u64_to_user_ptr Christian König
2017-07-27 15:43 ` [PATCH 3/8] drm/amdgpu: move some defines around Christian König
@ 2017-07-27 15:44 ` Christian König
[not found] ` <1501170244-1832-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:44 ` [PATCH 5/8] drm/amdgpu: improve amdgpu_bo_create_kernel Christian König
` (4 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:44 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Save some memory because only on of those is used at all times.
TODO: Should we use an union here or just a single field?
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index a401fe3..3b92d52 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -87,8 +87,11 @@ struct amdgpu_bo {
struct ttm_bo_kmap_obj dma_buf_vmap;
struct amdgpu_mn *mn;
- struct list_head mn_list;
- struct list_head shadow_list;
+
+ union {
+ struct list_head mn_list;
+ struct list_head shadow_list;
+ };
};
/**
--
2.7.4
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 5/8] drm/amdgpu: improve amdgpu_bo_create_kernel
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (2 preceding siblings ...)
2017-07-27 15:44 ` [PATCH 4/8] drm/amdgpu: shadow and mn list are mutal exclusive Christian König
@ 2017-07-27 15:44 ` Christian König
[not found] ` <1501170244-1832-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:44 ` [PATCH 6/8] drm/amdgpu: add amdgpu_bo_create_reserved Christian König
` (3 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:44 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Make allocating the new BO optional.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 8fddea4..81d40e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -239,15 +239,20 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
u32 domain, struct amdgpu_bo **bo_ptr,
u64 *gpu_addr, void **cpu_addr)
{
+ bool free = false;
int r;
- r = amdgpu_bo_create(adev, size, align, true, domain,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL, bo_ptr);
- if (r) {
- dev_err(adev->dev, "(%d) failed to allocate kernel bo\n", r);
- return r;
+ if (!*bo_ptr) {
+ r = amdgpu_bo_create(adev, size, align, true, domain,
+ AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+ AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
+ NULL, NULL, bo_ptr);
+ if (r) {
+ dev_err(adev->dev, "(%d) failed to allocate kernel bo\n",
+ r);
+ return r;
+ }
+ free = true;
}
r = amdgpu_bo_reserve(*bo_ptr, false);
@@ -278,7 +283,8 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
amdgpu_bo_unreserve(*bo_ptr);
error_free:
- amdgpu_bo_unref(bo_ptr);
+ if (free)
+ amdgpu_bo_unref(bo_ptr);
return r;
}
--
2.7.4
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 6/8] drm/amdgpu: add amdgpu_bo_create_reserved
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (3 preceding siblings ...)
2017-07-27 15:44 ` [PATCH 5/8] drm/amdgpu: improve amdgpu_bo_create_kernel Christian König
@ 2017-07-27 15:44 ` Christian König
[not found] ` <1501170244-1832-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:44 ` [PATCH 7/8] drm/amdgpu: use amdgpu_bo_create_kernel more often Christian König
` (2 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:44 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Same as amdgpu_bo_create_kernel, but keeps the BO reserved.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 48 +++++++++++++++++++++++++-----
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 4 +++
2 files changed, 44 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 81d40e3..494b793 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -220,7 +220,7 @@ static void amdgpu_fill_placement_to_bo(struct amdgpu_bo *bo,
}
/**
- * amdgpu_bo_create_kernel - create BO for kernel use
+ * amdgpu_bo_create_reserved - create reserved BO for kernel use
*
* @adev: amdgpu device object
* @size: size for the new BO
@@ -230,14 +230,15 @@ static void amdgpu_fill_placement_to_bo(struct amdgpu_bo *bo,
* @gpu_addr: GPU addr of the pinned BO
* @cpu_addr: optional CPU address mapping
*
- * Allocates and pins a BO for kernel internal use.
+ * Allocates and pins a BO for kernel internal use, and returns it still
+ * reserved.
*
* Returns 0 on success, negative error code otherwise.
*/
-int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
- unsigned long size, int align,
- u32 domain, struct amdgpu_bo **bo_ptr,
- u64 *gpu_addr, void **cpu_addr)
+int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
+ unsigned long size, int align,
+ u32 domain, struct amdgpu_bo **bo_ptr,
+ u64 *gpu_addr, void **cpu_addr)
{
bool free = false;
int r;
@@ -275,8 +276,6 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
}
}
- amdgpu_bo_unreserve(*bo_ptr);
-
return 0;
error_unreserve:
@@ -290,6 +289,39 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
}
/**
+ * amdgpu_bo_create_kernel - create BO for kernel use
+ *
+ * @adev: amdgpu device object
+ * @size: size for the new BO
+ * @align: alignment for the new BO
+ * @domain: where to place it
+ * @bo_ptr: resulting BO
+ * @gpu_addr: GPU addr of the pinned BO
+ * @cpu_addr: optional CPU address mapping
+ *
+ * Allocates and pins a BO for kernel internal use.
+ *
+ * Returns 0 on success, negative error code otherwise.
+ */
+int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
+ unsigned long size, int align,
+ u32 domain, struct amdgpu_bo **bo_ptr,
+ u64 *gpu_addr, void **cpu_addr)
+{
+ int r;
+
+ r = amdgpu_bo_create_reserved(adev, size, align, domain, bo_ptr,
+ gpu_addr, cpu_addr);
+
+ if (r)
+ return r;
+
+ amdgpu_bo_unreserve(*bo_ptr);
+
+ return 0;
+}
+
+/**
* amdgpu_bo_free_kernel - free BO for kernel use
*
* @bo: amdgpu BO to free
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 3b92d52..cbf6e6d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -201,6 +201,10 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
struct ttm_placement *placement,
struct reservation_object *resv,
struct amdgpu_bo **bo_ptr);
+int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
+ unsigned long size, int align,
+ u32 domain, struct amdgpu_bo **bo_ptr,
+ u64 *gpu_addr, void **cpu_addr);
int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
unsigned long size, int align,
u32 domain, struct amdgpu_bo **bo_ptr,
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 7/8] drm/amdgpu: use amdgpu_bo_create_kernel more often
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (4 preceding siblings ...)
2017-07-27 15:44 ` [PATCH 6/8] drm/amdgpu: add amdgpu_bo_create_reserved Christian König
@ 2017-07-27 15:44 ` Christian König
[not found] ` <1501170244-1832-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:44 ` [PATCH 8/8] drm/amdgpu: use amdgpu_bo_free_kernel " Christian König
2017-07-27 17:36 ` [PATCH 1/8] drm/amdgpu: cleanup kptr handling Deucher, Alexander
7 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:44 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Saves us quite a bunch of loc.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 34 +-----
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 19 +---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 70 +++---------
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 166 +++++------------------------
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 100 ++++-------------
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 110 ++++++-------------
6 files changed, 103 insertions(+), 396 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 9c0f4cc..60f60e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -337,35 +337,11 @@ static void amdgpu_block_invalid_wreg(struct amdgpu_device *adev,
static int amdgpu_vram_scratch_init(struct amdgpu_device *adev)
{
- int r;
-
- if (adev->vram_scratch.robj == NULL) {
- r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE,
- PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL, &adev->vram_scratch.robj);
- if (r) {
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(adev->vram_scratch.robj, false);
- if (unlikely(r != 0))
- return r;
- r = amdgpu_bo_pin(adev->vram_scratch.robj,
- AMDGPU_GEM_DOMAIN_VRAM, &adev->vram_scratch.gpu_addr);
- if (r) {
- amdgpu_bo_unreserve(adev->vram_scratch.robj);
- return r;
- }
- r = amdgpu_bo_kmap(adev->vram_scratch.robj,
- (void **)&adev->vram_scratch.ptr);
- if (r)
- amdgpu_bo_unpin(adev->vram_scratch.robj);
- amdgpu_bo_unreserve(adev->vram_scratch.robj);
-
- return r;
+ return amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_SIZE,
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->vram_scratch.robj,
+ &adev->vram_scratch.gpu_addr,
+ (void **)&adev->vram_scratch.ptr);
}
static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 4d2a454..d60819b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1232,23 +1232,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
/* Change the size here instead of the init above so only lpfn is affected */
amdgpu_ttm_set_active_vram_size(adev, adev->mc.visible_vram_size);
- r = amdgpu_bo_create(adev, adev->mc.stolen_size, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL, &adev->stollen_vga_memory);
- if (r) {
- return r;
- }
- r = amdgpu_bo_reserve(adev->stollen_vga_memory, false);
+ r = amdgpu_bo_create_kernel(adev, adev->mc.stolen_size, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->stollen_vga_memory,
+ NULL, NULL);
if (r)
return r;
- r = amdgpu_bo_pin(adev->stollen_vga_memory, AMDGPU_GEM_DOMAIN_VRAM, NULL);
- amdgpu_bo_unreserve(adev->stollen_vga_memory);
- if (r) {
- amdgpu_bo_unref(&adev->stollen_vga_memory);
- return r;
- }
DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
(unsigned) (adev->mc.real_vram_size / (1024 * 1024)));
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 4ac85f4..faf8d28 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -2273,43 +2273,23 @@ static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)
if (src_ptr) {
/* save restore block */
- if (adev->gfx.rlc.save_restore_obj == NULL) {
- r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
- NULL, NULL,
- &adev->gfx.rlc.save_restore_obj);
-
- if (r) {
- dev_warn(adev->dev, "(%d) create RLC sr bo failed\n", r);
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, false);
- if (unlikely(r != 0)) {
- gfx_v6_0_rlc_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.rlc.save_restore_obj, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.save_restore_gpu_addr);
+ r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.save_restore_obj,
+ &adev->gfx.rlc.save_restore_gpu_addr,
+ (void **)&adev->gfx.rlc.sr_ptr);
if (r) {
- amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
- dev_warn(adev->dev, "(%d) pin RLC sr bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create RLC sr bo failed\n",
+ r);
gfx_v6_0_rlc_fini(adev);
return r;
}
- r = amdgpu_bo_kmap(adev->gfx.rlc.save_restore_obj, (void **)&adev->gfx.rlc.sr_ptr);
- if (r) {
- dev_warn(adev->dev, "(%d) map RLC sr bo failed\n", r);
- gfx_v6_0_rlc_fini(adev);
- return r;
- }
/* write the sr buffer */
dst_ptr = adev->gfx.rlc.sr_ptr;
for (i = 0; i < adev->gfx.rlc.reg_list_size; i++)
dst_ptr[i] = cpu_to_le32(src_ptr[i]);
+
amdgpu_bo_kunmap(adev->gfx.rlc.save_restore_obj);
amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
}
@@ -2319,39 +2299,17 @@ static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)
adev->gfx.rlc.clear_state_size = gfx_v6_0_get_csb_size(adev);
dws = adev->gfx.rlc.clear_state_size + (256 / 4);
- if (adev->gfx.rlc.clear_state_obj == NULL) {
- r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
- NULL, NULL,
- &adev->gfx.rlc.clear_state_obj);
-
- if (r) {
- dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
- gfx_v6_0_rlc_fini(adev);
- return r;
- }
- }
- r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
- if (unlikely(r != 0)) {
- gfx_v6_0_rlc_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.clear_state_gpu_addr);
+ r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.clear_state_obj,
+ &adev->gfx.rlc.clear_state_gpu_addr,
+ (void **)&adev->gfx.rlc.cs_ptr);
if (r) {
- amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
- dev_warn(adev->dev, "(%d) pin RLC c bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
gfx_v6_0_rlc_fini(adev);
return r;
}
- r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj, (void **)&adev->gfx.rlc.cs_ptr);
- if (r) {
- dev_warn(adev->dev, "(%d) map RLC c bo failed\n", r);
- gfx_v6_0_rlc_fini(adev);
- return r;
- }
/* set up the cs buffer */
dst_ptr = adev->gfx.rlc.cs_ptr;
reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 42b932c..6e6e952 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2823,33 +2823,14 @@ static int gfx_v7_0_mec_init(struct amdgpu_device *adev)
/* allocate space for ALL pipes (even the ones we don't own) */
mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec
* GFX7_MEC_HPD_SIZE * 2;
- if (adev->gfx.mec.hpd_eop_obj == NULL) {
- r = amdgpu_bo_create(adev,
- mec_hpd_size,
- PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
- &adev->gfx.mec.hpd_eop_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
- return r;
- }
- }
- r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);
- if (unlikely(r != 0)) {
- gfx_v7_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.mec.hpd_eop_obj, AMDGPU_GEM_DOMAIN_GTT,
- &adev->gfx.mec.hpd_eop_gpu_addr);
+ r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_GTT,
+ &adev->gfx.mec.hpd_eop_obj,
+ &adev->gfx.mec.hpd_eop_gpu_addr,
+ (void **)&hpd);
if (r) {
- dev_warn(adev->dev, "(%d) pin HDP EOP bo failed\n", r);
- gfx_v7_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_kmap(adev->gfx.mec.hpd_eop_obj, (void **)&hpd);
- if (r) {
- dev_warn(adev->dev, "(%d) map HDP EOP bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create, pin or map of HDP EOP bo failed\n", r);
gfx_v7_0_mec_fini(adev);
return r;
}
@@ -3108,32 +3089,12 @@ static int gfx_v7_0_compute_queue_init(struct amdgpu_device *adev, int ring_id)
struct cik_mqd *mqd;
struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id];
- if (ring->mqd_obj == NULL) {
- r = amdgpu_bo_create(adev,
- sizeof(struct cik_mqd),
- PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
- &ring->mqd_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create MQD bo failed\n", r);
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(ring->mqd_obj, false);
- if (unlikely(r != 0))
- goto out;
-
- r = amdgpu_bo_pin(ring->mqd_obj, AMDGPU_GEM_DOMAIN_GTT,
- &mqd_gpu_addr);
- if (r) {
- dev_warn(adev->dev, "(%d) pin MQD bo failed\n", r);
- goto out_unreserve;
- }
- r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&mqd);
+ r = amdgpu_bo_create_reserved(adev, sizeof(struct cik_mqd), PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
+ &mqd_gpu_addr, (void **)&mqd);
if (r) {
- dev_warn(adev->dev, "(%d) map MQD bo failed\n", r);
- goto out_unreserve;
+ dev_warn(adev->dev, "(%d) create MQD bo failed\n", r);
+ return r;
}
mutex_lock(&adev->srbm_mutex);
@@ -3147,9 +3108,7 @@ static int gfx_v7_0_compute_queue_init(struct amdgpu_device *adev, int ring_id)
mutex_unlock(&adev->srbm_mutex);
amdgpu_bo_kunmap(ring->mqd_obj);
-out_unreserve:
amdgpu_bo_unreserve(ring->mqd_obj);
-out:
return 0;
}
@@ -3432,39 +3391,17 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
if (src_ptr) {
/* save restore block */
- if (adev->gfx.rlc.save_restore_obj == NULL) {
- r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL,
- &adev->gfx.rlc.save_restore_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create RLC sr bo failed\n", r);
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, false);
- if (unlikely(r != 0)) {
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.rlc.save_restore_obj, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.save_restore_gpu_addr);
+ r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.save_restore_obj,
+ &adev->gfx.rlc.save_restore_gpu_addr,
+ (void **)&adev->gfx.rlc.sr_ptr);
if (r) {
- amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
- dev_warn(adev->dev, "(%d) pin RLC sr bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create, pin or map of RLC sr bo failed\n", r);
gfx_v7_0_rlc_fini(adev);
return r;
}
- r = amdgpu_bo_kmap(adev->gfx.rlc.save_restore_obj, (void **)&adev->gfx.rlc.sr_ptr);
- if (r) {
- dev_warn(adev->dev, "(%d) map RLC sr bo failed\n", r);
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
/* write the sr buffer */
dst_ptr = adev->gfx.rlc.sr_ptr;
for (i = 0; i < adev->gfx.rlc.reg_list_size; i++)
@@ -3477,39 +3414,17 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
/* clear state block */
adev->gfx.rlc.clear_state_size = dws = gfx_v7_0_get_csb_size(adev);
- if (adev->gfx.rlc.clear_state_obj == NULL) {
- r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL,
- &adev->gfx.rlc.clear_state_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
- }
- r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
- if (unlikely(r != 0)) {
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.clear_state_gpu_addr);
+ r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.clear_state_obj,
+ &adev->gfx.rlc.clear_state_gpu_addr,
+ (void **)&adev->gfx.rlc.cs_ptr);
if (r) {
- amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
- dev_warn(adev->dev, "(%d) pin RLC c bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
gfx_v7_0_rlc_fini(adev);
return r;
}
- r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj, (void **)&adev->gfx.rlc.cs_ptr);
- if (r) {
- dev_warn(adev->dev, "(%d) map RLC c bo failed\n", r);
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
/* set up the cs buffer */
dst_ptr = adev->gfx.rlc.cs_ptr;
gfx_v7_0_get_csb_buffer(adev, dst_ptr);
@@ -3518,37 +3433,14 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
}
if (adev->gfx.rlc.cp_table_size) {
- if (adev->gfx.rlc.cp_table_obj == NULL) {
- r = amdgpu_bo_create(adev, adev->gfx.rlc.cp_table_size, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL,
- &adev->gfx.rlc.cp_table_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
- }
- r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, false);
- if (unlikely(r != 0)) {
- dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.rlc.cp_table_obj, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.cp_table_gpu_addr);
- if (r) {
- amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
- dev_warn(adev->dev, "(%d) pin RLC cp_table bo failed\n", r);
- gfx_v7_0_rlc_fini(adev);
- return r;
- }
- r = amdgpu_bo_kmap(adev->gfx.rlc.cp_table_obj, (void **)&adev->gfx.rlc.cp_table_ptr);
+ r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size,
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.cp_table_obj,
+ &adev->gfx.rlc.cp_table_gpu_addr,
+ (void **)&adev->gfx.rlc.cp_table_ptr);
if (r) {
- dev_warn(adev->dev, "(%d) map RLC cp table bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
gfx_v7_0_rlc_fini(adev);
return r;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index b58d98d..b086f4e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1278,39 +1278,17 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
/* clear state block */
adev->gfx.rlc.clear_state_size = dws = gfx_v8_0_get_csb_size(adev);
- if (adev->gfx.rlc.clear_state_obj == NULL) {
- r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL,
- &adev->gfx.rlc.clear_state_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
- gfx_v8_0_rlc_fini(adev);
- return r;
- }
- }
- r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
- if (unlikely(r != 0)) {
- gfx_v8_0_rlc_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.clear_state_gpu_addr);
+ r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.clear_state_obj,
+ &adev->gfx.rlc.clear_state_gpu_addr,
+ (void **)&adev->gfx.rlc.cs_ptr);
if (r) {
- amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
- dev_warn(adev->dev, "(%d) pin RLC cbs bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
gfx_v8_0_rlc_fini(adev);
return r;
}
- r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj, (void **)&adev->gfx.rlc.cs_ptr);
- if (r) {
- dev_warn(adev->dev, "(%d) map RLC cbs bo failed\n", r);
- gfx_v8_0_rlc_fini(adev);
- return r;
- }
/* set up the cs buffer */
dst_ptr = adev->gfx.rlc.cs_ptr;
gfx_v8_0_get_csb_buffer(adev, dst_ptr);
@@ -1321,34 +1299,13 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
if ((adev->asic_type == CHIP_CARRIZO) ||
(adev->asic_type == CHIP_STONEY)) {
adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */
- if (adev->gfx.rlc.cp_table_obj == NULL) {
- r = amdgpu_bo_create(adev, adev->gfx.rlc.cp_table_size, PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
- AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
- NULL, NULL,
- &adev->gfx.rlc.cp_table_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, false);
- if (unlikely(r != 0)) {
- dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.rlc.cp_table_obj, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.cp_table_gpu_addr);
- if (r) {
- amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
- dev_warn(adev->dev, "(%d) pin RLC cp table bo failed\n", r);
- return r;
- }
- r = amdgpu_bo_kmap(adev->gfx.rlc.cp_table_obj, (void **)&adev->gfx.rlc.cp_table_ptr);
+ r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size,
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.cp_table_obj,
+ &adev->gfx.rlc.cp_table_gpu_addr,
+ (void **)&adev->gfx.rlc.cp_table_ptr);
if (r) {
- dev_warn(adev->dev, "(%d) map RLC cp table bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
return r;
}
@@ -1389,34 +1346,13 @@ static int gfx_v8_0_mec_init(struct amdgpu_device *adev)
mec_hpd_size = adev->gfx.num_compute_rings * GFX8_MEC_HPD_SIZE;
- if (adev->gfx.mec.hpd_eop_obj == NULL) {
- r = amdgpu_bo_create(adev,
- mec_hpd_size,
- PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
- &adev->gfx.mec.hpd_eop_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);
- if (unlikely(r != 0)) {
- gfx_v8_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.mec.hpd_eop_obj, AMDGPU_GEM_DOMAIN_GTT,
- &adev->gfx.mec.hpd_eop_gpu_addr);
- if (r) {
- dev_warn(adev->dev, "(%d) pin HDP EOP bo failed\n", r);
- gfx_v8_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_kmap(adev->gfx.mec.hpd_eop_obj, (void **)&hpd);
+ r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_GTT,
+ &adev->gfx.mec.hpd_eop_obj,
+ &adev->gfx.mec.hpd_eop_gpu_addr,
+ (void **)&hpd);
if (r) {
- dev_warn(adev->dev, "(%d) map HDP EOP bo failed\n", r);
- gfx_v8_0_mec_fini(adev);
+ dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
return r;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4d7f042..024eccc 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -772,18 +772,16 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
if (cs_data) {
/* clear state block */
adev->gfx.rlc.clear_state_size = dws = gfx_v9_0_get_csb_size(adev);
- if (adev->gfx.rlc.clear_state_obj == NULL) {
- r = amdgpu_bo_create_kernel(adev, dws * 4, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.clear_state_obj,
- &adev->gfx.rlc.clear_state_gpu_addr,
- (void **)&adev->gfx.rlc.cs_ptr);
- if (r) {
- dev_err(adev->dev,
- "(%d) failed to create rlc csb bo\n", r);
- gfx_v9_0_rlc_fini(adev);
- return r;
- }
+ r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.clear_state_obj,
+ &adev->gfx.rlc.clear_state_gpu_addr,
+ (void **)&adev->gfx.rlc.cs_ptr);
+ if (r) {
+ dev_err(adev->dev, "(%d) failed to create rlc csb bo\n",
+ r);
+ gfx_v9_0_rlc_fini(adev);
+ return r;
}
/* set up the cs buffer */
dst_ptr = adev->gfx.rlc.cs_ptr;
@@ -795,18 +793,16 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
if (adev->asic_type == CHIP_RAVEN) {
/* TODO: double check the cp_table_size for RV */
adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */
- if (adev->gfx.rlc.cp_table_obj == NULL) {
- r = amdgpu_bo_create_kernel(adev, adev->gfx.rlc.cp_table_size,
- PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
- &adev->gfx.rlc.cp_table_obj,
- &adev->gfx.rlc.cp_table_gpu_addr,
- (void **)&adev->gfx.rlc.cp_table_ptr);
- if (r) {
- dev_err(adev->dev,
- "(%d) failed to create cp table bo\n", r);
- gfx_v9_0_rlc_fini(adev);
- return r;
- }
+ r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size,
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+ &adev->gfx.rlc.cp_table_obj,
+ &adev->gfx.rlc.cp_table_gpu_addr,
+ (void **)&adev->gfx.rlc.cp_table_ptr);
+ if (r) {
+ dev_err(adev->dev,
+ "(%d) failed to create cp table bo\n", r);
+ gfx_v9_0_rlc_fini(adev);
+ return r;
}
rv_init_cp_jump_table(adev);
@@ -862,33 +858,13 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
amdgpu_gfx_compute_queue_acquire(adev);
mec_hpd_size = adev->gfx.num_compute_rings * GFX9_MEC_HPD_SIZE;
- if (adev->gfx.mec.hpd_eop_obj == NULL) {
- r = amdgpu_bo_create(adev,
- mec_hpd_size,
- PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
- &adev->gfx.mec.hpd_eop_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);
- if (unlikely(r != 0)) {
- gfx_v9_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.mec.hpd_eop_obj, AMDGPU_GEM_DOMAIN_GTT,
- &adev->gfx.mec.hpd_eop_gpu_addr);
- if (r) {
- dev_warn(adev->dev, "(%d) pin HDP EOP bo failed\n", r);
- gfx_v9_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_kmap(adev->gfx.mec.hpd_eop_obj, (void **)&hpd);
+ r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_GTT,
+ &adev->gfx.mec.hpd_eop_obj,
+ &adev->gfx.mec.hpd_eop_gpu_addr,
+ (void **)&hpd);
if (r) {
- dev_warn(adev->dev, "(%d) map HDP EOP bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
gfx_v9_0_mec_fini(adev);
return r;
}
@@ -905,42 +881,22 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes));
fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4;
- if (adev->gfx.mec.mec_fw_obj == NULL) {
- r = amdgpu_bo_create(adev,
- mec_hdr->header.ucode_size_bytes,
- PAGE_SIZE, true,
- AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
- &adev->gfx.mec.mec_fw_obj);
- if (r) {
- dev_warn(adev->dev, "(%d) create mec firmware bo failed\n", r);
- return r;
- }
- }
-
- r = amdgpu_bo_reserve(adev->gfx.mec.mec_fw_obj, false);
- if (unlikely(r != 0)) {
- gfx_v9_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_pin(adev->gfx.mec.mec_fw_obj, AMDGPU_GEM_DOMAIN_GTT,
- &adev->gfx.mec.mec_fw_gpu_addr);
- if (r) {
- dev_warn(adev->dev, "(%d) pin mec firmware bo failed\n", r);
- gfx_v9_0_mec_fini(adev);
- return r;
- }
- r = amdgpu_bo_kmap(adev->gfx.mec.mec_fw_obj, (void **)&fw);
+ r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes,
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
+ &adev->gfx.mec.mec_fw_obj,
+ &adev->gfx.mec.mec_fw_gpu_addr,
+ (void **)&fw);
if (r) {
- dev_warn(adev->dev, "(%d) map firmware bo failed\n", r);
+ dev_warn(adev->dev, "(%d) create mec firmware bo failed\n", r);
gfx_v9_0_mec_fini(adev);
return r;
}
+
memcpy(fw, fw_data, fw_size);
amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj);
amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);
-
return 0;
}
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 8/8] drm/amdgpu: use amdgpu_bo_free_kernel more often
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (5 preceding siblings ...)
2017-07-27 15:44 ` [PATCH 7/8] drm/amdgpu: use amdgpu_bo_create_kernel more often Christian König
@ 2017-07-27 15:44 ` Christian König
[not found] ` <1501170244-1832-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:36 ` [PATCH 1/8] drm/amdgpu: cleanup kptr handling Deucher, Alexander
7 siblings, 1 reply; 16+ messages in thread
From: Christian König @ 2017-07-27 15:44 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
Saves us even more loc.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 13 +-----
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 37 ++---------------
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 67 +++---------------------------
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 37 ++---------------
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 24 +----------
5 files changed, 15 insertions(+), 163 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 60f60e9..d01737d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -346,18 +346,7 @@ static int amdgpu_vram_scratch_init(struct amdgpu_device *adev)
static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev)
{
- int r;
-
- if (adev->vram_scratch.robj == NULL) {
- return;
- }
- r = amdgpu_bo_reserve(adev->vram_scratch.robj, true);
- if (likely(r == 0)) {
- amdgpu_bo_kunmap(adev->vram_scratch.robj);
- amdgpu_bo_unpin(adev->vram_scratch.robj);
- amdgpu_bo_unreserve(adev->vram_scratch.robj);
- }
- amdgpu_bo_unref(&adev->vram_scratch.robj);
+ amdgpu_bo_free_kernel(&adev->vram_scratch.robj, NULL, NULL);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index faf8d28..d228f5a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -2217,40 +2217,9 @@ static void gfx_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
static void gfx_v6_0_rlc_fini(struct amdgpu_device *adev)
{
- int r;
-
- if (adev->gfx.rlc.save_restore_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC sr bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
-
- amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj);
- adev->gfx.rlc.save_restore_obj = NULL;
- }
-
- if (adev->gfx.rlc.clear_state_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC c bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
- amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);
- adev->gfx.rlc.clear_state_obj = NULL;
- }
-
- if (adev->gfx.rlc.cp_table_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
-
- amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);
- adev->gfx.rlc.cp_table_obj = NULL;
- }
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL, NULL);
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL);
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);
}
static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 6e6e952..ad4b5c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2774,39 +2774,18 @@ static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev)
*/
static void gfx_v7_0_cp_compute_fini(struct amdgpu_device *adev)
{
- int i, r;
+ int i;
for (i = 0; i < adev->gfx.num_compute_rings; i++) {
struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];
- if (ring->mqd_obj) {
- r = amdgpu_bo_reserve(ring->mqd_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve MQD bo failed\n", r);
-
- amdgpu_bo_unpin(ring->mqd_obj);
- amdgpu_bo_unreserve(ring->mqd_obj);
-
- amdgpu_bo_unref(&ring->mqd_obj);
- ring->mqd_obj = NULL;
- }
+ amdgpu_bo_free_kernel(&ring->mqd_obj, NULL, NULL);
}
}
static void gfx_v7_0_mec_fini(struct amdgpu_device *adev)
{
- int r;
-
- if (adev->gfx.mec.hpd_eop_obj) {
- r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);
- amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
-
- amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);
- adev->gfx.mec.hpd_eop_obj = NULL;
- }
+ amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
}
static int gfx_v7_0_mec_init(struct amdgpu_device *adev)
@@ -3320,43 +3299,9 @@ static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
*/
static void gfx_v7_0_rlc_fini(struct amdgpu_device *adev)
{
- int r;
-
- /* save restore block */
- if (adev->gfx.rlc.save_restore_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC sr bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
-
- amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj);
- adev->gfx.rlc.save_restore_obj = NULL;
- }
-
- /* clear state block */
- if (adev->gfx.rlc.clear_state_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC c bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
-
- amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);
- adev->gfx.rlc.clear_state_obj = NULL;
- }
-
- /* clear state block */
- if (adev->gfx.rlc.cp_table_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
-
- amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);
- adev->gfx.rlc.cp_table_obj = NULL;
- }
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL, NULL);
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL);
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);
}
static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index b086f4e..3cf742d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1238,29 +1238,8 @@ static void cz_init_cp_jump_table(struct amdgpu_device *adev)
static void gfx_v8_0_rlc_fini(struct amdgpu_device *adev)
{
- int r;
-
- /* clear state block */
- if (adev->gfx.rlc.clear_state_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC cbs bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
- amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);
- adev->gfx.rlc.clear_state_obj = NULL;
- }
-
- /* jump table block */
- if (adev->gfx.rlc.cp_table_obj) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);
- amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
- amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);
- adev->gfx.rlc.cp_table_obj = NULL;
- }
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL);
+ amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);
}
static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
@@ -1320,17 +1299,7 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)
{
- int r;
-
- if (adev->gfx.mec.hpd_eop_obj) {
- r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);
- amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
- amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);
- adev->gfx.mec.hpd_eop_obj = NULL;
- }
+ amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
}
static int gfx_v8_0_mec_init(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 024eccc..8d52ed5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -817,28 +817,8 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)
{
- int r;
-
- if (adev->gfx.mec.hpd_eop_obj) {
- r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);
- amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
-
- amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);
- adev->gfx.mec.hpd_eop_obj = NULL;
- }
- if (adev->gfx.mec.mec_fw_obj) {
- r = amdgpu_bo_reserve(adev->gfx.mec.mec_fw_obj, true);
- if (unlikely(r != 0))
- dev_warn(adev->dev, "(%d) reserve mec firmware bo failed\n", r);
- amdgpu_bo_unpin(adev->gfx.mec.mec_fw_obj);
- amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);
-
- amdgpu_bo_unref(&adev->gfx.mec.mec_fw_obj);
- adev->gfx.mec.mec_fw_obj = NULL;
- }
+ amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
+ amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL);
}
static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* RE: [PATCH 1/8] drm/amdgpu: cleanup kptr handling
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
` (6 preceding siblings ...)
2017-07-27 15:44 ` [PATCH 8/8] drm/amdgpu: use amdgpu_bo_free_kernel " Christian König
@ 2017-07-27 17:36 ` Deucher, Alexander
7 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:36 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 1/8] drm/amdgpu: cleanup kptr handling
>
> From: Christian König <christian.koenig@amd.com>
>
> Don't keep around the same pointer twice.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 26 +++++++++++++++--
> ---------
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++--
> 5 files changed, 19 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index fe96236..c539bdd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -427,7 +427,6 @@ struct amdgpu_bo {
> struct ttm_bo_kmap_obj kmap;
> u64 flags;
> unsigned pin_count;
> - void *kptr;
> u64 tiling_flags;
> u64 metadata_flags;
> void *metadata;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> index f0c8123..f48c780 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> @@ -246,7 +246,7 @@ static int amdgpufb_create(struct drm_fb_helper
> *helper,
> tmp = amdgpu_bo_gpu_offset(abo) - adev->mc.vram_start;
> info->fix.smem_start = adev->mc.aper_base + tmp;
> info->fix.smem_len = amdgpu_bo_size(abo);
> - info->screen_base = abo->kptr;
> + info->screen_base = amdgpu_bo_kptr(abo);
> info->screen_size = amdgpu_bo_size(abo);
>
> drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width,
> sizes->fb_height);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 3ec43cf..8fddea4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -609,16 +609,16 @@ int amdgpu_bo_restore_from_shadow(struct
> amdgpu_device *adev,
>
> int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
> {
> - bool is_iomem;
> + void *kptr;
> long r;
>
> if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
> return -EPERM;
>
> - if (bo->kptr) {
> - if (ptr) {
> - *ptr = bo->kptr;
> - }
> + kptr = amdgpu_bo_kptr(bo);
> + if (kptr) {
> + if (ptr)
> + *ptr = kptr;
> return 0;
> }
>
> @@ -631,19 +631,23 @@ int amdgpu_bo_kmap(struct amdgpu_bo *bo, void
> **ptr)
> if (r)
> return r;
>
> - bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
> if (ptr)
> - *ptr = bo->kptr;
> + *ptr = amdgpu_bo_kptr(bo);
>
> return 0;
> }
>
> +void *amdgpu_bo_kptr(struct amdgpu_bo *bo)
> +{
> + bool is_iomem;
> +
> + return ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
> +}
> +
> void amdgpu_bo_kunmap(struct amdgpu_bo *bo)
> {
> - if (bo->kptr == NULL)
> - return;
> - bo->kptr = NULL;
> - ttm_bo_kunmap(&bo->kmap);
> + if (bo->kmap.bo)
> + ttm_bo_kunmap(&bo->kmap);
> }
>
> struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index 833b172..f53d53d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -147,6 +147,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device
> *adev,
> void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
> void **cpu_addr);
> int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
> +void *amdgpu_bo_kptr(struct amdgpu_bo *bo);
> void amdgpu_bo_kunmap(struct amdgpu_bo *bo);
> struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo);
> void amdgpu_bo_unref(struct amdgpu_bo **bo);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index fc482cc4..a1d4294 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1059,7 +1059,7 @@ static int amdgpu_vm_update_level(struct
> amdgpu_device *adev,
> shadow = parent->bo->shadow;
>
> if (vm->use_cpu_for_update) {
> - pd_addr = (unsigned long)parent->bo->kptr;
> + pd_addr = (unsigned long)amdgpu_bo_kptr(parent->bo);
> r = amdgpu_vm_wait_pd(adev, vm,
> AMDGPU_FENCE_OWNER_VM);
> if (unlikely(r))
> return r;
> @@ -1400,7 +1400,7 @@ static int amdgpu_vm_update_ptes(struct
> amdgpu_pte_update_params *params,
>
> pt = entry->bo;
> if (use_cpu_update) {
> - pe_start = (unsigned long)pt->kptr;
> + pe_start = (unsigned long)amdgpu_bo_kptr(pt);
> } else {
> if (pt->shadow) {
> pe_start = amdgpu_bo_gpu_offset(pt-
> >shadow);
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 2/8] drm/amdgpu: consistent use u64_to_user_ptr
[not found] ` <1501170244-1832-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 17:37 ` Deucher, Alexander
0 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:37 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 2/8] drm/amdgpu: consistent use u64_to_user_ptr
>
> From: Christian König <christian.koenig@amd.com>
>
> Instead of open coding the conversion from u64 to pointers.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 2 +-
> 3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
> index 6fd5831..fd5d192 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
> @@ -270,7 +270,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev,
> void *data,
> struct amdgpu_fpriv *fpriv = filp->driver_priv;
> union drm_amdgpu_bo_list *args = data;
> uint32_t handle = args->in.list_handle;
> - const void __user *uptr = (const void*)(uintptr_t)args-
> >in.bo_info_ptr;
> + const void __user *uptr = u64_to_user_ptr(args->in.bo_info_ptr);
>
> struct drm_amdgpu_bo_list_entry *info;
> struct amdgpu_bo_list *list;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 44ec11d..cd5c08a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -89,7 +89,7 @@ static int amdgpu_cs_parser_init(struct
> amdgpu_cs_parser *p, void *data)
> }
>
> /* get chunks */
> - chunk_array_user = (uint64_t __user *)(uintptr_t)(cs->in.chunks);
> + chunk_array_user = u64_to_user_ptr(cs->in.chunks);
> if (copy_from_user(chunk_array, chunk_array_user,
> sizeof(uint64_t)*cs->in.num_chunks)) {
> ret = -EFAULT;
> @@ -109,7 +109,7 @@ static int amdgpu_cs_parser_init(struct
> amdgpu_cs_parser *p, void *data)
> struct drm_amdgpu_cs_chunk user_chunk;
> uint32_t __user *cdata;
>
> - chunk_ptr = (void __user *)(uintptr_t)chunk_array[i];
> + chunk_ptr = u64_to_user_ptr(chunk_array[i]);
> if (copy_from_user(&user_chunk, chunk_ptr,
> sizeof(struct drm_amdgpu_cs_chunk))) {
> ret = -EFAULT;
> @@ -120,7 +120,7 @@ static int amdgpu_cs_parser_init(struct
> amdgpu_cs_parser *p, void *data)
> p->chunks[i].length_dw = user_chunk.length_dw;
>
> size = p->chunks[i].length_dw;
> - cdata = (void __user *)(uintptr_t)user_chunk.chunk_data;
> + cdata = u64_to_user_ptr(user_chunk.chunk_data);
>
> p->chunks[i].kdata = drm_malloc_ab(size, sizeof(uint32_t));
> if (p->chunks[i].kdata == NULL) {
> @@ -1352,7 +1352,7 @@ int amdgpu_cs_wait_fences_ioctl(struct
> drm_device *dev, void *data,
> if (fences == NULL)
> return -ENOMEM;
>
> - fences_user = (void __user *)(uintptr_t)(wait->in.fences);
> + fences_user = u64_to_user_ptr(wait->in.fences);
> if (copy_from_user(fences, fences_user,
> sizeof(struct drm_amdgpu_fence) * fence_count)) {
> r = -EFAULT;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index 917ac5e..88085e7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -689,7 +689,7 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev,
> void *data,
> switch (args->op) {
> case AMDGPU_GEM_OP_GET_GEM_CREATE_INFO: {
> struct drm_amdgpu_gem_create_in info;
> - void __user *out = (void __user *)(uintptr_t)args->value;
> + void __user *out = u64_to_user_ptr(args->value);
>
> info.bo_size = robj->gem_base.size;
> info.alignment = robj->tbo.mem.page_alignment <<
> PAGE_SHIFT;
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 3/8] drm/amdgpu: move some defines around
[not found] ` <1501170244-1832-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 17:37 ` Deucher, Alexander
0 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:37 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 3/8] drm/amdgpu: move some defines around
>
> From: Christian König <christian.koenig@amd.com>
>
> Move amdgpu_bo and related structures into amdgpu_object.h.
>
> Move amdgpu_bo_list structures to the amdgpu_bo_list functions.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 77 ++++-------------------------
> -
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 58
> ++++++++++++++++++++++
> 2 files changed, 67 insertions(+), 68 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index c539bdd..3c59d7b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -375,77 +375,10 @@ struct amdgpu_clock {
> };
>
> /*
> - * BO.
> + * GEM.
> */
> -struct amdgpu_bo_list_entry {
> - struct amdgpu_bo *robj;
> - struct ttm_validate_buffer tv;
> - struct amdgpu_bo_va *bo_va;
> - uint32_t priority;
> - struct page **user_pages;
> - int user_invalidated;
> -};
> -
> -struct amdgpu_bo_va_mapping {
> - struct list_head list;
> - struct rb_node rb;
> - uint64_t start;
> - uint64_t last;
> - uint64_t __subtree_last;
> - uint64_t offset;
> - uint64_t flags;
> -};
> -
> -/* bo virtual addresses in a specific vm */
> -struct amdgpu_bo_va {
> - /* protected by bo being reserved */
> - struct list_head bo_list;
> - struct dma_fence *last_pt_update;
> - unsigned ref_count;
> -
> - /* protected by vm mutex and spinlock */
> - struct list_head vm_status;
> -
> - /* mappings for this bo_va */
> - struct list_head invalids;
> - struct list_head valids;
> -
> - /* constant after initialization */
> - struct amdgpu_vm *vm;
> - struct amdgpu_bo *bo;
> -};
>
> #define AMDGPU_GEM_DOMAIN_MAX 0x3
> -
> -struct amdgpu_bo {
> - /* Protected by tbo.reserved */
> - u32 prefered_domains;
> - u32 allowed_domains;
> - struct ttm_place
> placements[AMDGPU_GEM_DOMAIN_MAX + 1];
> - struct ttm_placement placement;
> - struct ttm_buffer_object tbo;
> - struct ttm_bo_kmap_obj kmap;
> - u64 flags;
> - unsigned pin_count;
> - u64 tiling_flags;
> - u64 metadata_flags;
> - void *metadata;
> - u32 metadata_size;
> - unsigned prime_shared_count;
> - /* list of all virtual address to which this bo
> - * is associated to
> - */
> - struct list_head va;
> - /* Constant after initialization */
> - struct drm_gem_object gem_base;
> - struct amdgpu_bo *parent;
> - struct amdgpu_bo *shadow;
> -
> - struct ttm_bo_kmap_obj dma_buf_vmap;
> - struct amdgpu_mn *mn;
> - struct list_head mn_list;
> - struct list_head shadow_list;
> -};
> #define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo,
> gem_base)
>
> void amdgpu_gem_object_free(struct drm_gem_object *obj);
> @@ -826,6 +759,14 @@ struct amdgpu_fpriv {
> /*
> * residency list
> */
> +struct amdgpu_bo_list_entry {
> + struct amdgpu_bo *robj;
> + struct ttm_validate_buffer tv;
> + struct amdgpu_bo_va *bo_va;
> + uint32_t priority;
> + struct page **user_pages;
> + int user_invalidated;
> +};
>
> struct amdgpu_bo_list {
> struct mutex lock;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index f53d53d..a401fe3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -33,6 +33,64 @@
>
> #define AMDGPU_BO_INVALID_OFFSET LONG_MAX
>
> +struct amdgpu_bo_va_mapping {
> + struct list_head list;
> + struct rb_node rb;
> + uint64_t start;
> + uint64_t last;
> + uint64_t __subtree_last;
> + uint64_t offset;
> + uint64_t flags;
> +};
> +
> +/* bo virtual addresses in a specific vm */
> +struct amdgpu_bo_va {
> + /* protected by bo being reserved */
> + struct list_head bo_list;
> + struct dma_fence *last_pt_update;
> + unsigned ref_count;
> +
> + /* protected by vm mutex and spinlock */
> + struct list_head vm_status;
> +
> + /* mappings for this bo_va */
> + struct list_head invalids;
> + struct list_head valids;
> +
> + /* constant after initialization */
> + struct amdgpu_vm *vm;
> + struct amdgpu_bo *bo;
> +};
> +
> +
> +struct amdgpu_bo {
> + /* Protected by tbo.reserved */
> + u32 prefered_domains;
> + u32 allowed_domains;
> + struct ttm_place
> placements[AMDGPU_GEM_DOMAIN_MAX + 1];
> + struct ttm_placement placement;
> + struct ttm_buffer_object tbo;
> + struct ttm_bo_kmap_obj kmap;
> + u64 flags;
> + unsigned pin_count;
> + u64 tiling_flags;
> + u64 metadata_flags;
> + void *metadata;
> + u32 metadata_size;
> + unsigned prime_shared_count;
> + /* list of all virtual address to which this bo is associated to */
> + struct list_head va;
> + /* Constant after initialization */
> + struct drm_gem_object gem_base;
> + struct amdgpu_bo *parent;
> + struct amdgpu_bo *shadow;
> +
> + struct ttm_bo_kmap_obj dma_buf_vmap;
> + struct amdgpu_mn *mn;
> + struct list_head mn_list;
> + struct list_head shadow_list;
> +};
> +
> /**
> * amdgpu_mem_type_to_domain - return domain corresponding to
> mem_type
> * @mem_type: ttm memory type
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 4/8] drm/amdgpu: shadow and mn list are mutal exclusive
[not found] ` <1501170244-1832-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 17:39 ` Deucher, Alexander
0 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:39 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 4/8] drm/amdgpu: shadow and mn list are mutal exclusive
mutually
>
> From: Christian König <christian.koenig@amd.com>
>
> Save some memory because only on of those is used at all times.
one
>
> TODO: Should we use an union here or just a single field?
I think the union is better since it makes it clear when we use each version. With the above fixes:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index a401fe3..3b92d52 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -87,8 +87,11 @@ struct amdgpu_bo {
>
> struct ttm_bo_kmap_obj dma_buf_vmap;
> struct amdgpu_mn *mn;
> - struct list_head mn_list;
> - struct list_head shadow_list;
> +
> + union {
> + struct list_head mn_list;
> + struct list_head shadow_list;
> + };
> };
>
> /**
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 5/8] drm/amdgpu: improve amdgpu_bo_create_kernel
[not found] ` <1501170244-1832-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 17:42 ` Deucher, Alexander
0 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:42 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 5/8] drm/amdgpu: improve amdgpu_bo_create_kernel
>
> From: Christian König <christian.koenig@amd.com>
>
> Make allocating the new BO optional.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 22 ++++++++++++++----
> ----
> 1 file changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 8fddea4..81d40e3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -239,15 +239,20 @@ int amdgpu_bo_create_kernel(struct
> amdgpu_device *adev,
> u32 domain, struct amdgpu_bo **bo_ptr,
> u64 *gpu_addr, void **cpu_addr)
> {
> + bool free = false;
> int r;
>
> - r = amdgpu_bo_create(adev, size, align, true, domain,
> - AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
> |
> - AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL, bo_ptr);
> - if (r) {
> - dev_err(adev->dev, "(%d) failed to allocate kernel bo\n", r);
> - return r;
> + if (!*bo_ptr) {
> + r = amdgpu_bo_create(adev, size, align, true, domain,
> +
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> +
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> + NULL, NULL, bo_ptr);
> + if (r) {
> + dev_err(adev->dev, "(%d) failed to allocate kernel
> bo\n",
> + r);
> + return r;
> + }
> + free = true;
> }
>
> r = amdgpu_bo_reserve(*bo_ptr, false);
> @@ -278,7 +283,8 @@ int amdgpu_bo_create_kernel(struct amdgpu_device
> *adev,
> amdgpu_bo_unreserve(*bo_ptr);
>
> error_free:
> - amdgpu_bo_unref(bo_ptr);
> + if (free)
> + amdgpu_bo_unref(bo_ptr);
>
> return r;
> }
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 6/8] drm/amdgpu: add amdgpu_bo_create_reserved
[not found] ` <1501170244-1832-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 17:42 ` Deucher, Alexander
0 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:42 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 6/8] drm/amdgpu: add amdgpu_bo_create_reserved
>
> From: Christian König <christian.koenig@amd.com>
>
> Same as amdgpu_bo_create_kernel, but keeps the BO reserved.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 48
> +++++++++++++++++++++++++-----
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 4 +++
> 2 files changed, 44 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 81d40e3..494b793 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -220,7 +220,7 @@ static void amdgpu_fill_placement_to_bo(struct
> amdgpu_bo *bo,
> }
>
> /**
> - * amdgpu_bo_create_kernel - create BO for kernel use
> + * amdgpu_bo_create_reserved - create reserved BO for kernel use
> *
> * @adev: amdgpu device object
> * @size: size for the new BO
> @@ -230,14 +230,15 @@ static void amdgpu_fill_placement_to_bo(struct
> amdgpu_bo *bo,
> * @gpu_addr: GPU addr of the pinned BO
> * @cpu_addr: optional CPU address mapping
> *
> - * Allocates and pins a BO for kernel internal use.
> + * Allocates and pins a BO for kernel internal use, and returns it still
> + * reserved.
> *
> * Returns 0 on success, negative error code otherwise.
> */
> -int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> - unsigned long size, int align,
> - u32 domain, struct amdgpu_bo **bo_ptr,
> - u64 *gpu_addr, void **cpu_addr)
> +int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
> + unsigned long size, int align,
> + u32 domain, struct amdgpu_bo **bo_ptr,
> + u64 *gpu_addr, void **cpu_addr)
> {
> bool free = false;
> int r;
> @@ -275,8 +276,6 @@ int amdgpu_bo_create_kernel(struct amdgpu_device
> *adev,
> }
> }
>
> - amdgpu_bo_unreserve(*bo_ptr);
> -
> return 0;
>
> error_unreserve:
> @@ -290,6 +289,39 @@ int amdgpu_bo_create_kernel(struct
> amdgpu_device *adev,
> }
>
> /**
> + * amdgpu_bo_create_kernel - create BO for kernel use
> + *
> + * @adev: amdgpu device object
> + * @size: size for the new BO
> + * @align: alignment for the new BO
> + * @domain: where to place it
> + * @bo_ptr: resulting BO
> + * @gpu_addr: GPU addr of the pinned BO
> + * @cpu_addr: optional CPU address mapping
> + *
> + * Allocates and pins a BO for kernel internal use.
> + *
> + * Returns 0 on success, negative error code otherwise.
> + */
> +int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> + unsigned long size, int align,
> + u32 domain, struct amdgpu_bo **bo_ptr,
> + u64 *gpu_addr, void **cpu_addr)
> +{
> + int r;
> +
> + r = amdgpu_bo_create_reserved(adev, size, align, domain, bo_ptr,
> + gpu_addr, cpu_addr);
> +
> + if (r)
> + return r;
> +
> + amdgpu_bo_unreserve(*bo_ptr);
> +
> + return 0;
> +}
> +
> +/**
> * amdgpu_bo_free_kernel - free BO for kernel use
> *
> * @bo: amdgpu BO to free
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index 3b92d52..cbf6e6d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -201,6 +201,10 @@ int amdgpu_bo_create_restricted(struct
> amdgpu_device *adev,
> struct ttm_placement *placement,
> struct reservation_object *resv,
> struct amdgpu_bo **bo_ptr);
> +int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
> + unsigned long size, int align,
> + u32 domain, struct amdgpu_bo **bo_ptr,
> + u64 *gpu_addr, void **cpu_addr);
> int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> unsigned long size, int align,
> u32 domain, struct amdgpu_bo **bo_ptr,
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 7/8] drm/amdgpu: use amdgpu_bo_create_kernel more often
[not found] ` <1501170244-1832-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 17:43 ` Deucher, Alexander
0 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:43 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 7/8] drm/amdgpu: use amdgpu_bo_create_kernel more
> often
>
> From: Christian König <christian.koenig@amd.com>
>
> Saves us quite a bunch of loc.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Nice cleanup!
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 34 +-----
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 19 +---
> drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 70 +++---------
> drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 166 +++++----------------------
> --
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 100 ++++-------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 110 ++++++-------------
> 6 files changed, 103 insertions(+), 396 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 9c0f4cc..60f60e9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -337,35 +337,11 @@ static void amdgpu_block_invalid_wreg(struct
> amdgpu_device *adev,
>
> static int amdgpu_vram_scratch_init(struct amdgpu_device *adev)
> {
> - int r;
> -
> - if (adev->vram_scratch.robj == NULL) {
> - r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE,
> - PAGE_SIZE, true,
> AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL, &adev->vram_scratch.robj);
> - if (r) {
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(adev->vram_scratch.robj, false);
> - if (unlikely(r != 0))
> - return r;
> - r = amdgpu_bo_pin(adev->vram_scratch.robj,
> - AMDGPU_GEM_DOMAIN_VRAM, &adev-
> >vram_scratch.gpu_addr);
> - if (r) {
> - amdgpu_bo_unreserve(adev->vram_scratch.robj);
> - return r;
> - }
> - r = amdgpu_bo_kmap(adev->vram_scratch.robj,
> - (void **)&adev->vram_scratch.ptr);
> - if (r)
> - amdgpu_bo_unpin(adev->vram_scratch.robj);
> - amdgpu_bo_unreserve(adev->vram_scratch.robj);
> -
> - return r;
> + return amdgpu_bo_create_kernel(adev,
> AMDGPU_GPU_PAGE_SIZE,
> + PAGE_SIZE,
> AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->vram_scratch.robj,
> + &adev->vram_scratch.gpu_addr,
> + (void **)&adev->vram_scratch.ptr);
> }
>
> static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 4d2a454..d60819b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1232,23 +1232,12 @@ int amdgpu_ttm_init(struct amdgpu_device
> *adev)
> /* Change the size here instead of the init above so only lpfn is
> affected */
> amdgpu_ttm_set_active_vram_size(adev, adev-
> >mc.visible_vram_size);
>
> - r = amdgpu_bo_create(adev, adev->mc.stolen_size, PAGE_SIZE,
> true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> - AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
> |
> - AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL, &adev->stollen_vga_memory);
> - if (r) {
> - return r;
> - }
> - r = amdgpu_bo_reserve(adev->stollen_vga_memory, false);
> + r = amdgpu_bo_create_kernel(adev, adev->mc.stolen_size,
> PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->stollen_vga_memory,
> + NULL, NULL);
> if (r)
> return r;
> - r = amdgpu_bo_pin(adev->stollen_vga_memory,
> AMDGPU_GEM_DOMAIN_VRAM, NULL);
> - amdgpu_bo_unreserve(adev->stollen_vga_memory);
> - if (r) {
> - amdgpu_bo_unref(&adev->stollen_vga_memory);
> - return r;
> - }
> DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
> (unsigned) (adev->mc.real_vram_size / (1024 * 1024)));
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 4ac85f4..faf8d28 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -2273,43 +2273,23 @@ static int gfx_v6_0_rlc_init(struct amdgpu_device
> *adev)
>
> if (src_ptr) {
> /* save restore block */
> - if (adev->gfx.rlc.save_restore_obj == NULL) {
> - r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE,
> true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
> - NULL, NULL,
> - &adev->gfx.rlc.save_restore_obj);
> -
> - if (r) {
> - dev_warn(adev->dev, "(%d) create RLC sr bo
> failed\n", r);
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj,
> false);
> - if (unlikely(r != 0)) {
> - gfx_v6_0_rlc_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.rlc.save_restore_obj,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.save_restore_gpu_addr);
> + r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.save_restore_obj,
> + &adev-
> >gfx.rlc.save_restore_gpu_addr,
> + (void **)&adev->gfx.rlc.sr_ptr);
> if (r) {
> - amdgpu_bo_unreserve(adev-
> >gfx.rlc.save_restore_obj);
> - dev_warn(adev->dev, "(%d) pin RLC sr bo failed\n",
> r);
> + dev_warn(adev->dev, "(%d) create RLC sr bo
> failed\n",
> + r);
> gfx_v6_0_rlc_fini(adev);
> return r;
> }
>
> - r = amdgpu_bo_kmap(adev->gfx.rlc.save_restore_obj, (void
> **)&adev->gfx.rlc.sr_ptr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) map RLC sr bo failed\n",
> r);
> - gfx_v6_0_rlc_fini(adev);
> - return r;
> - }
> /* write the sr buffer */
> dst_ptr = adev->gfx.rlc.sr_ptr;
> for (i = 0; i < adev->gfx.rlc.reg_list_size; i++)
> dst_ptr[i] = cpu_to_le32(src_ptr[i]);
> +
> amdgpu_bo_kunmap(adev->gfx.rlc.save_restore_obj);
> amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
> }
> @@ -2319,39 +2299,17 @@ static int gfx_v6_0_rlc_init(struct amdgpu_device
> *adev)
> adev->gfx.rlc.clear_state_size =
> gfx_v6_0_get_csb_size(adev);
> dws = adev->gfx.rlc.clear_state_size + (256 / 4);
>
> - if (adev->gfx.rlc.clear_state_obj == NULL) {
> - r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE,
> true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
> - NULL, NULL,
> - &adev->gfx.rlc.clear_state_obj);
> -
> - if (r) {
> - dev_warn(adev->dev, "(%d) create RLC c bo
> failed\n", r);
> - gfx_v6_0_rlc_fini(adev);
> - return r;
> - }
> - }
> - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj,
> false);
> - if (unlikely(r != 0)) {
> - gfx_v6_0_rlc_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.clear_state_gpu_addr);
> + r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.clear_state_obj,
> + &adev-
> >gfx.rlc.clear_state_gpu_addr,
> + (void **)&adev->gfx.rlc.cs_ptr);
> if (r) {
> - amdgpu_bo_unreserve(adev-
> >gfx.rlc.clear_state_obj);
> - dev_warn(adev->dev, "(%d) pin RLC c bo failed\n",
> r);
> + dev_warn(adev->dev, "(%d) create RLC c bo
> failed\n", r);
> gfx_v6_0_rlc_fini(adev);
> return r;
> }
>
> - r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj, (void
> **)&adev->gfx.rlc.cs_ptr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) map RLC c bo failed\n",
> r);
> - gfx_v6_0_rlc_fini(adev);
> - return r;
> - }
> /* set up the cs buffer */
> dst_ptr = adev->gfx.rlc.cs_ptr;
> reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr +
> 256;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 42b932c..6e6e952 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -2823,33 +2823,14 @@ static int gfx_v7_0_mec_init(struct
> amdgpu_device *adev)
> /* allocate space for ALL pipes (even the ones we don't own) */
> mec_hpd_size = adev->gfx.mec.num_mec * adev-
> >gfx.mec.num_pipe_per_mec
> * GFX7_MEC_HPD_SIZE * 2;
> - if (adev->gfx.mec.hpd_eop_obj == NULL) {
> - r = amdgpu_bo_create(adev,
> - mec_hpd_size,
> - PAGE_SIZE, true,
> - AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
> NULL,
> - &adev->gfx.mec.hpd_eop_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create HDP EOP bo
> failed\n", r);
> - return r;
> - }
> - }
>
> - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);
> - if (unlikely(r != 0)) {
> - gfx_v7_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.mec.hpd_eop_obj,
> AMDGPU_GEM_DOMAIN_GTT,
> - &adev->gfx.mec.hpd_eop_gpu_addr);
> + r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_GTT,
> + &adev->gfx.mec.hpd_eop_obj,
> + &adev->gfx.mec.hpd_eop_gpu_addr,
> + (void **)&hpd);
> if (r) {
> - dev_warn(adev->dev, "(%d) pin HDP EOP bo failed\n", r);
> - gfx_v7_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_kmap(adev->gfx.mec.hpd_eop_obj, (void
> **)&hpd);
> - if (r) {
> - dev_warn(adev->dev, "(%d) map HDP EOP bo failed\n", r);
> + dev_warn(adev->dev, "(%d) create, pin or map of HDP EOP
> bo failed\n", r);
> gfx_v7_0_mec_fini(adev);
> return r;
> }
> @@ -3108,32 +3089,12 @@ static int gfx_v7_0_compute_queue_init(struct
> amdgpu_device *adev, int ring_id)
> struct cik_mqd *mqd;
> struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id];
>
> - if (ring->mqd_obj == NULL) {
> - r = amdgpu_bo_create(adev,
> - sizeof(struct cik_mqd),
> - PAGE_SIZE, true,
> - AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
> NULL,
> - &ring->mqd_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create MQD bo
> failed\n", r);
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(ring->mqd_obj, false);
> - if (unlikely(r != 0))
> - goto out;
> -
> - r = amdgpu_bo_pin(ring->mqd_obj, AMDGPU_GEM_DOMAIN_GTT,
> - &mqd_gpu_addr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) pin MQD bo failed\n", r);
> - goto out_unreserve;
> - }
> - r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&mqd);
> + r = amdgpu_bo_create_reserved(adev, sizeof(struct cik_mqd),
> PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_GTT, &ring-
> >mqd_obj,
> + &mqd_gpu_addr, (void **)&mqd);
> if (r) {
> - dev_warn(adev->dev, "(%d) map MQD bo failed\n", r);
> - goto out_unreserve;
> + dev_warn(adev->dev, "(%d) create MQD bo failed\n", r);
> + return r;
> }
>
> mutex_lock(&adev->srbm_mutex);
> @@ -3147,9 +3108,7 @@ static int gfx_v7_0_compute_queue_init(struct
> amdgpu_device *adev, int ring_id)
> mutex_unlock(&adev->srbm_mutex);
>
> amdgpu_bo_kunmap(ring->mqd_obj);
> -out_unreserve:
> amdgpu_bo_unreserve(ring->mqd_obj);
> -out:
> return 0;
> }
>
> @@ -3432,39 +3391,17 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device
> *adev)
>
> if (src_ptr) {
> /* save restore block */
> - if (adev->gfx.rlc.save_restore_obj == NULL) {
> - r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE,
> true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL,
> - &adev->gfx.rlc.save_restore_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create RLC sr bo
> failed\n", r);
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj,
> false);
> - if (unlikely(r != 0)) {
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.rlc.save_restore_obj,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.save_restore_gpu_addr);
> + r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.save_restore_obj,
> + &adev-
> >gfx.rlc.save_restore_gpu_addr,
> + (void **)&adev->gfx.rlc.sr_ptr);
> if (r) {
> - amdgpu_bo_unreserve(adev-
> >gfx.rlc.save_restore_obj);
> - dev_warn(adev->dev, "(%d) pin RLC sr bo failed\n",
> r);
> + dev_warn(adev->dev, "(%d) create, pin or map of
> RLC sr bo failed\n", r);
> gfx_v7_0_rlc_fini(adev);
> return r;
> }
>
> - r = amdgpu_bo_kmap(adev->gfx.rlc.save_restore_obj, (void
> **)&adev->gfx.rlc.sr_ptr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) map RLC sr bo failed\n",
> r);
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> /* write the sr buffer */
> dst_ptr = adev->gfx.rlc.sr_ptr;
> for (i = 0; i < adev->gfx.rlc.reg_list_size; i++)
> @@ -3477,39 +3414,17 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device
> *adev)
> /* clear state block */
> adev->gfx.rlc.clear_state_size = dws =
> gfx_v7_0_get_csb_size(adev);
>
> - if (adev->gfx.rlc.clear_state_obj == NULL) {
> - r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE,
> true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL,
> - &adev->gfx.rlc.clear_state_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create RLC c bo
> failed\n", r);
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> - }
> - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj,
> false);
> - if (unlikely(r != 0)) {
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.clear_state_gpu_addr);
> + r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.clear_state_obj,
> + &adev-
> >gfx.rlc.clear_state_gpu_addr,
> + (void **)&adev->gfx.rlc.cs_ptr);
> if (r) {
> - amdgpu_bo_unreserve(adev-
> >gfx.rlc.clear_state_obj);
> - dev_warn(adev->dev, "(%d) pin RLC c bo failed\n",
> r);
> + dev_warn(adev->dev, "(%d) create RLC c bo
> failed\n", r);
> gfx_v7_0_rlc_fini(adev);
> return r;
> }
>
> - r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj, (void
> **)&adev->gfx.rlc.cs_ptr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) map RLC c bo failed\n",
> r);
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> /* set up the cs buffer */
> dst_ptr = adev->gfx.rlc.cs_ptr;
> gfx_v7_0_get_csb_buffer(adev, dst_ptr);
> @@ -3518,37 +3433,14 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device
> *adev)
> }
>
> if (adev->gfx.rlc.cp_table_size) {
> - if (adev->gfx.rlc.cp_table_obj == NULL) {
> - r = amdgpu_bo_create(adev, adev-
> >gfx.rlc.cp_table_size, PAGE_SIZE, true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL,
> - &adev->gfx.rlc.cp_table_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create RLC cp
> table bo failed\n", r);
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> - }
>
> - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, false);
> - if (unlikely(r != 0)) {
> - dev_warn(adev->dev, "(%d) reserve RLC cp table bo
> failed\n", r);
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.rlc.cp_table_obj,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.cp_table_gpu_addr);
> - if (r) {
> - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
> - dev_warn(adev->dev, "(%d) pin RLC cp_table bo
> failed\n", r);
> - gfx_v7_0_rlc_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_kmap(adev->gfx.rlc.cp_table_obj, (void
> **)&adev->gfx.rlc.cp_table_ptr);
> + r = amdgpu_bo_create_reserved(adev, adev-
> >gfx.rlc.cp_table_size,
> + PAGE_SIZE,
> AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.cp_table_obj,
> + &adev-
> >gfx.rlc.cp_table_gpu_addr,
> + (void **)&adev-
> >gfx.rlc.cp_table_ptr);
> if (r) {
> - dev_warn(adev->dev, "(%d) map RLC cp table bo
> failed\n", r);
> + dev_warn(adev->dev, "(%d) create RLC cp table bo
> failed\n", r);
> gfx_v7_0_rlc_fini(adev);
> return r;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index b58d98d..b086f4e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -1278,39 +1278,17 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device
> *adev)
> /* clear state block */
> adev->gfx.rlc.clear_state_size = dws =
> gfx_v8_0_get_csb_size(adev);
>
> - if (adev->gfx.rlc.clear_state_obj == NULL) {
> - r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE,
> true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL,
> - &adev->gfx.rlc.clear_state_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create RLC c bo
> failed\n", r);
> - gfx_v8_0_rlc_fini(adev);
> - return r;
> - }
> - }
> - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj,
> false);
> - if (unlikely(r != 0)) {
> - gfx_v8_0_rlc_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.clear_state_gpu_addr);
> + r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.clear_state_obj,
> + &adev-
> >gfx.rlc.clear_state_gpu_addr,
> + (void **)&adev->gfx.rlc.cs_ptr);
> if (r) {
> - amdgpu_bo_unreserve(adev-
> >gfx.rlc.clear_state_obj);
> - dev_warn(adev->dev, "(%d) pin RLC cbs bo failed\n",
> r);
> + dev_warn(adev->dev, "(%d) create RLC c bo
> failed\n", r);
> gfx_v8_0_rlc_fini(adev);
> return r;
> }
>
> - r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj, (void
> **)&adev->gfx.rlc.cs_ptr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) map RLC cbs bo
> failed\n", r);
> - gfx_v8_0_rlc_fini(adev);
> - return r;
> - }
> /* set up the cs buffer */
> dst_ptr = adev->gfx.rlc.cs_ptr;
> gfx_v8_0_get_csb_buffer(adev, dst_ptr);
> @@ -1321,34 +1299,13 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device
> *adev)
> if ((adev->asic_type == CHIP_CARRIZO) ||
> (adev->asic_type == CHIP_STONEY)) {
> adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 *
> 1024); /* JT + GDS */
> - if (adev->gfx.rlc.cp_table_obj == NULL) {
> - r = amdgpu_bo_create(adev, adev-
> >gfx.rlc.cp_table_size, PAGE_SIZE, true,
> - AMDGPU_GEM_DOMAIN_VRAM,
> -
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> -
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> - NULL, NULL,
> - &adev->gfx.rlc.cp_table_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create RLC cp
> table bo failed\n", r);
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, false);
> - if (unlikely(r != 0)) {
> - dev_warn(adev->dev, "(%d) reserve RLC cp table bo
> failed\n", r);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.rlc.cp_table_obj,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.cp_table_gpu_addr);
> - if (r) {
> - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
> - dev_warn(adev->dev, "(%d) pin RLC cp table bo
> failed\n", r);
> - return r;
> - }
> - r = amdgpu_bo_kmap(adev->gfx.rlc.cp_table_obj, (void
> **)&adev->gfx.rlc.cp_table_ptr);
> + r = amdgpu_bo_create_reserved(adev, adev-
> >gfx.rlc.cp_table_size,
> + PAGE_SIZE,
> AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.cp_table_obj,
> + &adev-
> >gfx.rlc.cp_table_gpu_addr,
> + (void **)&adev-
> >gfx.rlc.cp_table_ptr);
> if (r) {
> - dev_warn(adev->dev, "(%d) map RLC cp table bo
> failed\n", r);
> + dev_warn(adev->dev, "(%d) create RLC cp table bo
> failed\n", r);
> return r;
> }
>
> @@ -1389,34 +1346,13 @@ static int gfx_v8_0_mec_init(struct
> amdgpu_device *adev)
>
> mec_hpd_size = adev->gfx.num_compute_rings *
> GFX8_MEC_HPD_SIZE;
>
> - if (adev->gfx.mec.hpd_eop_obj == NULL) {
> - r = amdgpu_bo_create(adev,
> - mec_hpd_size,
> - PAGE_SIZE, true,
> - AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
> NULL,
> - &adev->gfx.mec.hpd_eop_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create HDP EOP bo
> failed\n", r);
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);
> - if (unlikely(r != 0)) {
> - gfx_v8_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.mec.hpd_eop_obj,
> AMDGPU_GEM_DOMAIN_GTT,
> - &adev->gfx.mec.hpd_eop_gpu_addr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) pin HDP EOP bo failed\n", r);
> - gfx_v8_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_kmap(adev->gfx.mec.hpd_eop_obj, (void
> **)&hpd);
> + r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_GTT,
> + &adev->gfx.mec.hpd_eop_obj,
> + &adev->gfx.mec.hpd_eop_gpu_addr,
> + (void **)&hpd);
> if (r) {
> - dev_warn(adev->dev, "(%d) map HDP EOP bo failed\n", r);
> - gfx_v8_0_mec_fini(adev);
> + dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
> return r;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 4d7f042..024eccc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -772,18 +772,16 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device
> *adev)
> if (cs_data) {
> /* clear state block */
> adev->gfx.rlc.clear_state_size = dws =
> gfx_v9_0_get_csb_size(adev);
> - if (adev->gfx.rlc.clear_state_obj == NULL) {
> - r = amdgpu_bo_create_kernel(adev, dws * 4,
> PAGE_SIZE,
> -
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev-
> >gfx.rlc.clear_state_obj,
> - &adev-
> >gfx.rlc.clear_state_gpu_addr,
> - (void **)&adev-
> >gfx.rlc.cs_ptr);
> - if (r) {
> - dev_err(adev->dev,
> - "(%d) failed to create rlc csb bo\n", r);
> - gfx_v9_0_rlc_fini(adev);
> - return r;
> - }
> + r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.clear_state_obj,
> + &adev-
> >gfx.rlc.clear_state_gpu_addr,
> + (void **)&adev->gfx.rlc.cs_ptr);
> + if (r) {
> + dev_err(adev->dev, "(%d) failed to create rlc csb
> bo\n",
> + r);
> + gfx_v9_0_rlc_fini(adev);
> + return r;
> }
> /* set up the cs buffer */
> dst_ptr = adev->gfx.rlc.cs_ptr;
> @@ -795,18 +793,16 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device
> *adev)
> if (adev->asic_type == CHIP_RAVEN) {
> /* TODO: double check the cp_table_size for RV */
> adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 *
> 1024); /* JT + GDS */
> - if (adev->gfx.rlc.cp_table_obj == NULL) {
> - r = amdgpu_bo_create_kernel(adev, adev-
> >gfx.rlc.cp_table_size,
> - PAGE_SIZE,
> AMDGPU_GEM_DOMAIN_VRAM,
> - &adev->gfx.rlc.cp_table_obj,
> - &adev-
> >gfx.rlc.cp_table_gpu_addr,
> - (void **)&adev-
> >gfx.rlc.cp_table_ptr);
> - if (r) {
> - dev_err(adev->dev,
> - "(%d) failed to create cp table bo\n",
> r);
> - gfx_v9_0_rlc_fini(adev);
> - return r;
> - }
> + r = amdgpu_bo_create_reserved(adev, adev-
> >gfx.rlc.cp_table_size,
> + PAGE_SIZE,
> AMDGPU_GEM_DOMAIN_VRAM,
> + &adev->gfx.rlc.cp_table_obj,
> + &adev-
> >gfx.rlc.cp_table_gpu_addr,
> + (void **)&adev-
> >gfx.rlc.cp_table_ptr);
> + if (r) {
> + dev_err(adev->dev,
> + "(%d) failed to create cp table bo\n", r);
> + gfx_v9_0_rlc_fini(adev);
> + return r;
> }
>
> rv_init_cp_jump_table(adev);
> @@ -862,33 +858,13 @@ static int gfx_v9_0_mec_init(struct amdgpu_device
> *adev)
> amdgpu_gfx_compute_queue_acquire(adev);
> mec_hpd_size = adev->gfx.num_compute_rings *
> GFX9_MEC_HPD_SIZE;
>
> - if (adev->gfx.mec.hpd_eop_obj == NULL) {
> - r = amdgpu_bo_create(adev,
> - mec_hpd_size,
> - PAGE_SIZE, true,
> - AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
> NULL,
> - &adev->gfx.mec.hpd_eop_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create HDP EOP bo
> failed\n", r);
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, false);
> - if (unlikely(r != 0)) {
> - gfx_v9_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.mec.hpd_eop_obj,
> AMDGPU_GEM_DOMAIN_GTT,
> - &adev->gfx.mec.hpd_eop_gpu_addr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) pin HDP EOP bo failed\n", r);
> - gfx_v9_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_kmap(adev->gfx.mec.hpd_eop_obj, (void
> **)&hpd);
> + r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_GTT,
> + &adev->gfx.mec.hpd_eop_obj,
> + &adev->gfx.mec.hpd_eop_gpu_addr,
> + (void **)&hpd);
> if (r) {
> - dev_warn(adev->dev, "(%d) map HDP EOP bo failed\n", r);
> + dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
> gfx_v9_0_mec_fini(adev);
> return r;
> }
> @@ -905,42 +881,22 @@ static int gfx_v9_0_mec_init(struct amdgpu_device
> *adev)
> le32_to_cpu(mec_hdr-
> >header.ucode_array_offset_bytes));
> fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4;
>
> - if (adev->gfx.mec.mec_fw_obj == NULL) {
> - r = amdgpu_bo_create(adev,
> - mec_hdr->header.ucode_size_bytes,
> - PAGE_SIZE, true,
> - AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
> - &adev->gfx.mec.mec_fw_obj);
> - if (r) {
> - dev_warn(adev->dev, "(%d) create mec firmware bo
> failed\n", r);
> - return r;
> - }
> - }
> -
> - r = amdgpu_bo_reserve(adev->gfx.mec.mec_fw_obj, false);
> - if (unlikely(r != 0)) {
> - gfx_v9_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_pin(adev->gfx.mec.mec_fw_obj,
> AMDGPU_GEM_DOMAIN_GTT,
> - &adev->gfx.mec.mec_fw_gpu_addr);
> - if (r) {
> - dev_warn(adev->dev, "(%d) pin mec firmware bo failed\n",
> r);
> - gfx_v9_0_mec_fini(adev);
> - return r;
> - }
> - r = amdgpu_bo_kmap(adev->gfx.mec.mec_fw_obj, (void **)&fw);
> + r = amdgpu_bo_create_reserved(adev, mec_hdr-
> >header.ucode_size_bytes,
> + PAGE_SIZE,
> AMDGPU_GEM_DOMAIN_GTT,
> + &adev->gfx.mec.mec_fw_obj,
> + &adev->gfx.mec.mec_fw_gpu_addr,
> + (void **)&fw);
> if (r) {
> - dev_warn(adev->dev, "(%d) map firmware bo failed\n", r);
> + dev_warn(adev->dev, "(%d) create mec firmware bo
> failed\n", r);
> gfx_v9_0_mec_fini(adev);
> return r;
> }
> +
> memcpy(fw, fw_data, fw_size);
>
> amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj);
> amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);
>
> -
> return 0;
> }
>
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 8/8] drm/amdgpu: use amdgpu_bo_free_kernel more often
[not found] ` <1501170244-1832-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-07-27 17:43 ` Deucher, Alexander
0 siblings, 0 replies; 16+ messages in thread
From: Deucher, Alexander @ 2017-07-27 17:43 UTC (permalink / raw)
To: 'Christian König', amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, July 27, 2017 11:44 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 8/8] drm/amdgpu: use amdgpu_bo_free_kernel more
> often
>
> From: Christian König <christian.koenig@amd.com>
>
> Saves us even more loc.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 13 +-----
> drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 37 ++---------------
> drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 67 +++---------------------------
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 37 ++---------------
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 24 +----------
> 5 files changed, 15 insertions(+), 163 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 60f60e9..d01737d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -346,18 +346,7 @@ static int amdgpu_vram_scratch_init(struct
> amdgpu_device *adev)
>
> static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev)
> {
> - int r;
> -
> - if (adev->vram_scratch.robj == NULL) {
> - return;
> - }
> - r = amdgpu_bo_reserve(adev->vram_scratch.robj, true);
> - if (likely(r == 0)) {
> - amdgpu_bo_kunmap(adev->vram_scratch.robj);
> - amdgpu_bo_unpin(adev->vram_scratch.robj);
> - amdgpu_bo_unreserve(adev->vram_scratch.robj);
> - }
> - amdgpu_bo_unref(&adev->vram_scratch.robj);
> + amdgpu_bo_free_kernel(&adev->vram_scratch.robj, NULL, NULL);
> }
>
> /**
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index faf8d28..d228f5a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -2217,40 +2217,9 @@ static void gfx_v6_0_ring_emit_vm_flush(struct
> amdgpu_ring *ring,
>
> static void gfx_v6_0_rlc_fini(struct amdgpu_device *adev)
> {
> - int r;
> -
> - if (adev->gfx.rlc.save_restore_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC sr bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj);
> - adev->gfx.rlc.save_restore_obj = NULL;
> - }
> -
> - if (adev->gfx.rlc.clear_state_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC c bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);
> - adev->gfx.rlc.clear_state_obj = NULL;
> - }
> -
> - if (adev->gfx.rlc.cp_table_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC cp table bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);
> - adev->gfx.rlc.cp_table_obj = NULL;
> - }
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL,
> NULL);
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL,
> NULL);
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);
> }
>
> static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 6e6e952..ad4b5c3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -2774,39 +2774,18 @@ static int
> gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev)
> */
> static void gfx_v7_0_cp_compute_fini(struct amdgpu_device *adev)
> {
> - int i, r;
> + int i;
>
> for (i = 0; i < adev->gfx.num_compute_rings; i++) {
> struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];
>
> - if (ring->mqd_obj) {
> - r = amdgpu_bo_reserve(ring->mqd_obj, true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve MQD
> bo failed\n", r);
> -
> - amdgpu_bo_unpin(ring->mqd_obj);
> - amdgpu_bo_unreserve(ring->mqd_obj);
> -
> - amdgpu_bo_unref(&ring->mqd_obj);
> - ring->mqd_obj = NULL;
> - }
> + amdgpu_bo_free_kernel(&ring->mqd_obj, NULL, NULL);
> }
> }
>
> static void gfx_v7_0_mec_fini(struct amdgpu_device *adev)
> {
> - int r;
> -
> - if (adev->gfx.mec.hpd_eop_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve HPD EOP bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);
> - amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);
> - adev->gfx.mec.hpd_eop_obj = NULL;
> - }
> + amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL,
> NULL);
> }
>
> static int gfx_v7_0_mec_init(struct amdgpu_device *adev)
> @@ -3320,43 +3299,9 @@ static void gfx_v7_0_ring_emit_vm_flush(struct
> amdgpu_ring *ring,
> */
> static void gfx_v7_0_rlc_fini(struct amdgpu_device *adev)
> {
> - int r;
> -
> - /* save restore block */
> - if (adev->gfx.rlc.save_restore_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC sr bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj);
> - adev->gfx.rlc.save_restore_obj = NULL;
> - }
> -
> - /* clear state block */
> - if (adev->gfx.rlc.clear_state_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC c bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);
> - adev->gfx.rlc.clear_state_obj = NULL;
> - }
> -
> - /* clear state block */
> - if (adev->gfx.rlc.cp_table_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC cp table bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);
> - adev->gfx.rlc.cp_table_obj = NULL;
> - }
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL,
> NULL);
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL,
> NULL);
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);
> }
>
> static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index b086f4e..3cf742d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -1238,29 +1238,8 @@ static void cz_init_cp_jump_table(struct
> amdgpu_device *adev)
>
> static void gfx_v8_0_rlc_fini(struct amdgpu_device *adev)
> {
> - int r;
> -
> - /* clear state block */
> - if (adev->gfx.rlc.clear_state_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC cbs bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> - amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);
> - adev->gfx.rlc.clear_state_obj = NULL;
> - }
> -
> - /* jump table block */
> - if (adev->gfx.rlc.cp_table_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve RLC cp table bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);
> - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);
> - amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);
> - adev->gfx.rlc.cp_table_obj = NULL;
> - }
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL,
> NULL);
> + amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);
> }
>
> static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
> @@ -1320,17 +1299,7 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device
> *adev)
>
> static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)
> {
> - int r;
> -
> - if (adev->gfx.mec.hpd_eop_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve HPD EOP bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);
> - amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
> - amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);
> - adev->gfx.mec.hpd_eop_obj = NULL;
> - }
> + amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL,
> NULL);
> }
>
> static int gfx_v8_0_mec_init(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 024eccc..8d52ed5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -817,28 +817,8 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device
> *adev)
>
> static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)
> {
> - int r;
> -
> - if (adev->gfx.mec.hpd_eop_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj,
> true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve HPD EOP bo
> failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);
> - amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);
> - adev->gfx.mec.hpd_eop_obj = NULL;
> - }
> - if (adev->gfx.mec.mec_fw_obj) {
> - r = amdgpu_bo_reserve(adev->gfx.mec.mec_fw_obj, true);
> - if (unlikely(r != 0))
> - dev_warn(adev->dev, "(%d) reserve mec firmware
> bo failed\n", r);
> - amdgpu_bo_unpin(adev->gfx.mec.mec_fw_obj);
> - amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);
> -
> - amdgpu_bo_unref(&adev->gfx.mec.mec_fw_obj);
> - adev->gfx.mec.mec_fw_obj = NULL;
> - }
> + amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL,
> NULL);
> + amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL,
> NULL);
> }
>
> static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2017-07-27 17:43 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-07-27 15:43 [PATCH 1/8] drm/amdgpu: cleanup kptr handling Christian König
[not found] ` <1501170244-1832-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 15:43 ` [PATCH 2/8] drm/amdgpu: consistent use u64_to_user_ptr Christian König
[not found] ` <1501170244-1832-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:37 ` Deucher, Alexander
2017-07-27 15:43 ` [PATCH 3/8] drm/amdgpu: move some defines around Christian König
[not found] ` <1501170244-1832-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:37 ` Deucher, Alexander
2017-07-27 15:44 ` [PATCH 4/8] drm/amdgpu: shadow and mn list are mutal exclusive Christian König
[not found] ` <1501170244-1832-4-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:39 ` Deucher, Alexander
2017-07-27 15:44 ` [PATCH 5/8] drm/amdgpu: improve amdgpu_bo_create_kernel Christian König
[not found] ` <1501170244-1832-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:42 ` Deucher, Alexander
2017-07-27 15:44 ` [PATCH 6/8] drm/amdgpu: add amdgpu_bo_create_reserved Christian König
[not found] ` <1501170244-1832-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:42 ` Deucher, Alexander
2017-07-27 15:44 ` [PATCH 7/8] drm/amdgpu: use amdgpu_bo_create_kernel more often Christian König
[not found] ` <1501170244-1832-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:43 ` Deucher, Alexander
2017-07-27 15:44 ` [PATCH 8/8] drm/amdgpu: use amdgpu_bo_free_kernel " Christian König
[not found] ` <1501170244-1832-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-07-27 17:43 ` Deucher, Alexander
2017-07-27 17:36 ` [PATCH 1/8] drm/amdgpu: cleanup kptr handling Deucher, Alexander
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