[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Rocky Hao]

This series patches add the tsadc support in thermal driver and in devicetree for rk3328.
Also add thermal control with Intelligent Power Allocation (IPA) policy by default.  Please
refer to https://developer.arm.com/open-source/intelligent-power-allocation for more information
about IPA.

Rocky Hao (5):
  dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
  thermal: rockchip: Support the RK3328 SOC in thermal driver
  arm64: dts: rockchip: add tsadc node for rk3328 SoC
  arm64: dts: rockchip: add thermal nodes for rk3328 SoC
  arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

 .../bindings/thermal/rockchip-thermal.txt          |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |  4 ++
 arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 63 +++++++++++++++++++++
 drivers/thermal/rockchip_thermal.c                 | 65 ++++++++++++++++++++++
 4 files changed, 133 insertions(+)

-- 
1.9.1

[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Rocky Hao]

This series patches add the tsadc support in thermal driver and in devicetree for rk3328.
Also add thermal control with Intelligent Power Allocation (IPA) policy by default.  Please
refer to https://developer.arm.com/open-source/intelligent-power-allocation for more information
about IPA.

Rocky Hao (5):
  dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
  thermal: rockchip: Support the RK3328 SOC in thermal driver
  arm64: dts: rockchip: add tsadc node for rk3328 SoC
  arm64: dts: rockchip: add thermal nodes for rk3328 SoC
  arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

 .../bindings/thermal/rockchip-thermal.txt          |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |  4 ++
 arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 63 +++++++++++++++++++++
 drivers/thermal/rockchip_thermal.c                 | 65 ++++++++++++++++++++++
 4 files changed, 133 insertions(+)

-- 
1.9.1

[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Rocky Hao]

This series patches add the tsadc support in thermal driver and in devicetree for rk3328.
Also add thermal control with Intelligent Power Allocation (IPA) policy by default.  Please
refer to https://developer.arm.com/open-source/intelligent-power-allocation for more information
about IPA.

Rocky Hao (5):
  dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
  thermal: rockchip: Support the RK3328 SOC in thermal driver
  arm64: dts: rockchip: add tsadc node for rk3328 SoC
  arm64: dts: rockchip: add thermal nodes for rk3328 SoC
  arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

 .../bindings/thermal/rockchip-thermal.txt          |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |  4 ++
 arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 63 +++++++++++++++++++++
 drivers/thermal/rockchip_thermal.c                 | 65 ++++++++++++++++++++++
 4 files changed, 133 insertions(+)

-- 
1.9.1


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[PATCH v2 1/5] dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible

[Rocky Hao]

attempt to new compatible for thermal founding on RK3328 SoC.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index 43003aec94bd..e3a6234fb1ac 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible : should be "rockchip,<name>-tsadc"
    "rockchip,rk3228-tsadc": found on RK3228 SoCs
    "rockchip,rk3288-tsadc": found on RK3288 SoCs
+   "rockchip,rk3328-tsadc": found on RK3328 SoCs
    "rockchip,rk3368-tsadc": found on RK3368 SoCs
    "rockchip,rk3399-tsadc": found on RK3399 SoCs
 - reg : physical base address of the controller and length of memory mapped
-- 
1.9.1

[PATCH v2 1/5] dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible

[Rocky Hao]

attempt to new compatible for thermal founding on RK3328 SoC.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index 43003aec94bd..e3a6234fb1ac 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible : should be "rockchip,<name>-tsadc"
    "rockchip,rk3228-tsadc": found on RK3228 SoCs
    "rockchip,rk3288-tsadc": found on RK3288 SoCs
+   "rockchip,rk3328-tsadc": found on RK3328 SoCs
    "rockchip,rk3368-tsadc": found on RK3368 SoCs
    "rockchip,rk3399-tsadc": found on RK3399 SoCs
 - reg : physical base address of the controller and length of memory mapped
-- 
1.9.1

Re: [PATCH v2 1/5] dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible

[Rob Herring]

On Fri, Aug 04, 2017 at 04:06:12PM +0800, Rocky Hao wrote:
> attempt to new compatible for thermal founding on RK3328 SoC.

? "Add a new compatible..."

> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> ---
> Change in v2:
> - remove gerrit Change-Id
> 
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH v2 1/5] dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible

[Rob Herring]

On Fri, Aug 04, 2017 at 04:06:12PM +0800, Rocky Hao wrote:
> attempt to new compatible for thermal founding on RK3328 SoC.

? "Add a new compatible..."

> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> ---
> Change in v2:
> - remove gerrit Change-Id
> 
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH v2 1/5] dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible

[rocky.hao]

Hi Rob,

Thank you very much for your reply, and your ack of course.

Best Regards,
Rocky

在 2017/8/11 1:49, Rob Herring 写道:
> On Fri, Aug 04, 2017 at 04:06:12PM +0800, Rocky Hao wrote:
>> attempt to new compatible for thermal founding on RK3328 SoC.
> 
> ? "Add a new compatible..."
> 
>>
>> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
>> ---
>> Change in v2:
>> - remove gerrit Change-Id
>>
>>   Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
>>   1 file changed, 1 insertion(+)
> 
> Acked-by: Rob Herring <robh@kernel.org>
> 
> 
> 

[PATCH v2 1/5] dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible

[rocky.hao]

Hi Rob,

Thank you very much for your reply, and your ack of course.

Best Regards,
Rocky

? 2017/8/11 1:49, Rob Herring ??:
> On Fri, Aug 04, 2017 at 04:06:12PM +0800, Rocky Hao wrote:
>> attempt to new compatible for thermal founding on RK3328 SoC.
> 
> ? "Add a new compatible..."
> 
>>
>> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
>> ---
>> Change in v2:
>> - remove gerrit Change-Id
>>
>>   Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
>>   1 file changed, 1 insertion(+)
> 
> Acked-by: Rob Herring <robh@kernel.org>
> 
> 
> 

[PATCH v2 2/5] thermal: rockchip: Support the RK3328 SOC in thermal driver

[Rocky Hao]

RK3328 SOC has one Temperature Sensor for CPU.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 drivers/thermal/rockchip_thermal.c | 65 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 4c7796512453..206035139110 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -320,6 +320,44 @@ struct tsadc_table {
 	{0, 125000},
 };
 
+static const struct tsadc_table rk3328_code_table[] = {
+	{0, -40000},
+	{296, -40000},
+	{304, -35000},
+	{313, -30000},
+	{331, -20000},
+	{340, -15000},
+	{349, -10000},
+	{359, -5000},
+	{368, 0},
+	{378, 5000},
+	{388, 10000},
+	{398, 15000},
+	{408, 20000},
+	{418, 25000},
+	{429, 30000},
+	{440, 35000},
+	{451, 40000},
+	{462, 45000},
+	{473, 50000},
+	{485, 55000},
+	{496, 60000},
+	{508, 65000},
+	{521, 70000},
+	{533, 75000},
+	{546, 80000},
+	{559, 85000},
+	{572, 90000},
+	{586, 95000},
+	{600, 100000},
+	{614, 105000},
+	{629, 110000},
+	{644, 115000},
+	{659, 120000},
+	{675, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
 static const struct tsadc_table rk3368_code_table[] = {
 	{0, -40000},
 	{106, -40000},
@@ -790,6 +828,29 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 	},
 };
 
+static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv2_initialize,
+	.irq_ack = rk_tsadcv3_irq_ack,
+	.control = rk_tsadcv3_control,
+	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
+	.set_tshut_temp = rk_tsadcv2_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
 	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
@@ -875,6 +936,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 		.data = (void *)&rk3288_tsadc_data,
 	},
 	{
+		.compatible = "rockchip,rk3328-tsadc",
+		.data = (void *)&rk3328_tsadc_data,
+	},
+	{
 		.compatible = "rockchip,rk3366-tsadc",
 		.data = (void *)&rk3366_tsadc_data,
 	},
-- 
1.9.1

[PATCH v2 2/5] thermal: rockchip: Support the RK3328 SOC in thermal driver

[Rocky Hao]

RK3328 SOC has one Temperature Sensor for CPU.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 drivers/thermal/rockchip_thermal.c | 65 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 4c7796512453..206035139110 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -320,6 +320,44 @@ struct tsadc_table {
 	{0, 125000},
 };
 
+static const struct tsadc_table rk3328_code_table[] = {
+	{0, -40000},
+	{296, -40000},
+	{304, -35000},
+	{313, -30000},
+	{331, -20000},
+	{340, -15000},
+	{349, -10000},
+	{359, -5000},
+	{368, 0},
+	{378, 5000},
+	{388, 10000},
+	{398, 15000},
+	{408, 20000},
+	{418, 25000},
+	{429, 30000},
+	{440, 35000},
+	{451, 40000},
+	{462, 45000},
+	{473, 50000},
+	{485, 55000},
+	{496, 60000},
+	{508, 65000},
+	{521, 70000},
+	{533, 75000},
+	{546, 80000},
+	{559, 85000},
+	{572, 90000},
+	{586, 95000},
+	{600, 100000},
+	{614, 105000},
+	{629, 110000},
+	{644, 115000},
+	{659, 120000},
+	{675, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
 static const struct tsadc_table rk3368_code_table[] = {
 	{0, -40000},
 	{106, -40000},
@@ -790,6 +828,29 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 	},
 };
 
+static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv2_initialize,
+	.irq_ack = rk_tsadcv3_irq_ack,
+	.control = rk_tsadcv3_control,
+	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
+	.set_tshut_temp = rk_tsadcv2_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
 	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
@@ -875,6 +936,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 		.data = (void *)&rk3288_tsadc_data,
 	},
 	{
+		.compatible = "rockchip,rk3328-tsadc",
+		.data = (void *)&rk3328_tsadc_data,
+	},
+	{
 		.compatible = "rockchip,rk3366-tsadc",
 		.data = (void *)&rk3366_tsadc_data,
 	},
-- 
1.9.1

Re: [PATCH v2 2/5] thermal: rockchip: Support the RK3328 SOC in thermal driver

[Caesar Wang]

[-- Attachment #1: Type: text/plain, Size: 2850 bytes --]

锟斤拷 2017锟斤拷08锟斤拷04锟斤拷 16:06, Rocky Hao 写锟斤拷:
> RK3328 SOC has one Temperature Sensor for CPU.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

Reviewed-by: Caesar Wang <wxt@rock-chips.com>

> ---
> Change in v2:
> - remove gerrit Change-Id
>
>   drivers/thermal/rockchip_thermal.c | 65 ++++++++++++++++++++++++++++++++++++++
>   1 file changed, 65 insertions(+)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 4c7796512453..206035139110 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -320,6 +320,44 @@ struct tsadc_table {
>   	{0, 125000},
>   };
>   
> +static const struct tsadc_table rk3328_code_table[] = {
> +	{0, -40000},
> +	{296, -40000},
> +	{304, -35000},
> +	{313, -30000},
> +	{331, -20000},
> +	{340, -15000},
> +	{349, -10000},
> +	{359, -5000},
> +	{368, 0},
> +	{378, 5000},
> +	{388, 10000},
> +	{398, 15000},
> +	{408, 20000},
> +	{418, 25000},
> +	{429, 30000},
> +	{440, 35000},
> +	{451, 40000},
> +	{462, 45000},
> +	{473, 50000},
> +	{485, 55000},
> +	{496, 60000},
> +	{508, 65000},
> +	{521, 70000},
> +	{533, 75000},
> +	{546, 80000},
> +	{559, 85000},
> +	{572, 90000},
> +	{586, 95000},
> +	{600, 100000},
> +	{614, 105000},
> +	{629, 110000},
> +	{644, 115000},
> +	{659, 120000},
> +	{675, 125000},
> +	{TSADCV2_DATA_MASK, 125000},
> +};
> +
>   static const struct tsadc_table rk3368_code_table[] = {
>   	{0, -40000},
>   	{106, -40000},
> @@ -790,6 +828,29 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
>   	},
>   };
>   
> +static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
> +	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
> +	.chn_num = 1, /* one channels for tsadc */
> +
> +	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
> +	.tshut_temp = 95000,
> +
> +	.initialize = rk_tsadcv2_initialize,
> +	.irq_ack = rk_tsadcv3_irq_ack,
> +	.control = rk_tsadcv3_control,
> +	.get_temp = rk_tsadcv2_get_temp,
> +	.set_alarm_temp = rk_tsadcv2_alarm_temp,
> +	.set_tshut_temp = rk_tsadcv2_tshut_temp,
> +	.set_tshut_mode = rk_tsadcv2_tshut_mode,
> +
> +	.table = {
> +		.id = rk3328_code_table,
> +		.length = ARRAY_SIZE(rk3328_code_table),
> +		.data_mask = TSADCV2_DATA_MASK,
> +		.mode = ADC_INCREMENT,
> +	},
> +};
> +
>   static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
>   	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
>   	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
> @@ -875,6 +936,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
>   		.data = (void *)&rk3288_tsadc_data,
>   	},
>   	{
> +		.compatible = "rockchip,rk3328-tsadc",
> +		.data = (void *)&rk3328_tsadc_data,
> +	},
> +	{
>   		.compatible = "rockchip,rk3366-tsadc",
>   		.data = (void *)&rk3366_tsadc_data,
>   	},


[-- Attachment #2: Type: text/html, Size: 3341 bytes --]

[PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Rocky Hao]

add tsadc needed main information for rk3328 SoC.
50000Hz is the max clock rate supported by tsadc module.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index db4b2708084d..186fb93fdffd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -308,6 +308,26 @@
 		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	tsadc: tsadc@ff250000 {
+		compatible = "rockchip,rk3328-tsadc";
+		reg = <0x0 0xff250000 0x0 0x100>;
+		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
+		pinctrl-2 = <&otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <100000>;
+		status = "disabled";
+	};
+
 	saradc: adc@ff280000 {
 		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff280000 0x0 0x100>;
-- 
1.9.1

[PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Rocky Hao]

add tsadc needed main information for rk3328 SoC.
50000Hz is the max clock rate supported by tsadc module.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index db4b2708084d..186fb93fdffd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -308,6 +308,26 @@
 		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	tsadc: tsadc at ff250000 {
+		compatible = "rockchip,rk3328-tsadc";
+		reg = <0x0 0xff250000 0x0 0x100>;
+		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
+		pinctrl-2 = <&otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <100000>;
+		status = "disabled";
+	};
+
 	saradc: adc at ff280000 {
 		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff280000 0x0 0x100>;
-- 
1.9.1

[PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Rocky Hao]

add tsadc needed main information for rk3328 SoC.
50000Hz is the max clock rate supported by tsadc module.

Signed-off-by: Rocky Hao <rocky.hao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index db4b2708084d..186fb93fdffd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -308,6 +308,26 @@
 		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	tsadc: tsadc@ff250000 {
+		compatible = "rockchip,rk3328-tsadc";
+		reg = <0x0 0xff250000 0x0 0x100>;
+		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
+		pinctrl-2 = <&otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <100000>;
+		status = "disabled";
+	};
+
 	saradc: adc@ff280000 {
 		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff280000 0x0 0x100>;
-- 
1.9.1

Re: [PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Caesar Wang]

在 2017年08月04日 16:06, Rocky Hao 写道:
> add tsadc needed main information for rk3328 SoC.
> 50000Hz is the max clock rate supported by tsadc module.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> ---
> Change in v2:
> - remove gerrit Change-Id
>
>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
>   1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index db4b2708084d..186fb93fdffd 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -308,6 +308,26 @@
>   		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>   	};
>   
> +	tsadc: tsadc@ff250000 {
> +		compatible = "rockchip,rk3328-tsadc";
> +		reg = <0x0 0xff250000 0x0 0x100>;
> +		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
> +		rockchip,grf = <&grf>;
> +		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
> +		clock-names = "tsadc", "apb_pclk";
> +		assigned-clocks = <&cru SCLK_TSADC>;
> +		assigned-clock-rates = <50000>;
> +		resets = <&cru SRST_TSADC>;
> +		reset-names = "tsadc-apb";
> +		pinctrl-names = "init", "default", "sleep";
> +		pinctrl-0 = <&otp_gpio>;
> +		pinctrl-1 = <&otp_out>;
> +		pinctrl-2 = <&otp_gpio>;
> +		#thermal-sensor-cells = <1>;

Only one sensor, so maybe the value should be 0.

> +		rockchip,hw-tshut-temp = <100000>;
> +		status = "disabled";
> +	};
> +
>   	saradc: adc@ff280000 {
>   		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
>   		reg = <0x0 0xff280000 0x0 0x100>;

[PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Caesar Wang]

? 2017?08?04? 16:06, Rocky Hao ??:
> add tsadc needed main information for rk3328 SoC.
> 50000Hz is the max clock rate supported by tsadc module.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> ---
> Change in v2:
> - remove gerrit Change-Id
>
>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
>   1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index db4b2708084d..186fb93fdffd 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -308,6 +308,26 @@
>   		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>   	};
>   
> +	tsadc: tsadc at ff250000 {
> +		compatible = "rockchip,rk3328-tsadc";
> +		reg = <0x0 0xff250000 0x0 0x100>;
> +		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
> +		rockchip,grf = <&grf>;
> +		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
> +		clock-names = "tsadc", "apb_pclk";
> +		assigned-clocks = <&cru SCLK_TSADC>;
> +		assigned-clock-rates = <50000>;
> +		resets = <&cru SRST_TSADC>;
> +		reset-names = "tsadc-apb";
> +		pinctrl-names = "init", "default", "sleep";
> +		pinctrl-0 = <&otp_gpio>;
> +		pinctrl-1 = <&otp_out>;
> +		pinctrl-2 = <&otp_gpio>;
> +		#thermal-sensor-cells = <1>;

Only one sensor, so maybe the value should be 0.

> +		rockchip,hw-tshut-temp = <100000>;
> +		status = "disabled";
> +	};
> +
>   	saradc: adc at ff280000 {
>   		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
>   		reg = <0x0 0xff280000 0x0 0x100>;

Re: [PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[rocky.hao]

在 2017/8/11 14:38, Caesar Wang 写道:
> 在 2017年08月04日 16:06, Rocky Hao 写道:
>> add tsadc needed main information for rk3328 SoC.
>> 50000Hz is the max clock rate supported by tsadc module.
>>
>> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
>> ---
>> Change in v2:
>> - remove gerrit Change-Id
>>
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
>>   1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
>> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> index db4b2708084d..186fb93fdffd 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> @@ -308,6 +308,26 @@
>>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>>       };
>> +    tsadc: tsadc@ff250000 {
>> +        compatible = "rockchip,rk3328-tsadc";
>> +        reg = <0x0 0xff250000 0x0 0x100>;
>> +        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
>> +        rockchip,grf = <&grf>;
>> +        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
>> +        clock-names = "tsadc", "apb_pclk";
>> +        assigned-clocks = <&cru SCLK_TSADC>;
>> +        assigned-clock-rates = <50000>;
>> +        resets = <&cru SRST_TSADC>;
>> +        reset-names = "tsadc-apb";
>> +        pinctrl-names = "init", "default", "sleep";
>> +        pinctrl-0 = <&otp_gpio>;
>> +        pinctrl-1 = <&otp_out>;
>> +        pinctrl-2 = <&otp_gpio>;
>> +        #thermal-sensor-cells = <1>;
> 
> Only one sensor, so maybe the value should be 0.
Caesar, #thermal-sensor-cells means parameter counts used to match the 
proper sensor registered. Both 0 and 1 work well.

Case 0, i.e. #thermal-sensor-cells = <0>, it uses the default channel 
number 0 to match tsadc channal.
Case 1, i.e. #thermal-sensor-cells = <1>, it uses the setting 
"thermal-sensors = <&tsadc 0>;" to match tsadc channal.

Case 1 provides more readable info than case 0. By my understanding, 
using the default value such as case 0, is not a good coding style.

> 
>> +        rockchip,hw-tshut-temp = <100000>;
>> +        status = "disabled";
>> +    };
>> +
>>       saradc: adc@ff280000 {
>>           compatible = "rockchip,rk3328-saradc", 
>> "rockchip,rk3399-saradc";
>>           reg = <0x0 0xff280000 0x0 0x100>;
> 
> 
> 
> 

[PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[rocky.hao]

? 2017/8/11 14:38, Caesar Wang ??:
> ? 2017?08?04? 16:06, Rocky Hao ??:
>> add tsadc needed main information for rk3328 SoC.
>> 50000Hz is the max clock rate supported by tsadc module.
>>
>> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
>> ---
>> Change in v2:
>> - remove gerrit Change-Id
>>
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
>>   1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
>> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> index db4b2708084d..186fb93fdffd 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> @@ -308,6 +308,26 @@
>>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>>       };
>> +    tsadc: tsadc at ff250000 {
>> +        compatible = "rockchip,rk3328-tsadc";
>> +        reg = <0x0 0xff250000 0x0 0x100>;
>> +        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
>> +        rockchip,grf = <&grf>;
>> +        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
>> +        clock-names = "tsadc", "apb_pclk";
>> +        assigned-clocks = <&cru SCLK_TSADC>;
>> +        assigned-clock-rates = <50000>;
>> +        resets = <&cru SRST_TSADC>;
>> +        reset-names = "tsadc-apb";
>> +        pinctrl-names = "init", "default", "sleep";
>> +        pinctrl-0 = <&otp_gpio>;
>> +        pinctrl-1 = <&otp_out>;
>> +        pinctrl-2 = <&otp_gpio>;
>> +        #thermal-sensor-cells = <1>;
> 
> Only one sensor, so maybe the value should be 0.
Caesar, #thermal-sensor-cells means parameter counts used to match the 
proper sensor registered. Both 0 and 1 work well.

Case 0, i.e. #thermal-sensor-cells = <0>, it uses the default channel 
number 0 to match tsadc channal.
Case 1, i.e. #thermal-sensor-cells = <1>, it uses the setting 
"thermal-sensors = <&tsadc 0>;" to match tsadc channal.

Case 1 provides more readable info than case 0. By my understanding, 
using the default value such as case 0, is not a good coding style.

> 
>> +        rockchip,hw-tshut-temp = <100000>;
>> +        status = "disabled";
>> +    };
>> +
>>       saradc: adc at ff280000 {
>>           compatible = "rockchip,rk3328-saradc", 
>> "rockchip,rk3399-saradc";
>>           reg = <0x0 0xff280000 0x0 0x100>;
> 
> 
> 
> 

Re: [PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Heiko Stuebner]

Am Freitag, 11. August 2017, 17:45:00 CEST schrieb rocky.hao:
> 
> 在 2017/8/11 14:38, Caesar Wang 写道:
> > 在 2017年08月04日 16:06, Rocky Hao 写道:
> >> add tsadc needed main information for rk3328 SoC.
> >> 50000Hz is the max clock rate supported by tsadc module.
> >>
> >> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> >> ---
> >> Change in v2:
> >> - remove gerrit Change-Id
> >>
> >>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
> >>   1 file changed, 20 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
> >> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> index db4b2708084d..186fb93fdffd 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> @@ -308,6 +308,26 @@
> >>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> >>       };
> >> +    tsadc: tsadc@ff250000 {
> >> +        compatible = "rockchip,rk3328-tsadc";
> >> +        reg = <0x0 0xff250000 0x0 0x100>;
> >> +        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
> >> +        rockchip,grf = <&grf>;
> >> +        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
> >> +        clock-names = "tsadc", "apb_pclk";
> >> +        assigned-clocks = <&cru SCLK_TSADC>;
> >> +        assigned-clock-rates = <50000>;
> >> +        resets = <&cru SRST_TSADC>;
> >> +        reset-names = "tsadc-apb";
> >> +        pinctrl-names = "init", "default", "sleep";
> >> +        pinctrl-0 = <&otp_gpio>;
> >> +        pinctrl-1 = <&otp_out>;
> >> +        pinctrl-2 = <&otp_gpio>;
> >> +        #thermal-sensor-cells = <1>;
> > 
> > Only one sensor, so maybe the value should be 0.
> Caesar, #thermal-sensor-cells means parameter counts used to match the 
> proper sensor registered. Both 0 and 1 work well.
> 
> Case 0, i.e. #thermal-sensor-cells = <0>, it uses the default channel 
> number 0 to match tsadc channal.
> Case 1, i.e. #thermal-sensor-cells = <1>, it uses the setting 
> "thermal-sensors = <&tsadc 0>;" to match tsadc channal.
> 
> Case 1 provides more readable info than case 0. By my understanding, 
> using the default value such as case 0, is not a good coding style.

Also, the binding for the tsadc controller specifies
	#thermal-sensor-cells: 1

And the IP block in general can of course handle multiple channels,
so it should also stay that way in the dts.


Heiko

> > 
> >> +        rockchip,hw-tshut-temp = <100000>;
> >> +        status = "disabled";
> >> +    };
> >> +
> >>       saradc: adc@ff280000 {
> >>           compatible = "rockchip,rk3328-saradc", 
> >> "rockchip,rk3399-saradc";
> >>           reg = <0x0 0xff280000 0x0 0x100>;
> > 
> > 
> > 
> > 
> 
> 
> 

[PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Heiko Stuebner]

Am Freitag, 11. August 2017, 17:45:00 CEST schrieb rocky.hao:
> 
> ? 2017/8/11 14:38, Caesar Wang ??:
> > ? 2017?08?04? 16:06, Rocky Hao ??:
> >> add tsadc needed main information for rk3328 SoC.
> >> 50000Hz is the max clock rate supported by tsadc module.
> >>
> >> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> >> ---
> >> Change in v2:
> >> - remove gerrit Change-Id
> >>
> >>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
> >>   1 file changed, 20 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
> >> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> index db4b2708084d..186fb93fdffd 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> @@ -308,6 +308,26 @@
> >>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> >>       };
> >> +    tsadc: tsadc at ff250000 {
> >> +        compatible = "rockchip,rk3328-tsadc";
> >> +        reg = <0x0 0xff250000 0x0 0x100>;
> >> +        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
> >> +        rockchip,grf = <&grf>;
> >> +        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
> >> +        clock-names = "tsadc", "apb_pclk";
> >> +        assigned-clocks = <&cru SCLK_TSADC>;
> >> +        assigned-clock-rates = <50000>;
> >> +        resets = <&cru SRST_TSADC>;
> >> +        reset-names = "tsadc-apb";
> >> +        pinctrl-names = "init", "default", "sleep";
> >> +        pinctrl-0 = <&otp_gpio>;
> >> +        pinctrl-1 = <&otp_out>;
> >> +        pinctrl-2 = <&otp_gpio>;
> >> +        #thermal-sensor-cells = <1>;
> > 
> > Only one sensor, so maybe the value should be 0.
> Caesar, #thermal-sensor-cells means parameter counts used to match the 
> proper sensor registered. Both 0 and 1 work well.
> 
> Case 0, i.e. #thermal-sensor-cells = <0>, it uses the default channel 
> number 0 to match tsadc channal.
> Case 1, i.e. #thermal-sensor-cells = <1>, it uses the setting 
> "thermal-sensors = <&tsadc 0>;" to match tsadc channal.
> 
> Case 1 provides more readable info than case 0. By my understanding, 
> using the default value such as case 0, is not a good coding style.

Also, the binding for the tsadc controller specifies
	#thermal-sensor-cells: 1

And the IP block in general can of course handle multiple channels,
so it should also stay that way in the dts.


Heiko

> > 
> >> +        rockchip,hw-tshut-temp = <100000>;
> >> +        status = "disabled";
> >> +    };
> >> +
> >>       saradc: adc at ff280000 {
> >>           compatible = "rockchip,rk3328-saradc", 
> >> "rockchip,rk3399-saradc";
> >>           reg = <0x0 0xff280000 0x0 0x100>;
> > 
> > 
> > 
> > 
> 
> 
> 

Re: [PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Heiko Stuebner]

Am Freitag, 4. August 2017, 16:06:14 CEST schrieb Rocky Hao:
> add tsadc needed main information for rk3328 SoC.
> 50000Hz is the max clock rate supported by tsadc module.
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

applied for 4.14 with some property reordering


Thanks
Heiko

[PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

[Heiko Stuebner]

Am Freitag, 4. August 2017, 16:06:14 CEST schrieb Rocky Hao:
> add tsadc needed main information for rk3328 SoC.
> 50000Hz is the max clock rate supported by tsadc module.
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

applied for 4.14 with some property reordering


Thanks
Heiko

[PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Rocky Hao]

add thermal zone and dynamic CPU power coefficients for rk3328

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 ++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 186fb93fdffd..68829f808320 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -47,6 +47,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/power/rk3328-power.h>
 #include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3328";
@@ -74,6 +75,8 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x0>;
 			clocks = <&cru ARMCLK>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -83,6 +86,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x1>;
 			clocks = <&cru ARMCLK>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -92,6 +96,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x2>;
 			clocks = <&cru ARMCLK>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -101,6 +106,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x3>;
 			clocks = <&cru ARMCLK>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -308,6 +314,43 @@
 		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	thermal-zones {
+		soc_thermal: soc-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			sustainable-power = <1000>; /* milliwatts */
+
+			thermal-sensors = <&tsadc 0>;
+
+			trips {
+				threshold: trip-point0 {
+					temperature = <70000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+				target: trip-point1 {
+					temperature = <85000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+				soc_crit: soc-crit {
+					temperature = <95000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <4096>;
+				};
+			};
+		};
+
+	};
+
 	tsadc: tsadc@ff250000 {
 		compatible = "rockchip,rk3328-tsadc";
 		reg = <0x0 0xff250000 0x0 0x100>;
-- 
1.9.1

[PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Rocky Hao]

add thermal zone and dynamic CPU power coefficients for rk3328

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 ++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 186fb93fdffd..68829f808320 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -47,6 +47,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/power/rk3328-power.h>
 #include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3328";
@@ -74,6 +75,8 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x0>;
 			clocks = <&cru ARMCLK>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -83,6 +86,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x1>;
 			clocks = <&cru ARMCLK>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -92,6 +96,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x2>;
 			clocks = <&cru ARMCLK>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -101,6 +106,7 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0 0x3>;
 			clocks = <&cru ARMCLK>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 		};
@@ -308,6 +314,43 @@
 		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	thermal-zones {
+		soc_thermal: soc-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			sustainable-power = <1000>; /* milliwatts */
+
+			thermal-sensors = <&tsadc 0>;
+
+			trips {
+				threshold: trip-point0 {
+					temperature = <70000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+				target: trip-point1 {
+					temperature = <85000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+				soc_crit: soc-crit {
+					temperature = <95000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <4096>;
+				};
+			};
+		};
+
+	};
+
 	tsadc: tsadc at ff250000 {
 		compatible = "rockchip,rk3328-tsadc";
 		reg = <0x0 0xff250000 0x0 0x100>;
-- 
1.9.1

Re: [PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Caesar Wang]

在 2017年08月04日 16:06, Rocky Hao 写道:
> add thermal zone and dynamic CPU power coefficients for rk3328
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> ---
> Change in v2:
> - remove gerrit Change-Id
>
>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 ++++++++++++++++++++++++++++++++
>   1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 186fb93fdffd..68829f808320 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -47,6 +47,7 @@
>   #include <dt-bindings/pinctrl/rockchip.h>
>   #include <dt-bindings/power/rk3328-power.h>
>   #include <dt-bindings/soc/rockchip,boot-mode.h>
> +#include <dt-bindings/thermal/thermal.h>
>   
>   / {
>   	compatible = "rockchip,rk3328";
> @@ -74,6 +75,8 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x0>;
>   			clocks = <&cru ARMCLK>;
> +			#cooling-cells = <2>; /* min followed by max */
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -83,6 +86,7 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x1>;
>   			clocks = <&cru ARMCLK>;
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -92,6 +96,7 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x2>;
>   			clocks = <&cru ARMCLK>;
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -101,6 +106,7 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x3>;
>   			clocks = <&cru ARMCLK>;
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -308,6 +314,43 @@
>   		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>   	};
>   
> +	thermal-zones {
> +		soc_thermal: soc-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			sustainable-power = <1000>; /* milliwatts */
> +
> +			thermal-sensors = <&tsadc 0>;
> +
> +			trips {
> +				threshold: trip-point0 {
> +					temperature = <70000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "passive";
> +				};
> +				target: trip-point1 {
> +					temperature = <85000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "passive";
> +				};
> +				soc_crit: soc-crit {
> +					temperature = <95000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */

The document had already described, maybe we should remove the 
millicelsius/milliseconds/milliwatts here.
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&target>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +					contribution = <4096>;
> +				};
> +			};
> +		};
> +
> +	};
> +
>   	tsadc: tsadc@ff250000 {
>   		compatible = "rockchip,rk3328-tsadc";
>   		reg = <0x0 0xff250000 0x0 0x100>;

[PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Caesar Wang]

? 2017?08?04? 16:06, Rocky Hao ??:
> add thermal zone and dynamic CPU power coefficients for rk3328
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> ---
> Change in v2:
> - remove gerrit Change-Id
>
>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 ++++++++++++++++++++++++++++++++
>   1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 186fb93fdffd..68829f808320 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -47,6 +47,7 @@
>   #include <dt-bindings/pinctrl/rockchip.h>
>   #include <dt-bindings/power/rk3328-power.h>
>   #include <dt-bindings/soc/rockchip,boot-mode.h>
> +#include <dt-bindings/thermal/thermal.h>
>   
>   / {
>   	compatible = "rockchip,rk3328";
> @@ -74,6 +75,8 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x0>;
>   			clocks = <&cru ARMCLK>;
> +			#cooling-cells = <2>; /* min followed by max */
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -83,6 +86,7 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x1>;
>   			clocks = <&cru ARMCLK>;
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -92,6 +96,7 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x2>;
>   			clocks = <&cru ARMCLK>;
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -101,6 +106,7 @@
>   			compatible = "arm,cortex-a53", "arm,armv8";
>   			reg = <0x0 0x3>;
>   			clocks = <&cru ARMCLK>;
> +			dynamic-power-coefficient = <120>;
>   			enable-method = "psci";
>   			next-level-cache = <&l2>;
>   		};
> @@ -308,6 +314,43 @@
>   		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>   	};
>   
> +	thermal-zones {
> +		soc_thermal: soc-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			sustainable-power = <1000>; /* milliwatts */
> +
> +			thermal-sensors = <&tsadc 0>;
> +
> +			trips {
> +				threshold: trip-point0 {
> +					temperature = <70000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "passive";
> +				};
> +				target: trip-point1 {
> +					temperature = <85000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "passive";
> +				};
> +				soc_crit: soc-crit {
> +					temperature = <95000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */

The document had already described, maybe we should remove the 
millicelsius/milliseconds/milliwatts here.
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&target>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +					contribution = <4096>;
> +				};
> +			};
> +		};
> +
> +	};
> +
>   	tsadc: tsadc at ff250000 {
>   		compatible = "rockchip,rk3328-tsadc";
>   		reg = <0x0 0xff250000 0x0 0x100>;

Re: [PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[rocky.hao]

Hi Caesar,
Thanks for your comments.

Best Regards,
Rocky

在 2017/8/11 14:44, Caesar Wang 写道:
> 在 2017年08月04日 16:06, Rocky Hao 写道:
>> add thermal zone and dynamic CPU power coefficients for rk3328
>>
>> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
>> ---
>> Change in v2:
>> - remove gerrit Change-Id
>>
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 
>> ++++++++++++++++++++++++++++++++
>>   1 file changed, 43 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
>> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> index 186fb93fdffd..68829f808320 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> @@ -47,6 +47,7 @@
>>   #include <dt-bindings/pinctrl/rockchip.h>
>>   #include <dt-bindings/power/rk3328-power.h>
>>   #include <dt-bindings/soc/rockchip,boot-mode.h>
>> +#include <dt-bindings/thermal/thermal.h>
>>   / {
>>       compatible = "rockchip,rk3328";
>> @@ -74,6 +75,8 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x0>;
>>               clocks = <&cru ARMCLK>;
>> +            #cooling-cells = <2>; /* min followed by max */
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -83,6 +86,7 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x1>;
>>               clocks = <&cru ARMCLK>;
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -92,6 +96,7 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x2>;
>>               clocks = <&cru ARMCLK>;
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -101,6 +106,7 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x3>;
>>               clocks = <&cru ARMCLK>;
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -308,6 +314,43 @@
>>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>>       };
>> +    thermal-zones {
>> +        soc_thermal: soc-thermal {
>> +            polling-delay-passive = <20>; /* milliseconds */
>> +            polling-delay = <1000>; /* milliseconds */
>> +            sustainable-power = <1000>; /* milliwatts */
>> +
>> +            thermal-sensors = <&tsadc 0>;
>> +
>> +            trips {
>> +                threshold: trip-point0 {
>> +                    temperature = <70000>; /* millicelsius */
>> +                    hysteresis = <2000>; /* millicelsius */
>> +                    type = "passive";
>> +                };
>> +                target: trip-point1 {
>> +                    temperature = <85000>; /* millicelsius */
>> +                    hysteresis = <2000>; /* millicelsius */
>> +                    type = "passive";
>> +                };
>> +                soc_crit: soc-crit {
>> +                    temperature = <95000>; /* millicelsius */
>> +                    hysteresis = <2000>; /* millicelsius */
> 
> The document had already described, maybe we should remove the 
> millicelsius/milliseconds/milliwatts here.
It is ok for me.
>> +                    type = "critical";
>> +                };
>> +            };
>> +
>> +            cooling-maps {
>> +                map0 {
>> +                    trip = <&target>;
>> +                    cooling-device = <&cpu0 THERMAL_NO_LIMIT 
>> THERMAL_NO_LIMIT>;
>> +                    contribution = <4096>;
>> +                };
>> +            };
>> +        };
>> +
>> +    };
>> +
>>       tsadc: tsadc@ff250000 {
>>           compatible = "rockchip,rk3328-tsadc";
>>           reg = <0x0 0xff250000 0x0 0x100>;
> 
> 
> 
> 

[PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[rocky.hao]

Hi Caesar,
Thanks for your comments.

Best Regards,
Rocky

? 2017/8/11 14:44, Caesar Wang ??:
> ? 2017?08?04? 16:06, Rocky Hao ??:
>> add thermal zone and dynamic CPU power coefficients for rk3328
>>
>> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
>> ---
>> Change in v2:
>> - remove gerrit Change-Id
>>
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 
>> ++++++++++++++++++++++++++++++++
>>   1 file changed, 43 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
>> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> index 186fb93fdffd..68829f808320 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> @@ -47,6 +47,7 @@
>>   #include <dt-bindings/pinctrl/rockchip.h>
>>   #include <dt-bindings/power/rk3328-power.h>
>>   #include <dt-bindings/soc/rockchip,boot-mode.h>
>> +#include <dt-bindings/thermal/thermal.h>
>>   / {
>>       compatible = "rockchip,rk3328";
>> @@ -74,6 +75,8 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x0>;
>>               clocks = <&cru ARMCLK>;
>> +            #cooling-cells = <2>; /* min followed by max */
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -83,6 +86,7 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x1>;
>>               clocks = <&cru ARMCLK>;
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -92,6 +96,7 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x2>;
>>               clocks = <&cru ARMCLK>;
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -101,6 +106,7 @@
>>               compatible = "arm,cortex-a53", "arm,armv8";
>>               reg = <0x0 0x3>;
>>               clocks = <&cru ARMCLK>;
>> +            dynamic-power-coefficient = <120>;
>>               enable-method = "psci";
>>               next-level-cache = <&l2>;
>>           };
>> @@ -308,6 +314,43 @@
>>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>>       };
>> +    thermal-zones {
>> +        soc_thermal: soc-thermal {
>> +            polling-delay-passive = <20>; /* milliseconds */
>> +            polling-delay = <1000>; /* milliseconds */
>> +            sustainable-power = <1000>; /* milliwatts */
>> +
>> +            thermal-sensors = <&tsadc 0>;
>> +
>> +            trips {
>> +                threshold: trip-point0 {
>> +                    temperature = <70000>; /* millicelsius */
>> +                    hysteresis = <2000>; /* millicelsius */
>> +                    type = "passive";
>> +                };
>> +                target: trip-point1 {
>> +                    temperature = <85000>; /* millicelsius */
>> +                    hysteresis = <2000>; /* millicelsius */
>> +                    type = "passive";
>> +                };
>> +                soc_crit: soc-crit {
>> +                    temperature = <95000>; /* millicelsius */
>> +                    hysteresis = <2000>; /* millicelsius */
> 
> The document had already described, maybe we should remove the 
> millicelsius/milliseconds/milliwatts here.
It is ok for me.
>> +                    type = "critical";
>> +                };
>> +            };
>> +
>> +            cooling-maps {
>> +                map0 {
>> +                    trip = <&target>;
>> +                    cooling-device = <&cpu0 THERMAL_NO_LIMIT 
>> THERMAL_NO_LIMIT>;
>> +                    contribution = <4096>;
>> +                };
>> +            };
>> +        };
>> +
>> +    };
>> +
>>       tsadc: tsadc at ff250000 {
>>           compatible = "rockchip,rk3328-tsadc";
>>           reg = <0x0 0xff250000 0x0 0x100>;
> 
> 
> 
> 

Re: [PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Heiko Stuebner]

Hi Rocky,

Am Freitag, 11. August 2017, 17:46:55 CEST schrieb rocky.hao:
> Hi Caesar,
> Thanks for your comments.

just to add, there is no need to resend, I can drop the comments
here myself when applying :-)


Heiko

> Best Regards,
> Rocky
> 
> 在 2017/8/11 14:44, Caesar Wang 写道:
> > 在 2017年08月04日 16:06, Rocky Hao 写道:
> >> add thermal zone and dynamic CPU power coefficients for rk3328
> >>
> >> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> >> ---
> >> Change in v2:
> >> - remove gerrit Change-Id
> >>
> >>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 
> >> ++++++++++++++++++++++++++++++++
> >>   1 file changed, 43 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
> >> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> index 186fb93fdffd..68829f808320 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> @@ -47,6 +47,7 @@
> >>   #include <dt-bindings/pinctrl/rockchip.h>
> >>   #include <dt-bindings/power/rk3328-power.h>
> >>   #include <dt-bindings/soc/rockchip,boot-mode.h>
> >> +#include <dt-bindings/thermal/thermal.h>
> >>   / {
> >>       compatible = "rockchip,rk3328";
> >> @@ -74,6 +75,8 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x0>;
> >>               clocks = <&cru ARMCLK>;
> >> +            #cooling-cells = <2>; /* min followed by max */
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -83,6 +86,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x1>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -92,6 +96,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x2>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -101,6 +106,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x3>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -308,6 +314,43 @@
> >>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> >>       };
> >> +    thermal-zones {
> >> +        soc_thermal: soc-thermal {
> >> +            polling-delay-passive = <20>; /* milliseconds */
> >> +            polling-delay = <1000>; /* milliseconds */
> >> +            sustainable-power = <1000>; /* milliwatts */
> >> +
> >> +            thermal-sensors = <&tsadc 0>;
> >> +
> >> +            trips {
> >> +                threshold: trip-point0 {
> >> +                    temperature = <70000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> >> +                    type = "passive";
> >> +                };
> >> +                target: trip-point1 {
> >> +                    temperature = <85000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> >> +                    type = "passive";
> >> +                };
> >> +                soc_crit: soc-crit {
> >> +                    temperature = <95000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> > 
> > The document had already described, maybe we should remove the 
> > millicelsius/milliseconds/milliwatts here.
> It is ok for me.
> >> +                    type = "critical";
> >> +                };
> >> +            };
> >> +
> >> +            cooling-maps {
> >> +                map0 {
> >> +                    trip = <&target>;
> >> +                    cooling-device = <&cpu0 THERMAL_NO_LIMIT 
> >> THERMAL_NO_LIMIT>;
> >> +                    contribution = <4096>;
> >> +                };
> >> +            };
> >> +        };
> >> +
> >> +    };
> >> +
> >>       tsadc: tsadc@ff250000 {
> >>           compatible = "rockchip,rk3328-tsadc";
> >>           reg = <0x0 0xff250000 0x0 0x100>;
> > 
> > 
> > 
> > 
> 
> 
> 

[PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Heiko Stuebner]

Hi Rocky,

Am Freitag, 11. August 2017, 17:46:55 CEST schrieb rocky.hao:
> Hi Caesar,
> Thanks for your comments.

just to add, there is no need to resend, I can drop the comments
here myself when applying :-)


Heiko

> Best Regards,
> Rocky
> 
> ? 2017/8/11 14:44, Caesar Wang ??:
> > ? 2017?08?04? 16:06, Rocky Hao ??:
> >> add thermal zone and dynamic CPU power coefficients for rk3328
> >>
> >> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> >> ---
> >> Change in v2:
> >> - remove gerrit Change-Id
> >>
> >>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 
> >> ++++++++++++++++++++++++++++++++
> >>   1 file changed, 43 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
> >> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> index 186fb93fdffd..68829f808320 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> @@ -47,6 +47,7 @@
> >>   #include <dt-bindings/pinctrl/rockchip.h>
> >>   #include <dt-bindings/power/rk3328-power.h>
> >>   #include <dt-bindings/soc/rockchip,boot-mode.h>
> >> +#include <dt-bindings/thermal/thermal.h>
> >>   / {
> >>       compatible = "rockchip,rk3328";
> >> @@ -74,6 +75,8 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x0>;
> >>               clocks = <&cru ARMCLK>;
> >> +            #cooling-cells = <2>; /* min followed by max */
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -83,6 +86,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x1>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -92,6 +96,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x2>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -101,6 +106,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x3>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -308,6 +314,43 @@
> >>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> >>       };
> >> +    thermal-zones {
> >> +        soc_thermal: soc-thermal {
> >> +            polling-delay-passive = <20>; /* milliseconds */
> >> +            polling-delay = <1000>; /* milliseconds */
> >> +            sustainable-power = <1000>; /* milliwatts */
> >> +
> >> +            thermal-sensors = <&tsadc 0>;
> >> +
> >> +            trips {
> >> +                threshold: trip-point0 {
> >> +                    temperature = <70000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> >> +                    type = "passive";
> >> +                };
> >> +                target: trip-point1 {
> >> +                    temperature = <85000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> >> +                    type = "passive";
> >> +                };
> >> +                soc_crit: soc-crit {
> >> +                    temperature = <95000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> > 
> > The document had already described, maybe we should remove the 
> > millicelsius/milliseconds/milliwatts here.
> It is ok for me.
> >> +                    type = "critical";
> >> +                };
> >> +            };
> >> +
> >> +            cooling-maps {
> >> +                map0 {
> >> +                    trip = <&target>;
> >> +                    cooling-device = <&cpu0 THERMAL_NO_LIMIT 
> >> THERMAL_NO_LIMIT>;
> >> +                    contribution = <4096>;
> >> +                };
> >> +            };
> >> +        };
> >> +
> >> +    };
> >> +
> >>       tsadc: tsadc at ff250000 {
> >>           compatible = "rockchip,rk3328-tsadc";
> >>           reg = <0x0 0xff250000 0x0 0x100>;
> > 
> > 
> > 
> > 
> 
> 
> 

Re: [PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Heiko Stuebner]

Hi Rocky,

Am Freitag, 11. August 2017, 17:46:55 CEST schrieb rocky.hao:
> Hi Caesar,
> Thanks for your comments.

just to add, there is no need to resend, I can drop the comments
here myself when applying :-)


Heiko

> Best Regards,
> Rocky
> 
> 在 2017/8/11 14:44, Caesar Wang 写道:
> > 在 2017年08月04日 16:06, Rocky Hao 写道:
> >> add thermal zone and dynamic CPU power coefficients for rk3328
> >>
> >> Signed-off-by: Rocky Hao <rocky.hao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> >> ---
> >> Change in v2:
> >> - remove gerrit Change-Id
> >>
> >>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43 
> >> ++++++++++++++++++++++++++++++++
> >>   1 file changed, 43 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
> >> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> index 186fb93fdffd..68829f808320 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> >> @@ -47,6 +47,7 @@
> >>   #include <dt-bindings/pinctrl/rockchip.h>
> >>   #include <dt-bindings/power/rk3328-power.h>
> >>   #include <dt-bindings/soc/rockchip,boot-mode.h>
> >> +#include <dt-bindings/thermal/thermal.h>
> >>   / {
> >>       compatible = "rockchip,rk3328";
> >> @@ -74,6 +75,8 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x0>;
> >>               clocks = <&cru ARMCLK>;
> >> +            #cooling-cells = <2>; /* min followed by max */
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -83,6 +86,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x1>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -92,6 +96,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x2>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -101,6 +106,7 @@
> >>               compatible = "arm,cortex-a53", "arm,armv8";
> >>               reg = <0x0 0x3>;
> >>               clocks = <&cru ARMCLK>;
> >> +            dynamic-power-coefficient = <120>;
> >>               enable-method = "psci";
> >>               next-level-cache = <&l2>;
> >>           };
> >> @@ -308,6 +314,43 @@
> >>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> >>       };
> >> +    thermal-zones {
> >> +        soc_thermal: soc-thermal {
> >> +            polling-delay-passive = <20>; /* milliseconds */
> >> +            polling-delay = <1000>; /* milliseconds */
> >> +            sustainable-power = <1000>; /* milliwatts */
> >> +
> >> +            thermal-sensors = <&tsadc 0>;
> >> +
> >> +            trips {
> >> +                threshold: trip-point0 {
> >> +                    temperature = <70000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> >> +                    type = "passive";
> >> +                };
> >> +                target: trip-point1 {
> >> +                    temperature = <85000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> >> +                    type = "passive";
> >> +                };
> >> +                soc_crit: soc-crit {
> >> +                    temperature = <95000>; /* millicelsius */
> >> +                    hysteresis = <2000>; /* millicelsius */
> > 
> > The document had already described, maybe we should remove the 
> > millicelsius/milliseconds/milliwatts here.
> It is ok for me.
> >> +                    type = "critical";
> >> +                };
> >> +            };
> >> +
> >> +            cooling-maps {
> >> +                map0 {
> >> +                    trip = <&target>;
> >> +                    cooling-device = <&cpu0 THERMAL_NO_LIMIT 
> >> THERMAL_NO_LIMIT>;
> >> +                    contribution = <4096>;
> >> +                };
> >> +            };
> >> +        };
> >> +
> >> +    };
> >> +
> >>       tsadc: tsadc@ff250000 {
> >>           compatible = "rockchip,rk3328-tsadc";
> >>           reg = <0x0 0xff250000 0x0 0x100>;
> > 
> > 
> > 
> > 
> 
> 
> 


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Re: [PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Heiko Stuebner]

Am Freitag, 4. August 2017, 16:06:15 CEST schrieb Rocky Hao:
> add thermal zone and dynamic CPU power coefficients for rk3328
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

applied for 4.14 after dropping the unnecessary property-comments.


Thanks
Heiko

[PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Heiko Stuebner]

Am Freitag, 4. August 2017, 16:06:15 CEST schrieb Rocky Hao:
> add thermal zone and dynamic CPU power coefficients for rk3328
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

applied for 4.14 after dropping the unnecessary property-comments.


Thanks
Heiko

Re: [PATCH v2 4/5] arm64: dts: rockchip: add thermal nodes for rk3328 SoC

[Heiko Stuebner]

Am Freitag, 4. August 2017, 16:06:15 CEST schrieb Rocky Hao:
> add thermal zone and dynamic CPU power coefficients for rk3328
> 
> Signed-off-by: Rocky Hao <rocky.hao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

applied for 4.14 after dropping the unnecessary property-comments.


Thanks
Heiko
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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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[PATCH v2 5/5] arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

[Rocky Hao]

enable tsadc module on RK3328 eavluation board

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 8c61d91bf89b..e7db0dc97ce0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -52,6 +52,10 @@
 	};
 };
 
+&tsadc {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
-- 
1.9.1

[PATCH v2 5/5] arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

[Rocky Hao]

enable tsadc module on RK3328 eavluation board

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 8c61d91bf89b..e7db0dc97ce0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -52,6 +52,10 @@
 	};
 };
 
+&tsadc {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
-- 
1.9.1

[PATCH v2 5/5] arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

[Rocky Hao]

enable tsadc module on RK3328 eavluation board

Signed-off-by: Rocky Hao <rocky.hao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
Change in v2:
- remove gerrit Change-Id

 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 8c61d91bf89b..e7db0dc97ce0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -52,6 +52,10 @@
 	};
 };
 
+&tsadc {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
-- 
1.9.1


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Re: [PATCH v2 5/5] arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

[Heiko Stuebner]

Am Freitag, 4. August 2017, 16:09:40 CEST schrieb Rocky Hao:
> enable tsadc module on RK3328 eavluation board
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

applied for 4.14


Thanks
Heiko

[PATCH v2 5/5] arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation board

[Heiko Stuebner]

Am Freitag, 4. August 2017, 16:09:40 CEST schrieb Rocky Hao:
> enable tsadc module on RK3328 eavluation board
> 
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

applied for 4.14


Thanks
Heiko

Re: [PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Zhang Rui]

On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
> This series patches add the tsadc support in thermal driver and in
> devicetree for rk3328.
> Also add thermal control with Intelligent Power Allocation (IPA)
> policy by default.  Please
> refer to https://developer.arm.com/open-source/intelligent-power-allo
> cation for more information
> about IPA.
> 
> Rocky Hao (5):
>   dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
>   thermal: rockchip: Support the RK3328 SOC in thermal driver
>   arm64: dts: rockchip: add tsadc node for rk3328 SoC
>   arm64: dts: rockchip: add thermal nodes for rk3328 SoC
>   arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
> board
> 
I can take this patch set if we have ACK for patch 3, 4 and 5.

thanks,
rui
>  .../bindings/thermal/rockchip-thermal.txt          |  1 +
>  arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |  4 ++
>  arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 63
> +++++++++++++++++++++
>  drivers/thermal/rockchip_thermal.c                 | 65
> ++++++++++++++++++++++
>  4 files changed, 133 insertions(+)
> 

[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Zhang Rui]

On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
> This series patches add the tsadc support in thermal driver and in
> devicetree for rk3328.
> Also add thermal control with Intelligent Power Allocation (IPA)
> policy by default.??Please
> refer to https://developer.arm.com/open-source/intelligent-power-allo
> cation for more information
> about IPA.
> 
> Rocky Hao (5):
> ? dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
> ? thermal: rockchip: Support the RK3328 SOC in thermal driver
> ? arm64: dts: rockchip: add tsadc node for rk3328 SoC
> ? arm64: dts: rockchip: add thermal nodes for rk3328 SoC
> ? arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
> board
> 
I can take this patch set if we have ACK for patch 3, 4 and 5.

thanks,
rui
> ?.../bindings/thermal/rockchip-thermal.txt??????????|??1 +
> ?arch/arm64/boot/dts/rockchip/rk3328-evb.dts????????|??4 ++
> ?arch/arm64/boot/dts/rockchip/rk3328.dtsi???????????| 63
> +++++++++++++++++++++
> ?drivers/thermal/rockchip_thermal.c?????????????????| 65
> ++++++++++++++++++++++
> ?4 files changed, 133 insertions(+)
> 

Re: [PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Zhang Rui]

On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
> This series patches add the tsadc support in thermal driver and in
> devicetree for rk3328.
> Also add thermal control with Intelligent Power Allocation (IPA)
> policy by default.  Please
> refer to https://developer.arm.com/open-source/intelligent-power-allo
> cation for more information
> about IPA.
> 
> Rocky Hao (5):
>   dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
>   thermal: rockchip: Support the RK3328 SOC in thermal driver
>   arm64: dts: rockchip: add tsadc node for rk3328 SoC
>   arm64: dts: rockchip: add thermal nodes for rk3328 SoC
>   arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
> board
> 
I can take this patch set if we have ACK for patch 3, 4 and 5.

thanks,
rui
>  .../bindings/thermal/rockchip-thermal.txt          |  1 +
>  arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |  4 ++
>  arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 63
> +++++++++++++++++++++
>  drivers/thermal/rockchip_thermal.c                 | 65
> ++++++++++++++++++++++
>  4 files changed, 133 insertions(+)
> 
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Re: [PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[rocky.hao]

Hi Rui,

Thank you for the patch set acception.

Thanks again,
Rocky

在 2017/8/11 12:51, Zhang Rui 写道:
> On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
>> This series patches add the tsadc support in thermal driver and in
>> devicetree for rk3328.
>> Also add thermal control with Intelligent Power Allocation (IPA)
>> policy by default.  Please
>> refer to https://developer.arm.com/open-source/intelligent-power-allo
>> cation for more information
>> about IPA.
>>
>> Rocky Hao (5):
>>    dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
>>    thermal: rockchip: Support the RK3328 SOC in thermal driver
>>    arm64: dts: rockchip: add tsadc node for rk3328 SoC
>>    arm64: dts: rockchip: add thermal nodes for rk3328 SoC
>>    arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
>> board
>>
> I can take this patch set if we have ACK for patch 3, 4 and 5.
> 
> thanks,
> rui
>>   .../bindings/thermal/rockchip-thermal.txt          |  1 +
>>   arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |  4 ++
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 63
>> +++++++++++++++++++++
>>   drivers/thermal/rockchip_thermal.c                 | 65
>> ++++++++++++++++++++++
>>   4 files changed, 133 insertions(+)
>>
> 
> 
> 

[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[rocky.hao]

Hi Rui,

Thank you for the patch set acception.

Thanks again,
Rocky

? 2017/8/11 12:51, Zhang Rui ??:
> On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
>> This series patches add the tsadc support in thermal driver and in
>> devicetree for rk3328.
>> Also add thermal control with Intelligent Power Allocation (IPA)
>> policy by default.  Please
>> refer to https://developer.arm.com/open-source/intelligent-power-allo
>> cation for more information
>> about IPA.
>>
>> Rocky Hao (5):
>>    dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
>>    thermal: rockchip: Support the RK3328 SOC in thermal driver
>>    arm64: dts: rockchip: add tsadc node for rk3328 SoC
>>    arm64: dts: rockchip: add thermal nodes for rk3328 SoC
>>    arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
>> board
>>
> I can take this patch set if we have ACK for patch 3, 4 and 5.
> 
> thanks,
> rui
>>   .../bindings/thermal/rockchip-thermal.txt          |  1 +
>>   arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |  4 ++
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 63
>> +++++++++++++++++++++
>>   drivers/thermal/rockchip_thermal.c                 | 65
>> ++++++++++++++++++++++
>>   4 files changed, 133 insertions(+)
>>
> 
> 
> 

Re: [PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Heiko Stuebner]

Hi,

Am Freitag, 11. August 2017, 12:51:35 CEST schrieb Zhang Rui:
> On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
> > This series patches add the tsadc support in thermal driver and in
> > devicetree for rk3328.
> > Also add thermal control with Intelligent Power Allocation (IPA)
> > policy by default.  Please
> > refer to https://developer.arm.com/open-source/intelligent-power-allo
> > cation for more information
> > about IPA.
> > 
> > Rocky Hao (5):
> >   dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
> >   thermal: rockchip: Support the RK3328 SOC in thermal driver
> >   arm64: dts: rockchip: add tsadc node for rk3328 SoC
> >   arm64: dts: rockchip: add thermal nodes for rk3328 SoC
> >   arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
> > board
> > 
> I can take this patch set if we have ACK for patch 3, 4 and 5.

I would prefer if you would just apply patches 1+2 alone and I'd take
the devicetree patches through my tree.

Having devicetree stuff mingle in a lot of trees produces unnecessary
conflicts, so the general best practice is having code + binding.txt
going through the driver tree and devicetree stuff through the platform
tree.


Thanks
Heiko

[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Heiko Stuebner]

Hi,

Am Freitag, 11. August 2017, 12:51:35 CEST schrieb Zhang Rui:
> On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
> > This series patches add the tsadc support in thermal driver and in
> > devicetree for rk3328.
> > Also add thermal control with Intelligent Power Allocation (IPA)
> > policy by default.  Please
> > refer to https://developer.arm.com/open-source/intelligent-power-allo
> > cation for more information
> > about IPA.
> > 
> > Rocky Hao (5):
> >   dt-bindings: rockchip-thermal: Support the RK3328 SoC compatible
> >   thermal: rockchip: Support the RK3328 SOC in thermal driver
> >   arm64: dts: rockchip: add tsadc node for rk3328 SoC
> >   arm64: dts: rockchip: add thermal nodes for rk3328 SoC
> >   arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
> > board
> > 
> I can take this patch set if we have ACK for patch 3, 4 and 5.

I would prefer if you would just apply patches 1+2 alone and I'd take
the devicetree patches through my tree.

Having devicetree stuff mingle in a lot of trees produces unnecessary
conflicts, so the general best practice is having code + binding.txt
going through the driver tree and devicetree stuff through the platform
tree.


Thanks
Heiko

Re: [PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Zhang Rui]

On Fri, 2017-08-11 at 08:27 +0200, Heiko Stuebner wrote:
> Hi,
> 
> Am Freitag, 11. August 2017, 12:51:35 CEST schrieb Zhang Rui:
> > 
> > On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
> > > 
> > > This series patches add the tsadc support in thermal driver and
> > > in
> > > devicetree for rk3328.
> > > Also add thermal control with Intelligent Power Allocation (IPA)
> > > policy by default.  Please
> > > refer to https://developer.arm.com/open-source/intelligent-power-
> > > allo
> > > cation for more information
> > > about IPA.
> > > 
> > > Rocky Hao (5):
> > >   dt-bindings: rockchip-thermal: Support the RK3328 SoC
> > > compatible
> > >   thermal: rockchip: Support the RK3328 SOC in thermal driver
> > >   arm64: dts: rockchip: add tsadc node for rk3328 SoC
> > >   arm64: dts: rockchip: add thermal nodes for rk3328 SoC
> > >   arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
> > > board
> > > 
> > I can take this patch set if we have ACK for patch 3, 4 and 5.
> I would prefer if you would just apply patches 1+2 alone and I'd take
> the devicetree patches through my tree.
> 
> Having devicetree stuff mingle in a lot of trees produces unnecessary
> conflicts, so the general best practice is having code + binding.txt
> going through the driver tree and devicetree stuff through the
> platform
> tree.
> 
OKay, I will take patch 1 and 2 and queue them for next merge window.

thanks,
rui
> 
> Thanks
> Heiko
> 

[PATCH v2 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for rk3328 in dts

[Zhang Rui]

On Fri, 2017-08-11 at 08:27 +0200, Heiko Stuebner wrote:
> Hi,
> 
> Am Freitag, 11. August 2017, 12:51:35 CEST schrieb Zhang Rui:
> > 
> > On Fri, 2017-08-04 at 16:06 +0800, Rocky Hao wrote:
> > > 
> > > This series patches add the tsadc support in thermal driver and
> > > in
> > > devicetree for rk3328.
> > > Also add thermal control with Intelligent Power Allocation (IPA)
> > > policy by default.??Please
> > > refer to https://developer.arm.com/open-source/intelligent-power-
> > > allo
> > > cation for more information
> > > about IPA.
> > > 
> > > Rocky Hao (5):
> > > ? dt-bindings: rockchip-thermal: Support the RK3328 SoC
> > > compatible
> > > ? thermal: rockchip: Support the RK3328 SOC in thermal driver
> > > ? arm64: dts: rockchip: add tsadc node for rk3328 SoC
> > > ? arm64: dts: rockchip: add thermal nodes for rk3328 SoC
> > > ? arm64: dts: rockchip: Enable tsadc module on RK3328 eavluation
> > > board
> > > 
> > I can take this patch set if we have ACK for patch 3, 4 and 5.
> I would prefer if you would just apply patches 1+2 alone and I'd take
> the devicetree patches through my tree.
> 
> Having devicetree stuff mingle in a lot of trees produces unnecessary
> conflicts, so the general best practice is having code + binding.txt
> going through the driver tree and devicetree stuff through the
> platform
> tree.
> 
OKay, I will take patch 1 and 2 and queue them for next merge window.

thanks,
rui
> 
> Thanks
> Heiko
>