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From: Matt Redfearn <matt.redfearn@imgtec.com>
To: "Michael S . Tsirkin" <mst@redhat.com>,
	Marcel Apfelbaum <marcel@redhat.com>
Cc: qemu-devel@nongnu.org, Yongbok Kim <Yongbok.Kim@imgtec.com>,
	Matt Redfearn <matt.redfearn@imgtec.com>
Subject: [Qemu-devel] [PATCH] PCI: PCIe access should always be little endian
Date: Tue, 15 Aug 2017 15:44:17 +0100	[thread overview]
Message-ID: <1502808257-17395-1-git-send-email-matt.redfearn@imgtec.com> (raw)

PCIe busses are always little endian, so set the endianness of the
memory region to little endian rather than native such that operations
work as expected on big endian targets.

Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
---

 hw/pci/pcie_host.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c
index dcebf57ed45e..553db56778b6 100644
--- a/hw/pci/pcie_host.c
+++ b/hw/pci/pcie_host.c
@@ -81,7 +81,7 @@ static uint64_t pcie_mmcfg_data_read(void *opaque,
 static const MemoryRegionOps pcie_mmcfg_ops = {
     .read = pcie_mmcfg_data_read,
     .write = pcie_mmcfg_data_write,
-    .endianness = DEVICE_NATIVE_ENDIAN,
+    .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static void pcie_host_init(Object *obj)
-- 
2.7.4

             reply	other threads:[~2017-08-15 14:45 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-15 14:44 Matt Redfearn [this message]
2017-08-16 10:25 ` [Qemu-devel] [PATCH] PCI: PCIe access should always be little endian Marcel Apfelbaum
2017-09-27  8:27   ` Matt Redfearn
2017-09-29 12:37     ` Marcel Apfelbaum

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