* [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
@ 2017-09-11 22:42 Rodrigo Vivi
2017-09-11 23:13 ` ✓ Fi.CI.BAT: success for " Patchwork
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2017-09-11 22:42 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Rodrigo Vivi
DK had pointed out a comment there was hard to understand, so I
tried to read back again and I couldn't understand that as well.
So let me re-phrase that in a way that anyone can understand
later, even myself.
Also fixed the comment block style.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 29 +++++++++++++++++------------
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index fdd9e3d95efb..1c2875b74bc9 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -234,7 +234,7 @@ static void vlv_psr_enable_source(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
- /* Transition from PSR_state 0 to PSR_state 1, i.e. PSR Inactive */
+ /* Transition from PSR_state 0 (disabled) to PSR_state 1 (inactive) */
I915_WRITE(VLV_PSRCTL(crtc->pipe),
VLV_EDP_PSR_MODE_SW_TIMER |
VLV_EDP_PSR_SRC_TRANSMITTER_STATE |
@@ -249,10 +249,11 @@ static void vlv_psr_activate(struct intel_dp *intel_dp)
struct drm_crtc *crtc = dig_port->base.base.crtc;
enum pipe pipe = to_intel_crtc(crtc)->pipe;
- /* Let's do the transition from PSR_state 1 to PSR_state 2
- * that is PSR transition to active - static frame transmission.
- * Then Hardware is responsible for the transition to PSR_state 3
- * that is PSR active - no Remote Frame Buffer (RFB) update.
+ /*
+ * Let's do the transition from PSR_state 1 (inactive) to
+ * PSR_state 2 (active - static frame transmission).
+ * Then Hardware is responsible for the transition to
+ * PSR_state 3 (no Remote Frame Buffer (RFB) update).
*/
I915_WRITE(VLV_PSRCTL(pipe), I915_READ(VLV_PSRCTL(pipe)) |
VLV_EDP_PSR_ACTIVE_ENTRY);
@@ -576,7 +577,7 @@ static void vlv_psr_disable(struct intel_dp *intel_dp,
uint32_t val;
if (dev_priv->psr.active) {
- /* Put VLV PSR back to PSR_state 0 that is PSR Disabled. */
+ /* Put VLV PSR back to PSR_state 0 (disabled). */
if (intel_wait_for_register(dev_priv,
VLV_PSRSTAT(crtc->pipe),
VLV_EDP_PSR_IN_TRANS,
@@ -766,16 +767,20 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
} else {
val = I915_READ(VLV_PSRCTL(pipe));
- /* Here we do the transition from PSR_state 3 to PSR_state 5
- * directly once PSR State 4 that is active with single frame
- * update can be skipped. PSR_state 5 that is PSR exit then
- * Hardware is responsible to transition back to PSR_state 1
- * that is PSR inactive. Same state after vlv_psr_enable_source.
+ /*
+ * Here we do the transition drirectly from
+ * PSR_state 3 (no Remote Frame Buffer (RFB) update) to
+ * PSR_state 5 (exit).
+ * PSR State 4 (active with single frame update) can be skipped.
+ * On PSR_state 5 (exit) Hardware is responsible to transition
+ * back to PSR_state 1 (inactive).
+ * Now we are at Same state after vlv_psr_enable_source.
*/
val &= ~VLV_EDP_PSR_ACTIVE_ENTRY;
I915_WRITE(VLV_PSRCTL(pipe), val);
- /* Send AUX wake up - Spec says after transitioning to PSR
+ /*
+ * Send AUX wake up - Spec says after transitioning to PSR
* active we have to send AUX wake up by writing 01h in DPCD
* 600h of sink device.
* XXX: This might slow down the transition, but without this
--
2.13.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
2017-09-11 22:42 [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine Rodrigo Vivi
@ 2017-09-11 23:13 ` Patchwork
2017-09-12 0:54 ` ✓ Fi.CI.IGT: " Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-09-11 23:13 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
URL : https://patchwork.freedesktop.org/series/30161/
State : success
== Summary ==
Series 30161v1 drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
https://patchwork.freedesktop.org/api/1.0/series/30161/revisions/1/mbox/
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
pass -> FAIL (fi-snb-2600) fdo#100215 +1
Test kms_flip:
Subgroup basic-flip-vs-modeset:
pass -> SKIP (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
incomplete -> PASS (fi-cfl-s)
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:437s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:452s
fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:379s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:552s
fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:269s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:511s
fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:502s
fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:498s
fi-cfl-s total:289 pass:250 dwarn:4 dfail:0 fail:0 skip:35 time:452s
fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:454s
fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:597s
fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:432s
fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:409s
fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:440s
fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:483s
fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:464s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:483s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:575s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:586s
fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:552s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:456s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:527s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:495s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:467s
fi-skl-x1585l total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:472s
fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:567s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:1 skip:39 time:422s
3528bc23083ec99bc025b9f812ff982c79c05250 drm-tip: 2017y-09m-11d-22h-26m-59s UTC integration manifest
07f045f5c290 drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5648/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
2017-09-11 22:42 [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine Rodrigo Vivi
2017-09-11 23:13 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-09-12 0:54 ` Patchwork
2017-09-12 17:47 ` [PATCH] " Pandiyan, Dhinakaran
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-09-12 0:54 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
URL : https://patchwork.freedesktop.org/series/30161/
State : success
== Summary ==
Test gem_eio:
Subgroup in-flight:
fail -> PASS (shard-hsw) fdo#102616
Test kms_cursor_legacy:
Subgroup flip-vs-cursor-toggle:
fail -> PASS (shard-hsw)
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252
fdo#102616 https://bugs.freedesktop.org/show_bug.cgi?id=102616
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
shard-hsw total:2301 pass:1237 dwarn:0 dfail:0 fail:12 skip:1052 time:9422s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5648/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
2017-09-11 22:42 [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine Rodrigo Vivi
2017-09-11 23:13 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-09-12 0:54 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-09-12 17:47 ` Pandiyan, Dhinakaran
2017-09-12 18:30 ` Rodrigo Vivi
2017-09-12 18:53 ` ✓ Fi.CI.BAT: success for drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine. (rev2) Patchwork
2017-09-13 2:15 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 1 reply; 7+ messages in thread
From: Pandiyan, Dhinakaran @ 2017-09-12 17:47 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: intel-gfx
On Mon, 2017-09-11 at 15:42 -0700, Rodrigo Vivi wrote:
> DK had pointed out a comment there was hard to understand, so I
> tried to read back again and I couldn't understand that as well.
> So let me re-phrase that in a way that anyone can understand
> later, even myself.
>
This reads much better, thanks for the patch. I've got just one nit
below.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Also fixed the comment block style.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/intel_psr.c | 29 +++++++++++++++++------------
> 1 file changed, 17 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index fdd9e3d95efb..1c2875b74bc9 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -234,7 +234,7 @@ static void vlv_psr_enable_source(struct intel_dp *intel_dp,
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>
> - /* Transition from PSR_state 0 to PSR_state 1, i.e. PSR Inactive */
> + /* Transition from PSR_state 0 (disabled) to PSR_state 1 (inactive) */
> I915_WRITE(VLV_PSRCTL(crtc->pipe),
> VLV_EDP_PSR_MODE_SW_TIMER |
> VLV_EDP_PSR_SRC_TRANSMITTER_STATE |
> @@ -249,10 +249,11 @@ static void vlv_psr_activate(struct intel_dp *intel_dp)
> struct drm_crtc *crtc = dig_port->base.base.crtc;
> enum pipe pipe = to_intel_crtc(crtc)->pipe;
>
> - /* Let's do the transition from PSR_state 1 to PSR_state 2
> - * that is PSR transition to active - static frame transmission.
> - * Then Hardware is responsible for the transition to PSR_state 3
> - * that is PSR active - no Remote Frame Buffer (RFB) update.
> + /*
> + * Let's do the transition from PSR_state 1 (inactive) to
> + * PSR_state 2 (active - static frame transmission).
nit: The spec calls the state 2 itself as "transition to active - static
frame transmission" and state 3 as active.
> + * Then Hardware is responsible for the transition to
> + * PSR_state 3 (no Remote Frame Buffer (RFB) update).
> */
> I915_WRITE(VLV_PSRCTL(pipe), I915_READ(VLV_PSRCTL(pipe)) |
> VLV_EDP_PSR_ACTIVE_ENTRY);
> @@ -576,7 +577,7 @@ static void vlv_psr_disable(struct intel_dp *intel_dp,
> uint32_t val;
>
> if (dev_priv->psr.active) {
> - /* Put VLV PSR back to PSR_state 0 that is PSR Disabled. */
> + /* Put VLV PSR back to PSR_state 0 (disabled). */
> if (intel_wait_for_register(dev_priv,
> VLV_PSRSTAT(crtc->pipe),
> VLV_EDP_PSR_IN_TRANS,
> @@ -766,16 +767,20 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
> } else {
> val = I915_READ(VLV_PSRCTL(pipe));
>
> - /* Here we do the transition from PSR_state 3 to PSR_state 5
> - * directly once PSR State 4 that is active with single frame
> - * update can be skipped. PSR_state 5 that is PSR exit then
> - * Hardware is responsible to transition back to PSR_state 1
> - * that is PSR inactive. Same state after vlv_psr_enable_source.
> + /*
> + * Here we do the transition drirectly from
> + * PSR_state 3 (no Remote Frame Buffer (RFB) update) to
> + * PSR_state 5 (exit).
> + * PSR State 4 (active with single frame update) can be skipped.
> + * On PSR_state 5 (exit) Hardware is responsible to transition
> + * back to PSR_state 1 (inactive).
> + * Now we are at Same state after vlv_psr_enable_source.
> */
> val &= ~VLV_EDP_PSR_ACTIVE_ENTRY;
> I915_WRITE(VLV_PSRCTL(pipe), val);
>
> - /* Send AUX wake up - Spec says after transitioning to PSR
> + /*
> + * Send AUX wake up - Spec says after transitioning to PSR
> * active we have to send AUX wake up by writing 01h in DPCD
> * 600h of sink device.
> * XXX: This might slow down the transition, but without this
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
2017-09-12 17:47 ` [PATCH] " Pandiyan, Dhinakaran
@ 2017-09-12 18:30 ` Rodrigo Vivi
0 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2017-09-12 18:30 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Rodrigo Vivi
DK had pointed out a comment there was hard to understand, so I
tried to read back again and I couldn't understand that as well.
So let me re-phrase that in a way that anyone can understand
later, even myself.
Also fixed the comment block style.
v2: Accept DK's suggestion on PSR_state 2 and PSR_state 3 named
as spec.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 29 +++++++++++++++++------------
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index fdd9e3d95efb..55b4002bbe53 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -234,7 +234,7 @@ static void vlv_psr_enable_source(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
- /* Transition from PSR_state 0 to PSR_state 1, i.e. PSR Inactive */
+ /* Transition from PSR_state 0 (disabled) to PSR_state 1 (inactive) */
I915_WRITE(VLV_PSRCTL(crtc->pipe),
VLV_EDP_PSR_MODE_SW_TIMER |
VLV_EDP_PSR_SRC_TRANSMITTER_STATE |
@@ -249,10 +249,11 @@ static void vlv_psr_activate(struct intel_dp *intel_dp)
struct drm_crtc *crtc = dig_port->base.base.crtc;
enum pipe pipe = to_intel_crtc(crtc)->pipe;
- /* Let's do the transition from PSR_state 1 to PSR_state 2
- * that is PSR transition to active - static frame transmission.
- * Then Hardware is responsible for the transition to PSR_state 3
- * that is PSR active - no Remote Frame Buffer (RFB) update.
+ /*
+ * Let's do the transition from PSR_state 1 (inactive) to
+ * PSR_state 2 (transition to active - static frame transmission).
+ * Then Hardware is responsible for the transition to
+ * PSR_state 3 (active - no Remote Frame Buffer (RFB) update).
*/
I915_WRITE(VLV_PSRCTL(pipe), I915_READ(VLV_PSRCTL(pipe)) |
VLV_EDP_PSR_ACTIVE_ENTRY);
@@ -576,7 +577,7 @@ static void vlv_psr_disable(struct intel_dp *intel_dp,
uint32_t val;
if (dev_priv->psr.active) {
- /* Put VLV PSR back to PSR_state 0 that is PSR Disabled. */
+ /* Put VLV PSR back to PSR_state 0 (disabled). */
if (intel_wait_for_register(dev_priv,
VLV_PSRSTAT(crtc->pipe),
VLV_EDP_PSR_IN_TRANS,
@@ -766,16 +767,20 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
} else {
val = I915_READ(VLV_PSRCTL(pipe));
- /* Here we do the transition from PSR_state 3 to PSR_state 5
- * directly once PSR State 4 that is active with single frame
- * update can be skipped. PSR_state 5 that is PSR exit then
- * Hardware is responsible to transition back to PSR_state 1
- * that is PSR inactive. Same state after vlv_psr_enable_source.
+ /*
+ * Here we do the transition drirectly from
+ * PSR_state 3 (active - no Remote Frame Buffer (RFB) update) to
+ * PSR_state 5 (exit).
+ * PSR State 4 (active with single frame update) can be skipped.
+ * On PSR_state 5 (exit) Hardware is responsible to transition
+ * back to PSR_state 1 (inactive).
+ * Now we are at Same state after vlv_psr_enable_source.
*/
val &= ~VLV_EDP_PSR_ACTIVE_ENTRY;
I915_WRITE(VLV_PSRCTL(pipe), val);
- /* Send AUX wake up - Spec says after transitioning to PSR
+ /*
+ * Send AUX wake up - Spec says after transitioning to PSR
* active we have to send AUX wake up by writing 01h in DPCD
* 600h of sink device.
* XXX: This might slow down the transition, but without this
--
2.13.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine. (rev2)
2017-09-11 22:42 [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine Rodrigo Vivi
` (2 preceding siblings ...)
2017-09-12 17:47 ` [PATCH] " Pandiyan, Dhinakaran
@ 2017-09-12 18:53 ` Patchwork
2017-09-13 2:15 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-09-12 18:53 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine. (rev2)
URL : https://patchwork.freedesktop.org/series/30161/
State : success
== Summary ==
Series 30161v2 drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
https://patchwork.freedesktop.org/api/1.0/series/30161/revisions/2/mbox/
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail -> PASS (fi-snb-2600) fdo#100215
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:445s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:452s
fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:375s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:523s
fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:268s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:506s
fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:500s
fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:498s
fi-cfl-s total:289 pass:250 dwarn:4 dfail:0 fail:0 skip:35 time:458s
fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:453s
fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:591s
fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:424s
fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:410s
fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:435s
fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:486s
fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:462s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:496s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:577s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:586s
fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:553s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:456s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:534s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:496s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:464s
fi-skl-x1585l total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:473s
fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:566s
fi-snb-2600 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:429s
c422dc1ff5f3ab3d3bea7556b542d415a9bd93eb drm-tip: 2017y-09m-12d-17h-33m-37s UTC integration manifest
f0c820a15d54 drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5667/
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine. (rev2)
2017-09-11 22:42 [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine Rodrigo Vivi
` (3 preceding siblings ...)
2017-09-12 18:53 ` ✓ Fi.CI.BAT: success for drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine. (rev2) Patchwork
@ 2017-09-13 2:15 ` Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-09-13 2:15 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine. (rev2)
URL : https://patchwork.freedesktop.org/series/30161/
State : success
== Summary ==
Test kms_chv_cursor_fail:
Subgroup pipe-B-128x128-right-edge:
skip -> PASS (shard-hsw)
Test kms_fbc_crc:
Subgroup mmap_cpu:
skip -> PASS (shard-hsw)
Test kms_cursor_legacy:
Subgroup cursor-vs-flip-legacy:
skip -> PASS (shard-hsw)
Test kms_universal_plane:
Subgroup universal-plane-pipe-A-sanity:
skip -> PASS (shard-hsw)
Subgroup universal-plane-pipe-C-sanity:
skip -> PASS (shard-hsw)
Test pm_rpm:
Subgroup modeset-non-lpsp-stress:
skip -> PASS (shard-hsw)
Test kms_atomic_transition:
Subgroup plane-all-modeset-transition-fencing:
skip -> PASS (shard-hsw)
Test kms_cursor_crc:
Subgroup cursor-128x42-sliding:
skip -> PASS (shard-hsw)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-pri-shrfb-draw-blt:
skip -> PASS (shard-hsw)
Test prime_self_import:
Subgroup reimport-vs-gem_close-race:
fail -> PASS (shard-hsw)
Test perf:
Subgroup polling:
pass -> FAIL (shard-hsw) fdo#102252 +1
Test kms_setmode:
Subgroup basic:
fail -> PASS (shard-hsw) fdo#99912
Test gem_eio:
Subgroup in-flight:
fail -> PASS (shard-hsw) fdo#102616
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102616 https://bugs.freedesktop.org/show_bug.cgi?id=102616
shard-hsw total:2419 pass:1324 dwarn:1 dfail:0 fail:13 skip:1081 time:9657s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5667/shards.html
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-09-13 2:15 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-09-11 22:42 [PATCH] drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine Rodrigo Vivi
2017-09-11 23:13 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-09-12 0:54 ` ✓ Fi.CI.IGT: " Patchwork
2017-09-12 17:47 ` [PATCH] " Pandiyan, Dhinakaran
2017-09-12 18:30 ` Rodrigo Vivi
2017-09-12 18:53 ` ✓ Fi.CI.BAT: success for drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine. (rev2) Patchwork
2017-09-13 2:15 ` ✓ Fi.CI.IGT: " Patchwork
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