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From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot
Date: Tue, 26 Sep 2017 04:32:19 +0000	[thread overview]
Message-ID: <1506400339.27760.4.camel@intel.com> (raw)
In-Reply-To: <adda7aa5-ea94-fac8-ae7e-b51ee8279807@denx.de>

On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.chee at intel.com wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > 
> > Clock frequency info is required in U-boot.
> > 
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> I want a TB on Gen 5
> 
What is TB?
> > 
> > ---
> >  arch/arm/mach-socfpga/board.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > socfpga/board.c
> > index 965f9dc..a00f63b 100644
> > --- a/arch/arm/mach-socfpga/board.c
> > +++ b/arch/arm/mach-socfpga/board.c
> > @@ -8,7 +8,10 @@
> >  
> >  #include <common.h>
> >  #include <errno.h>
> > +#include <fdtdec.h>
> >  #include <asm/arch/reset_manager.h>
> > +#include <asm/arch/clock_manager.h>
> > +#include <asm/arch/misc.h>
> >  #include <asm/io.h>
> >  
> >  #include <usb.h>
> > @@ -26,6 +29,9 @@ int board_init(void)
> >  	/* Address of boot parameters for ATAG (if ATAG is used)
> > */
> >  	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> >  
> > +	/* configuring the clock based on handoff */
> > +	cm_basic_init(gd->fdt_blob);
> > +
> >  	return 0;
> >  }
> >  
> > 
> 

  reply	other threads:[~2017-09-26  4:32 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-25  8:39 [U-Boot] [PATCH v2 00/19] Add FPGA, SDRAM, SPL loads U-boot & booting to console tien.fong.chee at intel.com
2017-09-25  8:39 ` [U-Boot] [PATCH v2 01/19] ARM: socfpga: add bindings doc for arria10 fpga manager tien.fong.chee at intel.com
2017-09-25  8:59   ` Marek Vasut
2017-09-25  8:39 ` [U-Boot] [PATCH v2 02/19] doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA manager tien.fong.chee at intel.com
2017-09-25  9:00   ` Marek Vasut
2017-09-26  8:54     ` Chee, Tien Fong
2017-09-26 10:30       ` Marek Vasut
2017-09-27  3:12         ` Chee, Tien Fong
2017-09-27  8:29           ` Marek Vasut
2017-09-28  2:49             ` Chee, Tien Fong
2017-09-25  9:01   ` Marek Vasut
2017-09-26  8:32     ` Chee, Tien Fong
2017-09-25  8:39 ` [U-Boot] [PATCH v2 03/19] dts: Add FPGA bitstream properties to Arria 10 DTS tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA programming interface tien.fong.chee at intel.com
2017-09-25  9:03   ` Marek Vasut
2017-09-29  7:42     ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 05/19] arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes tien.fong.chee at intel.com
2017-09-25  9:08   ` Marek Vasut
2017-09-25  8:40 ` [U-Boot] [PATCH v2 06/19] dts: Enable fpga-mgr node build for Arria 10 SPL tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 07/19] fdt: Add compatible strings for Arria 10 tien.fong.chee at intel.com
2017-09-25  9:08   ` Marek Vasut
2017-12-10 19:34     ` Simon Glass
2017-09-25  8:40 ` [U-Boot] [PATCH v2 08/19] fs: Enable generic filesystems interface support in SPL tien.fong.chee at intel.com
2017-09-25  9:09   ` Marek Vasut
2017-10-09  4:47   ` Simon Glass
2017-09-25  8:40 ` [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash tien.fong.chee at intel.com
2017-09-25  9:14   ` Marek Vasut
2017-09-26  8:30     ` Chee, Tien Fong
2017-09-26 10:32       ` Marek Vasut
2017-09-27  6:05         ` Chee, Tien Fong
2017-09-27  8:30           ` Marek Vasut
2017-09-28  2:45             ` Chee, Tien Fong
2017-09-26  9:52     ` Chee, Tien Fong
2017-09-26 10:39       ` Marek Vasut
2017-09-27  9:13         ` Chee, Tien Fong
2017-09-27  9:23           ` Marek Vasut
2017-09-28 15:14             ` Chee, Tien Fong
2017-09-28 15:18               ` Marek Vasut
2017-10-09  4:47   ` Simon Glass
2017-09-25  8:40 ` [U-Boot] [PATCH v2 10/19] arm: socfpga: Rename the gen5 sdram driver to more specific name tien.fong.chee at intel.com
2017-09-25  9:15   ` Marek Vasut
2017-09-26  8:23     ` Chee, Tien Fong
2017-09-26 10:33       ` Marek Vasut
2017-09-27  5:06         ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 11/19] arm: socfpga: Add DRAM bank size initialization function tien.fong.chee at intel.com
2017-09-25  9:15   ` Marek Vasut
2017-09-26  8:20     ` Chee, Tien Fong
2017-09-26 10:33       ` Marek Vasut
2017-10-02 10:01         ` Chee, Tien Fong
2017-10-02 10:04           ` Marek Vasut
2017-10-02 10:06             ` Chee, Tien Fong
2017-10-03  3:30               ` Ley Foon Tan
2017-09-25  8:40 ` [U-Boot] [PATCH v2 12/19] arm: socfpga: Add DDR driver for Arria 10 tien.fong.chee at intel.com
2017-09-25  9:19   ` Marek Vasut
2017-09-26  8:20     ` Chee, Tien Fong
2017-09-26 10:35       ` Marek Vasut
2017-09-27  4:55         ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 13/19] configs: Add DDR Kconfig support " tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 14/19] arm: socfpga: Enable build for DDR " tien.fong.chee at intel.com
2017-09-25  9:20   ` Marek Vasut
2017-09-26  5:06     ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 15/19] arm: socfpga: Add support to memory allocation in SPL tien.fong.chee at intel.com
2017-09-25  9:21   ` Marek Vasut
2017-09-26  5:06     ` Chee, Tien Fong
2017-09-26 10:37       ` Marek Vasut
2017-09-27  5:43         ` Chee, Tien Fong
2017-09-27  8:32           ` Marek Vasut
2017-09-28  2:48             ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10 tien.fong.chee at intel.com
2017-09-25  9:23   ` Marek Vasut
2017-09-26  4:42     ` Chee, Tien Fong
2017-09-26 10:37       ` Marek Vasut
2017-09-27  3:30         ` Chee, Tien Fong
2017-09-27  8:33           ` Marek Vasut
2017-09-28  2:46             ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot tien.fong.chee at intel.com
2017-09-25  9:23   ` Marek Vasut
2017-09-26  4:32     ` Chee, Tien Fong [this message]
2017-09-27  3:24     ` Chee, Tien Fong
2017-10-02 10:04     ` Chee, Tien Fong
2017-10-02 10:10       ` Marek Vasut
2017-10-02 10:25         ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 18/19] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot tien.fong.chee at intel.com
2017-09-25  9:24   ` Marek Vasut
2017-09-26  4:31     ` Chee, Tien Fong
2017-09-26 10:38       ` Marek Vasut
2017-09-27  3:14         ` Chee, Tien Fong

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