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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 10/19] arm: socfpga: Rename the gen5 sdram driver to more specific name
Date: Mon, 25 Sep 2017 11:15:06 +0200	[thread overview]
Message-ID: <800f086c-9879-3d13-d0f3-f478ac98446e@denx.de> (raw)
In-Reply-To: <1506328815-23733-11-git-send-email-tien.fong.chee@intel.com>

On 09/25/2017 10:40 AM, tien.fong.chee at intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> Current sdram driver is only applied to gen5 device, hence it is better
> to rename sdram driver to more specific name which is related to gen5
> device.
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
>  arch/arm/mach-socfpga/include/mach/sdram.h         | 434 +--------------------
>  .../include/mach/{sdram.h => sdram_gen5.h}         |   6 +-
>  drivers/ddr/altera/Makefile                        |   2 +-
>  drivers/ddr/altera/{sdram.c => sdram_gen5.c}       |   0
>  4 files changed, 8 insertions(+), 434 deletions(-)
>  copy arch/arm/mach-socfpga/include/mach/{sdram.h => sdram_gen5.h} (99%)
>  rename drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h b/arch/arm/mach-socfpga/include/mach/sdram.h
> index b11228f..4a9754e 100644
> --- a/arch/arm/mach-socfpga/include/mach/sdram.h
> +++ b/arch/arm/mach-socfpga/include/mach/sdram.h
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright Altera Corporation (C) 2014-2015
> + * Copyright (C) 2017 Intel Corporation <www.intel.com>

Retain the old copyright ?

>   *
>   * SPDX-License-Identifier:	GPL-2.0+
>   */
> @@ -8,435 +8,9 @@
>  
>  #ifndef __ASSEMBLY__

What's with this massive deletion here ?

> -unsigned long sdram_calculate_size(void);
> -int sdram_mmr_init_full(unsigned int sdr_phy_reg);
> -int sdram_calibration_full(void);
> -
> -const struct socfpga_sdram_config *socfpga_get_sdram_config(void);
> -
> -void socfpga_get_seq_ac_init(const u32 **init, unsigned int *nelem);
> -void socfpga_get_seq_inst_init(const u32 **init, unsigned int *nelem);
> -const struct socfpga_sdram_rw_mgr_config *socfpga_get_sdram_rwmgr_config(void);
[...]

-- 
Best regards,
Marek Vasut

  reply	other threads:[~2017-09-25  9:15 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-25  8:39 [U-Boot] [PATCH v2 00/19] Add FPGA, SDRAM, SPL loads U-boot & booting to console tien.fong.chee at intel.com
2017-09-25  8:39 ` [U-Boot] [PATCH v2 01/19] ARM: socfpga: add bindings doc for arria10 fpga manager tien.fong.chee at intel.com
2017-09-25  8:59   ` Marek Vasut
2017-09-25  8:39 ` [U-Boot] [PATCH v2 02/19] doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA manager tien.fong.chee at intel.com
2017-09-25  9:00   ` Marek Vasut
2017-09-26  8:54     ` Chee, Tien Fong
2017-09-26 10:30       ` Marek Vasut
2017-09-27  3:12         ` Chee, Tien Fong
2017-09-27  8:29           ` Marek Vasut
2017-09-28  2:49             ` Chee, Tien Fong
2017-09-25  9:01   ` Marek Vasut
2017-09-26  8:32     ` Chee, Tien Fong
2017-09-25  8:39 ` [U-Boot] [PATCH v2 03/19] dts: Add FPGA bitstream properties to Arria 10 DTS tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA programming interface tien.fong.chee at intel.com
2017-09-25  9:03   ` Marek Vasut
2017-09-29  7:42     ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 05/19] arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes tien.fong.chee at intel.com
2017-09-25  9:08   ` Marek Vasut
2017-09-25  8:40 ` [U-Boot] [PATCH v2 06/19] dts: Enable fpga-mgr node build for Arria 10 SPL tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 07/19] fdt: Add compatible strings for Arria 10 tien.fong.chee at intel.com
2017-09-25  9:08   ` Marek Vasut
2017-12-10 19:34     ` Simon Glass
2017-09-25  8:40 ` [U-Boot] [PATCH v2 08/19] fs: Enable generic filesystems interface support in SPL tien.fong.chee at intel.com
2017-09-25  9:09   ` Marek Vasut
2017-10-09  4:47   ` Simon Glass
2017-09-25  8:40 ` [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash tien.fong.chee at intel.com
2017-09-25  9:14   ` Marek Vasut
2017-09-26  8:30     ` Chee, Tien Fong
2017-09-26 10:32       ` Marek Vasut
2017-09-27  6:05         ` Chee, Tien Fong
2017-09-27  8:30           ` Marek Vasut
2017-09-28  2:45             ` Chee, Tien Fong
2017-09-26  9:52     ` Chee, Tien Fong
2017-09-26 10:39       ` Marek Vasut
2017-09-27  9:13         ` Chee, Tien Fong
2017-09-27  9:23           ` Marek Vasut
2017-09-28 15:14             ` Chee, Tien Fong
2017-09-28 15:18               ` Marek Vasut
2017-10-09  4:47   ` Simon Glass
2017-09-25  8:40 ` [U-Boot] [PATCH v2 10/19] arm: socfpga: Rename the gen5 sdram driver to more specific name tien.fong.chee at intel.com
2017-09-25  9:15   ` Marek Vasut [this message]
2017-09-26  8:23     ` Chee, Tien Fong
2017-09-26 10:33       ` Marek Vasut
2017-09-27  5:06         ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 11/19] arm: socfpga: Add DRAM bank size initialization function tien.fong.chee at intel.com
2017-09-25  9:15   ` Marek Vasut
2017-09-26  8:20     ` Chee, Tien Fong
2017-09-26 10:33       ` Marek Vasut
2017-10-02 10:01         ` Chee, Tien Fong
2017-10-02 10:04           ` Marek Vasut
2017-10-02 10:06             ` Chee, Tien Fong
2017-10-03  3:30               ` Ley Foon Tan
2017-09-25  8:40 ` [U-Boot] [PATCH v2 12/19] arm: socfpga: Add DDR driver for Arria 10 tien.fong.chee at intel.com
2017-09-25  9:19   ` Marek Vasut
2017-09-26  8:20     ` Chee, Tien Fong
2017-09-26 10:35       ` Marek Vasut
2017-09-27  4:55         ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 13/19] configs: Add DDR Kconfig support " tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 14/19] arm: socfpga: Enable build for DDR " tien.fong.chee at intel.com
2017-09-25  9:20   ` Marek Vasut
2017-09-26  5:06     ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 15/19] arm: socfpga: Add support to memory allocation in SPL tien.fong.chee at intel.com
2017-09-25  9:21   ` Marek Vasut
2017-09-26  5:06     ` Chee, Tien Fong
2017-09-26 10:37       ` Marek Vasut
2017-09-27  5:43         ` Chee, Tien Fong
2017-09-27  8:32           ` Marek Vasut
2017-09-28  2:48             ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10 tien.fong.chee at intel.com
2017-09-25  9:23   ` Marek Vasut
2017-09-26  4:42     ` Chee, Tien Fong
2017-09-26 10:37       ` Marek Vasut
2017-09-27  3:30         ` Chee, Tien Fong
2017-09-27  8:33           ` Marek Vasut
2017-09-28  2:46             ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot tien.fong.chee at intel.com
2017-09-25  9:23   ` Marek Vasut
2017-09-26  4:32     ` Chee, Tien Fong
2017-09-27  3:24     ` Chee, Tien Fong
2017-10-02 10:04     ` Chee, Tien Fong
2017-10-02 10:10       ` Marek Vasut
2017-10-02 10:25         ` Chee, Tien Fong
2017-09-25  8:40 ` [U-Boot] [PATCH v2 18/19] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot tien.fong.chee at intel.com
2017-09-25  8:40 ` [U-Boot] [PATCH v2 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot tien.fong.chee at intel.com
2017-09-25  9:24   ` Marek Vasut
2017-09-26  4:31     ` Chee, Tien Fong
2017-09-26 10:38       ` Marek Vasut
2017-09-27  3:14         ` Chee, Tien Fong

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