* [PATCH 0/2] Fix two pinctrl issues
@ 2017-09-30 12:13 David Wu
2017-09-30 12:13 ` [PATCH 1/2] pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf David Wu
2017-09-30 12:13 ` [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii David Wu
0 siblings, 2 replies; 7+ messages in thread
From: David Wu @ 2017-09-30 12:13 UTC (permalink / raw)
To: heiko, linus.walleij
Cc: huangtao, andy.yan, linux-rockchip, linux-gpio, linux-kernel, David Wu
They are:
1. Fix the rk3399 gpio0 and gpio1 banks' drive strength offset.
2. Fix the correct routing config for the gmac-m1 pins between rmii and rgmii.
David Wu (2):
pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at
pmu grf
pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins
of rmii and rgmii
drivers/pinctrl/pinctrl-rockchip.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf
2017-09-30 12:13 [PATCH 0/2] Fix two pinctrl issues David Wu
@ 2017-09-30 12:13 ` David Wu
2017-09-30 12:13 ` [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii David Wu
1 sibling, 0 replies; 7+ messages in thread
From: David Wu @ 2017-09-30 12:13 UTC (permalink / raw)
To: heiko, linus.walleij
Cc: huangtao, andy.yan, linux-rockchip, linux-gpio, linux-kernel, David Wu
The offset of gpio0 and gpio1 bank drive strength is 0x8, not 0x4.
But the mux is 0x4, we couldn't use the IOMUX_WIDTH_4BIT flag, so
we give them actual offset.
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
drivers/pinctrl/pinctrl-rockchip.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index b5cb785..c7c9beb 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3456,8 +3456,8 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
DRV_TYPE_IO_1V8_ONLY,
DRV_TYPE_IO_DEFAULT,
DRV_TYPE_IO_DEFAULT,
- 0x0,
- 0x8,
+ 0x80,
+ 0x88,
-1,
-1,
PULL_TYPE_IO_1V8_ONLY,
@@ -3473,10 +3473,10 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
DRV_TYPE_IO_1V8_OR_3V0,
DRV_TYPE_IO_1V8_OR_3V0,
DRV_TYPE_IO_1V8_OR_3V0,
- 0x20,
- 0x28,
- 0x30,
- 0x38
+ 0xa0,
+ 0xa8,
+ 0xb0,
+ 0xb8
),
PIN_BANK_DRV_FLAGS_PULL_FLAGS(2, 32, "gpio2", DRV_TYPE_IO_1V8_OR_3V0,
DRV_TYPE_IO_1V8_OR_3V0,
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii
2017-09-30 12:13 [PATCH 0/2] Fix two pinctrl issues David Wu
2017-09-30 12:13 ` [PATCH 1/2] pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf David Wu
@ 2017-09-30 12:13 ` David Wu
2017-09-30 15:07 ` Heiko Stuebner
1 sibling, 1 reply; 7+ messages in thread
From: David Wu @ 2017-09-30 12:13 UTC (permalink / raw)
To: heiko, linus.walleij
Cc: huangtao, andy.yan, linux-rockchip, linux-gpio, linux-kernel, David Wu
If the gmac-m1 optimization(bit10) is selected, the gpio function
of gmac pins is not valid. We may use the rmii mode for gmac interface,
the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
and gmac_rxd0m3 select bit10 is more correct.
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
drivers/pinctrl/pinctrl-rockchip.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index c7c9beb..9e0cabf 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -900,12 +900,19 @@ static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
.route_offset = 0x50,
.route_val = BIT(16) | BIT(16 + 1) | BIT(0),
}, {
- /* gmac-m1-optimized_rxd0 */
+ /* gmac-m1_rxd0 */
.bank_num = 1,
.pin = 11,
.func = 2,
.route_offset = 0x50,
- .route_val = BIT(16 + 2) | BIT(16 + 10) | BIT(2) | BIT(10),
+ .route_val = BIT(16 + 2) | BIT(2),
+ }, {
+ /* gmac-m1-optimized_rxd3 */
+ .bank_num = 1,
+ .pin = 14,
+ .func = 2,
+ .route_offset = 0x50,
+ .route_val = BIT(16 + 10) | BIT(10),
}, {
/* pdm_sdi0m0 */
.bank_num = 2,
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii
2017-09-30 12:13 ` [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii David Wu
@ 2017-09-30 15:07 ` Heiko Stuebner
2017-10-07 10:32 ` Linus Walleij
0 siblings, 1 reply; 7+ messages in thread
From: Heiko Stuebner @ 2017-09-30 15:07 UTC (permalink / raw)
To: David Wu
Cc: linus.walleij, huangtao, andy.yan, linux-rockchip, linux-gpio,
linux-kernel
Hi David,
Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
> If the gmac-m1 optimization(bit10) is selected, the gpio function
> of gmac pins is not valid. We may use the rmii mode for gmac interface,
> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
> and gmac_rxd0m3 select bit10 is more correct.
>
> Signed-off-by: David Wu <david.wu@rock-chips.com>
the patch subject should mention the the rk3328 whose routing gets fixed
(like adding a simple "on rk3328" to it), otherwise
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii
2017-09-30 15:07 ` Heiko Stuebner
@ 2017-10-07 10:32 ` Linus Walleij
2017-10-07 18:50 ` Heiko Stuebner
2017-10-09 1:21 ` David.Wu
0 siblings, 2 replies; 7+ messages in thread
From: Linus Walleij @ 2017-10-07 10:32 UTC (permalink / raw)
To: Heiko Stuebner
Cc: David Wu, Tao Huang, Andy Yan, open list:ARM/Rockchip SoC...,
linux-gpio, linux-kernel
On Sat, Sep 30, 2017 at 5:07 PM, Heiko Stuebner <heiko@sntech.de> wrote:
> Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
>> If the gmac-m1 optimization(bit10) is selected, the gpio function
>> of gmac pins is not valid. We may use the rmii mode for gmac interface,
>> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
>> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
>> and gmac_rxd0m3 select bit10 is more correct.
>>
>> Signed-off-by: David Wu <david.wu@rock-chips.com>
>
> the patch subject should mention the the rk3328 whose routing gets fixed
> (like adding a simple "on rk3328" to it), otherwise
>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
I added rk3328 to it, also assumed this Reviewed-by covers patch 1/2
as well and applied both with your tag.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii
2017-10-07 10:32 ` Linus Walleij
@ 2017-10-07 18:50 ` Heiko Stuebner
2017-10-09 1:21 ` David.Wu
1 sibling, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2017-10-07 18:50 UTC (permalink / raw)
To: Linus Walleij
Cc: David Wu, Tao Huang, Andy Yan, open list:ARM/Rockchip SoC...,
linux-gpio, linux-kernel
Hi Linus,
Am Samstag, 7. Oktober 2017, 12:32:51 CEST schrieb Linus Walleij:
> On Sat, Sep 30, 2017 at 5:07 PM, Heiko Stuebner <heiko@sntech.de> wrote:
> > Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
> >> If the gmac-m1 optimization(bit10) is selected, the gpio function
> >> of gmac pins is not valid. We may use the rmii mode for gmac interface,
> >> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
> >> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
> >> and gmac_rxd0m3 select bit10 is more correct.
> >>
> >> Signed-off-by: David Wu <david.wu@rock-chips.com>
> >
> > the patch subject should mention the the rk3328 whose routing gets fixed
> > (like adding a simple "on rk3328" to it), otherwise
> >
> > Reviewed-by: Heiko Stuebner <heiko@sntech.de>
>
> I added rk3328 to it, also assumed this Reviewed-by covers patch 1/2
> as well and applied both with your tag.
while I did mean to cross-check patch 1/2 separately with the soc manual,
I got sidetracked with my current vacation :-) . Anyway, it did look ok on
first glance then and I also cannot find issues with it now. So all is good.
Heiko
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii
2017-10-07 10:32 ` Linus Walleij
2017-10-07 18:50 ` Heiko Stuebner
@ 2017-10-09 1:21 ` David.Wu
1 sibling, 0 replies; 7+ messages in thread
From: David.Wu @ 2017-10-09 1:21 UTC (permalink / raw)
To: Linus Walleij, Heiko Stuebner
Cc: Tao Huang, Andy Yan, open list:ARM/Rockchip SoC...,
linux-gpio, linux-kernel
Hi Linus,
Thanks for you adding it.
I left the office for a few days due to holiday.
在 2017/10/7 18:32, Linus Walleij 写道:
> On Sat, Sep 30, 2017 at 5:07 PM, Heiko Stuebner <heiko@sntech.de> wrote:
>> Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
>>> If the gmac-m1 optimization(bit10) is selected, the gpio function
>>> of gmac pins is not valid. We may use the rmii mode for gmac interface,
>>> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
>>> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
>>> and gmac_rxd0m3 select bit10 is more correct.
>>>
>>> Signed-off-by: David Wu <david.wu@rock-chips.com>
>>
>> the patch subject should mention the the rk3328 whose routing gets fixed
>> (like adding a simple "on rk3328" to it), otherwise
>>
>> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
>
> I added rk3328 to it, also assumed this Reviewed-by covers patch 1/2
> as well and applied both with your tag.
>
> Yours,
> Linus Walleij
>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-10-09 1:21 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-09-30 12:13 [PATCH 0/2] Fix two pinctrl issues David Wu
2017-09-30 12:13 ` [PATCH 1/2] pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf David Wu
2017-09-30 12:13 ` [PATCH 2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii David Wu
2017-09-30 15:07 ` Heiko Stuebner
2017-10-07 10:32 ` Linus Walleij
2017-10-07 18:50 ` Heiko Stuebner
2017-10-09 1:21 ` David.Wu
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.