* [PATCH 0/2] clk: qcom: Add RPM clocks for msm8996
@ 2017-10-10 8:57 Rajendra Nayak
2017-10-10 8:57 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak
[not found] ` <1507625834-30499-1-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
0 siblings, 2 replies; 13+ messages in thread
From: Rajendra Nayak @ 2017-10-10 8:57 UTC (permalink / raw)
To: sboyd, mturquette, andy.gross
Cc: linux-clk, linux-arm-msm, devicetree, Rajendra Nayak
Add support for RPM clocks on msm8996 platforms
Rajendra Nayak (2):
clk: qcom: clk-smd-rpm: add msm8996 rpmclks
arm64: dts: msm8996: Add the rpm clock controller node
.../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ++
drivers/clk/qcom/clk-smd-rpm.c | 82 ++++++++++++++++++++++
include/dt-bindings/clock/qcom,rpmcc.h | 14 ++++
include/linux/soc/qcom/smd-rpm.h | 4 ++
5 files changed, 107 insertions(+)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks 2017-10-10 8:57 [PATCH 0/2] clk: qcom: Add RPM clocks for msm8996 Rajendra Nayak @ 2017-10-10 8:57 ` Rajendra Nayak [not found] ` <1507625834-30499-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> ` (2 more replies) [not found] ` <1507625834-30499-1-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 1 sibling, 3 replies; 13+ messages in thread From: Rajendra Nayak @ 2017-10-10 8:57 UTC (permalink / raw) To: sboyd, mturquette, andy.gross Cc: linux-clk, linux-arm-msm, devicetree, Rajendra Nayak, Srinivas Kandagatla Add all RPM controlled clocks on msm8996 platform Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> [srini: Fixed various issues with offsets and made names specific to msm8996] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + drivers/clk/qcom/clk-smd-rpm.c | 82 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,rpmcc.h | 14 ++++ include/linux/soc/qcom/smd-rpm.h | 4 ++ 4 files changed, 101 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt index a7235e9..a7e4a86 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt @@ -13,6 +13,7 @@ Required properties : "qcom,rpmcc-msm8916", "qcom,rpmcc" "qcom,rpmcc-msm8974", "qcom,rpmcc" "qcom,rpmcc-apq8064", "qcom,rpmcc" + "qcom,rpmcc-msm8996", "qcom,rpmcc" - #clock-cells : shall contain 1 diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index cc03d55..c26d900 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -530,9 +530,91 @@ static int clk_smd_rpm_enable_scaling(struct qcom_smd_rpm *rpm) .clks = msm8974_clks, .num_clks = ARRAY_SIZE(msm8974_clks), }; + +/* msm8996 */ +DEFINE_CLK_SMD_RPM(msm8996, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); +DEFINE_CLK_SMD_RPM(msm8996, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2); +DEFINE_CLK_SMD_RPM(msm8996, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk, + QCOM_SMD_RPM_MMAXI_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); +DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre1_noc_clk, aggre1_noc_a_clk, + QCOM_SMD_RPM_AGGR_CLK, 1, 1000); +DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre2_noc_clk, aggre2_noc_a_clk, + QCOM_SMD_RPM_AGGR_CLK, 2, 1000); +DEFINE_CLK_SMD_RPM_QDSS(msm8996, qdss_clk, qdss_a_clk, + QCOM_SMD_RPM_MISC_CLK, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, bb_clk1, bb_clk1_a, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, bb_clk2, bb_clk2_a, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, rf_clk1, rf_clk1_a, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, rf_clk2, rf_clk2_a, 5); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, ln_bb_clk, ln_bb_a_clk, 8); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, div_clk1, div_clk1_a, 0xb); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, div_clk2, div_clk2_a, 0xc); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, div_clk3, div_clk3_a, 0xd); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, bb_clk1_pin, bb_clk1_a_pin, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, bb_clk2_pin, bb_clk2_a_pin, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, rf_clk1_pin, rf_clk1_a_pin, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, rf_clk2_pin, rf_clk2_a_pin, 5); + +static struct clk_smd_rpm *msm8996_clks[] = { + [RPM_SMD_PCNOC_CLK] = &msm8996_pcnoc_clk, + [RPM_SMD_PCNOC_A_CLK] = &msm8996_pcnoc_a_clk, + [RPM_SMD_SNOC_CLK] = &msm8996_snoc_clk, + [RPM_SMD_SNOC_A_CLK] = &msm8996_snoc_a_clk, + [RPM_SMD_CNOC_CLK] = &msm8996_cnoc_clk, + [RPM_SMD_CNOC_A_CLK] = &msm8996_cnoc_a_clk, + [RPM_SMD_BIMC_CLK] = &msm8996_bimc_clk, + [RPM_SMD_BIMC_A_CLK] = &msm8996_bimc_a_clk, + [RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk, + [RPM_SMD_MMAXI_A_CLK] = &msm8996_mmssnoc_axi_rpm_a_clk, + [RPM_SMD_IPA_CLK] = &msm8996_ipa_clk, + [RPM_SMD_IPA_A_CLK] = &msm8996_ipa_a_clk, + [RPM_SMD_CE1_CLK] = &msm8996_ce1_clk, + [RPM_SMD_CE1_A_CLK] = &msm8996_ce1_a_clk, + [RPM_SMD_AGGR1_NOC_CLK] = &msm8996_aggre1_noc_clk, + [RPM_SMD_AGGR1_NOC_A_CLK] = &msm8996_aggre1_noc_a_clk, + [RPM_SMD_AGGR2_NOC_CLK] = &msm8996_aggre2_noc_clk, + [RPM_SMD_AGGR2_NOC_A_CLK] = &msm8996_aggre2_noc_a_clk, + [RPM_SMD_QDSS_CLK] = &msm8996_qdss_clk, + [RPM_SMD_QDSS_A_CLK] = &msm8996_qdss_a_clk, + [RPM_SMD_BB_CLK1] = &msm8996_bb_clk1, + [RPM_SMD_BB_CLK1_A] = &msm8996_bb_clk1_a, + [RPM_SMD_BB_CLK2] = &msm8996_bb_clk2, + [RPM_SMD_BB_CLK2_A] = &msm8996_bb_clk2_a, + [RPM_SMD_RF_CLK1] = &msm8996_rf_clk1, + [RPM_SMD_RF_CLK1_A] = &msm8996_rf_clk1_a, + [RPM_SMD_RF_CLK2] = &msm8996_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &msm8996_rf_clk2_a, + [RPM_SMD_LN_BB_CLK] = &msm8996_ln_bb_clk, + [RPM_SMD_LN_BB_A_CLK] = &msm8996_ln_bb_a_clk, + [RPM_SMD_DIV_CLK1] = &msm8996_div_clk1, + [RPM_SMD_DIV_A_CLK1] = &msm8996_div_clk1_a, + [RPM_SMD_DIV_CLK2] = &msm8996_div_clk2, + [RPM_SMD_DIV_A_CLK2] = &msm8996_div_clk2_a, + [RPM_SMD_DIV_CLK3] = &msm8996_div_clk3, + [RPM_SMD_DIV_A_CLK3] = &msm8996_div_clk3_a, + [RPM_SMD_BB_CLK1_PIN] = &msm8996_bb_clk1_pin, + [RPM_SMD_BB_CLK1_A_PIN] = &msm8996_bb_clk1_a_pin, + [RPM_SMD_BB_CLK2_PIN] = &msm8996_bb_clk2_pin, + [RPM_SMD_BB_CLK2_A_PIN] = &msm8996_bb_clk2_a_pin, + [RPM_SMD_RF_CLK1_PIN] = &msm8996_rf_clk1_pin, + [RPM_SMD_RF_CLK1_A_PIN] = &msm8996_rf_clk1_a_pin, + [RPM_SMD_RF_CLK2_PIN] = &msm8996_rf_clk2_pin, + [RPM_SMD_RF_CLK2_A_PIN] = &msm8996_rf_clk2_a_pin, +}; + +static const struct rpm_smd_clk_desc rpm_clk_msm8996 = { + .clks = msm8996_clks, + .num_clks = ARRAY_SIZE(msm8996_clks), +}; + static const struct of_device_id rpm_smd_clk_match_table[] = { { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 }, { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 }, + { .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 }, { } }; MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table); diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h index 96b63c0..eb5ef66 100644 --- a/include/dt-bindings/clock/qcom,rpmcc.h +++ b/include/dt-bindings/clock/qcom,rpmcc.h @@ -101,5 +101,19 @@ #define RPM_SMD_CXO_A1_A_PIN 59 #define RPM_SMD_CXO_A2_PIN 60 #define RPM_SMD_CXO_A2_A_PIN 61 +#define RPM_SMD_AGGR1_NOC_CLK 62 +#define RPM_SMD_AGGR1_NOC_A_CLK 63 +#define RPM_SMD_AGGR2_NOC_CLK 64 +#define RPM_SMD_AGGR2_NOC_A_CLK 65 +#define RPM_SMD_MMAXI_CLK 66 +#define RPM_SMD_MMAXI_A_CLK 67 +#define RPM_SMD_IPA_CLK 68 +#define RPM_SMD_IPA_A_CLK 69 +#define RPM_SMD_CE1_CLK 70 +#define RPM_SMD_CE1_A_CLK 71 +#define RPM_SMD_DIV_CLK3 72 +#define RPM_SMD_DIV_A_CLK3 73 +#define RPM_SMD_LN_BB_CLK 74 +#define RPM_SMD_LN_BB_A_CLK 75 #endif diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 2a53dca..ebdabd6 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -26,6 +26,10 @@ #define QCOM_SMD_RPM_SMPB 0x62706d73 #define QCOM_SMD_RPM_SPDM 0x63707362 #define QCOM_SMD_RPM_VSA 0x00617376 +#define QCOM_SMD_RPM_MMAXI_CLK 0x69786d6d +#define QCOM_SMD_RPM_IPA_CLK 0x617069 +#define QCOM_SMD_RPM_CE_CLK 0x6563 +#define QCOM_SMD_RPM_AGGR_CLK 0x72676761 int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, int state, -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <1507625834-30499-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>]
* Re: [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks 2017-10-10 8:57 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak @ 2017-10-10 15:38 ` Rob Herring 2017-10-11 5:43 ` Bjorn Andersson 2017-11-02 7:10 ` Stephen Boyd 2 siblings, 0 replies; 13+ messages in thread From: Rob Herring @ 2017-10-10 15:38 UTC (permalink / raw) To: Rajendra Nayak Cc: sboyd-sgV2jX0FEOL9JmXXK+q4OQ, mturquette-rdvid1DuHRBWk0Htik3J/w, andy.gross-QSEj5FYQhm4dnm+yROfE0A, linux-clk-u79uwXL29TY76Z2rM5mHXA, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, Srinivas Kandagatla On Tue, Oct 10, 2017 at 02:27:13PM +0530, Rajendra Nayak wrote: > Add all RPM controlled clocks on msm8996 platform > > Signed-off-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> > [srini: Fixed various issues with offsets and made names specific to msm8996] > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> > --- > .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + Please add acks when posting new versions. Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > drivers/clk/qcom/clk-smd-rpm.c | 82 ++++++++++++++++++++++ > include/dt-bindings/clock/qcom,rpmcc.h | 14 ++++ > include/linux/soc/qcom/smd-rpm.h | 4 ++ > 4 files changed, 101 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks @ 2017-10-10 15:38 ` Rob Herring 0 siblings, 0 replies; 13+ messages in thread From: Rob Herring @ 2017-10-10 15:38 UTC (permalink / raw) To: Rajendra Nayak Cc: sboyd, mturquette, andy.gross, linux-clk, linux-arm-msm, devicetree, Srinivas Kandagatla On Tue, Oct 10, 2017 at 02:27:13PM +0530, Rajendra Nayak wrote: > Add all RPM controlled clocks on msm8996 platform > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > [srini: Fixed various issues with offsets and made names specific to msm8996] > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > --- > .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + Please add acks when posting new versions. Acked-by: Rob Herring <robh@kernel.org> > drivers/clk/qcom/clk-smd-rpm.c | 82 ++++++++++++++++++++++ > include/dt-bindings/clock/qcom,rpmcc.h | 14 ++++ > include/linux/soc/qcom/smd-rpm.h | 4 ++ > 4 files changed, 101 insertions(+) ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks 2017-10-10 8:57 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak [not found] ` <1507625834-30499-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> @ 2017-10-11 5:43 ` Bjorn Andersson 2017-11-02 7:09 ` Stephen Boyd 2017-11-02 7:10 ` Stephen Boyd 2 siblings, 1 reply; 13+ messages in thread From: Bjorn Andersson @ 2017-10-11 5:43 UTC (permalink / raw) To: Rajendra Nayak Cc: sboyd, mturquette, andy.gross, linux-clk, linux-arm-msm, devicetree, Srinivas Kandagatla On Tue 10 Oct 01:57 PDT 2017, Rajendra Nayak wrote: > Add all RPM controlled clocks on msm8996 platform > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > [srini: Fixed various issues with offsets and made names specific to msm8996] > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Your S-o-b should be last in this list. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks 2017-10-11 5:43 ` Bjorn Andersson @ 2017-11-02 7:09 ` Stephen Boyd 0 siblings, 0 replies; 13+ messages in thread From: Stephen Boyd @ 2017-11-02 7:09 UTC (permalink / raw) To: Bjorn Andersson Cc: Rajendra Nayak, mturquette, andy.gross, linux-clk, linux-arm-msm, devicetree, Srinivas Kandagatla On 10/10, Bjorn Andersson wrote: > On Tue 10 Oct 01:57 PDT 2017, Rajendra Nayak wrote: > > > Add all RPM controlled clocks on msm8996 platform > > > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > > [srini: Fixed various issues with offsets and made names specific to msm8996] > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > > Your S-o-b should be last in this list. > I moved it to the end, which feels weird because typically first signoff is the author. But nothing I see says that's true, so let's swap it. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks 2017-10-10 8:57 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak [not found] ` <1507625834-30499-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2017-10-11 5:43 ` Bjorn Andersson @ 2017-11-02 7:10 ` Stephen Boyd 2 siblings, 0 replies; 13+ messages in thread From: Stephen Boyd @ 2017-11-02 7:10 UTC (permalink / raw) To: Rajendra Nayak Cc: mturquette, andy.gross, linux-clk, linux-arm-msm, devicetree, Srinivas Kandagatla On 10/10, Rajendra Nayak wrote: > Add all RPM controlled clocks on msm8996 platform > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > [srini: Fixed various issues with offsets and made names specific to msm8996] > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply [flat|nested] 13+ messages in thread
[parent not found: <1507625834-30499-1-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>]
* [PATCH 2/2] arm64: dts: msm8996: Add the rpm clock controller node 2017-10-10 8:57 [PATCH 0/2] clk: qcom: Add RPM clocks for msm8996 Rajendra Nayak @ 2017-10-10 8:57 ` Rajendra Nayak [not found] ` <1507625834-30499-1-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 1 sibling, 0 replies; 13+ messages in thread From: Rajendra Nayak @ 2017-10-10 8:57 UTC (permalink / raw) To: sboyd-sgV2jX0FEOL9JmXXK+q4OQ, mturquette-rdvid1DuHRBWk0Htik3J/w, andy.gross-QSEj5FYQhm4dnm+yROfE0A Cc: linux-clk-u79uwXL29TY76Z2rM5mHXA, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, Rajendra Nayak Add the rpm clock controller node for msm8996 devices Cc: Andy Gross <andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> Signed-off-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 887b61c..97464d2 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -13,6 +13,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8996.h> #include <dt-bindings/clock/qcom,mmcc-msm8996.h> +#include <dt-bindings/clock/qcom,rpmcc.h> / { model = "Qualcomm Technologies, Inc. MSM8996"; @@ -289,6 +290,11 @@ compatible = "qcom,rpm-msm8996"; qcom,glink-channels = "rpm_requests"; + rpmcc: qcom,rpmcc { + compatible = "qcom,rpmcc-msm8996"; + #clock-cells = <1>; + }; + pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/2] arm64: dts: msm8996: Add the rpm clock controller node @ 2017-10-10 8:57 ` Rajendra Nayak 0 siblings, 0 replies; 13+ messages in thread From: Rajendra Nayak @ 2017-10-10 8:57 UTC (permalink / raw) To: sboyd, mturquette, andy.gross Cc: linux-clk, linux-arm-msm, devicetree, Rajendra Nayak Add the rpm clock controller node for msm8996 devices Cc: Andy Gross <andy.gross@linaro.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 887b61c..97464d2 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -13,6 +13,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8996.h> #include <dt-bindings/clock/qcom,mmcc-msm8996.h> +#include <dt-bindings/clock/qcom,rpmcc.h> / { model = "Qualcomm Technologies, Inc. MSM8996"; @@ -289,6 +290,11 @@ compatible = "qcom,rpm-msm8996"; qcom,glink-channels = "rpm_requests"; + rpmcc: qcom,rpmcc { + compatible = "qcom,rpmcc-msm8996"; + #clock-cells = <1>; + }; + pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 2/2] arm64: dts: msm8996: Add the rpm clock controller node 2017-10-10 8:57 ` Rajendra Nayak (?) @ 2017-10-11 5:43 ` Bjorn Andersson -1 siblings, 0 replies; 13+ messages in thread From: Bjorn Andersson @ 2017-10-11 5:43 UTC (permalink / raw) To: Rajendra Nayak Cc: sboyd, mturquette, andy.gross, linux-clk, linux-arm-msm, devicetree On Tue 10 Oct 01:57 PDT 2017, Rajendra Nayak wrote: > Add the rpm clock controller node for msm8996 devices > > Cc: Andy Gross <andy.gross@linaro.org> > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 0/2] clk: qcom: Add RPM clocks for msm8996 @ 2017-03-22 9:39 Rajendra Nayak 2017-03-22 9:39 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak 0 siblings, 1 reply; 13+ messages in thread From: Rajendra Nayak @ 2017-03-22 9:39 UTC (permalink / raw) To: sboyd, mturquette Cc: linux-clk, linux-arm-msm, devicetree, srinivas.kandagatla, Rajendra Nayak This patchset adds all the RPM clocks on msm8996 platforms, while at it, we also remove some of the RCGs from the GCC driver as they are controlled by RPM and hence should not be part of GCC. Series depends on Bjorns patches which add support for glink on msm8996 https://www.spinics.net/lists/linux-wireless/msg160393.html http://www.spinics.net/lists/devicetree/msg168445.html Rajendra Nayak (2): clk: qcom: clk-smd-rpm: add msm8996 rpmclks clk: qcom: gcc-msm8996: Remove RPM controlled clocks .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + drivers/clk/qcom/clk-smd-rpm.c | 82 +++++++++++ drivers/clk/qcom/gcc-msm8996.c | 156 +++++---------------- include/dt-bindings/clock/qcom,gcc-msm8996.h | 4 - include/dt-bindings/clock/qcom,rpmcc.h | 14 ++ include/linux/soc/qcom/smd-rpm.h | 4 + 6 files changed, 134 insertions(+), 127 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks 2017-03-22 9:39 [PATCH 0/2] clk: qcom: Add RPM clocks for msm8996 Rajendra Nayak @ 2017-03-22 9:39 ` Rajendra Nayak [not found] ` <1490175566-4084-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 0 siblings, 1 reply; 13+ messages in thread From: Rajendra Nayak @ 2017-03-22 9:39 UTC (permalink / raw) To: sboyd, mturquette Cc: linux-clk, linux-arm-msm, devicetree, srinivas.kandagatla, Rajendra Nayak Add all RPM controlled clocks on msm8996 platform Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> [srini: Fixed various issues with offsets and made names specific to msm8996] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + drivers/clk/qcom/clk-smd-rpm.c | 82 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,rpmcc.h | 14 ++++ include/linux/soc/qcom/smd-rpm.h | 4 ++ 4 files changed, 101 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt index a7235e9..a7e4a86 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt @@ -13,6 +13,7 @@ Required properties : "qcom,rpmcc-msm8916", "qcom,rpmcc" "qcom,rpmcc-msm8974", "qcom,rpmcc" "qcom,rpmcc-apq8064", "qcom,rpmcc" + "qcom,rpmcc-msm8996", "qcom,rpmcc" - #clock-cells : shall contain 1 diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 3487c26..4186d3d 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -532,9 +532,91 @@ static int clk_smd_rpm_enable_scaling(struct qcom_smd_rpm *rpm) .clks = msm8974_clks, .num_clks = ARRAY_SIZE(msm8974_clks), }; + +/* msm8996 */ +DEFINE_CLK_SMD_RPM(msm8996, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); +DEFINE_CLK_SMD_RPM(msm8996, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2); +DEFINE_CLK_SMD_RPM(msm8996, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk, + QCOM_SMD_RPM_MMAXI_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8996, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); +DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre1_noc_clk, aggre1_noc_a_clk, + QCOM_SMD_RPM_AGGR_CLK, 1, 1000); +DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre2_noc_clk, aggre2_noc_a_clk, + QCOM_SMD_RPM_AGGR_CLK, 2, 1000); +DEFINE_CLK_SMD_RPM_QDSS(msm8996, qdss_clk, qdss_a_clk, + QCOM_SMD_RPM_MISC_CLK, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, bb_clk1, bb_clk1_a, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, bb_clk2, bb_clk2_a, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, rf_clk1, rf_clk1_a, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, rf_clk2, rf_clk2_a, 5); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, ln_bb_clk, ln_bb_a_clk, 8); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, div_clk1, div_clk1_a, 0xb); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, div_clk2, div_clk2_a, 0xc); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8996, div_clk3, div_clk3_a, 0xd); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, bb_clk1_pin, bb_clk1_a_pin, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, bb_clk2_pin, bb_clk2_a_pin, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, rf_clk1_pin, rf_clk1_a_pin, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, rf_clk2_pin, rf_clk2_a_pin, 5); + +static struct clk_smd_rpm *msm8996_clks[] = { + [RPM_SMD_PCNOC_CLK] = &msm8996_pcnoc_clk, + [RPM_SMD_PCNOC_A_CLK] = &msm8996_pcnoc_a_clk, + [RPM_SMD_SNOC_CLK] = &msm8996_snoc_clk, + [RPM_SMD_SNOC_A_CLK] = &msm8996_snoc_a_clk, + [RPM_SMD_CNOC_CLK] = &msm8996_cnoc_clk, + [RPM_SMD_CNOC_A_CLK] = &msm8996_cnoc_a_clk, + [RPM_SMD_BIMC_CLK] = &msm8996_bimc_clk, + [RPM_SMD_BIMC_A_CLK] = &msm8996_bimc_a_clk, + [RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk, + [RPM_SMD_MMAXI_A_CLK] = &msm8996_mmssnoc_axi_rpm_a_clk, + [RPM_SMD_IPA_CLK] = &msm8996_ipa_clk, + [RPM_SMD_IPA_A_CLK] = &msm8996_ipa_a_clk, + [RPM_SMD_CE1_CLK] = &msm8996_ce1_clk, + [RPM_SMD_CE1_A_CLK] = &msm8996_ce1_a_clk, + [RPM_SMD_AGGR1_NOC_CLK] = &msm8996_aggre1_noc_clk, + [RPM_SMD_AGGR1_NOC_A_CLK] = &msm8996_aggre1_noc_a_clk, + [RPM_SMD_AGGR2_NOC_CLK] = &msm8996_aggre2_noc_clk, + [RPM_SMD_AGGR2_NOC_A_CLK] = &msm8996_aggre2_noc_a_clk, + [RPM_SMD_QDSS_CLK] = &msm8996_qdss_clk, + [RPM_SMD_QDSS_A_CLK] = &msm8996_qdss_a_clk, + [RPM_SMD_BB_CLK1] = &msm8996_bb_clk1, + [RPM_SMD_BB_CLK1_A] = &msm8996_bb_clk1_a, + [RPM_SMD_BB_CLK2] = &msm8996_bb_clk2, + [RPM_SMD_BB_CLK2_A] = &msm8996_bb_clk2_a, + [RPM_SMD_RF_CLK1] = &msm8996_rf_clk1, + [RPM_SMD_RF_CLK1_A] = &msm8996_rf_clk1_a, + [RPM_SMD_RF_CLK2] = &msm8996_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &msm8996_rf_clk2_a, + [RPM_SMD_LN_BB_CLK] = &msm8996_ln_bb_clk, + [RPM_SMD_LN_BB_A_CLK] = &msm8996_ln_bb_a_clk, + [RPM_SMD_DIV_CLK1] = &msm8996_div_clk1, + [RPM_SMD_DIV_A_CLK1] = &msm8996_div_clk1_a, + [RPM_SMD_DIV_CLK2] = &msm8996_div_clk2, + [RPM_SMD_DIV_A_CLK2] = &msm8996_div_clk2_a, + [RPM_SMD_DIV_CLK3] = &msm8996_div_clk3, + [RPM_SMD_DIV_A_CLK3] = &msm8996_div_clk3_a, + [RPM_SMD_BB_CLK1_PIN] = &msm8996_bb_clk1_pin, + [RPM_SMD_BB_CLK1_A_PIN] = &msm8996_bb_clk1_a_pin, + [RPM_SMD_BB_CLK2_PIN] = &msm8996_bb_clk2_pin, + [RPM_SMD_BB_CLK2_A_PIN] = &msm8996_bb_clk2_a_pin, + [RPM_SMD_RF_CLK1_PIN] = &msm8996_rf_clk1_pin, + [RPM_SMD_RF_CLK1_A_PIN] = &msm8996_rf_clk1_a_pin, + [RPM_SMD_RF_CLK2_PIN] = &msm8996_rf_clk2_pin, + [RPM_SMD_RF_CLK2_A_PIN] = &msm8996_rf_clk2_a_pin, +}; + +static const struct rpm_smd_clk_desc rpm_clk_msm8996 = { + .clks = msm8996_clks, + .num_clks = ARRAY_SIZE(msm8996_clks), +}; + static const struct of_device_id rpm_smd_clk_match_table[] = { { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 }, { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 }, + { .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 }, { } }; MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table); diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h index 96b63c0..eb5ef66 100644 --- a/include/dt-bindings/clock/qcom,rpmcc.h +++ b/include/dt-bindings/clock/qcom,rpmcc.h @@ -101,5 +101,19 @@ #define RPM_SMD_CXO_A1_A_PIN 59 #define RPM_SMD_CXO_A2_PIN 60 #define RPM_SMD_CXO_A2_A_PIN 61 +#define RPM_SMD_AGGR1_NOC_CLK 62 +#define RPM_SMD_AGGR1_NOC_A_CLK 63 +#define RPM_SMD_AGGR2_NOC_CLK 64 +#define RPM_SMD_AGGR2_NOC_A_CLK 65 +#define RPM_SMD_MMAXI_CLK 66 +#define RPM_SMD_MMAXI_A_CLK 67 +#define RPM_SMD_IPA_CLK 68 +#define RPM_SMD_IPA_A_CLK 69 +#define RPM_SMD_CE1_CLK 70 +#define RPM_SMD_CE1_A_CLK 71 +#define RPM_SMD_DIV_CLK3 72 +#define RPM_SMD_DIV_A_CLK3 73 +#define RPM_SMD_LN_BB_CLK 74 +#define RPM_SMD_LN_BB_A_CLK 75 #endif diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 2a53dca..ebdabd6 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -26,6 +26,10 @@ #define QCOM_SMD_RPM_SMPB 0x62706d73 #define QCOM_SMD_RPM_SPDM 0x63707362 #define QCOM_SMD_RPM_VSA 0x00617376 +#define QCOM_SMD_RPM_MMAXI_CLK 0x69786d6d +#define QCOM_SMD_RPM_IPA_CLK 0x617069 +#define QCOM_SMD_RPM_CE_CLK 0x6563 +#define QCOM_SMD_RPM_AGGR_CLK 0x72676761 int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, int state, -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <1490175566-4084-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>]
* Re: [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks 2017-03-22 9:39 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak @ 2017-03-29 1:21 ` Rob Herring 0 siblings, 0 replies; 13+ messages in thread From: Rob Herring @ 2017-03-29 1:21 UTC (permalink / raw) To: Rajendra Nayak Cc: sboyd-sgV2jX0FEOL9JmXXK+q4OQ, mturquette-rdvid1DuHRBWk0Htik3J/w, linux-clk-u79uwXL29TY76Z2rM5mHXA, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A On Wed, Mar 22, 2017 at 03:09:25PM +0530, Rajendra Nayak wrote: > Add all RPM controlled clocks on msm8996 platform > > Signed-off-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> > [srini: Fixed various issues with offsets and made names specific to msm8996] > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> > --- > .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + > drivers/clk/qcom/clk-smd-rpm.c | 82 ++++++++++++++++++++++ > include/dt-bindings/clock/qcom,rpmcc.h | 14 ++++ > include/linux/soc/qcom/smd-rpm.h | 4 ++ > 4 files changed, 101 insertions(+) Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks @ 2017-03-29 1:21 ` Rob Herring 0 siblings, 0 replies; 13+ messages in thread From: Rob Herring @ 2017-03-29 1:21 UTC (permalink / raw) To: Rajendra Nayak Cc: sboyd, mturquette, linux-clk, linux-arm-msm, devicetree, srinivas.kandagatla On Wed, Mar 22, 2017 at 03:09:25PM +0530, Rajendra Nayak wrote: > Add all RPM controlled clocks on msm8996 platform > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > [srini: Fixed various issues with offsets and made names specific to msm8996] > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > --- > .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + > drivers/clk/qcom/clk-smd-rpm.c | 82 ++++++++++++++++++++++ > include/dt-bindings/clock/qcom,rpmcc.h | 14 ++++ > include/linux/soc/qcom/smd-rpm.h | 4 ++ > 4 files changed, 101 insertions(+) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2017-11-02 7:10 UTC | newest]
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2017-10-10 8:57 [PATCH 0/2] clk: qcom: Add RPM clocks for msm8996 Rajendra Nayak
2017-10-10 8:57 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak
[not found] ` <1507625834-30499-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-10-10 15:38 ` Rob Herring
2017-10-10 15:38 ` Rob Herring
2017-10-11 5:43 ` Bjorn Andersson
2017-11-02 7:09 ` Stephen Boyd
2017-11-02 7:10 ` Stephen Boyd
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2017-10-10 8:57 ` [PATCH 2/2] arm64: dts: msm8996: Add the rpm clock controller node Rajendra Nayak
2017-10-10 8:57 ` Rajendra Nayak
2017-10-11 5:43 ` Bjorn Andersson
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2017-03-22 9:39 [PATCH 0/2] clk: qcom: Add RPM clocks for msm8996 Rajendra Nayak
2017-03-22 9:39 ` [PATCH 1/2] clk: qcom: clk-smd-rpm: add msm8996 rpmclks Rajendra Nayak
[not found] ` <1490175566-4084-2-git-send-email-rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-03-29 1:21 ` Rob Herring
2017-03-29 1:21 ` Rob Herring
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